From bfc1b7ea85d42bdc5c749ef7301e14535ca0ad8a Mon Sep 17 00:00:00 2001 From: TommiTerza Date: Wed, 21 Aug 2024 18:05:50 +0200 Subject: [PATCH] fix --- hw/core-v-mini-mcu/core_v_mini_mcu.sv | 464 ++++++++---------- hw/core-v-mini-mcu/peripheral_subsystem.sv | 16 +- .../examples/im2col_spc_verification.py | 12 +- .../example_im2col/im2col_golden.c | 20 +- .../example_im2col/im2col_golden.h | 2 +- sw/applications/example_im2col/im2col_input.c | 18 +- sw/applications/example_im2col/im2col_input.h | 6 +- 7 files changed, 237 insertions(+), 301 deletions(-) diff --git a/hw/core-v-mini-mcu/core_v_mini_mcu.sv b/hw/core-v-mini-mcu/core_v_mini_mcu.sv index c0c39863f..55669b829 100644 --- a/hw/core-v-mini-mcu/core_v_mini_mcu.sv +++ b/hw/core-v-mini-mcu/core_v_mini_mcu.sv @@ -45,229 +45,229 @@ module core_v_mini_mcu output logic exit_valid_o, output logic gpio_0_o, - input logic gpio_0_i, + input logic gpio_0_i, output logic gpio_0_oe_o, output logic gpio_1_o, - input logic gpio_1_i, + input logic gpio_1_i, output logic gpio_1_oe_o, output logic gpio_2_o, - input logic gpio_2_i, + input logic gpio_2_i, output logic gpio_2_oe_o, output logic gpio_3_o, - input logic gpio_3_i, + input logic gpio_3_i, output logic gpio_3_oe_o, output logic gpio_4_o, - input logic gpio_4_i, + input logic gpio_4_i, output logic gpio_4_oe_o, output logic gpio_5_o, - input logic gpio_5_i, + input logic gpio_5_i, output logic gpio_5_oe_o, output logic gpio_6_o, - input logic gpio_6_i, + input logic gpio_6_i, output logic gpio_6_oe_o, output logic gpio_7_o, - input logic gpio_7_i, + input logic gpio_7_i, output logic gpio_7_oe_o, output logic gpio_8_o, - input logic gpio_8_i, + input logic gpio_8_i, output logic gpio_8_oe_o, output logic gpio_9_o, - input logic gpio_9_i, + input logic gpio_9_i, output logic gpio_9_oe_o, output logic gpio_10_o, - input logic gpio_10_i, + input logic gpio_10_i, output logic gpio_10_oe_o, output logic gpio_11_o, - input logic gpio_11_i, + input logic gpio_11_i, output logic gpio_11_oe_o, output logic gpio_12_o, - input logic gpio_12_i, + input logic gpio_12_i, output logic gpio_12_oe_o, output logic gpio_13_o, - input logic gpio_13_i, + input logic gpio_13_i, output logic gpio_13_oe_o, output logic gpio_14_o, - input logic gpio_14_i, + input logic gpio_14_i, output logic gpio_14_oe_o, output logic gpio_15_o, - input logic gpio_15_i, + input logic gpio_15_i, output logic gpio_15_oe_o, output logic gpio_16_o, - input logic gpio_16_i, + input logic gpio_16_i, output logic gpio_16_oe_o, output logic gpio_17_o, - input logic gpio_17_i, + input logic gpio_17_i, output logic gpio_17_oe_o, output logic spi_flash_sck_o, - input logic spi_flash_sck_i, + input logic spi_flash_sck_i, output logic spi_flash_sck_oe_o, output logic spi_flash_cs_0_o, - input logic spi_flash_cs_0_i, + input logic spi_flash_cs_0_i, output logic spi_flash_cs_0_oe_o, output logic spi_flash_cs_1_o, - input logic spi_flash_cs_1_i, + input logic spi_flash_cs_1_i, output logic spi_flash_cs_1_oe_o, output logic spi_flash_sd_0_o, - input logic spi_flash_sd_0_i, + input logic spi_flash_sd_0_i, output logic spi_flash_sd_0_oe_o, output logic spi_flash_sd_1_o, - input logic spi_flash_sd_1_i, + input logic spi_flash_sd_1_i, output logic spi_flash_sd_1_oe_o, output logic spi_flash_sd_2_o, - input logic spi_flash_sd_2_i, + input logic spi_flash_sd_2_i, output logic spi_flash_sd_2_oe_o, output logic spi_flash_sd_3_o, - input logic spi_flash_sd_3_i, + input logic spi_flash_sd_3_i, output logic spi_flash_sd_3_oe_o, output logic spi_sck_o, - input logic spi_sck_i, + input logic spi_sck_i, output logic spi_sck_oe_o, output logic spi_cs_0_o, - input logic spi_cs_0_i, + input logic spi_cs_0_i, output logic spi_cs_0_oe_o, output logic spi_cs_1_o, - input logic spi_cs_1_i, + input logic spi_cs_1_i, output logic spi_cs_1_oe_o, output logic spi_sd_0_o, - input logic spi_sd_0_i, + input logic spi_sd_0_i, output logic spi_sd_0_oe_o, output logic spi_sd_1_o, - input logic spi_sd_1_i, + input logic spi_sd_1_i, output logic spi_sd_1_oe_o, output logic spi_sd_2_o, - input logic spi_sd_2_i, + input logic spi_sd_2_i, output logic spi_sd_2_oe_o, output logic spi_sd_3_o, - input logic spi_sd_3_i, + input logic spi_sd_3_i, output logic spi_sd_3_oe_o, output logic pdm2pcm_pdm_o, - input logic pdm2pcm_pdm_i, + input logic pdm2pcm_pdm_i, output logic pdm2pcm_pdm_oe_o, output logic gpio_18_o, - input logic gpio_18_i, + input logic gpio_18_i, output logic gpio_18_oe_o, output logic pdm2pcm_clk_o, - input logic pdm2pcm_clk_i, + input logic pdm2pcm_clk_i, output logic pdm2pcm_clk_oe_o, output logic gpio_19_o, - input logic gpio_19_i, + input logic gpio_19_i, output logic gpio_19_oe_o, output logic i2s_sck_o, - input logic i2s_sck_i, + input logic i2s_sck_i, output logic i2s_sck_oe_o, output logic gpio_20_o, - input logic gpio_20_i, + input logic gpio_20_i, output logic gpio_20_oe_o, output logic i2s_ws_o, - input logic i2s_ws_i, + input logic i2s_ws_i, output logic i2s_ws_oe_o, output logic gpio_21_o, - input logic gpio_21_i, + input logic gpio_21_i, output logic gpio_21_oe_o, output logic i2s_sd_o, - input logic i2s_sd_i, + input logic i2s_sd_i, output logic i2s_sd_oe_o, output logic gpio_22_o, - input logic gpio_22_i, + input logic gpio_22_i, output logic gpio_22_oe_o, output logic spi2_cs_0_o, - input logic spi2_cs_0_i, + input logic spi2_cs_0_i, output logic spi2_cs_0_oe_o, output logic gpio_23_o, - input logic gpio_23_i, + input logic gpio_23_i, output logic gpio_23_oe_o, output logic spi2_cs_1_o, - input logic spi2_cs_1_i, + input logic spi2_cs_1_i, output logic spi2_cs_1_oe_o, output logic gpio_24_o, - input logic gpio_24_i, + input logic gpio_24_i, output logic gpio_24_oe_o, output logic spi2_sck_o, - input logic spi2_sck_i, + input logic spi2_sck_i, output logic spi2_sck_oe_o, output logic gpio_25_o, - input logic gpio_25_i, + input logic gpio_25_i, output logic gpio_25_oe_o, output logic spi2_sd_0_o, - input logic spi2_sd_0_i, + input logic spi2_sd_0_i, output logic spi2_sd_0_oe_o, output logic gpio_26_o, - input logic gpio_26_i, + input logic gpio_26_i, output logic gpio_26_oe_o, output logic spi2_sd_1_o, - input logic spi2_sd_1_i, + input logic spi2_sd_1_i, output logic spi2_sd_1_oe_o, output logic gpio_27_o, - input logic gpio_27_i, + input logic gpio_27_i, output logic gpio_27_oe_o, output logic spi2_sd_2_o, - input logic spi2_sd_2_i, + input logic spi2_sd_2_i, output logic spi2_sd_2_oe_o, output logic gpio_28_o, - input logic gpio_28_i, + input logic gpio_28_i, output logic gpio_28_oe_o, output logic spi2_sd_3_o, - input logic spi2_sd_3_i, + input logic spi2_sd_3_i, output logic spi2_sd_3_oe_o, output logic gpio_29_o, - input logic gpio_29_i, + input logic gpio_29_i, output logic gpio_29_oe_o, output logic i2c_scl_o, - input logic i2c_scl_i, + input logic i2c_scl_i, output logic i2c_scl_oe_o, output logic gpio_31_o, - input logic gpio_31_i, + input logic gpio_31_i, output logic gpio_31_oe_o, output logic i2c_sda_o, - input logic i2c_sda_i, + input logic i2c_sda_i, output logic i2c_sda_oe_o, output logic gpio_30_o, - input logic gpio_30_i, + input logic gpio_30_i, output logic gpio_30_oe_o, @@ -285,41 +285,41 @@ module core_v_mini_mcu input obi_req_t [EXT_XBAR_NMASTER_RND-1:0] ext_xbar_master_req_i, output obi_resp_t [EXT_XBAR_NMASTER_RND-1:0] ext_xbar_master_resp_o, - input reg_req_t ext_ao_peripheral_slave_req_i [core_v_mini_mcu_pkg::AO_SPC_NUM-1:0], + input reg_req_t ext_ao_peripheral_slave_req_i[core_v_mini_mcu_pkg::AO_SPC_NUM-1:0], output reg_rsp_t ext_ao_peripheral_slave_resp_o[core_v_mini_mcu_pkg::AO_SPC_NUM-1:0], // External slave ports - output obi_req_t ext_core_instr_req_o, - input obi_resp_t ext_core_instr_resp_i, - output obi_req_t ext_core_data_req_o, - input obi_resp_t ext_core_data_resp_i, - output obi_req_t ext_debug_master_req_o, - input obi_resp_t ext_debug_master_resp_i, - output obi_req_t ext_dma_read_req_o[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], - input obi_resp_t ext_dma_read_resp_i[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], - output obi_req_t ext_dma_write_req_o[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], - input obi_resp_t ext_dma_write_resp_i[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], - output obi_req_t ext_dma_addr_req_o[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], - input obi_resp_t ext_dma_addr_resp_i[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], + output obi_req_t ext_core_instr_req_o, + input obi_resp_t ext_core_instr_resp_i, + output obi_req_t ext_core_data_req_o, + input obi_resp_t ext_core_data_resp_i, + output obi_req_t ext_debug_master_req_o, + input obi_resp_t ext_debug_master_resp_i, + output obi_req_t ext_dma_read_req_o[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], + input obi_resp_t ext_dma_read_resp_i[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], + output obi_req_t ext_dma_write_req_o[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], + input obi_resp_t ext_dma_write_resp_i[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], + output obi_req_t ext_dma_addr_req_o[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], + input obi_resp_t ext_dma_addr_resp_i[core_v_mini_mcu_pkg::DMA_NUM_MASTER_PORTS-1:0], input logic [core_v_mini_mcu_pkg::DMA_CH_NUM-1:0] ext_dma_stop_i, output reg_req_t ext_peripheral_slave_req_o, input reg_rsp_t ext_peripheral_slave_resp_i, - output logic [EXT_HARTS_RND-1:0] ext_debug_req_o, - output logic ext_debug_reset_no, + output logic [EXT_HARTS_RND-1:0] ext_debug_req_o, + output logic ext_debug_reset_no, input logic [NEXT_INT_RND-1:0] intr_vector_ext_i, //power manager exposed to top level //signals are unrolled to easy EDA tools output logic cpu_subsystem_powergate_switch_no, - input logic cpu_subsystem_powergate_switch_ack_ni, + input logic cpu_subsystem_powergate_switch_ack_ni, output logic peripheral_subsystem_powergate_switch_no, - input logic peripheral_subsystem_powergate_switch_ack_ni, + input logic peripheral_subsystem_powergate_switch_ack_ni, output logic [EXT_DOMAINS_RND-1:0] external_subsystem_powergate_switch_no, - input logic [EXT_DOMAINS_RND-1:0] external_subsystem_powergate_switch_ack_ni, + input logic [EXT_DOMAINS_RND-1:0] external_subsystem_powergate_switch_ack_ni, output logic [EXT_DOMAINS_RND-1:0] external_subsystem_powergate_iso_no, output logic [EXT_DOMAINS_RND-1:0] external_subsystem_rst_no, output logic ext_cpu_subsystem_rst_no, @@ -329,8 +329,8 @@ module core_v_mini_mcu output logic [31:0] exit_value_o, // External SPC interface - input logic [core_v_mini_mcu_pkg::DMA_CH_NUM-1:0] ext_dma_slot_tx_i, - input logic [core_v_mini_mcu_pkg::DMA_CH_NUM-1:0] ext_dma_slot_rx_i, + input logic [core_v_mini_mcu_pkg::DMA_CH_NUM-1:0] ext_dma_slot_tx_i, + input logic [core_v_mini_mcu_pkg::DMA_CH_NUM-1:0] ext_dma_slot_rx_i, output logic [core_v_mini_mcu_pkg::DMA_CH_NUM-1:0] dma_done_o ); @@ -342,7 +342,7 @@ module core_v_mini_mcu localparam DM_HALTADDRESS = core_v_mini_mcu_pkg::DEBUG_START_ADDRESS + 32'h00000800; //debug rom code (section .text in linker) starts at 0x800 localparam JTAG_IDCODE = 32'h10001c05; - localparam NRHARTS = EXT_HARTS + 1; //external harts + single hart core-v-mini-mcu + localparam NRHARTS = EXT_HARTS + 1; //external harts + single hart core-v-mini-mcu localparam BOOT_ADDR = core_v_mini_mcu_pkg::BOOTROM_START_ADDRESS; localparam NUM_MHPMCOUNTERS = 1; @@ -412,10 +412,10 @@ module core_v_mini_mcu power_manager_out_t memory_subsystem_pwr_ctrl_out[core_v_mini_mcu_pkg::NUM_BANKS-1:0]; power_manager_out_t external_subsystem_pwr_ctrl_out[EXT_DOMAINS_RND-1:0]; - power_manager_in_t cpu_subsystem_pwr_ctrl_in; - power_manager_in_t peripheral_subsystem_pwr_ctrl_in; - power_manager_in_t memory_subsystem_pwr_ctrl_in[core_v_mini_mcu_pkg::NUM_BANKS-1:0]; - power_manager_in_t external_subsystem_pwr_ctrl_in[EXT_DOMAINS_RND-1:0]; + power_manager_in_t cpu_subsystem_pwr_ctrl_in; + power_manager_in_t peripheral_subsystem_pwr_ctrl_in; + power_manager_in_t memory_subsystem_pwr_ctrl_in[core_v_mini_mcu_pkg::NUM_BANKS-1:0]; + power_manager_in_t external_subsystem_pwr_ctrl_in[EXT_DOMAINS_RND-1:0]; logic cpu_subsystem_rst_n; logic cpu_subsystem_powergate_iso_n; @@ -431,19 +431,19 @@ module core_v_mini_mcu logic [core_v_mini_mcu_pkg::NUM_BANKS-1:0] memory_subsystem_clkgate_en_n; //pwrgate exposed outside for UPF sim flow and switch cells - assign cpu_subsystem_powergate_switch_no = cpu_subsystem_pwr_ctrl_out.pwrgate_en_n; + assign cpu_subsystem_powergate_switch_no = cpu_subsystem_pwr_ctrl_out.pwrgate_en_n; assign cpu_subsystem_pwr_ctrl_in.pwrgate_ack_n = cpu_subsystem_powergate_switch_ack_ni; //isogate exposed outside for UPF sim flow and switch cells - assign cpu_subsystem_powergate_iso_n = cpu_subsystem_pwr_ctrl_out.isogate_en_n; - assign cpu_subsystem_rst_n = cpu_subsystem_pwr_ctrl_out.rst_n; + assign cpu_subsystem_powergate_iso_n = cpu_subsystem_pwr_ctrl_out.isogate_en_n; + assign cpu_subsystem_rst_n = cpu_subsystem_pwr_ctrl_out.rst_n; //pwrgate exposed both outside for UPF sim flow assign peripheral_subsystem_powergate_switch_no = peripheral_subsystem_pwr_ctrl_out.pwrgate_en_n; assign peripheral_subsystem_pwr_ctrl_in.pwrgate_ack_n = peripheral_subsystem_powergate_switch_ack_ni; //isogate exposed outside for UPF sim flow and switch cells assign peripheral_subsystem_powergate_iso_n = peripheral_subsystem_pwr_ctrl_out.isogate_en_n; - assign peripheral_subsystem_rst_n = peripheral_subsystem_pwr_ctrl_out.rst_n; - assign peripheral_subsystem_clkgate_en_n = peripheral_subsystem_pwr_ctrl_out.clkgate_en_n; + assign peripheral_subsystem_rst_n = peripheral_subsystem_pwr_ctrl_out.rst_n; + assign peripheral_subsystem_clkgate_en_n = peripheral_subsystem_pwr_ctrl_out.clkgate_en_n; assign memory_subsystem_banks_powergate_switch_n[0] = memory_subsystem_pwr_ctrl_out[0].pwrgate_en_n; assign memory_subsystem_pwr_ctrl_in[0].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[0]; @@ -457,66 +457,6 @@ module core_v_mini_mcu assign memory_subsystem_banks_powergate_iso_n[1] = memory_subsystem_pwr_ctrl_out[1].isogate_en_n; assign memory_subsystem_banks_set_retentive_n[1] = memory_subsystem_pwr_ctrl_out[1].retentive_en_n; assign memory_subsystem_clkgate_en_n[1] = memory_subsystem_pwr_ctrl_out[1].clkgate_en_n; - assign memory_subsystem_banks_powergate_switch_n[2] = memory_subsystem_pwr_ctrl_out[2].pwrgate_en_n; - assign memory_subsystem_pwr_ctrl_in[2].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[2]; - //isogate exposed outside for UPF sim flow and switch cells - assign memory_subsystem_banks_powergate_iso_n[2] = memory_subsystem_pwr_ctrl_out[2].isogate_en_n; - assign memory_subsystem_banks_set_retentive_n[2] = memory_subsystem_pwr_ctrl_out[2].retentive_en_n; - assign memory_subsystem_clkgate_en_n[2] = memory_subsystem_pwr_ctrl_out[2].clkgate_en_n; - assign memory_subsystem_banks_powergate_switch_n[3] = memory_subsystem_pwr_ctrl_out[3].pwrgate_en_n; - assign memory_subsystem_pwr_ctrl_in[3].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[3]; - //isogate exposed outside for UPF sim flow and switch cells - assign memory_subsystem_banks_powergate_iso_n[3] = memory_subsystem_pwr_ctrl_out[3].isogate_en_n; - assign memory_subsystem_banks_set_retentive_n[3] = memory_subsystem_pwr_ctrl_out[3].retentive_en_n; - assign memory_subsystem_clkgate_en_n[3] = memory_subsystem_pwr_ctrl_out[3].clkgate_en_n; - assign memory_subsystem_banks_powergate_switch_n[4] = memory_subsystem_pwr_ctrl_out[4].pwrgate_en_n; - assign memory_subsystem_pwr_ctrl_in[4].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[4]; - //isogate exposed outside for UPF sim flow and switch cells - assign memory_subsystem_banks_powergate_iso_n[4] = memory_subsystem_pwr_ctrl_out[4].isogate_en_n; - assign memory_subsystem_banks_set_retentive_n[4] = memory_subsystem_pwr_ctrl_out[4].retentive_en_n; - assign memory_subsystem_clkgate_en_n[4] = memory_subsystem_pwr_ctrl_out[4].clkgate_en_n; - assign memory_subsystem_banks_powergate_switch_n[5] = memory_subsystem_pwr_ctrl_out[5].pwrgate_en_n; - assign memory_subsystem_pwr_ctrl_in[5].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[5]; - //isogate exposed outside for UPF sim flow and switch cells - assign memory_subsystem_banks_powergate_iso_n[5] = memory_subsystem_pwr_ctrl_out[5].isogate_en_n; - assign memory_subsystem_banks_set_retentive_n[5] = memory_subsystem_pwr_ctrl_out[5].retentive_en_n; - assign memory_subsystem_clkgate_en_n[5] = memory_subsystem_pwr_ctrl_out[5].clkgate_en_n; - assign memory_subsystem_banks_powergate_switch_n[6] = memory_subsystem_pwr_ctrl_out[6].pwrgate_en_n; - assign memory_subsystem_pwr_ctrl_in[6].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[6]; - //isogate exposed outside for UPF sim flow and switch cells - assign memory_subsystem_banks_powergate_iso_n[6] = memory_subsystem_pwr_ctrl_out[6].isogate_en_n; - assign memory_subsystem_banks_set_retentive_n[6] = memory_subsystem_pwr_ctrl_out[6].retentive_en_n; - assign memory_subsystem_clkgate_en_n[6] = memory_subsystem_pwr_ctrl_out[6].clkgate_en_n; - assign memory_subsystem_banks_powergate_switch_n[7] = memory_subsystem_pwr_ctrl_out[7].pwrgate_en_n; - assign memory_subsystem_pwr_ctrl_in[7].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[7]; - //isogate exposed outside for UPF sim flow and switch cells - assign memory_subsystem_banks_powergate_iso_n[7] = memory_subsystem_pwr_ctrl_out[7].isogate_en_n; - assign memory_subsystem_banks_set_retentive_n[7] = memory_subsystem_pwr_ctrl_out[7].retentive_en_n; - assign memory_subsystem_clkgate_en_n[7] = memory_subsystem_pwr_ctrl_out[7].clkgate_en_n; - assign memory_subsystem_banks_powergate_switch_n[8] = memory_subsystem_pwr_ctrl_out[8].pwrgate_en_n; - assign memory_subsystem_pwr_ctrl_in[8].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[8]; - //isogate exposed outside for UPF sim flow and switch cells - assign memory_subsystem_banks_powergate_iso_n[8] = memory_subsystem_pwr_ctrl_out[8].isogate_en_n; - assign memory_subsystem_banks_set_retentive_n[8] = memory_subsystem_pwr_ctrl_out[8].retentive_en_n; - assign memory_subsystem_clkgate_en_n[8] = memory_subsystem_pwr_ctrl_out[8].clkgate_en_n; - assign memory_subsystem_banks_powergate_switch_n[9] = memory_subsystem_pwr_ctrl_out[9].pwrgate_en_n; - assign memory_subsystem_pwr_ctrl_in[9].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[9]; - //isogate exposed outside for UPF sim flow and switch cells - assign memory_subsystem_banks_powergate_iso_n[9] = memory_subsystem_pwr_ctrl_out[9].isogate_en_n; - assign memory_subsystem_banks_set_retentive_n[9] = memory_subsystem_pwr_ctrl_out[9].retentive_en_n; - assign memory_subsystem_clkgate_en_n[9] = memory_subsystem_pwr_ctrl_out[9].clkgate_en_n; - assign memory_subsystem_banks_powergate_switch_n[10] = memory_subsystem_pwr_ctrl_out[10].pwrgate_en_n; - assign memory_subsystem_pwr_ctrl_in[10].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[10]; - //isogate exposed outside for UPF sim flow and switch cells - assign memory_subsystem_banks_powergate_iso_n[10] = memory_subsystem_pwr_ctrl_out[10].isogate_en_n; - assign memory_subsystem_banks_set_retentive_n[10] = memory_subsystem_pwr_ctrl_out[10].retentive_en_n; - assign memory_subsystem_clkgate_en_n[10] = memory_subsystem_pwr_ctrl_out[10].clkgate_en_n; - assign memory_subsystem_banks_powergate_switch_n[11] = memory_subsystem_pwr_ctrl_out[11].pwrgate_en_n; - assign memory_subsystem_pwr_ctrl_in[11].pwrgate_ack_n = memory_subsystem_banks_powergate_switch_ack_n[11]; - //isogate exposed outside for UPF sim flow and switch cells - assign memory_subsystem_banks_powergate_iso_n[11] = memory_subsystem_pwr_ctrl_out[11].isogate_en_n; - assign memory_subsystem_banks_set_retentive_n[11] = memory_subsystem_pwr_ctrl_out[11].retentive_en_n; - assign memory_subsystem_clkgate_en_n[11] = memory_subsystem_pwr_ctrl_out[11].clkgate_en_n; for (genvar i = 0; i < EXT_DOMAINS_RND; i = i + 1) begin assign external_subsystem_powergate_switch_no[i] = external_subsystem_pwr_ctrl_out[i].pwrgate_en_n; @@ -693,13 +633,11 @@ module core_v_mini_mcu .spimemio_resp_o(flash_mem_slave_resp), .spi_flash_sck_o, .spi_flash_sck_en_o(spi_flash_sck_oe_o), - .spi_flash_csb_o({spi_flash_cs_1_o, spi_flash_cs_0_o}), + .spi_flash_csb_o({spi_flash_cs_1_o,spi_flash_cs_0_o}), .spi_flash_csb_en_o({spi_flash_cs_1_oe_o, spi_flash_cs_0_oe_o}), - .spi_flash_sd_o({spi_flash_sd_3_o, spi_flash_sd_2_o, spi_flash_sd_1_o, spi_flash_sd_0_o}), - .spi_flash_sd_en_o({ - spi_flash_sd_3_oe_o, spi_flash_sd_2_oe_o, spi_flash_sd_1_oe_o, spi_flash_sd_0_oe_o - }), - .spi_flash_sd_i({spi_flash_sd_3_i, spi_flash_sd_2_i, spi_flash_sd_1_i, spi_flash_sd_0_i}), + .spi_flash_sd_o({spi_flash_sd_3_o,spi_flash_sd_2_o, spi_flash_sd_1_o, spi_flash_sd_0_o}), + .spi_flash_sd_en_o({spi_flash_sd_3_oe_o,spi_flash_sd_2_oe_o, spi_flash_sd_1_oe_o, spi_flash_sd_0_oe_o}), + .spi_flash_sd_i({spi_flash_sd_3_i,spi_flash_sd_2_i, spi_flash_sd_1_i, spi_flash_sd_0_i}), .intr_i(intr), .intr_vector_ext_i, .core_sleep_i(core_sleep), @@ -780,11 +718,11 @@ module core_v_mini_mcu .cio_sda_en_o(i2c_sda_oe_o), .spi_sck_o, .spi_sck_en_o(spi_sck_oe_o), - .spi_csb_o({spi_cs_1_o, spi_cs_0_o}), + .spi_csb_o({spi_cs_1_o,spi_cs_0_o}), .spi_csb_en_o({spi_cs_1_oe_o, spi_cs_0_oe_o}), - .spi_sd_o({spi_sd_3_o, spi_sd_2_o, spi_sd_1_o, spi_sd_0_o}), - .spi_sd_en_o({spi_sd_3_oe_o, spi_sd_2_oe_o, spi_sd_1_oe_o, spi_sd_0_oe_o}), - .spi_sd_i({spi_sd_3_i, spi_sd_2_i, spi_sd_1_i, spi_sd_0_i}), + .spi_sd_o({spi_sd_3_o,spi_sd_2_o, spi_sd_1_o, spi_sd_0_o}), + .spi_sd_en_o({spi_sd_3_oe_o,spi_sd_2_oe_o, spi_sd_1_oe_o, spi_sd_0_oe_o}), + .spi_sd_i({spi_sd_3_i,spi_sd_2_i, spi_sd_1_i, spi_sd_0_i}), .spi_intr_event_o(spi_intr), .spi_rx_valid_o(spi_rx_valid), .spi_tx_ready_o(spi_tx_ready), @@ -814,8 +752,8 @@ module core_v_mini_mcu // Debug_req assign if (NRHARTS == 1) begin - assign debug_core_req = debug_req; - assign ext_debug_req_o = 1'b0; + assign debug_core_req = debug_req; + assign ext_debug_req_o = 1'b0; end else begin always @(*) begin for (int i = 0; i < NRHARTS; i++) begin @@ -826,106 +764,106 @@ module core_v_mini_mcu end assign ext_cpu_subsystem_rst_no = cpu_subsystem_rst_n; - assign ext_debug_reset_no = debug_reset_n; - - assign pdm2pcm_pdm_o = 0; - assign pdm2pcm_pdm_oe_o = 0; - - assign gpio_ao_in[0] = gpio_0_i; - assign gpio_0_o = gpio_ao_out[0]; - assign gpio_0_oe_o = gpio_ao_oe[0]; - assign gpio_ao_in[1] = gpio_1_i; - assign gpio_1_o = gpio_ao_out[1]; - assign gpio_1_oe_o = gpio_ao_oe[1]; - assign gpio_ao_in[2] = gpio_2_i; - assign gpio_2_o = gpio_ao_out[2]; - assign gpio_2_oe_o = gpio_ao_oe[2]; - assign gpio_ao_in[3] = gpio_3_i; - assign gpio_3_o = gpio_ao_out[3]; - assign gpio_3_oe_o = gpio_ao_oe[3]; - assign gpio_ao_in[4] = gpio_4_i; - assign gpio_4_o = gpio_ao_out[4]; - assign gpio_4_oe_o = gpio_ao_oe[4]; - assign gpio_ao_in[5] = gpio_5_i; - assign gpio_5_o = gpio_ao_out[5]; - assign gpio_5_oe_o = gpio_ao_oe[5]; - assign gpio_ao_in[6] = gpio_6_i; - assign gpio_6_o = gpio_ao_out[6]; - assign gpio_6_oe_o = gpio_ao_oe[6]; - assign gpio_ao_in[7] = gpio_7_i; - assign gpio_7_o = gpio_ao_out[7]; - assign gpio_7_oe_o = gpio_ao_oe[7]; - assign gpio_in[8] = gpio_8_i; - assign gpio_8_o = gpio_out[8]; - assign gpio_8_oe_o = gpio_oe[8]; - assign gpio_in[9] = gpio_9_i; - assign gpio_9_o = gpio_out[9]; - assign gpio_9_oe_o = gpio_oe[9]; - assign gpio_in[10] = gpio_10_i; - assign gpio_10_o = gpio_out[10]; - assign gpio_10_oe_o = gpio_oe[10]; - assign gpio_in[11] = gpio_11_i; - assign gpio_11_o = gpio_out[11]; - assign gpio_11_oe_o = gpio_oe[11]; - assign gpio_in[12] = gpio_12_i; - assign gpio_12_o = gpio_out[12]; - assign gpio_12_oe_o = gpio_oe[12]; - assign gpio_in[13] = gpio_13_i; - assign gpio_13_o = gpio_out[13]; - assign gpio_13_oe_o = gpio_oe[13]; - assign gpio_in[14] = gpio_14_i; - assign gpio_14_o = gpio_out[14]; - assign gpio_14_oe_o = gpio_oe[14]; - assign gpio_in[15] = gpio_15_i; - assign gpio_15_o = gpio_out[15]; - assign gpio_15_oe_o = gpio_oe[15]; - assign gpio_in[16] = gpio_16_i; - assign gpio_16_o = gpio_out[16]; - assign gpio_16_oe_o = gpio_oe[16]; - assign gpio_in[17] = gpio_17_i; - assign gpio_17_o = gpio_out[17]; - assign gpio_17_oe_o = gpio_oe[17]; - assign gpio_in[18] = gpio_18_i; - assign gpio_18_o = gpio_out[18]; - assign gpio_18_oe_o = gpio_oe[18]; - assign gpio_in[19] = gpio_19_i; - assign gpio_19_o = gpio_out[19]; - assign gpio_19_oe_o = gpio_oe[19]; - assign gpio_in[20] = gpio_20_i; - assign gpio_20_o = gpio_out[20]; - assign gpio_20_oe_o = gpio_oe[20]; - assign gpio_in[21] = gpio_21_i; - assign gpio_21_o = gpio_out[21]; - assign gpio_21_oe_o = gpio_oe[21]; - assign gpio_in[22] = gpio_22_i; - assign gpio_22_o = gpio_out[22]; - assign gpio_22_oe_o = gpio_oe[22]; - assign gpio_in[23] = gpio_23_i; - assign gpio_23_o = gpio_out[23]; - assign gpio_23_oe_o = gpio_oe[23]; - assign gpio_in[24] = gpio_24_i; - assign gpio_24_o = gpio_out[24]; - assign gpio_24_oe_o = gpio_oe[24]; - assign gpio_in[25] = gpio_25_i; - assign gpio_25_o = gpio_out[25]; - assign gpio_25_oe_o = gpio_oe[25]; - assign gpio_in[26] = gpio_26_i; - assign gpio_26_o = gpio_out[26]; - assign gpio_26_oe_o = gpio_oe[26]; - assign gpio_in[27] = gpio_27_i; - assign gpio_27_o = gpio_out[27]; - assign gpio_27_oe_o = gpio_oe[27]; - assign gpio_in[28] = gpio_28_i; - assign gpio_28_o = gpio_out[28]; - assign gpio_28_oe_o = gpio_oe[28]; - assign gpio_in[29] = gpio_29_i; - assign gpio_29_o = gpio_out[29]; - assign gpio_29_oe_o = gpio_oe[29]; - assign gpio_in[30] = gpio_30_i; - assign gpio_30_o = gpio_out[30]; - assign gpio_30_oe_o = gpio_oe[30]; - assign gpio_in[31] = gpio_31_i; - assign gpio_31_o = gpio_out[31]; - assign gpio_31_oe_o = gpio_oe[31]; + assign ext_debug_reset_no = debug_reset_n; + + assign pdm2pcm_pdm_o = 0; + assign pdm2pcm_pdm_oe_o = 0; + + assign gpio_ao_in[0] = gpio_0_i; + assign gpio_0_o = gpio_ao_out[0]; + assign gpio_0_oe_o = gpio_ao_oe[0]; + assign gpio_ao_in[1] = gpio_1_i; + assign gpio_1_o = gpio_ao_out[1]; + assign gpio_1_oe_o = gpio_ao_oe[1]; + assign gpio_ao_in[2] = gpio_2_i; + assign gpio_2_o = gpio_ao_out[2]; + assign gpio_2_oe_o = gpio_ao_oe[2]; + assign gpio_ao_in[3] = gpio_3_i; + assign gpio_3_o = gpio_ao_out[3]; + assign gpio_3_oe_o = gpio_ao_oe[3]; + assign gpio_ao_in[4] = gpio_4_i; + assign gpio_4_o = gpio_ao_out[4]; + assign gpio_4_oe_o = gpio_ao_oe[4]; + assign gpio_ao_in[5] = gpio_5_i; + assign gpio_5_o = gpio_ao_out[5]; + assign gpio_5_oe_o = gpio_ao_oe[5]; + assign gpio_ao_in[6] = gpio_6_i; + assign gpio_6_o = gpio_ao_out[6]; + assign gpio_6_oe_o = gpio_ao_oe[6]; + assign gpio_ao_in[7] = gpio_7_i; + assign gpio_7_o = gpio_ao_out[7]; + assign gpio_7_oe_o = gpio_ao_oe[7]; + assign gpio_in[8] = gpio_8_i; + assign gpio_8_o = gpio_out[8]; + assign gpio_8_oe_o = gpio_oe[8]; + assign gpio_in[9] = gpio_9_i; + assign gpio_9_o = gpio_out[9]; + assign gpio_9_oe_o = gpio_oe[9]; + assign gpio_in[10] = gpio_10_i; + assign gpio_10_o = gpio_out[10]; + assign gpio_10_oe_o = gpio_oe[10]; + assign gpio_in[11] = gpio_11_i; + assign gpio_11_o = gpio_out[11]; + assign gpio_11_oe_o = gpio_oe[11]; + assign gpio_in[12] = gpio_12_i; + assign gpio_12_o = gpio_out[12]; + assign gpio_12_oe_o = gpio_oe[12]; + assign gpio_in[13] = gpio_13_i; + assign gpio_13_o = gpio_out[13]; + assign gpio_13_oe_o = gpio_oe[13]; + assign gpio_in[14] = gpio_14_i; + assign gpio_14_o = gpio_out[14]; + assign gpio_14_oe_o = gpio_oe[14]; + assign gpio_in[15] = gpio_15_i; + assign gpio_15_o = gpio_out[15]; + assign gpio_15_oe_o = gpio_oe[15]; + assign gpio_in[16] = gpio_16_i; + assign gpio_16_o = gpio_out[16]; + assign gpio_16_oe_o = gpio_oe[16]; + assign gpio_in[17] = gpio_17_i; + assign gpio_17_o = gpio_out[17]; + assign gpio_17_oe_o = gpio_oe[17]; + assign gpio_in[18] = gpio_18_i; + assign gpio_18_o = gpio_out[18]; + assign gpio_18_oe_o = gpio_oe[18]; + assign gpio_in[19] = gpio_19_i; + assign gpio_19_o = gpio_out[19]; + assign gpio_19_oe_o = gpio_oe[19]; + assign gpio_in[20] = gpio_20_i; + assign gpio_20_o = gpio_out[20]; + assign gpio_20_oe_o = gpio_oe[20]; + assign gpio_in[21] = gpio_21_i; + assign gpio_21_o = gpio_out[21]; + assign gpio_21_oe_o = gpio_oe[21]; + assign gpio_in[22] = gpio_22_i; + assign gpio_22_o = gpio_out[22]; + assign gpio_22_oe_o = gpio_oe[22]; + assign gpio_in[23] = gpio_23_i; + assign gpio_23_o = gpio_out[23]; + assign gpio_23_oe_o = gpio_oe[23]; + assign gpio_in[24] = gpio_24_i; + assign gpio_24_o = gpio_out[24]; + assign gpio_24_oe_o = gpio_oe[24]; + assign gpio_in[25] = gpio_25_i; + assign gpio_25_o = gpio_out[25]; + assign gpio_25_oe_o = gpio_oe[25]; + assign gpio_in[26] = gpio_26_i; + assign gpio_26_o = gpio_out[26]; + assign gpio_26_oe_o = gpio_oe[26]; + assign gpio_in[27] = gpio_27_i; + assign gpio_27_o = gpio_out[27]; + assign gpio_27_oe_o = gpio_oe[27]; + assign gpio_in[28] = gpio_28_i; + assign gpio_28_o = gpio_out[28]; + assign gpio_28_oe_o = gpio_oe[28]; + assign gpio_in[29] = gpio_29_i; + assign gpio_29_o = gpio_out[29]; + assign gpio_29_oe_o = gpio_oe[29]; + assign gpio_in[30] = gpio_30_i; + assign gpio_30_o = gpio_out[30]; + assign gpio_30_oe_o = gpio_oe[30]; + assign gpio_in[31] = gpio_31_i; + assign gpio_31_o = gpio_out[31]; + assign gpio_31_oe_o = gpio_oe[31]; endmodule // core_v_mini_mcu diff --git a/hw/core-v-mini-mcu/peripheral_subsystem.sv b/hw/core-v-mini-mcu/peripheral_subsystem.sv index 4fa663e66..8faf52003 100644 --- a/hw/core-v-mini-mcu/peripheral_subsystem.sv +++ b/hw/core-v-mini-mcu/peripheral_subsystem.sv @@ -7,7 +7,7 @@ module peripheral_subsystem import reg_pkg::*; #( //do not touch these parameters - parameter NEXT_INT_RND = core_v_mini_mcu_pkg::NEXT_INT == 0 ? 1 : core_v_mini_mcu_pkg::NEXT_INT + parameter NEXT_INT_RND = core_v_mini_mcu_pkg::NEXT_INT == 0 ? 1 : core_v_mini_mcu_pkg::NEXT_INT ) ( input logic clk_i, input logic rst_ni, @@ -20,8 +20,8 @@ module peripheral_subsystem //PLIC input logic [NEXT_INT_RND-1:0] intr_vector_ext_i, - output logic irq_plic_o, - output logic msip_o, + output logic irq_plic_o, + output logic msip_o, //UART PLIC interrupts input logic uart_intr_tx_watermark_i, @@ -172,7 +172,7 @@ module peripheral_subsystem assign intr_vector[48] = i2c_intr_host_timeout; assign intr_vector[49] = spi2_intr_event; assign intr_vector[50] = i2s_intr_event; - assign intr_vector[51] = dma_window_intr_i; + assign intr_vector[51] = dma_window_intr_i; // External interrupts assignement for (genvar i = 0; i < NEXT_INT; i++) begin @@ -202,18 +202,18 @@ module peripheral_subsystem `else - obi_pkg::obi_req_t slave_fifoin_req; + obi_pkg::obi_req_t slave_fifoin_req; obi_pkg::obi_resp_t slave_fifoin_resp; - obi_pkg::obi_req_t slave_fifoout_req; + obi_pkg::obi_req_t slave_fifoout_req; obi_pkg::obi_resp_t slave_fifoout_resp; obi_fifo obi_fifo_i ( .clk_i(clk_cg), .rst_ni, - .producer_req_i(slave_fifoin_req), + .producer_req_i (slave_fifoin_req), .producer_resp_o(slave_fifoin_resp), - .consumer_req_o(slave_fifoout_req), + .consumer_req_o (slave_fifoout_req), .consumer_resp_i(slave_fifoout_resp) ); diff --git a/scripts/verification/examples/im2col_spc_verification.py b/scripts/verification/examples/im2col_spc_verification.py index 58282a674..64fadf65b 100644 --- a/scripts/verification/examples/im2col_spc_verification.py +++ b/scripts/verification/examples/im2col_spc_verification.py @@ -9,10 +9,12 @@ # Info: This is a usecase of the VerifHeep tool. It generates a dataset for the im2col function # and the golden result, then it runs the test on the PYNQ-Z2 board and stores the results # in a file. The data can be then read and plotted using the plotter.py script. -# -# It requires the user to perform the synthesis and to program the FPGA with the bitstream, -# as it is a delicate and device-dependent operation. -# Another very important step required is the connection to GDB using X-Heep script "make openOCD_bscan" +# +# In order to be run, these steps has to be followed: +# 1. Run this command to include Verifheep: +# export PYTHONPATH="$PYTHONPATH://scripts/verification" +# 2. Perform the synthesis with Vivado and to program the FPGA with the bitstream +# 3. Connect the board using GDB by running X-Heep script "make openOCD_bscan". Close Vivado to avoid conflicts # import re @@ -30,7 +32,7 @@ # Define the parameters for the test num_masters = 4 -num_slaves = 3 +num_slaves = 2 max_masters_per_slave = 2 num_channels_dma = 5 diff --git a/sw/applications/example_im2col/im2col_golden.c b/sw/applications/example_im2col/im2col_golden.c index 0e992419f..bf5161f12 100644 --- a/sw/applications/example_im2col/im2col_golden.c +++ b/sw/applications/example_im2col/im2col_golden.c @@ -6,15 +6,15 @@ #include "im2col_golden.h" -const uint32_t golden_im2col_nchw[900] = { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 29849, 59199, 25674, 17336, 34532, 39186, 38424, 740, 58382, 0, 48335, 6076, 40068, 19748, 40294, 48387, 27892, 57487, 42647, 0, 37865, 34742, 37319, 6895, 20005, 56067, 8799, 5797, 50154, 0, 17932, 6395, 25592, 17330, 44900, 21669, 27649, 13351, 17390, 0, 46502, 16954, 26130, 62372, 61056, 7720, 32360, 48808, 53626, 0, 55243, 59891, 18612, 65061, 14850, 348, 10130, 61563, 3721, 0, 13954, 41303, 51837, 46430, 33308, 59514, 23108, 19051, 1107, 0, 1320, 46127, 25927, 2564, 14770, 22906, 21215, 8217, 60974, 0, 9797, 5538, 37897, 2571, 44262, 18579, 14930, 41411, 15307, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 29849, 59199, 25674, 17336, 34532, 39186, 38424, 740, 58382, 9096, 48335, 6076, 40068, 19748, 40294, 48387, 27892, 57487, 42647, 20347, 37865, 34742, 37319, 6895, 20005, 56067, 8799, 5797, 50154, 41304, 17932, 6395, 25592, 17330, 44900, 21669, 27649, 13351, 17390, 14293, 46502, 16954, 26130, 62372, 61056, 7720, 32360, 48808, 53626, 37041, 55243, 59891, 18612, 65061, 14850, 348, 10130, 61563, 3721, 19988, 13954, 41303, 51837, 46430, 33308, 59514, 23108, 19051, 1107, 16479, 1320, 46127, 25927, 2564, 14770, 22906, 21215, 8217, 60974, 27906, 9797, 5538, 37897, 2571, 44262, 18579, 14930, 41411, 15307, 15264, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 59199, 25674, 17336, 34532, 39186, 38424, 740, 58382, 9096, 0, 6076, 40068, 19748, 40294, 48387, 27892, 57487, 42647, 20347, 0, 34742, 37319, 6895, 20005, 56067, 8799, 5797, 50154, 41304, 0, 6395, 25592, 17330, 44900, 21669, 27649, 13351, 17390, 14293, 0, 16954, 26130, 62372, 61056, 7720, 32360, 48808, 53626, 37041, 0, 59891, 18612, 65061, 14850, 348, 10130, 61563, 3721, 19988, 0, 41303, 51837, 46430, 33308, 59514, 23108, 19051, 1107, 16479, 0, 46127, 25927, 2564, 14770, 22906, 21215, 8217, 60974, 27906, 0, 5538, 37897, 2571, 44262, 18579, 14930, 41411, 15307, 15264, 0, - 0, 29849, 59199, 25674, 17336, 34532, 39186, 38424, 740, 58382, 0, 48335, 6076, 40068, 19748, 40294, 48387, 27892, 57487, 42647, 0, 37865, 34742, 37319, 6895, 20005, 56067, 8799, 5797, 50154, 0, 17932, 6395, 25592, 17330, 44900, 21669, 27649, 13351, 17390, 0, 46502, 16954, 26130, 62372, 61056, 7720, 32360, 48808, 53626, 0, 55243, 59891, 18612, 65061, 14850, 348, 10130, 61563, 3721, 0, 13954, 41303, 51837, 46430, 33308, 59514, 23108, 19051, 1107, 0, 1320, 46127, 25927, 2564, 14770, 22906, 21215, 8217, 60974, 0, 9797, 5538, 37897, 2571, 44262, 18579, 14930, 41411, 15307, 0, 16928, 19669, 45965, 33273, 54694, 49084, 29176, 23398, 28333, - 29849, 59199, 25674, 17336, 34532, 39186, 38424, 740, 58382, 9096, 48335, 6076, 40068, 19748, 40294, 48387, 27892, 57487, 42647, 20347, 37865, 34742, 37319, 6895, 20005, 56067, 8799, 5797, 50154, 41304, 17932, 6395, 25592, 17330, 44900, 21669, 27649, 13351, 17390, 14293, 46502, 16954, 26130, 62372, 61056, 7720, 32360, 48808, 53626, 37041, 55243, 59891, 18612, 65061, 14850, 348, 10130, 61563, 3721, 19988, 13954, 41303, 51837, 46430, 33308, 59514, 23108, 19051, 1107, 16479, 1320, 46127, 25927, 2564, 14770, 22906, 21215, 8217, 60974, 27906, 9797, 5538, 37897, 2571, 44262, 18579, 14930, 41411, 15307, 15264, 16928, 19669, 45965, 33273, 54694, 49084, 29176, 23398, 28333, 48197, - 59199, 25674, 17336, 34532, 39186, 38424, 740, 58382, 9096, 0, 6076, 40068, 19748, 40294, 48387, 27892, 57487, 42647, 20347, 0, 34742, 37319, 6895, 20005, 56067, 8799, 5797, 50154, 41304, 0, 6395, 25592, 17330, 44900, 21669, 27649, 13351, 17390, 14293, 0, 16954, 26130, 62372, 61056, 7720, 32360, 48808, 53626, 37041, 0, 59891, 18612, 65061, 14850, 348, 10130, 61563, 3721, 19988, 0, 41303, 51837, 46430, 33308, 59514, 23108, 19051, 1107, 16479, 0, 46127, 25927, 2564, 14770, 22906, 21215, 8217, 60974, 27906, 0, 5538, 37897, 2571, 44262, 18579, 14930, 41411, 15307, 15264, 0, 19669, 45965, 33273, 54694, 49084, 29176, 23398, 28333, 48197, 0, - 0, 48335, 6076, 40068, 19748, 40294, 48387, 27892, 57487, 42647, 0, 37865, 34742, 37319, 6895, 20005, 56067, 8799, 5797, 50154, 0, 17932, 6395, 25592, 17330, 44900, 21669, 27649, 13351, 17390, 0, 46502, 16954, 26130, 62372, 61056, 7720, 32360, 48808, 53626, 0, 55243, 59891, 18612, 65061, 14850, 348, 10130, 61563, 3721, 0, 13954, 41303, 51837, 46430, 33308, 59514, 23108, 19051, 1107, 0, 1320, 46127, 25927, 2564, 14770, 22906, 21215, 8217, 60974, 0, 9797, 5538, 37897, 2571, 44262, 18579, 14930, 41411, 15307, 0, 16928, 19669, 45965, 33273, 54694, 49084, 29176, 23398, 28333, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 48335, 6076, 40068, 19748, 40294, 48387, 27892, 57487, 42647, 20347, 37865, 34742, 37319, 6895, 20005, 56067, 8799, 5797, 50154, 41304, 17932, 6395, 25592, 17330, 44900, 21669, 27649, 13351, 17390, 14293, 46502, 16954, 26130, 62372, 61056, 7720, 32360, 48808, 53626, 37041, 55243, 59891, 18612, 65061, 14850, 348, 10130, 61563, 3721, 19988, 13954, 41303, 51837, 46430, 33308, 59514, 23108, 19051, 1107, 16479, 1320, 46127, 25927, 2564, 14770, 22906, 21215, 8217, 60974, 27906, 9797, 5538, 37897, 2571, 44262, 18579, 14930, 41411, 15307, 15264, 16928, 19669, 45965, 33273, 54694, 49084, 29176, 23398, 28333, 48197, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 6076, 40068, 19748, 40294, 48387, 27892, 57487, 42647, 20347, 0, 34742, 37319, 6895, 20005, 56067, 8799, 5797, 50154, 41304, 0, 6395, 25592, 17330, 44900, 21669, 27649, 13351, 17390, 14293, 0, 16954, 26130, 62372, 61056, 7720, 32360, 48808, 53626, 37041, 0, 59891, 18612, 65061, 14850, 348, 10130, 61563, 3721, 19988, 0, 41303, 51837, 46430, 33308, 59514, 23108, 19051, 1107, 16479, 0, 46127, 25927, 2564, 14770, 22906, 21215, 8217, 60974, 27906, 0, 5538, 37897, 2571, 44262, 18579, 14930, 41411, 15307, 15264, 0, 19669, 45965, 33273, 54694, 49084, 29176, 23398, 28333, 48197, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +const uint32_t golden_im2col_nchw[324] = { + 0, 0, 0, 0, 0, 0, 0, 25511, 15942, 30547, 1548, 14913, 0, 53015, 23415, 15506, 60080, 21241, 0, 34825, 49828, 18596, 60340, 26663, 0, 2079, 7164, 34168, 29345, 21214, 0, 52686, 36109, 40574, 61243, 11406, + 0, 0, 0, 0, 0, 0, 25511, 15942, 30547, 1548, 14913, 63645, 53015, 23415, 15506, 60080, 21241, 9435, 34825, 49828, 18596, 60340, 26663, 44655, 2079, 7164, 34168, 29345, 21214, 53632, 52686, 36109, 40574, 61243, 11406, 29174, + 0, 0, 0, 0, 0, 0, 15942, 30547, 1548, 14913, 63645, 0, 23415, 15506, 60080, 21241, 9435, 0, 49828, 18596, 60340, 26663, 44655, 0, 7164, 34168, 29345, 21214, 53632, 0, 36109, 40574, 61243, 11406, 29174, 0, + 0, 25511, 15942, 30547, 1548, 14913, 0, 53015, 23415, 15506, 60080, 21241, 0, 34825, 49828, 18596, 60340, 26663, 0, 2079, 7164, 34168, 29345, 21214, 0, 52686, 36109, 40574, 61243, 11406, 0, 36041, 27474, 48506, 30377, 47338, + 25511, 15942, 30547, 1548, 14913, 63645, 53015, 23415, 15506, 60080, 21241, 9435, 34825, 49828, 18596, 60340, 26663, 44655, 2079, 7164, 34168, 29345, 21214, 53632, 52686, 36109, 40574, 61243, 11406, 29174, 36041, 27474, 48506, 30377, 47338, 26581, + 15942, 30547, 1548, 14913, 63645, 0, 23415, 15506, 60080, 21241, 9435, 0, 49828, 18596, 60340, 26663, 44655, 0, 7164, 34168, 29345, 21214, 53632, 0, 36109, 40574, 61243, 11406, 29174, 0, 27474, 48506, 30377, 47338, 26581, 0, + 0, 53015, 23415, 15506, 60080, 21241, 0, 34825, 49828, 18596, 60340, 26663, 0, 2079, 7164, 34168, 29345, 21214, 0, 52686, 36109, 40574, 61243, 11406, 0, 36041, 27474, 48506, 30377, 47338, 0, 0, 0, 0, 0, 0, + 53015, 23415, 15506, 60080, 21241, 9435, 34825, 49828, 18596, 60340, 26663, 44655, 2079, 7164, 34168, 29345, 21214, 53632, 52686, 36109, 40574, 61243, 11406, 29174, 36041, 27474, 48506, 30377, 47338, 26581, 0, 0, 0, 0, 0, 0, + 23415, 15506, 60080, 21241, 9435, 0, 49828, 18596, 60340, 26663, 44655, 0, 7164, 34168, 29345, 21214, 53632, 0, 36109, 40574, 61243, 11406, 29174, 0, 27474, 48506, 30377, 47338, 26581, 0, 0, 0, 0, 0, 0, 0 }; diff --git a/sw/applications/example_im2col/im2col_golden.h b/sw/applications/example_im2col/im2col_golden.h index 29740155e..6449dc11e 100644 --- a/sw/applications/example_im2col/im2col_golden.h +++ b/sw/applications/example_im2col/im2col_golden.h @@ -10,6 +10,6 @@ #include -extern const uint32_t golden_im2col_nchw[900]; +extern const uint32_t golden_im2col_nchw[324]; #endif // GOLDEN_IM2COL_NCHW_H diff --git a/sw/applications/example_im2col/im2col_input.c b/sw/applications/example_im2col/im2col_input.c index bae4e7b88..56b8eccb7 100644 --- a/sw/applications/example_im2col/im2col_input.c +++ b/sw/applications/example_im2col/im2col_input.c @@ -6,16 +6,12 @@ #include "im2col_input.h" -const uint32_t input_image_nchw[100] = { - 29849, 59199, 25674, 17336, 34532, 39186, 38424, 740, 58382, 9096, - 48335, 6076, 40068, 19748, 40294, 48387, 27892, 57487, 42647, 20347, - 37865, 34742, 37319, 6895, 20005, 56067, 8799, 5797, 50154, 41304, - 17932, 6395, 25592, 17330, 44900, 21669, 27649, 13351, 17390, 14293, - 46502, 16954, 26130, 62372, 61056, 7720, 32360, 48808, 53626, 37041, - 55243, 59891, 18612, 65061, 14850, 348, 10130, 61563, 3721, 19988, - 13954, 41303, 51837, 46430, 33308, 59514, 23108, 19051, 1107, 16479, - 1320, 46127, 25927, 2564, 14770, 22906, 21215, 8217, 60974, 27906, - 9797, 5538, 37897, 2571, 44262, 18579, 14930, 41411, 15307, 15264, - 16928, 19669, 45965, 33273, 54694, 49084, 29176, 23398, 28333, 48197 +const uint32_t input_image_nchw[36] = { + 25511, 15942, 30547, 1548, 14913, 63645, + 53015, 23415, 15506, 60080, 21241, 9435, + 34825, 49828, 18596, 60340, 26663, 44655, + 2079, 7164, 34168, 29345, 21214, 53632, + 52686, 36109, 40574, 61243, 11406, 29174, + 36041, 27474, 48506, 30377, 47338, 26581 }; diff --git a/sw/applications/example_im2col/im2col_input.h b/sw/applications/example_im2col/im2col_input.h index c795ba32c..91b956ba8 100644 --- a/sw/applications/example_im2col/im2col_input.h +++ b/sw/applications/example_im2col/im2col_input.h @@ -9,8 +9,8 @@ #include -#define IH 10 -#define IW 10 +#define IH 6 +#define IW 6 #define CH 1 #define BATCH 1 #define FH 3 @@ -22,6 +22,6 @@ #define STRIDE_D1 1 #define STRIDE_D2 1 -extern const uint32_t input_image_nchw[100]; +extern const uint32_t input_image_nchw[36]; #endif // INPUT_IMAGE_NCHW_H