Regarding Custom Instructions for RISC-V core in X-HEEP

[shankar59]

Hello Developers, we wish to use the XIF Interface for adding custom co-processors. However, the custom instructions for accessing the co-processor would be handled via the X-HEEP toolchain itself, or do we have to manually hardcode it ? Can we have some sort of documentation made available for handling the SW flow in detail ?

Thanks and Regards,
Shankar.

[davidmallasen]

You can find the documentation on extending the software flow of X-HEEP here: https://x-heep.readthedocs.io/en/latest/How_to/eXtendingHEEP.html#building-software
Also the compilation flow is all in the sw folder. You can change the compiler you want to use with the RISCV environment variable. Both gcc and clang are supported as you can see in the documentation:

• https://x-heep.readthedocs.io/en/latest/How_to/GettingStarted.html#install-the-risc-v-compiler
• https://x-heep.readthedocs.io/en/latest/How_to/CompileMakefile.html#compiling-software