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I2C: support driving SCL with SDA high (slave reset) #2599

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Tracked by #2493
bugadani opened this issue Nov 25, 2024 · 0 comments
Open
Tracked by #2493

I2C: support driving SCL with SDA high (slave reset) #2599

bugadani opened this issue Nov 25, 2024 · 0 comments
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@bugadani
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bugadani commented Nov 25, 2024

On some hardware the following function exists:

I2C_SCL_RST_SLV_EN Configures to send out SCL pulses when I2C master is IDLE. The number of
 pulses equals to I2C_SCL_RST_SLV_NUM[4:0].
 0: Invalid
 1: Send out SCL pulses
 (R/W/SC)

I2C_SCL_RST_SLV_NUM Configure the pulses of SCL generated in I2C master mode.
 Valid when I2C_SCL_RST_SLV_EN is 1.
 Measurement unit: I2C_SCLK clock cycles
 (R/W)

We may implement this as fn send_idle_clk(&mut self, pulses: usize) {} for example.

cc #2493

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