diff --git a/esp32p4/src/uart0.rs b/esp32p4/src/uart0.rs index feed54d359..7f72ce8385 100644 --- a/esp32p4/src/uart0.rs +++ b/esp32p4/src/uart0.rs @@ -7,27 +7,27 @@ pub struct RegisterBlock { int_st: INT_ST, int_ena: INT_ENA, int_clr: INT_CLR, - clkdiv_sync: CLKDIV_SYNC, + clkdiv: CLKDIV, rx_filt: RX_FILT, status: STATUS, - conf0_sync: CONF0_SYNC, + conf0: CONF0, conf1: CONF1, _reserved10: [u8; 0x04], - hwfc_conf_sync: HWFC_CONF_SYNC, + hwfc_conf: HWFC_CONF, sleep_conf0: SLEEP_CONF0, sleep_conf1: SLEEP_CONF1, sleep_conf2: SLEEP_CONF2, - swfc_conf0_sync: SWFC_CONF0_SYNC, + swfc_conf0: SWFC_CONF0, swfc_conf1: SWFC_CONF1, - txbrk_conf_sync: TXBRK_CONF_SYNC, - idle_conf_sync: IDLE_CONF_SYNC, - rs485_conf_sync: RS485_CONF_SYNC, - at_cmd_precnt_sync: AT_CMD_PRECNT_SYNC, - at_cmd_postcnt_sync: AT_CMD_POSTCNT_SYNC, - at_cmd_gaptout_sync: AT_CMD_GAPTOUT_SYNC, - at_cmd_char_sync: AT_CMD_CHAR_SYNC, + txbrk_conf: TXBRK_CONF, + idle_conf: IDLE_CONF, + rs485_conf: RS485_CONF, + at_cmd_precnt: AT_CMD_PRECNT, + at_cmd_postcnt: AT_CMD_POSTCNT, + at_cmd_gaptout: AT_CMD_GAPTOUT, + at_cmd_char: AT_CMD_CHAR, mem_conf: MEM_CONF, - tout_conf_sync: TOUT_CONF_SYNC, + tout_conf: TOUT_CONF, mem_tx_status: MEM_TX_STATUS, mem_rx_status: MEM_RX_STATUS, fsm_status: FSM_STATUS, @@ -71,8 +71,8 @@ impl RegisterBlock { } #[doc = "0x14 - Clock divider configuration"] #[inline(always)] - pub const fn clkdiv_sync(&self) -> &CLKDIV_SYNC { - &self.clkdiv_sync + pub const fn clkdiv(&self) -> &CLKDIV { + &self.clkdiv } #[doc = "0x18 - Rx Filter configuration"] #[inline(always)] @@ -86,8 +86,8 @@ impl RegisterBlock { } #[doc = "0x20 - a"] #[inline(always)] - pub const fn conf0_sync(&self) -> &CONF0_SYNC { - &self.conf0_sync + pub const fn conf0(&self) -> &CONF0 { + &self.conf0 } #[doc = "0x24 - Configuration register 1"] #[inline(always)] @@ -96,8 +96,8 @@ impl RegisterBlock { } #[doc = "0x2c - Hardware flow-control configuration"] #[inline(always)] - pub const fn hwfc_conf_sync(&self) -> &HWFC_CONF_SYNC { - &self.hwfc_conf_sync + pub const fn hwfc_conf(&self) -> &HWFC_CONF { + &self.hwfc_conf } #[doc = "0x30 - UART sleep configure register 0"] #[inline(always)] @@ -116,8 +116,8 @@ impl RegisterBlock { } #[doc = "0x3c - Software flow-control character configuration"] #[inline(always)] - pub const fn swfc_conf0_sync(&self) -> &SWFC_CONF0_SYNC { - &self.swfc_conf0_sync + pub const fn swfc_conf0(&self) -> &SWFC_CONF0 { + &self.swfc_conf0 } #[doc = "0x40 - Software flow-control character configuration"] #[inline(always)] @@ -126,38 +126,38 @@ impl RegisterBlock { } #[doc = "0x44 - Tx Break character configuration"] #[inline(always)] - pub const fn txbrk_conf_sync(&self) -> &TXBRK_CONF_SYNC { - &self.txbrk_conf_sync + pub const fn txbrk_conf(&self) -> &TXBRK_CONF { + &self.txbrk_conf } #[doc = "0x48 - Frame-end idle configuration"] #[inline(always)] - pub const fn idle_conf_sync(&self) -> &IDLE_CONF_SYNC { - &self.idle_conf_sync + pub const fn idle_conf(&self) -> &IDLE_CONF { + &self.idle_conf } #[doc = "0x4c - RS485 mode configuration"] #[inline(always)] - pub const fn rs485_conf_sync(&self) -> &RS485_CONF_SYNC { - &self.rs485_conf_sync + pub const fn rs485_conf(&self) -> &RS485_CONF { + &self.rs485_conf } #[doc = "0x50 - Pre-sequence timing configuration"] #[inline(always)] - pub const fn at_cmd_precnt_sync(&self) -> &AT_CMD_PRECNT_SYNC { - &self.at_cmd_precnt_sync + pub const fn at_cmd_precnt(&self) -> &AT_CMD_PRECNT { + &self.at_cmd_precnt } #[doc = "0x54 - Post-sequence timing configuration"] #[inline(always)] - pub const fn at_cmd_postcnt_sync(&self) -> &AT_CMD_POSTCNT_SYNC { - &self.at_cmd_postcnt_sync + pub const fn at_cmd_postcnt(&self) -> &AT_CMD_POSTCNT { + &self.at_cmd_postcnt } #[doc = "0x58 - Timeout configuration"] #[inline(always)] - pub const fn at_cmd_gaptout_sync(&self) -> &AT_CMD_GAPTOUT_SYNC { - &self.at_cmd_gaptout_sync + pub const fn at_cmd_gaptout(&self) -> &AT_CMD_GAPTOUT { + &self.at_cmd_gaptout } #[doc = "0x5c - AT escape sequence detection configuration"] #[inline(always)] - pub const fn at_cmd_char_sync(&self) -> &AT_CMD_CHAR_SYNC { - &self.at_cmd_char_sync + pub const fn at_cmd_char(&self) -> &AT_CMD_CHAR { + &self.at_cmd_char } #[doc = "0x60 - UART memory power configuration"] #[inline(always)] @@ -166,8 +166,8 @@ impl RegisterBlock { } #[doc = "0x64 - UART threshold and allocation configuration"] #[inline(always)] - pub const fn tout_conf_sync(&self) -> &TOUT_CONF_SYNC { - &self.tout_conf_sync + pub const fn tout_conf(&self) -> &TOUT_CONF { + &self.tout_conf } #[doc = "0x68 - Tx-SRAM write and read offset address."] #[inline(always)] @@ -235,7 +235,7 @@ impl RegisterBlock { &self.id } } -#[doc = "FIFO (r) register accessor: FIFO data register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo`] module"] +#[doc = "FIFO (rw) register accessor: FIFO data register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo`] module"] pub type FIFO = crate::Reg; #[doc = "FIFO data register"] pub mod fifo; @@ -255,10 +255,10 @@ pub mod int_ena; pub type INT_CLR = crate::Reg; #[doc = "Interrupt clear bits"] pub mod int_clr; -#[doc = "CLKDIV_SYNC (rw) register accessor: Clock divider configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv_sync`] module"] -pub type CLKDIV_SYNC = crate::Reg; +#[doc = "CLKDIV (rw) register accessor: Clock divider configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`] module"] +pub type CLKDIV = crate::Reg; #[doc = "Clock divider configuration"] -pub mod clkdiv_sync; +pub mod clkdiv; #[doc = "RX_FILT (rw) register accessor: Rx Filter configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_filt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rx_filt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rx_filt`] module"] pub type RX_FILT = crate::Reg; #[doc = "Rx Filter configuration"] @@ -267,18 +267,18 @@ pub mod rx_filt; pub type STATUS = crate::Reg; #[doc = "UART status register"] pub mod status; -#[doc = "CONF0_SYNC (rw) register accessor: a\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conf0_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conf0_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf0_sync`] module"] -pub type CONF0_SYNC = crate::Reg; +#[doc = "CONF0 (rw) register accessor: a\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conf0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conf0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf0`] module"] +pub type CONF0 = crate::Reg; #[doc = "a"] -pub mod conf0_sync; +pub mod conf0; #[doc = "CONF1 (rw) register accessor: Configuration register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conf1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conf1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf1`] module"] pub type CONF1 = crate::Reg; #[doc = "Configuration register 1"] pub mod conf1; -#[doc = "HWFC_CONF_SYNC (rw) register accessor: Hardware flow-control configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwfc_conf_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwfc_conf_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwfc_conf_sync`] module"] -pub type HWFC_CONF_SYNC = crate::Reg; +#[doc = "HWFC_CONF (rw) register accessor: Hardware flow-control configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwfc_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwfc_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwfc_conf`] module"] +pub type HWFC_CONF = crate::Reg; #[doc = "Hardware flow-control configuration"] -pub mod hwfc_conf_sync; +pub mod hwfc_conf; #[doc = "SLEEP_CONF0 (rw) register accessor: UART sleep configure register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sleep_conf0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sleep_conf0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sleep_conf0`] module"] pub type SLEEP_CONF0 = crate::Reg; #[doc = "UART sleep configure register 0"] @@ -291,50 +291,50 @@ pub mod sleep_conf1; pub type SLEEP_CONF2 = crate::Reg; #[doc = "UART sleep configure register 2"] pub mod sleep_conf2; -#[doc = "SWFC_CONF0_SYNC (rw) register accessor: Software flow-control character configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`swfc_conf0_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swfc_conf0_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swfc_conf0_sync`] module"] -pub type SWFC_CONF0_SYNC = crate::Reg; +#[doc = "SWFC_CONF0 (rw) register accessor: Software flow-control character configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`swfc_conf0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swfc_conf0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swfc_conf0`] module"] +pub type SWFC_CONF0 = crate::Reg; #[doc = "Software flow-control character configuration"] -pub mod swfc_conf0_sync; +pub mod swfc_conf0; #[doc = "SWFC_CONF1 (rw) register accessor: Software flow-control character configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`swfc_conf1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swfc_conf1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swfc_conf1`] module"] pub type SWFC_CONF1 = crate::Reg; #[doc = "Software flow-control character configuration"] pub mod swfc_conf1; -#[doc = "TXBRK_CONF_SYNC (rw) register accessor: Tx Break character configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbrk_conf_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txbrk_conf_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbrk_conf_sync`] module"] -pub type TXBRK_CONF_SYNC = crate::Reg; +#[doc = "TXBRK_CONF (rw) register accessor: Tx Break character configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbrk_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txbrk_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@txbrk_conf`] module"] +pub type TXBRK_CONF = crate::Reg; #[doc = "Tx Break character configuration"] -pub mod txbrk_conf_sync; -#[doc = "IDLE_CONF_SYNC (rw) register accessor: Frame-end idle configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idle_conf_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idle_conf_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idle_conf_sync`] module"] -pub type IDLE_CONF_SYNC = crate::Reg; +pub mod txbrk_conf; +#[doc = "IDLE_CONF (rw) register accessor: Frame-end idle configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idle_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idle_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idle_conf`] module"] +pub type IDLE_CONF = crate::Reg; #[doc = "Frame-end idle configuration"] -pub mod idle_conf_sync; -#[doc = "RS485_CONF_SYNC (rw) register accessor: RS485 mode configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rs485_conf_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rs485_conf_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rs485_conf_sync`] module"] -pub type RS485_CONF_SYNC = crate::Reg; +pub mod idle_conf; +#[doc = "RS485_CONF (rw) register accessor: RS485 mode configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rs485_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rs485_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rs485_conf`] module"] +pub type RS485_CONF = crate::Reg; #[doc = "RS485 mode configuration"] -pub mod rs485_conf_sync; -#[doc = "AT_CMD_PRECNT_SYNC (rw) register accessor: Pre-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_precnt_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_precnt_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_precnt_sync`] module"] -pub type AT_CMD_PRECNT_SYNC = crate::Reg; +pub mod rs485_conf; +#[doc = "AT_CMD_PRECNT (rw) register accessor: Pre-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_precnt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_precnt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_precnt`] module"] +pub type AT_CMD_PRECNT = crate::Reg; #[doc = "Pre-sequence timing configuration"] -pub mod at_cmd_precnt_sync; -#[doc = "AT_CMD_POSTCNT_SYNC (rw) register accessor: Post-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_postcnt_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_postcnt_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_postcnt_sync`] module"] -pub type AT_CMD_POSTCNT_SYNC = crate::Reg; +pub mod at_cmd_precnt; +#[doc = "AT_CMD_POSTCNT (rw) register accessor: Post-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_postcnt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_postcnt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_postcnt`] module"] +pub type AT_CMD_POSTCNT = crate::Reg; #[doc = "Post-sequence timing configuration"] -pub mod at_cmd_postcnt_sync; -#[doc = "AT_CMD_GAPTOUT_SYNC (rw) register accessor: Timeout configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_gaptout_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_gaptout_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_gaptout_sync`] module"] -pub type AT_CMD_GAPTOUT_SYNC = crate::Reg; +pub mod at_cmd_postcnt; +#[doc = "AT_CMD_GAPTOUT (rw) register accessor: Timeout configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_gaptout::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_gaptout::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_gaptout`] module"] +pub type AT_CMD_GAPTOUT = crate::Reg; #[doc = "Timeout configuration"] -pub mod at_cmd_gaptout_sync; -#[doc = "AT_CMD_CHAR_SYNC (rw) register accessor: AT escape sequence detection configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_char_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_char_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_char_sync`] module"] -pub type AT_CMD_CHAR_SYNC = crate::Reg; +pub mod at_cmd_gaptout; +#[doc = "AT_CMD_CHAR (rw) register accessor: AT escape sequence detection configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_char::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_char::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@at_cmd_char`] module"] +pub type AT_CMD_CHAR = crate::Reg; #[doc = "AT escape sequence detection configuration"] -pub mod at_cmd_char_sync; +pub mod at_cmd_char; #[doc = "MEM_CONF (rw) register accessor: UART memory power configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mem_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mem_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_conf`] module"] pub type MEM_CONF = crate::Reg; #[doc = "UART memory power configuration"] pub mod mem_conf; -#[doc = "TOUT_CONF_SYNC (rw) register accessor: UART threshold and allocation configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tout_conf_sync::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tout_conf_sync::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tout_conf_sync`] module"] -pub type TOUT_CONF_SYNC = crate::Reg; +#[doc = "TOUT_CONF (rw) register accessor: UART threshold and allocation configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tout_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tout_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tout_conf`] module"] +pub type TOUT_CONF = crate::Reg; #[doc = "UART threshold and allocation configuration"] -pub mod tout_conf_sync; +pub mod tout_conf; #[doc = "MEM_TX_STATUS (r) register accessor: Tx-SRAM write and read offset address.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mem_tx_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_tx_status`] module"] pub type MEM_TX_STATUS = crate::Reg; #[doc = "Tx-SRAM write and read offset address."] diff --git a/esp32p4/src/uart0/at_cmd_char_sync.rs b/esp32p4/src/uart0/at_cmd_char.rs similarity index 70% rename from esp32p4/src/uart0/at_cmd_char_sync.rs rename to esp32p4/src/uart0/at_cmd_char.rs index b62c83d63e..e8ba20b1e3 100644 --- a/esp32p4/src/uart0/at_cmd_char_sync.rs +++ b/esp32p4/src/uart0/at_cmd_char.rs @@ -1,7 +1,7 @@ -#[doc = "Register `AT_CMD_CHAR_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `AT_CMD_CHAR_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `AT_CMD_CHAR` reader"] +pub type R = crate::R; +#[doc = "Register `AT_CMD_CHAR` writer"] +pub type W = crate::W; #[doc = "Field `AT_CMD_CHAR` reader - This register is used to configure the content of at_cmd char."] pub type AT_CMD_CHAR_R = crate::FieldReader; #[doc = "Field `AT_CMD_CHAR` writer - This register is used to configure the content of at_cmd char."] @@ -25,7 +25,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("AT_CMD_CHAR_SYNC") + f.debug_struct("AT_CMD_CHAR") .field( "at_cmd_char", &format_args!("{}", self.at_cmd_char().bits()), @@ -35,7 +35,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -44,13 +44,13 @@ impl W { #[doc = "Bits 0:7 - This register is used to configure the content of at_cmd char."] #[inline(always)] #[must_use] - pub fn at_cmd_char(&mut self) -> AT_CMD_CHAR_W { + pub fn at_cmd_char(&mut self) -> AT_CMD_CHAR_W { AT_CMD_CHAR_W::new(self, 0) } #[doc = "Bits 8:15 - This register is used to configure the num of continuous at_cmd chars received by receiver."] #[inline(always)] #[must_use] - pub fn char_num(&mut self) -> CHAR_NUM_W { + pub fn char_num(&mut self) -> CHAR_NUM_W { CHAR_NUM_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] @@ -64,19 +64,19 @@ impl W { self } } -#[doc = "AT escape sequence detection configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_char_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_char_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AT_CMD_CHAR_SYNC_SPEC; -impl crate::RegisterSpec for AT_CMD_CHAR_SYNC_SPEC { +#[doc = "AT escape sequence detection configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_char::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_char::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AT_CMD_CHAR_SPEC; +impl crate::RegisterSpec for AT_CMD_CHAR_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`at_cmd_char_sync::R`](R) reader structure"] -impl crate::Readable for AT_CMD_CHAR_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`at_cmd_char_sync::W`](W) writer structure"] -impl crate::Writable for AT_CMD_CHAR_SYNC_SPEC { +#[doc = "`read()` method returns [`at_cmd_char::R`](R) reader structure"] +impl crate::Readable for AT_CMD_CHAR_SPEC {} +#[doc = "`write(|w| ..)` method takes [`at_cmd_char::W`](W) writer structure"] +impl crate::Writable for AT_CMD_CHAR_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets AT_CMD_CHAR_SYNC to value 0x032b"] -impl crate::Resettable for AT_CMD_CHAR_SYNC_SPEC { +#[doc = "`reset()` method sets AT_CMD_CHAR to value 0x032b"] +impl crate::Resettable for AT_CMD_CHAR_SPEC { const RESET_VALUE: u32 = 0x032b; } diff --git a/esp32p4/src/uart0/at_cmd_gaptout_sync.rs b/esp32p4/src/uart0/at_cmd_gaptout.rs similarity index 60% rename from esp32p4/src/uart0/at_cmd_gaptout_sync.rs rename to esp32p4/src/uart0/at_cmd_gaptout.rs index bd367b3adf..0af016c7af 100644 --- a/esp32p4/src/uart0/at_cmd_gaptout_sync.rs +++ b/esp32p4/src/uart0/at_cmd_gaptout.rs @@ -1,7 +1,7 @@ -#[doc = "Register `AT_CMD_GAPTOUT_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `AT_CMD_GAPTOUT_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `AT_CMD_GAPTOUT` reader"] +pub type R = crate::R; +#[doc = "Register `AT_CMD_GAPTOUT` writer"] +pub type W = crate::W; #[doc = "Field `RX_GAP_TOUT` reader - This register is used to configure the duration time between the at_cmd chars."] pub type RX_GAP_TOUT_R = crate::FieldReader; #[doc = "Field `RX_GAP_TOUT` writer - This register is used to configure the duration time between the at_cmd chars."] @@ -16,7 +16,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("AT_CMD_GAPTOUT_SYNC") + f.debug_struct("AT_CMD_GAPTOUT") .field( "rx_gap_tout", &format_args!("{}", self.rx_gap_tout().bits()), @@ -25,7 +25,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -34,7 +34,7 @@ impl W { #[doc = "Bits 0:15 - This register is used to configure the duration time between the at_cmd chars."] #[inline(always)] #[must_use] - pub fn rx_gap_tout(&mut self) -> RX_GAP_TOUT_W { + pub fn rx_gap_tout(&mut self) -> RX_GAP_TOUT_W { RX_GAP_TOUT_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] @@ -48,19 +48,19 @@ impl W { self } } -#[doc = "Timeout configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_gaptout_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_gaptout_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AT_CMD_GAPTOUT_SYNC_SPEC; -impl crate::RegisterSpec for AT_CMD_GAPTOUT_SYNC_SPEC { +#[doc = "Timeout configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_gaptout::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_gaptout::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AT_CMD_GAPTOUT_SPEC; +impl crate::RegisterSpec for AT_CMD_GAPTOUT_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`at_cmd_gaptout_sync::R`](R) reader structure"] -impl crate::Readable for AT_CMD_GAPTOUT_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`at_cmd_gaptout_sync::W`](W) writer structure"] -impl crate::Writable for AT_CMD_GAPTOUT_SYNC_SPEC { +#[doc = "`read()` method returns [`at_cmd_gaptout::R`](R) reader structure"] +impl crate::Readable for AT_CMD_GAPTOUT_SPEC {} +#[doc = "`write(|w| ..)` method takes [`at_cmd_gaptout::W`](W) writer structure"] +impl crate::Writable for AT_CMD_GAPTOUT_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets AT_CMD_GAPTOUT_SYNC to value 0x0b"] -impl crate::Resettable for AT_CMD_GAPTOUT_SYNC_SPEC { +#[doc = "`reset()` method sets AT_CMD_GAPTOUT to value 0x0b"] +impl crate::Resettable for AT_CMD_GAPTOUT_SPEC { const RESET_VALUE: u32 = 0x0b; } diff --git a/esp32p4/src/uart0/at_cmd_postcnt_sync.rs b/esp32p4/src/uart0/at_cmd_postcnt.rs similarity index 63% rename from esp32p4/src/uart0/at_cmd_postcnt_sync.rs rename to esp32p4/src/uart0/at_cmd_postcnt.rs index b9fef2ac51..b82f0a8a52 100644 --- a/esp32p4/src/uart0/at_cmd_postcnt_sync.rs +++ b/esp32p4/src/uart0/at_cmd_postcnt.rs @@ -1,7 +1,7 @@ -#[doc = "Register `AT_CMD_POSTCNT_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `AT_CMD_POSTCNT_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `AT_CMD_POSTCNT` reader"] +pub type R = crate::R; +#[doc = "Register `AT_CMD_POSTCNT` writer"] +pub type W = crate::W; #[doc = "Field `POST_IDLE_NUM` reader - This register is used to configure the duration time between the last at_cmd and the next data."] pub type POST_IDLE_NUM_R = crate::FieldReader; #[doc = "Field `POST_IDLE_NUM` writer - This register is used to configure the duration time between the last at_cmd and the next data."] @@ -16,7 +16,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("AT_CMD_POSTCNT_SYNC") + f.debug_struct("AT_CMD_POSTCNT") .field( "post_idle_num", &format_args!("{}", self.post_idle_num().bits()), @@ -25,7 +25,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -34,7 +34,7 @@ impl W { #[doc = "Bits 0:15 - This register is used to configure the duration time between the last at_cmd and the next data."] #[inline(always)] #[must_use] - pub fn post_idle_num(&mut self) -> POST_IDLE_NUM_W { + pub fn post_idle_num(&mut self) -> POST_IDLE_NUM_W { POST_IDLE_NUM_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] @@ -48,19 +48,19 @@ impl W { self } } -#[doc = "Post-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_postcnt_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_postcnt_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AT_CMD_POSTCNT_SYNC_SPEC; -impl crate::RegisterSpec for AT_CMD_POSTCNT_SYNC_SPEC { +#[doc = "Post-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_postcnt::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_postcnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AT_CMD_POSTCNT_SPEC; +impl crate::RegisterSpec for AT_CMD_POSTCNT_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`at_cmd_postcnt_sync::R`](R) reader structure"] -impl crate::Readable for AT_CMD_POSTCNT_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`at_cmd_postcnt_sync::W`](W) writer structure"] -impl crate::Writable for AT_CMD_POSTCNT_SYNC_SPEC { +#[doc = "`read()` method returns [`at_cmd_postcnt::R`](R) reader structure"] +impl crate::Readable for AT_CMD_POSTCNT_SPEC {} +#[doc = "`write(|w| ..)` method takes [`at_cmd_postcnt::W`](W) writer structure"] +impl crate::Writable for AT_CMD_POSTCNT_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets AT_CMD_POSTCNT_SYNC to value 0x0901"] -impl crate::Resettable for AT_CMD_POSTCNT_SYNC_SPEC { +#[doc = "`reset()` method sets AT_CMD_POSTCNT to value 0x0901"] +impl crate::Resettable for AT_CMD_POSTCNT_SPEC { const RESET_VALUE: u32 = 0x0901; } diff --git a/esp32p4/src/uart0/at_cmd_precnt_sync.rs b/esp32p4/src/uart0/at_cmd_precnt.rs similarity index 62% rename from esp32p4/src/uart0/at_cmd_precnt_sync.rs rename to esp32p4/src/uart0/at_cmd_precnt.rs index 91ff0ae5e0..c96b9c221c 100644 --- a/esp32p4/src/uart0/at_cmd_precnt_sync.rs +++ b/esp32p4/src/uart0/at_cmd_precnt.rs @@ -1,7 +1,7 @@ -#[doc = "Register `AT_CMD_PRECNT_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `AT_CMD_PRECNT_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `AT_CMD_PRECNT` reader"] +pub type R = crate::R; +#[doc = "Register `AT_CMD_PRECNT` writer"] +pub type W = crate::W; #[doc = "Field `PRE_IDLE_NUM` reader - This register is used to configure the idle duration time before the first at_cmd is received by receiver."] pub type PRE_IDLE_NUM_R = crate::FieldReader; #[doc = "Field `PRE_IDLE_NUM` writer - This register is used to configure the idle duration time before the first at_cmd is received by receiver."] @@ -16,7 +16,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("AT_CMD_PRECNT_SYNC") + f.debug_struct("AT_CMD_PRECNT") .field( "pre_idle_num", &format_args!("{}", self.pre_idle_num().bits()), @@ -25,7 +25,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -34,7 +34,7 @@ impl W { #[doc = "Bits 0:15 - This register is used to configure the idle duration time before the first at_cmd is received by receiver."] #[inline(always)] #[must_use] - pub fn pre_idle_num(&mut self) -> PRE_IDLE_NUM_W { + pub fn pre_idle_num(&mut self) -> PRE_IDLE_NUM_W { PRE_IDLE_NUM_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] @@ -48,19 +48,19 @@ impl W { self } } -#[doc = "Pre-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_precnt_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_precnt_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AT_CMD_PRECNT_SYNC_SPEC; -impl crate::RegisterSpec for AT_CMD_PRECNT_SYNC_SPEC { +#[doc = "Pre-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_precnt::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_precnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct AT_CMD_PRECNT_SPEC; +impl crate::RegisterSpec for AT_CMD_PRECNT_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`at_cmd_precnt_sync::R`](R) reader structure"] -impl crate::Readable for AT_CMD_PRECNT_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`at_cmd_precnt_sync::W`](W) writer structure"] -impl crate::Writable for AT_CMD_PRECNT_SYNC_SPEC { +#[doc = "`read()` method returns [`at_cmd_precnt::R`](R) reader structure"] +impl crate::Readable for AT_CMD_PRECNT_SPEC {} +#[doc = "`write(|w| ..)` method takes [`at_cmd_precnt::W`](W) writer structure"] +impl crate::Writable for AT_CMD_PRECNT_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets AT_CMD_PRECNT_SYNC to value 0x0901"] -impl crate::Resettable for AT_CMD_PRECNT_SYNC_SPEC { +#[doc = "`reset()` method sets AT_CMD_PRECNT to value 0x0901"] +impl crate::Resettable for AT_CMD_PRECNT_SPEC { const RESET_VALUE: u32 = 0x0901; } diff --git a/esp32p4/src/uart0/clkdiv_sync.rs b/esp32p4/src/uart0/clkdiv.rs similarity index 66% rename from esp32p4/src/uart0/clkdiv_sync.rs rename to esp32p4/src/uart0/clkdiv.rs index 27b6b16664..5723b35cdb 100644 --- a/esp32p4/src/uart0/clkdiv_sync.rs +++ b/esp32p4/src/uart0/clkdiv.rs @@ -1,7 +1,7 @@ -#[doc = "Register `CLKDIV_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `CLKDIV_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `CLKDIV` reader"] +pub type R = crate::R; +#[doc = "Register `CLKDIV` writer"] +pub type W = crate::W; #[doc = "Field `CLKDIV` reader - The integral part of the frequency divider factor."] pub type CLKDIV_R = crate::FieldReader; #[doc = "Field `CLKDIV` writer - The integral part of the frequency divider factor."] @@ -25,7 +25,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CLKDIV_SYNC") + f.debug_struct("CLKDIV") .field("clkdiv", &format_args!("{}", self.clkdiv().bits())) .field( "clkdiv_frag", @@ -35,7 +35,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -44,13 +44,13 @@ impl W { #[doc = "Bits 0:11 - The integral part of the frequency divider factor."] #[inline(always)] #[must_use] - pub fn clkdiv(&mut self) -> CLKDIV_W { + pub fn clkdiv(&mut self) -> CLKDIV_W { CLKDIV_W::new(self, 0) } #[doc = "Bits 20:23 - The decimal part of the frequency divider factor."] #[inline(always)] #[must_use] - pub fn clkdiv_frag(&mut self) -> CLKDIV_FRAG_W { + pub fn clkdiv_frag(&mut self) -> CLKDIV_FRAG_W { CLKDIV_FRAG_W::new(self, 20) } #[doc = r" Writes raw bits to the register."] @@ -64,19 +64,19 @@ impl W { self } } -#[doc = "Clock divider configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CLKDIV_SYNC_SPEC; -impl crate::RegisterSpec for CLKDIV_SYNC_SPEC { +#[doc = "Clock divider configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CLKDIV_SPEC; +impl crate::RegisterSpec for CLKDIV_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`clkdiv_sync::R`](R) reader structure"] -impl crate::Readable for CLKDIV_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`clkdiv_sync::W`](W) writer structure"] -impl crate::Writable for CLKDIV_SYNC_SPEC { +#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"] +impl crate::Readable for CLKDIV_SPEC {} +#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"] +impl crate::Writable for CLKDIV_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets CLKDIV_SYNC to value 0x02b6"] -impl crate::Resettable for CLKDIV_SYNC_SPEC { +#[doc = "`reset()` method sets CLKDIV to value 0x02b6"] +impl crate::Resettable for CLKDIV_SPEC { const RESET_VALUE: u32 = 0x02b6; } diff --git a/esp32p4/src/uart0/conf0_sync.rs b/esp32p4/src/uart0/conf0.rs similarity index 87% rename from esp32p4/src/uart0/conf0_sync.rs rename to esp32p4/src/uart0/conf0.rs index 643af40bb0..657f5d7f7c 100644 --- a/esp32p4/src/uart0/conf0_sync.rs +++ b/esp32p4/src/uart0/conf0.rs @@ -1,7 +1,7 @@ -#[doc = "Register `CONF0_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `CONF0_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `CONF0` reader"] +pub type R = crate::R; +#[doc = "Register `CONF0` writer"] +pub type W = crate::W; #[doc = "Field `PARITY` reader - This register is used to configure the parity check mode."] pub type PARITY_R = crate::BitReader; #[doc = "Field `PARITY` writer - This register is used to configure the parity check mode."] @@ -205,7 +205,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CONF0_SYNC") + f.debug_struct("CONF0") .field("parity", &format_args!("{}", self.parity().bit())) .field("parity_en", &format_args!("{}", self.parity_en().bit())) .field("bit_num", &format_args!("{}", self.bit_num().bits())) @@ -238,7 +238,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -247,133 +247,133 @@ impl W { #[doc = "Bit 0 - This register is used to configure the parity check mode."] #[inline(always)] #[must_use] - pub fn parity(&mut self) -> PARITY_W { + pub fn parity(&mut self) -> PARITY_W { PARITY_W::new(self, 0) } #[doc = "Bit 1 - Set this bit to enable uart parity check."] #[inline(always)] #[must_use] - pub fn parity_en(&mut self) -> PARITY_EN_W { + pub fn parity_en(&mut self) -> PARITY_EN_W { PARITY_EN_W::new(self, 1) } #[doc = "Bits 2:3 - This register is used to set the length of data."] #[inline(always)] #[must_use] - pub fn bit_num(&mut self) -> BIT_NUM_W { + pub fn bit_num(&mut self) -> BIT_NUM_W { BIT_NUM_W::new(self, 2) } #[doc = "Bits 4:5 - This register is used to set the length of stop bit."] #[inline(always)] #[must_use] - pub fn stop_bit_num(&mut self) -> STOP_BIT_NUM_W { + pub fn stop_bit_num(&mut self) -> STOP_BIT_NUM_W { STOP_BIT_NUM_W::new(self, 4) } #[doc = "Bit 6 - Set this bit to enbale transmitter to send NULL when the process of sending data is done."] #[inline(always)] #[must_use] - pub fn txd_brk(&mut self) -> TXD_BRK_W { + pub fn txd_brk(&mut self) -> TXD_BRK_W { TXD_BRK_W::new(self, 6) } #[doc = "Bit 7 - Set this bit to enable IrDA loopback mode."] #[inline(always)] #[must_use] - pub fn irda_dplx(&mut self) -> IRDA_DPLX_W { + pub fn irda_dplx(&mut self) -> IRDA_DPLX_W { IRDA_DPLX_W::new(self, 7) } #[doc = "Bit 8 - This is the start enable bit for IrDA transmitter."] #[inline(always)] #[must_use] - pub fn irda_tx_en(&mut self) -> IRDA_TX_EN_W { + pub fn irda_tx_en(&mut self) -> IRDA_TX_EN_W { IRDA_TX_EN_W::new(self, 8) } #[doc = "Bit 9 - 1'h1: The IrDA transmitter's 11th bit is the same as 10th bit. 1'h0: Set IrDA transmitter's 11th bit to 0."] #[inline(always)] #[must_use] - pub fn irda_wctl(&mut self) -> IRDA_WCTL_W { + pub fn irda_wctl(&mut self) -> IRDA_WCTL_W { IRDA_WCTL_W::new(self, 9) } #[doc = "Bit 10 - Set this bit to invert the level of IrDA transmitter."] #[inline(always)] #[must_use] - pub fn irda_tx_inv(&mut self) -> IRDA_TX_INV_W { + pub fn irda_tx_inv(&mut self) -> IRDA_TX_INV_W { IRDA_TX_INV_W::new(self, 10) } #[doc = "Bit 11 - Set this bit to invert the level of IrDA receiver."] #[inline(always)] #[must_use] - pub fn irda_rx_inv(&mut self) -> IRDA_RX_INV_W { + pub fn irda_rx_inv(&mut self) -> IRDA_RX_INV_W { IRDA_RX_INV_W::new(self, 11) } #[doc = "Bit 12 - Set this bit to enable uart loopback test mode."] #[inline(always)] #[must_use] - pub fn loopback(&mut self) -> LOOPBACK_W { + pub fn loopback(&mut self) -> LOOPBACK_W { LOOPBACK_W::new(self, 12) } #[doc = "Bit 13 - Set this bit to enable flow control function for transmitter."] #[inline(always)] #[must_use] - pub fn tx_flow_en(&mut self) -> TX_FLOW_EN_W { + pub fn tx_flow_en(&mut self) -> TX_FLOW_EN_W { TX_FLOW_EN_W::new(self, 13) } #[doc = "Bit 14 - Set this bit to enable IrDA protocol."] #[inline(always)] #[must_use] - pub fn irda_en(&mut self) -> IRDA_EN_W { + pub fn irda_en(&mut self) -> IRDA_EN_W { IRDA_EN_W::new(self, 14) } #[doc = "Bit 15 - Set this bit to inverse the level value of uart rxd signal."] #[inline(always)] #[must_use] - pub fn rxd_inv(&mut self) -> RXD_INV_W { + pub fn rxd_inv(&mut self) -> RXD_INV_W { RXD_INV_W::new(self, 15) } #[doc = "Bit 16 - Set this bit to inverse the level value of uart txd signal."] #[inline(always)] #[must_use] - pub fn txd_inv(&mut self) -> TXD_INV_W { + pub fn txd_inv(&mut self) -> TXD_INV_W { TXD_INV_W::new(self, 16) } #[doc = "Bit 17 - Disable UART Rx data overflow detect."] #[inline(always)] #[must_use] - pub fn dis_rx_dat_ovf(&mut self) -> DIS_RX_DAT_OVF_W { + pub fn dis_rx_dat_ovf(&mut self) -> DIS_RX_DAT_OVF_W { DIS_RX_DAT_OVF_W::new(self, 17) } #[doc = "Bit 18 - 1'h1: Receiver stops storing data into FIFO when data is wrong. 1'h0: Receiver stores the data even if the received data is wrong."] #[inline(always)] #[must_use] - pub fn err_wr_mask(&mut self) -> ERR_WR_MASK_W { + pub fn err_wr_mask(&mut self) -> ERR_WR_MASK_W { ERR_WR_MASK_W::new(self, 18) } #[doc = "Bit 19 - This is the enable bit for detecting baudrate."] #[inline(always)] #[must_use] - pub fn autobaud_en(&mut self) -> AUTOBAUD_EN_W { + pub fn autobaud_en(&mut self) -> AUTOBAUD_EN_W { AUTOBAUD_EN_W::new(self, 19) } #[doc = "Bit 20 - UART memory clock gate enable signal."] #[inline(always)] #[must_use] - pub fn mem_clk_en(&mut self) -> MEM_CLK_EN_W { + pub fn mem_clk_en(&mut self) -> MEM_CLK_EN_W { MEM_CLK_EN_W::new(self, 20) } #[doc = "Bit 21 - This register is used to configure the software rts signal which is used in software flow control."] #[inline(always)] #[must_use] - pub fn sw_rts(&mut self) -> SW_RTS_W { + pub fn sw_rts(&mut self) -> SW_RTS_W { SW_RTS_W::new(self, 21) } #[doc = "Bit 22 - Set this bit to reset the uart receive-FIFO."] #[inline(always)] #[must_use] - pub fn rxfifo_rst(&mut self) -> RXFIFO_RST_W { + pub fn rxfifo_rst(&mut self) -> RXFIFO_RST_W { RXFIFO_RST_W::new(self, 22) } #[doc = "Bit 23 - Set this bit to reset the uart transmit-FIFO."] #[inline(always)] #[must_use] - pub fn txfifo_rst(&mut self) -> TXFIFO_RST_W { + pub fn txfifo_rst(&mut self) -> TXFIFO_RST_W { TXFIFO_RST_W::new(self, 23) } #[doc = r" Writes raw bits to the register."] @@ -387,19 +387,19 @@ impl W { self } } -#[doc = "a\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conf0_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conf0_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CONF0_SYNC_SPEC; -impl crate::RegisterSpec for CONF0_SYNC_SPEC { +#[doc = "a\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`conf0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`conf0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct CONF0_SPEC; +impl crate::RegisterSpec for CONF0_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`conf0_sync::R`](R) reader structure"] -impl crate::Readable for CONF0_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`conf0_sync::W`](W) writer structure"] -impl crate::Writable for CONF0_SYNC_SPEC { +#[doc = "`read()` method returns [`conf0::R`](R) reader structure"] +impl crate::Readable for CONF0_SPEC {} +#[doc = "`write(|w| ..)` method takes [`conf0::W`](W) writer structure"] +impl crate::Writable for CONF0_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets CONF0_SYNC to value 0x1c"] -impl crate::Resettable for CONF0_SYNC_SPEC { +#[doc = "`reset()` method sets CONF0 to value 0x1c"] +impl crate::Resettable for CONF0_SPEC { const RESET_VALUE: u32 = 0x1c; } diff --git a/esp32p4/src/uart0/fifo.rs b/esp32p4/src/uart0/fifo.rs index 0f69f5a845..819c58ac21 100644 --- a/esp32p4/src/uart0/fifo.rs +++ b/esp32p4/src/uart0/fifo.rs @@ -1,7 +1,11 @@ #[doc = "Register `FIFO` reader"] pub type R = crate::R; +#[doc = "Register `FIFO` writer"] +pub type W = crate::W; #[doc = "Field `RXFIFO_RD_BYTE` reader - UART 0 accesses FIFO via this register."] pub type RXFIFO_RD_BYTE_R = crate::FieldReader; +#[doc = "Field `RXFIFO_RD_BYTE` writer - UART 0 accesses FIFO via this register."] +pub type RXFIFO_RD_BYTE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - UART 0 accesses FIFO via this register."] #[inline(always)] @@ -26,13 +30,36 @@ impl core::fmt::Debug for crate::generic::Reg { core::fmt::Debug::fmt(&self.read(), f) } } -#[doc = "FIFO data register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +impl W { + #[doc = "Bits 0:7 - UART 0 accesses FIFO via this register."] + #[inline(always)] + #[must_use] + pub fn rxfifo_rd_byte(&mut self) -> RXFIFO_RD_BYTE_W { + RXFIFO_RD_BYTE_W::new(self, 0) + } + #[doc = r" Writes raw bits to the register."] + #[doc = r""] + #[doc = r" # Safety"] + #[doc = r""] + #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"] + #[inline(always)] + pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { + self.bits = bits; + self + } +} +#[doc = "FIFO data register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct FIFO_SPEC; impl crate::RegisterSpec for FIFO_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fifo::R`](R) reader structure"] impl crate::Readable for FIFO_SPEC {} +#[doc = "`write(|w| ..)` method takes [`fifo::W`](W) writer structure"] +impl crate::Writable for FIFO_SPEC { + const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; + const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; +} #[doc = "`reset()` method sets FIFO to value 0"] impl crate::Resettable for FIFO_SPEC { const RESET_VALUE: u32 = 0; diff --git a/esp32p4/src/uart0/hwfc_conf_sync.rs b/esp32p4/src/uart0/hwfc_conf.rs similarity index 69% rename from esp32p4/src/uart0/hwfc_conf_sync.rs rename to esp32p4/src/uart0/hwfc_conf.rs index ad8d272b3d..3f2eb05628 100644 --- a/esp32p4/src/uart0/hwfc_conf_sync.rs +++ b/esp32p4/src/uart0/hwfc_conf.rs @@ -1,7 +1,7 @@ -#[doc = "Register `HWFC_CONF_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `HWFC_CONF_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `HWFC_CONF` reader"] +pub type R = crate::R; +#[doc = "Register `HWFC_CONF` writer"] +pub type W = crate::W; #[doc = "Field `RX_FLOW_THRHD` reader - This register is used to configure the maximum amount of data that can be received when hardware flow control works."] pub type RX_FLOW_THRHD_R = crate::FieldReader; #[doc = "Field `RX_FLOW_THRHD` writer - This register is used to configure the maximum amount of data that can be received when hardware flow control works."] @@ -25,7 +25,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("HWFC_CONF_SYNC") + f.debug_struct("HWFC_CONF") .field( "rx_flow_thrhd", &format_args!("{}", self.rx_flow_thrhd().bits()), @@ -35,7 +35,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -44,13 +44,13 @@ impl W { #[doc = "Bits 0:7 - This register is used to configure the maximum amount of data that can be received when hardware flow control works."] #[inline(always)] #[must_use] - pub fn rx_flow_thrhd(&mut self) -> RX_FLOW_THRHD_W { + pub fn rx_flow_thrhd(&mut self) -> RX_FLOW_THRHD_W { RX_FLOW_THRHD_W::new(self, 0) } #[doc = "Bit 8 - This is the flow enable bit for UART receiver."] #[inline(always)] #[must_use] - pub fn rx_flow_en(&mut self) -> RX_FLOW_EN_W { + pub fn rx_flow_en(&mut self) -> RX_FLOW_EN_W { RX_FLOW_EN_W::new(self, 8) } #[doc = r" Writes raw bits to the register."] @@ -64,19 +64,19 @@ impl W { self } } -#[doc = "Hardware flow-control configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwfc_conf_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwfc_conf_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HWFC_CONF_SYNC_SPEC; -impl crate::RegisterSpec for HWFC_CONF_SYNC_SPEC { +#[doc = "Hardware flow-control configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwfc_conf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwfc_conf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct HWFC_CONF_SPEC; +impl crate::RegisterSpec for HWFC_CONF_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`hwfc_conf_sync::R`](R) reader structure"] -impl crate::Readable for HWFC_CONF_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`hwfc_conf_sync::W`](W) writer structure"] -impl crate::Writable for HWFC_CONF_SYNC_SPEC { +#[doc = "`read()` method returns [`hwfc_conf::R`](R) reader structure"] +impl crate::Readable for HWFC_CONF_SPEC {} +#[doc = "`write(|w| ..)` method takes [`hwfc_conf::W`](W) writer structure"] +impl crate::Writable for HWFC_CONF_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets HWFC_CONF_SYNC to value 0"] -impl crate::Resettable for HWFC_CONF_SYNC_SPEC { +#[doc = "`reset()` method sets HWFC_CONF to value 0"] +impl crate::Resettable for HWFC_CONF_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/esp32p4/src/uart0/idle_conf_sync.rs b/esp32p4/src/uart0/idle_conf.rs similarity index 71% rename from esp32p4/src/uart0/idle_conf_sync.rs rename to esp32p4/src/uart0/idle_conf.rs index 2011e066ec..b1ec2a40c2 100644 --- a/esp32p4/src/uart0/idle_conf_sync.rs +++ b/esp32p4/src/uart0/idle_conf.rs @@ -1,7 +1,7 @@ -#[doc = "Register `IDLE_CONF_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `IDLE_CONF_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `IDLE_CONF` reader"] +pub type R = crate::R; +#[doc = "Register `IDLE_CONF` writer"] +pub type W = crate::W; #[doc = "Field `RX_IDLE_THRHD` reader - It will produce frame end signal when receiver takes more time to receive one byte data than this register value."] pub type RX_IDLE_THRHD_R = crate::FieldReader; #[doc = "Field `RX_IDLE_THRHD` writer - It will produce frame end signal when receiver takes more time to receive one byte data than this register value."] @@ -25,7 +25,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("IDLE_CONF_SYNC") + f.debug_struct("IDLE_CONF") .field( "rx_idle_thrhd", &format_args!("{}", self.rx_idle_thrhd().bits()), @@ -38,7 +38,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -47,13 +47,13 @@ impl W { #[doc = "Bits 0:9 - It will produce frame end signal when receiver takes more time to receive one byte data than this register value."] #[inline(always)] #[must_use] - pub fn rx_idle_thrhd(&mut self) -> RX_IDLE_THRHD_W { + pub fn rx_idle_thrhd(&mut self) -> RX_IDLE_THRHD_W { RX_IDLE_THRHD_W::new(self, 0) } #[doc = "Bits 10:19 - This register is used to configure the duration time between transfers."] #[inline(always)] #[must_use] - pub fn tx_idle_num(&mut self) -> TX_IDLE_NUM_W { + pub fn tx_idle_num(&mut self) -> TX_IDLE_NUM_W { TX_IDLE_NUM_W::new(self, 10) } #[doc = r" Writes raw bits to the register."] @@ -67,19 +67,19 @@ impl W { self } } -#[doc = "Frame-end idle configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idle_conf_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idle_conf_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IDLE_CONF_SYNC_SPEC; -impl crate::RegisterSpec for IDLE_CONF_SYNC_SPEC { +#[doc = "Frame-end idle configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idle_conf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idle_conf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct IDLE_CONF_SPEC; +impl crate::RegisterSpec for IDLE_CONF_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`idle_conf_sync::R`](R) reader structure"] -impl crate::Readable for IDLE_CONF_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`idle_conf_sync::W`](W) writer structure"] -impl crate::Writable for IDLE_CONF_SYNC_SPEC { +#[doc = "`read()` method returns [`idle_conf::R`](R) reader structure"] +impl crate::Readable for IDLE_CONF_SPEC {} +#[doc = "`write(|w| ..)` method takes [`idle_conf::W`](W) writer structure"] +impl crate::Writable for IDLE_CONF_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets IDLE_CONF_SYNC to value 0x0004_0100"] -impl crate::Resettable for IDLE_CONF_SYNC_SPEC { +#[doc = "`reset()` method sets IDLE_CONF to value 0x0004_0100"] +impl crate::Resettable for IDLE_CONF_SPEC { const RESET_VALUE: u32 = 0x0004_0100; } diff --git a/esp32p4/src/uart0/rs485_conf_sync.rs b/esp32p4/src/uart0/rs485_conf.rs similarity index 83% rename from esp32p4/src/uart0/rs485_conf_sync.rs rename to esp32p4/src/uart0/rs485_conf.rs index f36b872145..45ae568692 100644 --- a/esp32p4/src/uart0/rs485_conf_sync.rs +++ b/esp32p4/src/uart0/rs485_conf.rs @@ -1,7 +1,7 @@ -#[doc = "Register `RS485_CONF_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `RS485_CONF_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `RS485_CONF` reader"] +pub type R = crate::R; +#[doc = "Register `RS485_CONF` writer"] +pub type W = crate::W; #[doc = "Field `RS485_EN` reader - Set this bit to choose the rs485 mode."] pub type RS485_EN_R = crate::BitReader; #[doc = "Field `RS485_EN` writer - Set this bit to choose the rs485 mode."] @@ -70,7 +70,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("RS485_CONF_SYNC") + f.debug_struct("RS485_CONF") .field("rs485_en", &format_args!("{}", self.rs485_en().bit())) .field("dl0_en", &format_args!("{}", self.dl0_en().bit())) .field("dl1_en", &format_args!("{}", self.dl1_en().bit())) @@ -94,7 +94,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -103,43 +103,43 @@ impl W { #[doc = "Bit 0 - Set this bit to choose the rs485 mode."] #[inline(always)] #[must_use] - pub fn rs485_en(&mut self) -> RS485_EN_W { + pub fn rs485_en(&mut self) -> RS485_EN_W { RS485_EN_W::new(self, 0) } #[doc = "Bit 1 - Set this bit to delay the stop bit by 1 bit."] #[inline(always)] #[must_use] - pub fn dl0_en(&mut self) -> DL0_EN_W { + pub fn dl0_en(&mut self) -> DL0_EN_W { DL0_EN_W::new(self, 1) } #[doc = "Bit 2 - Set this bit to delay the stop bit by 1 bit."] #[inline(always)] #[must_use] - pub fn dl1_en(&mut self) -> DL1_EN_W { + pub fn dl1_en(&mut self) -> DL1_EN_W { DL1_EN_W::new(self, 2) } #[doc = "Bit 3 - Set this bit to enable receiver could receive data when the transmitter is transmitting data in rs485 mode."] #[inline(always)] #[must_use] - pub fn rs485tx_rx_en(&mut self) -> RS485TX_RX_EN_W { + pub fn rs485tx_rx_en(&mut self) -> RS485TX_RX_EN_W { RS485TX_RX_EN_W::new(self, 3) } #[doc = "Bit 4 - 1'h1: enable rs485 transmitter to send data when rs485 receiver line is busy."] #[inline(always)] #[must_use] - pub fn rs485rxby_tx_en(&mut self) -> RS485RXBY_TX_EN_W { + pub fn rs485rxby_tx_en(&mut self) -> RS485RXBY_TX_EN_W { RS485RXBY_TX_EN_W::new(self, 4) } #[doc = "Bit 5 - This register is used to delay the receiver's internal data signal."] #[inline(always)] #[must_use] - pub fn rs485_rx_dly_num(&mut self) -> RS485_RX_DLY_NUM_W { + pub fn rs485_rx_dly_num(&mut self) -> RS485_RX_DLY_NUM_W { RS485_RX_DLY_NUM_W::new(self, 5) } #[doc = "Bits 6:9 - This register is used to delay the transmitter's internal data signal."] #[inline(always)] #[must_use] - pub fn rs485_tx_dly_num(&mut self) -> RS485_TX_DLY_NUM_W { + pub fn rs485_tx_dly_num(&mut self) -> RS485_TX_DLY_NUM_W { RS485_TX_DLY_NUM_W::new(self, 6) } #[doc = r" Writes raw bits to the register."] @@ -153,19 +153,19 @@ impl W { self } } -#[doc = "RS485 mode configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rs485_conf_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rs485_conf_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RS485_CONF_SYNC_SPEC; -impl crate::RegisterSpec for RS485_CONF_SYNC_SPEC { +#[doc = "RS485 mode configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rs485_conf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rs485_conf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct RS485_CONF_SPEC; +impl crate::RegisterSpec for RS485_CONF_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`rs485_conf_sync::R`](R) reader structure"] -impl crate::Readable for RS485_CONF_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`rs485_conf_sync::W`](W) writer structure"] -impl crate::Writable for RS485_CONF_SYNC_SPEC { +#[doc = "`read()` method returns [`rs485_conf::R`](R) reader structure"] +impl crate::Readable for RS485_CONF_SPEC {} +#[doc = "`write(|w| ..)` method takes [`rs485_conf::W`](W) writer structure"] +impl crate::Writable for RS485_CONF_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets RS485_CONF_SYNC to value 0"] -impl crate::Resettable for RS485_CONF_SYNC_SPEC { +#[doc = "`reset()` method sets RS485_CONF to value 0"] +impl crate::Resettable for RS485_CONF_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/esp32p4/src/uart0/swfc_conf0_sync.rs b/esp32p4/src/uart0/swfc_conf0.rs similarity index 84% rename from esp32p4/src/uart0/swfc_conf0_sync.rs rename to esp32p4/src/uart0/swfc_conf0.rs index 4c7492f17e..150a2b3c63 100644 --- a/esp32p4/src/uart0/swfc_conf0_sync.rs +++ b/esp32p4/src/uart0/swfc_conf0.rs @@ -1,7 +1,7 @@ -#[doc = "Register `SWFC_CONF0_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `SWFC_CONF0_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `SWFC_CONF0` reader"] +pub type R = crate::R; +#[doc = "Register `SWFC_CONF0` writer"] +pub type W = crate::W; #[doc = "Field `XON_CHAR` reader - This register stores the Xon flow control char."] pub type XON_CHAR_R = crate::FieldReader; #[doc = "Field `XON_CHAR` writer - This register stores the Xon flow control char."] @@ -88,7 +88,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("SWFC_CONF0_SYNC") + f.debug_struct("SWFC_CONF0") .field("xon_char", &format_args!("{}", self.xon_char().bits())) .field("xoff_char", &format_args!("{}", self.xoff_char().bits())) .field( @@ -108,7 +108,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -117,55 +117,55 @@ impl W { #[doc = "Bits 0:7 - This register stores the Xon flow control char."] #[inline(always)] #[must_use] - pub fn xon_char(&mut self) -> XON_CHAR_W { + pub fn xon_char(&mut self) -> XON_CHAR_W { XON_CHAR_W::new(self, 0) } #[doc = "Bits 8:15 - This register stores the Xoff flow control char."] #[inline(always)] #[must_use] - pub fn xoff_char(&mut self) -> XOFF_CHAR_W { + pub fn xoff_char(&mut self) -> XOFF_CHAR_W { XOFF_CHAR_W::new(self, 8) } #[doc = "Bit 16 - In software flow control mode, UART Tx is disabled once UART Rx receives XOFF. In this status, UART Tx can not transmit XOFF even the received data number is larger than UART_XOFF_THRESHOLD. Set this bit to enable UART Tx can transmit XON/XOFF when UART Tx is disabled."] #[inline(always)] #[must_use] - pub fn xon_xoff_still_send(&mut self) -> XON_XOFF_STILL_SEND_W { + pub fn xon_xoff_still_send(&mut self) -> XON_XOFF_STILL_SEND_W { XON_XOFF_STILL_SEND_W::new(self, 16) } #[doc = "Bit 17 - Set this bit to enable software flow control. It is used with register sw_xon or sw_xoff."] #[inline(always)] #[must_use] - pub fn sw_flow_con_en(&mut self) -> SW_FLOW_CON_EN_W { + pub fn sw_flow_con_en(&mut self) -> SW_FLOW_CON_EN_W { SW_FLOW_CON_EN_W::new(self, 17) } #[doc = "Bit 18 - Set this bit to remove flow control char from the received data."] #[inline(always)] #[must_use] - pub fn xonoff_del(&mut self) -> XONOFF_DEL_W { + pub fn xonoff_del(&mut self) -> XONOFF_DEL_W { XONOFF_DEL_W::new(self, 18) } #[doc = "Bit 19 - Set this bit to enable the transmitter to go on sending data."] #[inline(always)] #[must_use] - pub fn force_xon(&mut self) -> FORCE_XON_W { + pub fn force_xon(&mut self) -> FORCE_XON_W { FORCE_XON_W::new(self, 19) } #[doc = "Bit 20 - Set this bit to stop the transmitter from sending data."] #[inline(always)] #[must_use] - pub fn force_xoff(&mut self) -> FORCE_XOFF_W { + pub fn force_xoff(&mut self) -> FORCE_XOFF_W { FORCE_XOFF_W::new(self, 20) } #[doc = "Bit 21 - Set this bit to send Xon char. It is cleared by hardware automatically."] #[inline(always)] #[must_use] - pub fn send_xon(&mut self) -> SEND_XON_W { + pub fn send_xon(&mut self) -> SEND_XON_W { SEND_XON_W::new(self, 21) } #[doc = "Bit 22 - Set this bit to send Xoff char. It is cleared by hardware automatically."] #[inline(always)] #[must_use] - pub fn send_xoff(&mut self) -> SEND_XOFF_W { + pub fn send_xoff(&mut self) -> SEND_XOFF_W { SEND_XOFF_W::new(self, 22) } #[doc = r" Writes raw bits to the register."] @@ -179,19 +179,19 @@ impl W { self } } -#[doc = "Software flow-control character configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`swfc_conf0_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swfc_conf0_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SWFC_CONF0_SYNC_SPEC; -impl crate::RegisterSpec for SWFC_CONF0_SYNC_SPEC { +#[doc = "Software flow-control character configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`swfc_conf0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swfc_conf0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct SWFC_CONF0_SPEC; +impl crate::RegisterSpec for SWFC_CONF0_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`swfc_conf0_sync::R`](R) reader structure"] -impl crate::Readable for SWFC_CONF0_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`swfc_conf0_sync::W`](W) writer structure"] -impl crate::Writable for SWFC_CONF0_SYNC_SPEC { +#[doc = "`read()` method returns [`swfc_conf0::R`](R) reader structure"] +impl crate::Readable for SWFC_CONF0_SPEC {} +#[doc = "`write(|w| ..)` method takes [`swfc_conf0::W`](W) writer structure"] +impl crate::Writable for SWFC_CONF0_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets SWFC_CONF0_SYNC to value 0x1311"] -impl crate::Resettable for SWFC_CONF0_SYNC_SPEC { +#[doc = "`reset()` method sets SWFC_CONF0 to value 0x1311"] +impl crate::Resettable for SWFC_CONF0_SPEC { const RESET_VALUE: u32 = 0x1311; } diff --git a/esp32p4/src/uart0/tout_conf_sync.rs b/esp32p4/src/uart0/tout_conf.rs similarity index 78% rename from esp32p4/src/uart0/tout_conf_sync.rs rename to esp32p4/src/uart0/tout_conf.rs index 72ce0a26c8..fe6f1e792b 100644 --- a/esp32p4/src/uart0/tout_conf_sync.rs +++ b/esp32p4/src/uart0/tout_conf.rs @@ -1,7 +1,7 @@ -#[doc = "Register `TOUT_CONF_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `TOUT_CONF_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `TOUT_CONF` reader"] +pub type R = crate::R; +#[doc = "Register `TOUT_CONF` writer"] +pub type W = crate::W; #[doc = "Field `RX_TOUT_EN` reader - This is the enble bit for uart receiver's timeout function."] pub type RX_TOUT_EN_R = crate::BitReader; #[doc = "Field `RX_TOUT_EN` writer - This is the enble bit for uart receiver's timeout function."] @@ -34,7 +34,7 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TOUT_CONF_SYNC") + f.debug_struct("TOUT_CONF") .field("rx_tout_en", &format_args!("{}", self.rx_tout_en().bit())) .field( "rx_tout_flow_dis", @@ -48,7 +48,7 @@ impl core::fmt::Debug for R { } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -57,19 +57,19 @@ impl W { #[doc = "Bit 0 - This is the enble bit for uart receiver's timeout function."] #[inline(always)] #[must_use] - pub fn rx_tout_en(&mut self) -> RX_TOUT_EN_W { + pub fn rx_tout_en(&mut self) -> RX_TOUT_EN_W { RX_TOUT_EN_W::new(self, 0) } #[doc = "Bit 1 - Set this bit to stop accumulating idle_cnt when hardware flow control works."] #[inline(always)] #[must_use] - pub fn rx_tout_flow_dis(&mut self) -> RX_TOUT_FLOW_DIS_W { + pub fn rx_tout_flow_dis(&mut self) -> RX_TOUT_FLOW_DIS_W { RX_TOUT_FLOW_DIS_W::new(self, 1) } #[doc = "Bits 2:11 - This register is used to configure the threshold time that receiver takes to receive one byte. The rxfifo_tout_int interrupt will be trigger when the receiver takes more time to receive one byte with rx_tout_en set to 1."] #[inline(always)] #[must_use] - pub fn rx_tout_thrhd(&mut self) -> RX_TOUT_THRHD_W { + pub fn rx_tout_thrhd(&mut self) -> RX_TOUT_THRHD_W { RX_TOUT_THRHD_W::new(self, 2) } #[doc = r" Writes raw bits to the register."] @@ -83,19 +83,19 @@ impl W { self } } -#[doc = "UART threshold and allocation configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tout_conf_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tout_conf_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TOUT_CONF_SYNC_SPEC; -impl crate::RegisterSpec for TOUT_CONF_SYNC_SPEC { +#[doc = "UART threshold and allocation configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tout_conf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tout_conf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TOUT_CONF_SPEC; +impl crate::RegisterSpec for TOUT_CONF_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`tout_conf_sync::R`](R) reader structure"] -impl crate::Readable for TOUT_CONF_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`tout_conf_sync::W`](W) writer structure"] -impl crate::Writable for TOUT_CONF_SYNC_SPEC { +#[doc = "`read()` method returns [`tout_conf::R`](R) reader structure"] +impl crate::Readable for TOUT_CONF_SPEC {} +#[doc = "`write(|w| ..)` method takes [`tout_conf::W`](W) writer structure"] +impl crate::Writable for TOUT_CONF_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets TOUT_CONF_SYNC to value 0x28"] -impl crate::Resettable for TOUT_CONF_SYNC_SPEC { +#[doc = "`reset()` method sets TOUT_CONF to value 0x28"] +impl crate::Resettable for TOUT_CONF_SPEC { const RESET_VALUE: u32 = 0x28; } diff --git a/esp32p4/src/uart0/txbrk_conf_sync.rs b/esp32p4/src/uart0/txbrk_conf.rs similarity index 62% rename from esp32p4/src/uart0/txbrk_conf_sync.rs rename to esp32p4/src/uart0/txbrk_conf.rs index efb197e342..2c7e438025 100644 --- a/esp32p4/src/uart0/txbrk_conf_sync.rs +++ b/esp32p4/src/uart0/txbrk_conf.rs @@ -1,7 +1,7 @@ -#[doc = "Register `TXBRK_CONF_SYNC` reader"] -pub type R = crate::R; -#[doc = "Register `TXBRK_CONF_SYNC` writer"] -pub type W = crate::W; +#[doc = "Register `TXBRK_CONF` reader"] +pub type R = crate::R; +#[doc = "Register `TXBRK_CONF` writer"] +pub type W = crate::W; #[doc = "Field `TX_BRK_NUM` reader - This register is used to configure the number of 0 to be sent after the process of sending data is done. It is active when txd_brk is set to 1."] pub type TX_BRK_NUM_R = crate::FieldReader; #[doc = "Field `TX_BRK_NUM` writer - This register is used to configure the number of 0 to be sent after the process of sending data is done. It is active when txd_brk is set to 1."] @@ -16,13 +16,13 @@ impl R { #[cfg(feature = "impl-register-debug")] impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("TXBRK_CONF_SYNC") + f.debug_struct("TXBRK_CONF") .field("tx_brk_num", &format_args!("{}", self.tx_brk_num().bits())) .finish() } } #[cfg(feature = "impl-register-debug")] -impl core::fmt::Debug for crate::generic::Reg { +impl core::fmt::Debug for crate::generic::Reg { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -31,7 +31,7 @@ impl W { #[doc = "Bits 0:7 - This register is used to configure the number of 0 to be sent after the process of sending data is done. It is active when txd_brk is set to 1."] #[inline(always)] #[must_use] - pub fn tx_brk_num(&mut self) -> TX_BRK_NUM_W { + pub fn tx_brk_num(&mut self) -> TX_BRK_NUM_W { TX_BRK_NUM_W::new(self, 0) } #[doc = r" Writes raw bits to the register."] @@ -45,19 +45,19 @@ impl W { self } } -#[doc = "Tx Break character configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbrk_conf_sync::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txbrk_conf_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TXBRK_CONF_SYNC_SPEC; -impl crate::RegisterSpec for TXBRK_CONF_SYNC_SPEC { +#[doc = "Tx Break character configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`txbrk_conf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`txbrk_conf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] +pub struct TXBRK_CONF_SPEC; +impl crate::RegisterSpec for TXBRK_CONF_SPEC { type Ux = u32; } -#[doc = "`read()` method returns [`txbrk_conf_sync::R`](R) reader structure"] -impl crate::Readable for TXBRK_CONF_SYNC_SPEC {} -#[doc = "`write(|w| ..)` method takes [`txbrk_conf_sync::W`](W) writer structure"] -impl crate::Writable for TXBRK_CONF_SYNC_SPEC { +#[doc = "`read()` method returns [`txbrk_conf::R`](R) reader structure"] +impl crate::Readable for TXBRK_CONF_SPEC {} +#[doc = "`write(|w| ..)` method takes [`txbrk_conf::W`](W) writer structure"] +impl crate::Writable for TXBRK_CONF_SPEC { const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } -#[doc = "`reset()` method sets TXBRK_CONF_SYNC to value 0x0a"] -impl crate::Resettable for TXBRK_CONF_SYNC_SPEC { +#[doc = "`reset()` method sets TXBRK_CONF to value 0x0a"] +impl crate::Resettable for TXBRK_CONF_SPEC { const RESET_VALUE: u32 = 0x0a; } diff --git a/esp32p4/svd/patches/esp32p4.yaml b/esp32p4/svd/patches/esp32p4.yaml index b0c3b648dd..8ee0aeed5b 100644 --- a/esp32p4/svd/patches/esp32p4.yaml +++ b/esp32p4/svd/patches/esp32p4.yaml @@ -1,5 +1,13 @@ _svd: "../esp32p4.base.svd" +UART0: + _strip_end: "_SYNC" + + FIFO: + _modify: + RXFIFO_RD_BYTE: + access: read-write + USB_DEVICE: "*": _strip: "USB_SERIAL_JTAG_"