Align SPI, PARL_IO interrupts (C2,H2,C6) (#209)

* Align SPI, PARL_IO interrupts (C2,H2,C6) * Rename SPI_INTR_1 to SPI1 for C2
esp-rs · Mar 20, 2024 · f5d274d · f5d274d
1 parent 963c280
commit f5d274d
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Showing 13 changed files with 91 additions and 59 deletions.
diff --git a/esp32c2/device.x b/esp32c2/device.x
@@ -13,8 +13,8 @@ PROVIDE(I2C_MST = DefaultHandler);
 PROVIDE(APB_CTRL = DefaultHandler);
 PROVIDE(GPIO = DefaultHandler);
 PROVIDE(GPIO_NMI = DefaultHandler);
-PROVIDE(SPI_INTR_1 = DefaultHandler);
-PROVIDE(SPI_INTR_2 = DefaultHandler);
+PROVIDE(SPI1 = DefaultHandler);
+PROVIDE(SPI2 = DefaultHandler);
 PROVIDE(UART0 = DefaultHandler);
 PROVIDE(UART1 = DefaultHandler);
 PROVIDE(LEDC = DefaultHandler);

diff --git a/esp32c2/src/interrupt.rs b/esp32c2/src/interrupt.rs
@@ -33,10 +33,10 @@ pub enum Interrupt {
     GPIO = 13,
     #[doc = "14 - GPIO_NMI"]
     GPIO_NMI = 14,
-    #[doc = "15 - SPI_INTR_1"]
-    SPI_INTR_1 = 15,
-    #[doc = "16 - SPI_INTR_2"]
-    SPI_INTR_2 = 16,
+    #[doc = "15 - SPI1"]
+    SPI1 = 15,
+    #[doc = "16 - SPI2"]
+    SPI2 = 16,
     #[doc = "17 - UART0"]
     UART0 = 17,
     #[doc = "18 - UART1"]
@@ -111,8 +111,8 @@ impl Interrupt {
             12 => Ok(Interrupt::APB_CTRL),
             13 => Ok(Interrupt::GPIO),
             14 => Ok(Interrupt::GPIO_NMI),
-            15 => Ok(Interrupt::SPI_INTR_1),
-            16 => Ok(Interrupt::SPI_INTR_2),
+            15 => Ok(Interrupt::SPI1),
+            16 => Ok(Interrupt::SPI2),
             17 => Ok(Interrupt::UART0),
             18 => Ok(Interrupt::UART1),
             19 => Ok(Interrupt::LEDC),

diff --git a/esp32c2/src/lib.rs b/esp32c2/src/lib.rs
@@ -28,8 +28,8 @@ extern "C" {
     fn APB_CTRL();
     fn GPIO();
     fn GPIO_NMI();
-    fn SPI_INTR_1();
-    fn SPI_INTR_2();
+    fn SPI1();
+    fn SPI2();
     fn UART0();
     fn UART1();
     fn LEDC();
@@ -88,12 +88,8 @@ pub static __EXTERNAL_INTERRUPTS: [Vector; 42] = [
     Vector { _handler: APB_CTRL },
     Vector { _handler: GPIO },
     Vector { _handler: GPIO_NMI },
-    Vector {
-        _handler: SPI_INTR_1,
-    },
-    Vector {
-        _handler: SPI_INTR_2,
-    },
+    Vector { _handler: SPI1 },
+    Vector { _handler: SPI2 },
     Vector { _handler: UART0 },
     Vector { _handler: UART1 },
     Vector { _handler: LEDC },

diff --git a/esp32c2/svd/patches/esp32c2.yaml b/esp32c2/svd/patches/esp32c2.yaml
@@ -5,3 +5,11 @@ TIMG0:
     _modify:
       T0_UPDATE:
         name: UPDATE
+
+SPI2:
+  _modify:
+    _interrupts:
+      SPI_INTR_2:
+        name: SPI2
+      SPI_INTR_1:
+        name: SPI1
diff --git a/esp32c6/src/parl_io/int_clr.rs b/esp32c6/src/parl_io/int_clr.rs
@@ -2,8 +2,8 @@
 pub type W = crate::W<INT_CLR_SPEC>;
 #[doc = "Field `TX_FIFO_REMPTY_INT_CLR` writer - Write 1 to clear TX_FIFO_REMPTY_INTR."]
 pub type TX_FIFO_REMPTY_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `RX_FIFO_WFULL_INT_CLR` writer - Write 1 to clear RX_FIFO_WFULL_INTR."]
-pub type RX_FIFO_WFULL_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `RX_FIFO_WOVF_INT_CLR` writer - Write 1 to clear RX_FIFO_WOVF_INTR."]
+pub type RX_FIFO_WOVF_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
 #[doc = "Field `TX_EOF_INT_CLR` writer - Write 1 to clear TX_EOF_INTR."]
 pub type TX_EOF_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
 #[cfg(feature = "impl-register-debug")]
@@ -19,11 +19,11 @@ impl W {
     pub fn tx_fifo_rempty_int_clr(&mut self) -> TX_FIFO_REMPTY_INT_CLR_W<INT_CLR_SPEC> {
         TX_FIFO_REMPTY_INT_CLR_W::new(self, 0)
     }
-    #[doc = "Bit 1 - Write 1 to clear RX_FIFO_WFULL_INTR."]
+    #[doc = "Bit 1 - Write 1 to clear RX_FIFO_WOVF_INTR."]
     #[inline(always)]
     #[must_use]
-    pub fn rx_fifo_wfull_int_clr(&mut self) -> RX_FIFO_WFULL_INT_CLR_W<INT_CLR_SPEC> {
-        RX_FIFO_WFULL_INT_CLR_W::new(self, 1)
+    pub fn rx_fifo_wovf_int_clr(&mut self) -> RX_FIFO_WOVF_INT_CLR_W<INT_CLR_SPEC> {
+        RX_FIFO_WOVF_INT_CLR_W::new(self, 1)
     }
     #[doc = "Bit 2 - Write 1 to clear TX_EOF_INTR."]
     #[inline(always)]

diff --git a/esp32c6/src/parl_io/int_ena.rs b/esp32c6/src/parl_io/int_ena.rs
@@ -6,10 +6,10 @@ pub type W = crate::W<INT_ENA_SPEC>;
 pub type TX_FIFO_REMPTY_INT_ENA_R = crate::BitReader;
 #[doc = "Field `TX_FIFO_REMPTY_INT_ENA` writer - Write 1 to enable TX_FIFO_REMPTY_INTR."]
 pub type TX_FIFO_REMPTY_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `RX_FIFO_WFULL_INT_ENA` reader - Write 1 to enable RX_FIFO_WFULL_INTR."]
-pub type RX_FIFO_WFULL_INT_ENA_R = crate::BitReader;
-#[doc = "Field `RX_FIFO_WFULL_INT_ENA` writer - Write 1 to enable RX_FIFO_WFULL_INTR."]
-pub type RX_FIFO_WFULL_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `RX_FIFO_WOVF_INT_ENA` reader - Write 1 to enable RX_FIFO_WOVF_INTR."]
+pub type RX_FIFO_WOVF_INT_ENA_R = crate::BitReader;
+#[doc = "Field `RX_FIFO_WOVF_INT_ENA` writer - Write 1 to enable RX_FIFO_WOVF_INTR."]
+pub type RX_FIFO_WOVF_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
 #[doc = "Field `TX_EOF_INT_ENA` reader - Write 1 to enable TX_EOF_INTR."]
 pub type TX_EOF_INT_ENA_R = crate::BitReader;
 #[doc = "Field `TX_EOF_INT_ENA` writer - Write 1 to enable TX_EOF_INTR."]
@@ -20,10 +20,10 @@ impl R {
     pub fn tx_fifo_rempty_int_ena(&self) -> TX_FIFO_REMPTY_INT_ENA_R {
         TX_FIFO_REMPTY_INT_ENA_R::new((self.bits & 1) != 0)
     }
-    #[doc = "Bit 1 - Write 1 to enable RX_FIFO_WFULL_INTR."]
+    #[doc = "Bit 1 - Write 1 to enable RX_FIFO_WOVF_INTR."]
     #[inline(always)]
-    pub fn rx_fifo_wfull_int_ena(&self) -> RX_FIFO_WFULL_INT_ENA_R {
-        RX_FIFO_WFULL_INT_ENA_R::new(((self.bits >> 1) & 1) != 0)
+    pub fn rx_fifo_wovf_int_ena(&self) -> RX_FIFO_WOVF_INT_ENA_R {
+        RX_FIFO_WOVF_INT_ENA_R::new(((self.bits >> 1) & 1) != 0)
     }
     #[doc = "Bit 2 - Write 1 to enable TX_EOF_INTR."]
     #[inline(always)]
@@ -40,8 +40,8 @@ impl core::fmt::Debug for R {
                 &format_args!("{}", self.tx_fifo_rempty_int_ena().bit()),
             )
             .field(
-                "rx_fifo_wfull_int_ena",
-                &format_args!("{}", self.rx_fifo_wfull_int_ena().bit()),
+                "rx_fifo_wovf_int_ena",
+                &format_args!("{}", self.rx_fifo_wovf_int_ena().bit()),
             )
             .field(
                 "tx_eof_int_ena",
@@ -63,11 +63,11 @@ impl W {
     pub fn tx_fifo_rempty_int_ena(&mut self) -> TX_FIFO_REMPTY_INT_ENA_W<INT_ENA_SPEC> {
         TX_FIFO_REMPTY_INT_ENA_W::new(self, 0)
     }
-    #[doc = "Bit 1 - Write 1 to enable RX_FIFO_WFULL_INTR."]
+    #[doc = "Bit 1 - Write 1 to enable RX_FIFO_WOVF_INTR."]
     #[inline(always)]
     #[must_use]
-    pub fn rx_fifo_wfull_int_ena(&mut self) -> RX_FIFO_WFULL_INT_ENA_W<INT_ENA_SPEC> {
-        RX_FIFO_WFULL_INT_ENA_W::new(self, 1)
+    pub fn rx_fifo_wovf_int_ena(&mut self) -> RX_FIFO_WOVF_INT_ENA_W<INT_ENA_SPEC> {
+        RX_FIFO_WOVF_INT_ENA_W::new(self, 1)
     }
     #[doc = "Bit 2 - Write 1 to enable TX_EOF_INTR."]
     #[inline(always)]

diff --git a/esp32c6/src/parl_io/int_raw.rs b/esp32c6/src/parl_io/int_raw.rs
@@ -6,10 +6,10 @@ pub type W = crate::W<INT_RAW_SPEC>;
 pub type TX_FIFO_REMPTY_INT_RAW_R = crate::BitReader;
 #[doc = "Field `TX_FIFO_REMPTY_INT_RAW` writer - The raw interrupt status of TX_FIFO_REMPTY_INTR."]
 pub type TX_FIFO_REMPTY_INT_RAW_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `RX_FIFO_WFULL_INT_RAW` reader - The raw interrupt status of RX_FIFO_WFULL_INTR."]
-pub type RX_FIFO_WFULL_INT_RAW_R = crate::BitReader;
-#[doc = "Field `RX_FIFO_WFULL_INT_RAW` writer - The raw interrupt status of RX_FIFO_WFULL_INTR."]
-pub type RX_FIFO_WFULL_INT_RAW_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `RX_FIFO_WOVF_INT_RAW` reader - The raw interrupt status of RX_FIFO_WOVF_INTR."]
+pub type RX_FIFO_WOVF_INT_RAW_R = crate::BitReader;
+#[doc = "Field `RX_FIFO_WOVF_INT_RAW` writer - The raw interrupt status of RX_FIFO_WOVF_INTR."]
+pub type RX_FIFO_WOVF_INT_RAW_W<'a, REG> = crate::BitWriter<'a, REG>;
 #[doc = "Field `TX_EOF_INT_RAW` reader - The raw interrupt status of TX_EOF_INTR."]
 pub type TX_EOF_INT_RAW_R = crate::BitReader;
 #[doc = "Field `TX_EOF_INT_RAW` writer - The raw interrupt status of TX_EOF_INTR."]
@@ -20,10 +20,10 @@ impl R {
     pub fn tx_fifo_rempty_int_raw(&self) -> TX_FIFO_REMPTY_INT_RAW_R {
         TX_FIFO_REMPTY_INT_RAW_R::new((self.bits & 1) != 0)
     }
-    #[doc = "Bit 1 - The raw interrupt status of RX_FIFO_WFULL_INTR."]
+    #[doc = "Bit 1 - The raw interrupt status of RX_FIFO_WOVF_INTR."]
     #[inline(always)]
-    pub fn rx_fifo_wfull_int_raw(&self) -> RX_FIFO_WFULL_INT_RAW_R {
-        RX_FIFO_WFULL_INT_RAW_R::new(((self.bits >> 1) & 1) != 0)
+    pub fn rx_fifo_wovf_int_raw(&self) -> RX_FIFO_WOVF_INT_RAW_R {
+        RX_FIFO_WOVF_INT_RAW_R::new(((self.bits >> 1) & 1) != 0)
     }
     #[doc = "Bit 2 - The raw interrupt status of TX_EOF_INTR."]
     #[inline(always)]
@@ -40,8 +40,8 @@ impl core::fmt::Debug for R {
                 &format_args!("{}", self.tx_fifo_rempty_int_raw().bit()),
             )
             .field(
-                "rx_fifo_wfull_int_raw",
-                &format_args!("{}", self.rx_fifo_wfull_int_raw().bit()),
+                "rx_fifo_wovf_int_raw",
+                &format_args!("{}", self.rx_fifo_wovf_int_raw().bit()),
             )
             .field(
                 "tx_eof_int_raw",
@@ -63,11 +63,11 @@ impl W {
     pub fn tx_fifo_rempty_int_raw(&mut self) -> TX_FIFO_REMPTY_INT_RAW_W<INT_RAW_SPEC> {
         TX_FIFO_REMPTY_INT_RAW_W::new(self, 0)
     }
-    #[doc = "Bit 1 - The raw interrupt status of RX_FIFO_WFULL_INTR."]
+    #[doc = "Bit 1 - The raw interrupt status of RX_FIFO_WOVF_INTR."]
     #[inline(always)]
     #[must_use]
-    pub fn rx_fifo_wfull_int_raw(&mut self) -> RX_FIFO_WFULL_INT_RAW_W<INT_RAW_SPEC> {
-        RX_FIFO_WFULL_INT_RAW_W::new(self, 1)
+    pub fn rx_fifo_wovf_int_raw(&mut self) -> RX_FIFO_WOVF_INT_RAW_W<INT_RAW_SPEC> {
+        RX_FIFO_WOVF_INT_RAW_W::new(self, 1)
     }
     #[doc = "Bit 2 - The raw interrupt status of TX_EOF_INTR."]
     #[inline(always)]

diff --git a/esp32c6/src/parl_io/int_st.rs b/esp32c6/src/parl_io/int_st.rs
@@ -2,8 +2,8 @@
 pub type R = crate::R<INT_ST_SPEC>;
 #[doc = "Field `TX_FIFO_REMPTY_INT_ST` reader - The masked interrupt status of TX_FIFO_REMPTY_INTR."]
 pub type TX_FIFO_REMPTY_INT_ST_R = crate::BitReader;
-#[doc = "Field `RX_FIFO_WFULL_INT_ST` reader - The masked interrupt status of RX_FIFO_WFULL_INTR."]
-pub type RX_FIFO_WFULL_INT_ST_R = crate::BitReader;
+#[doc = "Field `RX_FIFO_WOVF_INT_ST` reader - The masked interrupt status of RX_FIFO_WOVF_INTR."]
+pub type RX_FIFO_WOVF_INT_ST_R = crate::BitReader;
 #[doc = "Field `TX_EOF_INT_ST` reader - The masked interrupt status of TX_EOF_INTR."]
 pub type TX_EOF_INT_ST_R = crate::BitReader;
 impl R {
@@ -12,10 +12,10 @@ impl R {
     pub fn tx_fifo_rempty_int_st(&self) -> TX_FIFO_REMPTY_INT_ST_R {
         TX_FIFO_REMPTY_INT_ST_R::new((self.bits & 1) != 0)
     }
-    #[doc = "Bit 1 - The masked interrupt status of RX_FIFO_WFULL_INTR."]
+    #[doc = "Bit 1 - The masked interrupt status of RX_FIFO_WOVF_INTR."]
     #[inline(always)]
-    pub fn rx_fifo_wfull_int_st(&self) -> RX_FIFO_WFULL_INT_ST_R {
-        RX_FIFO_WFULL_INT_ST_R::new(((self.bits >> 1) & 1) != 0)
+    pub fn rx_fifo_wovf_int_st(&self) -> RX_FIFO_WOVF_INT_ST_R {
+        RX_FIFO_WOVF_INT_ST_R::new(((self.bits >> 1) & 1) != 0)
     }
     #[doc = "Bit 2 - The masked interrupt status of TX_EOF_INTR."]
     #[inline(always)]
@@ -32,8 +32,8 @@ impl core::fmt::Debug for R {
                 &format_args!("{}", self.tx_fifo_rempty_int_st().bit()),
             )
             .field(
-                "rx_fifo_wfull_int_st",
-                &format_args!("{}", self.rx_fifo_wfull_int_st().bit()),
+                "rx_fifo_wovf_int_st",
+                &format_args!("{}", self.rx_fifo_wovf_int_st().bit()),
             )
             .field(
                 "tx_eof_int_st",

diff --git a/esp32c6/svd/patches/esp32c6.yaml b/esp32c6/svd/patches/esp32c6.yaml
@@ -7,4 +7,26 @@ LP_I2C0:
   DATA:
     _modify:
       FIFO_RDATA:
-        access: read-write
+        access: read-write
+
+PARL_IO:
+  INT_ENA:
+    _modify:
+      RX_FIFO_WFULL_INT_ENA:
+        name: RX_FIFO_WOVF_INT_ENA
+        description: Write 1 to enable RX_FIFO_WOVF_INTR.
+  INT_RAW:
+    _modify:
+      RX_FIFO_WFULL_INT_RAW:
+        name: RX_FIFO_WOVF_INT_RAW
+        description: The raw interrupt status of RX_FIFO_WOVF_INTR.
+  INT_ST:
+    _modify:
+      RX_FIFO_WFULL_INT_ST:
+        name: RX_FIFO_WOVF_INT_ST
+        description: The masked interrupt status of RX_FIFO_WOVF_INTR.
+  INT_CLR:
+    _modify:
+      RX_FIFO_WFULL_INT_CLR:
+        name: RX_FIFO_WOVF_INT_CLR
+        description: Write 1 to clear RX_FIFO_WOVF_INTR.
diff --git a/esp32h2/device.x b/esp32h2/device.x
@@ -57,7 +57,7 @@ PROVIDE(DMA_IN_CH2 = DefaultHandler);
 PROVIDE(DMA_OUT_CH0 = DefaultHandler);
 PROVIDE(DMA_OUT_CH1 = DefaultHandler);
 PROVIDE(DMA_OUT_CH2 = DefaultHandler);
-PROVIDE(GPSPI2 = DefaultHandler);
+PROVIDE(SPI2 = DefaultHandler);
 PROVIDE(AES = DefaultHandler);
 PROVIDE(SHA = DefaultHandler);
 PROVIDE(RSA = DefaultHandler);

diff --git a/esp32h2/src/interrupt.rs b/esp32h2/src/interrupt.rs
@@ -121,8 +121,8 @@ pub enum Interrupt {
     DMA_OUT_CH1 = 57,
     #[doc = "58 - DMA_OUT_CH2"]
     DMA_OUT_CH2 = 58,
-    #[doc = "59 - GPSPI2"]
-    GPSPI2 = 59,
+    #[doc = "59 - SPI2"]
+    SPI2 = 59,
     #[doc = "60 - AES"]
     AES = 60,
     #[doc = "61 - SHA"]
@@ -201,7 +201,7 @@ impl Interrupt {
             56 => Ok(Interrupt::DMA_OUT_CH0),
             57 => Ok(Interrupt::DMA_OUT_CH1),
             58 => Ok(Interrupt::DMA_OUT_CH2),
-            59 => Ok(Interrupt::GPSPI2),
+            59 => Ok(Interrupt::SPI2),
             60 => Ok(Interrupt::AES),
             61 => Ok(Interrupt::SHA),
             62 => Ok(Interrupt::RSA),

diff --git a/esp32h2/src/lib.rs b/esp32h2/src/lib.rs
@@ -72,7 +72,7 @@ extern "C" {
     fn DMA_OUT_CH0();
     fn DMA_OUT_CH1();
     fn DMA_OUT_CH2();
-    fn GPSPI2();
+    fn SPI2();
     fn AES();
     fn SHA();
     fn RSA();
@@ -215,7 +215,7 @@ pub static __EXTERNAL_INTERRUPTS: [Vector; 65] = [
     Vector {
         _handler: DMA_OUT_CH2,
     },
-    Vector { _handler: GPSPI2 },
+    Vector { _handler: SPI2 },
     Vector { _handler: AES },
     Vector { _handler: SHA },
     Vector { _handler: RSA },

diff --git a/esp32h2/svd/patches/esp32h2.yaml b/esp32h2/svd/patches/esp32h2.yaml
@@ -1 +1,7 @@
 _svd: "../esp32h2.base.svd"
+
+SPI2:
+  _modify:
+    _interrupts:
+      GPSPI2:
+        name: SPI2