Avalon master read fails

[stdefeber]

Verification environment : CoCoTb + ghdl
OS : Ubuntu 24.04

I have specified , with json, and generated a simple set of registers being:
0x00 : RevId, RO
0x04 : Scratch, RW

        {
            "name": "IdRev",
            "description": "ID and revision register",
            "address": 0,
            "bitfields": [
                { "name": "ID",    "description": "Module ID",      "reset": 0, "width": 16, "lsb": 16, "access": "ro", "hardware": "n", "enums": [] },
                { "name": "Major", "description": "Major revision", "reset": 1, "width": 8,  "lsb":  8, "access": "ro", "hardware": "n", "enums": [] },
                { "name": "Minor", "description": "Minor revision", "reset": 1, "width": 1,  "lsb":  0, "access": "ro", "hardware": "n", "enums": [] }
            ]
        },
        {
            "name": "Scratch",
            "description": "Scratch register",
            "address": 4,
            "bitfields": [
                { "name": "Scratch", "description": "Scratch register", "reset": 0, "width": 32, "lsb": 0, "access": "rw", "hardware": "n", "enums": [] }
            ]
        },
 

[globcfg]
base_address = 0
data_width = 32
address_width = 16
register_reset = async_neg
address_increment = none
address_alignment = data_width
force_name_case = lower
regmap_path = esf_adc_intf_regs.json

[vhdl_module]
path = hw/regs.vhd
read_filler = 0
interface = amm
generator = Vhdl

cocotb                    1.8.1       cocotb is a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python.
cocotb-bus                0.2.1       
corsair                   1.0.4       Control and Status Register map generator for FPGA/ASIC projects

However it seems that these are not working together.
The CoCoTb bus driver removes the address, or rather sets it to 'X', after 1 clock cycle.

The generated corsair interface samples the read signal but does not so with the address.

Looking at the specification of Avalon, it should not be required to latch the address. So why then for the read.

[esynr3z]

Thank you for the report. I'll check Avalon Deserialize l details and have a look at this.