From 1ce1fc1a014a0f870ec81833a627a2cacf213aae Mon Sep 17 00:00:00 2001 From: faramire Date: Wed, 17 Apr 2024 16:30:49 +0200 Subject: [PATCH] trying to pass gds 3 --- src/stopwatch_top.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/stopwatch_top.v b/src/stopwatch_top.v index fdb3653..2082f43 100644 --- a/src/stopwatch_top.v +++ b/src/stopwatch_top.v @@ -497,7 +497,7 @@ module SPI_Master_With_Single_CS #(parameter SPI_MODE = 0, parameter CLKS_PER_HALF_BIT = 2, parameter MAX_BYTES_PER_CS = 2, - parameter CS_INACTIVE_CLKS = 0 + parameter CS_INACTIVE_CLKS = 0) ( // Control/Data Signals, input i_Rst_L, // FPGA Reset