From ba7c0c2b4fff3b122aa177b011039cbb98e31f67 Mon Sep 17 00:00:00 2001 From: faramire Date: Fri, 5 Apr 2024 02:51:16 +0200 Subject: [PATCH] cleanup --- .gitignore | 1 + src/clockdivider.v | 2 +- src/project.v | 24 ------------------------ src/stopwatch_top.v | 16 +++++++++++----- 4 files changed, 13 insertions(+), 30 deletions(-) delete mode 100644 src/project.v diff --git a/.gitignore b/.gitignore index 67ca6ab..dfe7194 100644 --- a/.gitignore +++ b/.gitignore @@ -10,3 +10,4 @@ test/__pycache__/ test/results.xml test/gate_level_netlist.v src/lcd.v +src/stopwatch_top.v.out diff --git a/src/clockdivider.v b/src/clockdivider.v index 6ca9b63..b849d5e 100644 --- a/src/clockdivider.v +++ b/src/clockdivider.v @@ -13,7 +13,7 @@ module clockDivider ( output reg clk_out // output clock 100 Hz ); - reg[13:0] counter = 0; + reg[13:0] counter; parameter div = 5000; // 1 MHz / 10'000 = 100 Hz, 50% duty cycle => 1/2 of that diff --git a/src/project.v b/src/project.v deleted file mode 100644 index 08007aa..0000000 --- a/src/project.v +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (c) 2024 Fabio Ramirez Stern - * SPDX-License-Identifier: Apache-2.0 - */ - -`define default_netname none - -module tt_um_faramire_stopwatch ( - input wire [7:0] ui_in, // Dedicated inputs - output wire [7:0] uo_out, // Dedicated outputs - input wire [7:0] uio_in, // IOs: Input path - output wire [7:0] uio_out, // IOs: Output path - output wire [7:0] uio_oe, // IOs: Enable path (active high: 0=input, 1=output) - input wire ena, // will go high when the design is enabled - input wire clk, // clock - input wire rst_n // reset_n - low to reset -); - - // All output pins must be assigned. If not used, assign to 0. - assign uo_out = ui_in + uio_in; // Example: ou_out is the sum of ui_in and uio_in - assign uio_out = 0; - assign uio_oe = 0; - -endmodule diff --git a/src/stopwatch_top.v b/src/stopwatch_top.v index 51a8b6d..1080350 100644 --- a/src/stopwatch_top.v +++ b/src/stopwatch_top.v @@ -4,6 +4,12 @@ */ `define default_netname none +`include "clockdivider.v" +`include "controller.v" +`include "counter6.v" +`include "counter10.v" +`include "counter_chain.v" +`include "SPI_driver.v" // ui_in [0]: reset: resets the stopwatch to 00:00:00 // ui_in [1]: speed: @@ -39,13 +45,13 @@ module tt_um_faramire_stopwatch ( wire [3:0] ces_X0; wire [3:0] ces_0X; - clockDivider inst1 ( // divides the 100 MHz clock to 100 Hz + clockDivider clockDivider1 ( // divides the 100 MHz clock to 100 Hz .clk_in (clock_enable), .res (reset_either), .clk_out (dividedClock) ); - controller inst1 ( // two latches for starting/stopping and lap times + controller controller1 ( // two latches for starting/stopping and lap times .res (rst_n), .start_stop (ui_in[0]), .lap_time (ui_in[1]), @@ -56,7 +62,7 @@ module tt_um_faramire_stopwatch ( assign uo_out[3] = counter_enable; // output the internal state assign uo_out[4] = display_enable; - counter_chain inst1 ( // a chain of 6 counters that count from 00:00:00 to 59:59:99 + counter_chain counter_chain1 ( // a chain of 6 counters that count from 00:00:00 to 59:59:99 .clk (dividedClock), .ena (counter_enable), .res (reset_either), @@ -68,11 +74,11 @@ module tt_um_faramire_stopwatch ( .ces_0X (ces_0X) ); - SPI_driver inst1 ( // drives the 7-segment displays connected via a MAX7219 chip over SPI + SPI_driver SPI_driver ( // drives the 7-segment displays connected via a MAX7219 chip over SPI .clk (clk), .res (rst_n), .ena (display_enable), - .min_X0 (min_X0) + .min_X0 (min_X0), .min_0X (min_0X), .sec_X0 (sec_X0), .sec_0X (sec_0X),