Software-side trigger for reset

[JonasDann]

Motivation
Being able to trigger reset of the FPGA design from the software side would remove the need to reprogram the FPGA between executions for a lot of use cases.

Describe the solution you'd like
Add a function to cThread(?) or some other place to trigger the reset signal.

Parts of Coyote being affected
Software and potentially driver.

Additional information
None.