Merge branch 'main' into add_bend_info

gdsfactory · Oct 31, 2024 · 455efdd · 455efdd
2 parents c9b3f06 + 49cc8d3
commit 455efdd
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diff --git a/.github/workflows/test_pdks.yml b/.github/workflows/test_pdks.yml
diff --git a/README.md b/README.md
@@ -1,4 +1,4 @@
-# gdsfactory 7.27.1
+# gdsfactory 7.27.2
 
 [![docs](https://github.com/gdsfactory/gdsfactory/actions/workflows/pages.yml/badge.svg)](https://gdsfactory.github.io/gdsfactory/)
 [![PyPI](https://img.shields.io/pypi/v/gdsfactory)](https://pypi.org/project/gdsfactory/)
@@ -11,7 +11,7 @@
 
 ![logo](https://i.imgur.com/cN1ZWq8.png)
 
-> **⚠️ Deprecation Warning:**  
+> **⚠️ Deprecation Warning:**
 > This version of gdsfactory will only have bug fixes and minor updates. Please see [https://github.com/gdsfactory/gdsfactory](https://github.com/gdsfactory/gdsfactory) for the latest version.
 
 gdsfactory: An open source platform for end to-end chip design and validation.

diff --git a/gdsfactory/get_netlist.py b/gdsfactory/get_netlist.py
@@ -112,6 +112,7 @@ def get_netlist(
     get_instance_name: Callable[..., str] = get_instance_name_from_alias,
     allow_multiple: bool = False,
     merge_info: bool = False,
+    extend_recursive_port_names: bool = False,
 ) -> dict[str, Any]:
     """Returns instances, connections and placements from :class:`Component` as a dict.
 
@@ -144,6 +145,7 @@ def get_netlist(
         allow_multiple: False to raise an error if more than two ports share the same connection. \
                 if True, will return key: [value] pairs with [value] a list of all connected instances.
         merge_info: True to merge info and settings into the same dict.
+        extend_recursive_port_names: Compatibility with recursive get_netlist port name identifiers.
 
     Returns:
         Dictionary containing the following:
@@ -236,7 +238,12 @@ def get_netlist(
                         # a bit of a hack... get the top-level port for the
                         # ComponentArray, by our known naming convention. I hope no one
                         # renames these ports!
-                        parent_port = component[top_name]
+                        if extend_recursive_port_names:
+                            parent_port = component[
+                                parent_port_name
+                            ]  # otherwise links to non existent component ports
+                        else:
+                            parent_port = component[top_name]
                         name2port[lower_name] = parent_port
                         top_ports_list.add(top_name)
                         ports_by_type[parent_port.port_type].append(lower_name)