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ECP5 components #28

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mikey opened this issue Jun 24, 2020 · 5 comments
Closed

ECP5 components #28

mikey opened this issue Jun 24, 2020 · 5 comments
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enhancement New feature or request question Further information is requested

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@mikey
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mikey commented Jun 24, 2020

@eine I'm trying to add an ECP5 PLL to microwatt and looking at https://github.com/ghdl/ghdl-yosys-plugin/blob/master/examples/ecp5_versa/Makefile it seems I need components.vhdl from there to be able to pull in EHXPLLL().

I don't see components.vhdl in any of the docker images. Can we add that or am I going about this with wrong way?

@eine
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eine commented Jun 25, 2020

Hi @mikey! I'm pinging @tgingold and @hackfin, who are the ones that have used components.vhdl.

AFAIU, those are used to instantiate vendor primitives for ECP5 devices, is it correct? Is so, since it is a single file and for an specific device only, I'm not sure about adding it to the synth/yosys image yet. Well, my main concern is that I don't know where to add it. Currently, ghdl and yosys are installed in /usr/local/bin, and the plugin is installed in the default location for plugins in yosys' tree. If we are going to add components.vhdl to GHDL's installation, we might consider moving it to https://github.com/ghdl/ghdl/tree/master/libraries and distributing it along with other libraries. BTW, is components.vhdl required for ghdl --synth? Otherwise, which location do you suggest?

@eine eine added enhancement New feature or request question Further information is requested labels Jun 25, 2020
@hackfin
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hackfin commented Jun 25, 2020

The file location is library/ecp5u/components.vhdl and is just a re-emitted (from the lattice proprietary) components stub declaration for all the architecture specific blackboxes. Since vendor specific, it should rather be in a vendor library add-on that is tested against nextpnr (to which it is linked more closely, due to the nature of the late blackbox binding). So in my opinion it shouldn't go into the GHDL distribution.
Note also that only a few of those components are continously tested. Since there's a lot of deficiencies on either the Verilog or VHDL side of things (missing simulation models, see also YosysHQ/yosys#1358), I've taken it up to the higher level Python/MyHDL-jupyosys domain to be able to emit a 'whiteboxed' functional model at least for the V* HDLs. Again, this co-simulating/verifying/auto-testing (also for hardware-implementation) is more yosys/nextpnr specific.

@eine
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eine commented Jun 25, 2020

@hackfin, thanks for clarifying! Maybe it's time to create the repo for "examples" proposed in ghdl/ghdl-yosys-plugin#98 and discussed in ghdl/ghdl#1291. See also May 2, 2020 11:35 AM.

@eine
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eine commented Feb 7, 2021

Discussion moved to hdl/containers#18.

@eine eine closed this as completed Feb 7, 2021
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