When defining some keywords, robodoc autocompletes source code to these keywords

[tsvi]

Systemverilog has a "begin" keyword.
One of my variables is named "be", When Robodoc parses it, it autocompletes it to begin for some weird reason.

[gumpu]

Sounds like a bug.
Can you paste a copy of your robodoc.rc file and command line that you used?

[tsvi]

I have the following source code:

        vif.address    = trans.address;
        vif.be         = trans.be;
        vif.write_data = trans.write_data;
        vif.write      = trans.write;

I'm running robodoc as follows: robodoc --html --rc robodoc.rc with the following robodc.rc:

items:
  NAME
  DESCRIPTION
  DEFINITION
  VARIABLES
  SWITCHES
  RETURN VALUE
  NOTES
  USES
  USED BY
  TODO

item order:
  NAME
  DESCRIPTION
  USES
  USED BY
  TODO
  DEFINITION

headertypes:
  I Interfaces  interfaces  9
  p Packages    packages    9
  c Classes     classes     8
  C Constraints constraints 0
  T Tasks       tasks       0
  f Functions   functions   0

source items:
  DEFINITION
  VARIABLES

source line comments:
  //

options:
  --src ./sim_files
  --doc ./doc
  --multidoc
  --sections
  --nopre
  --syntaxcolors_enable quotes,line_comments,block_comments,keywords,non_alpha
  --source_line_numbers
  --index

keywords:
  package
  endpackage
  timeunit
  timeprecision
  import
  class
  endclass
  function
  endfunction
  task
  endtask
  forever
  begin
  constraint
  extends
  string
  super
  rand
  time
  bit
  int
  end
  virtual
  protected
  void
  unsigned
  while
  posedge
  foreach
  repeat

[tsvi]

The line vif.be = trans.be; becomes vif.begin = trans.begin; in the documentation.