diff --git a/pdk/open_road_configuration.bzl b/pdk/open_road_configuration.bzl
index af2b32a8..007a68c4 100644
--- a/pdk/open_road_configuration.bzl
+++ b/pdk/open_road_configuration.bzl
@@ -46,6 +46,8 @@ OpenRoadPdkInfo = provider(
         "tracks_file": "Track setup script",
         "wire_rc_clock_metal_layer": "The metal layer to pull RC information for clock nets",
         "wire_rc_signal_metal_layer": "The metal layer to pull RC information for signal nets",
+        "enable_improve_placement": "Enable/Disable improve_placement pass.",
+        "enable_balance_row_usage": "Enable/Disable balance row usage pass.",
     },
 )
 
@@ -86,6 +88,8 @@ def _open_road_pdk_configuration_impl(ctx):
             detailed_routing_configuration = ctx.attr.detailed_routing_configuration,
             density_fill_config = ctx.attr.density_fill_config,
             klayout_tech_file = ctx.attr.klayout_tech_file,
+            enable_improve_placement = ctx.attr.enable_improve_placement,
+            enable_balance_row_usage = ctx.attr.enable_balance_row_usage,
         ),
     ]
 
@@ -188,6 +192,14 @@ open_road_pdk_configuration = rule(
         "wire_rc_signal_metal_layer": attr.string(
             mandatory = True,
         ),
+        "enable_improve_placement": attr.bool(
+            default = True,
+            doc = "Enable/Disable improve_placement pass.",
+        ),
+        "enable_balance_row_usage": attr.bool(
+            default = False,
+            doc = "Enable/Disable balance row usage pass.",
+        ),
     },
 )
 
diff --git a/place_and_route/private/resize.bzl b/place_and_route/private/resize.bzl
index 200f394e..7395c856 100644
--- a/place_and_route/private/resize.bzl
+++ b/place_and_route/private/resize.bzl
@@ -14,7 +14,9 @@
 
 """Resize openROAD commands"""
 
+load("//pdk:open_road_configuration.bzl", "get_open_road_configuration")
 load("//place_and_route:open_road.bzl", "OpenRoadInfo", "merge_open_road_info", "openroad_command", "placement_padding_commands")
+load("//synthesis:defs.bzl", "SynthesisInfo")
 
 def resize(ctx, open_road_info):
     """Performs resizing operation of the standard cells.
@@ -28,12 +30,14 @@ def resize(ctx, open_road_info):
 
     """
     placement_padding_struct = placement_padding_commands(ctx)
+    open_road_configuration = get_open_road_configuration(ctx.attr.synthesized_rtl[SynthesisInfo])
 
     inputs = placement_padding_struct.inputs
 
     open_road_commands = placement_padding_struct.commands + [
+        "balance_row_usage" if open_road_configuration.enable_balance_row_usage else "",
         "detailed_placement",
-        "improve_placement" if ctx.attr.enable_improve_placement else "",
+        "improve_placement" if ctx.attr.enable_improve_placement and open_road_configuration.enable_improve_placement else "",
         "optimize_mirroring",
         "check_placement -verbose",
         "report_checks -path_delay min_max -format full_clock_expanded -fields {input_pin slew capacitance} -digits 3",