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PCIe 4+ interface #4

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hughperkins opened this issue Apr 7, 2022 · 1 comment
Open

PCIe 4+ interface #4

hughperkins opened this issue Apr 7, 2022 · 1 comment
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opportunity Opportunity to create your own repo/work/project.

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@hughperkins
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hughperkins commented Apr 7, 2022

Need a PCIe 4+ interface, for communications between the main computer's CPUs, and the GPU board.

The PCIe interface will be used to copy data to and from the mainboard memory; to receive kernel launch requests from a mainboard CPU core; and to inform the mainboard CPU core once the kernel has finished running.

What we need for VeriGPU:

  • comprehensive verification of the PCIe interface
    • ideally including formal verification
  • need clear documentation on how to integrate the PCIe interface with VeriGPU
    • how to use the interface to copy data to and from mainboard main memory?
    • how to receive data/instructions from a mainboard CPU?
    • how to send data/responses to a mainboard CPU?
  • ideally need a PR to integrate the PCIe 4+ interface with VeriGPU

Screen Shot 2022-04-07 at 6 19 04 PM

Introduction to PCIe https://pcisig.com/sites/default/files/files/PCI_Express_Basics_Background.pdf

Screen Shot 2022-04-07 at 6 13 24 PM

(from linked presentation)

Bear in mind that taping out at 5nm costs $250M or so, so we want things to work first time. Therefore verification is important :)

@hughperkins hughperkins added the opportunity Opportunity to create your own repo/work/project. label Apr 7, 2022
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