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Software #1

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Chaitanya36500 opened this issue Aug 24, 2024 · 1 comment
Open

Software #1

Chaitanya36500 opened this issue Aug 24, 2024 · 1 comment

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@Chaitanya36500
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What is the software you used ?
@gdimitrak
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the code is compiled with standard C++ (G++). The resulting verilog code can then be synthesized with standard industrial EDA tools (Cadence, Synopsys, Siemens) or even open source tools like Yosys

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@gdimitrak @Chaitanya36500