From 31af0ed4c6e7acb0eb6fd838c4289e8a594224e3 Mon Sep 17 00:00:00 2001 From: Chris McClimans Date: Sun, 8 Feb 2015 04:52:01 -0800 Subject: [PATCH] Import of Rel-2-BETA-WW05-15 --- Makefile | 182 + arduino/clloader/clloader.c | 11 +- arduino/clloader/clloader.h | 1 + .../BCM43341B0_002.001.014.0123.0168.hcd | Bin 0 -> 41773 bytes broadcom_cws/wlan/driver_bcm43x/wl_cfg80211.c | 55 +- .../bcm43340-tools/dhdutil.bb | 15 + .../bcm43340-tools/wlx.bb | 19 + .../recipes-connectivity/wfa-tool/wfa-tool.bb | 3 + .../conf/distro/poky-edison.conf | 4 +- .../files/bcm43341.conf | 4 +- .../files/bluetooth_rfkill_event.c | 17 +- .../bluez5/bluez5_5.15.bbappend | 24 +- .../bluez5/files/bluetooth.conf | 8 + .../files/obex_set_dbus_session_service.patch | 10 + .../connman/connman/disable_p2p.patch | 15 + .../connman/connman_1.27.bb | 11 + .../connman/connman_1.27.bbappend | 35 + .../hostapd/files/hostapd.conf-sane | 2 +- .../hostapd/files/udhcpd-for-hostapd.conf | 2 +- .../openssh/openssh/sshdgenkeys.service | 2 +- .../openssl-1.0.1e-cve-2014-0195.patch | 40 + .../openssl-1.0.1e-cve-2014-0198.patch | 38 + .../openssl-1.0.1e-cve-2014-0221.patch | 38 + .../openssl-1.0.1e-cve-2014-0224.patch | 103 + .../openssl-1.0.1e-cve-2014-3470.patch | 31 + .../openssl/openssl_1.0.1j.bb | 54 + .../wpa-supplicant/defconfig-gnutls | 11 +- .../wpa-supplicant/p2p_supplicant.conf-sane | 12 + .../wpa-supplicant/udhcpd-p2p.conf | 107 + .../wpa-supplicant-android-4.4.4_r2.0.1.patch | 184 + .../wpa-supplicant/wpa_cli-actions.sh | 45 +- .../wpa-supplicant/wpa_supplicant.conf-sane | 7 +- .../wpa-supplicant/wpa_supplicant.service | 10 +- .../wpa_supplicant_p2p_event.service | 13 + .../wpa_supplicant_wlan0_event.service | 13 + .../wpa-supplicant_2.1.bbappend | 33 +- .../base-files/media-sdcard.automount | 11 + .../base-files/base-files/media-sdcard.mount | 7 +- .../base-files/base-files/share/dot.profile | 9 + .../base-files/base-files_3.0.14.bbappend | 13 +- .../busybox/busybox_1.22.1.bbappend | 7 +- .../busybox/files/busybox-log.cfg | 3 + .../first-install/files/first-install.service | 2 +- .../first-install/files/first-install.sh | 18 +- .../recipes-core/images/edison-image.bb | 30 +- .../ota-update/files/ota-update.sh | 4 +- ...segfault-when-pressing-DEL-key-twice.patch | 39 + .../readline/readline_6.3.bbappend | 4 + .../resize-rootfs/files/resize-rootfs.service | 14 + .../resize-rootfs/resize-rootfs.bb | 24 + .../systemd/files/edison-machine-id.service | 14 + .../systemd/files/hsu-pm-runtime.service | 1 + .../recipes-core/systemd/files/usb0.network | 6 + .../recipes-core/systemd/systemd_%.bbappend | 16 +- .../e2fsprogs/e2fsprogs_%.bbappend | 11 + .../recipes-devtools/swig/swig.inc | 63 + ...e-for-swig-swiglib-on-non-Win32-plat.patch | 56 + ...re-use-pkg-config-for-pcre-detection.patch | 55 + .../recipes-devtools/swig/swig_3.0.2.bb | 8 + .../alsa/alsa-utils_%.bbappend | 13 + .../alsa/files/asound.state | 14141 +++++++ .../libav/libav_0.8.9.bbappend | 23 + .../mplayer/mplayer-common.bb | 22 + .../mplayer/mplayer-common/mplayer.conf | 15 + .../mplayer2/cross.compile.codec-cfg.patch | 16 + .../mplayer/mplayer2_git.bb | 161 + .../pulseaudio/files/pulseaudio.service | 12 + .../pulseaudio/files/system.pa | 66 + .../pulseaudio/pulseaudio-service_1.0.bb | 28 + .../pulseaudio/pulseaudio_5.0.bbappend | 22 + .../blink-led/blink-led_0.1.bb | 23 + .../recipes-support/blink-led/files/blink-led | 109 + .../blink-led/files/blink-led.service | 10 + .../cleanjournal/cleanjournal.bb | 31 + .../cleanjournal/files/clean_journal.sh | 60 + .../cleanjournal/files/cleanjournal.service | 10 + .../crashlog/files/retrieve_crashlog.sh | 73 +- .../edison-mcu/files/intel_mcu.bin | Bin 0 -> 12212 bytes .../edison-mcu/files/mcu_fw_loader.service | 10 + .../edison-mcu/files/mcu_fw_loader.sh | 12 + .../edison-mcu/mcu-fw-bin_0.1.bb | 17 + .../edison-mcu/mcu-fw-load_0.1.bb | 23 + .../edison-sst/files/fw_sst_119a.bin | Bin 0 -> 464927 bytes .../edison-sst/sst-fw-bin_0.1.bb | 19 + .../files/pwr-button-handler.c | 41 +- .../files/pwr-button-handler.service | 2 +- .../c-ares/c-ares_1.10.0.bb | 13 + .../mdns/files/build.patch | 191 + .../mdns/files/mdns.service | 4 + .../recipes-connectivity/mdns/mdns_544.bb | 23 +- .../mosquitto/files/build.patch | 71 + .../mosquitto/files/mosquitto.service | 15 + .../mosquitto/mosquitto_1.3.4.bb | 55 + .../paho-mqtt/files/makefile.patch | 19 + .../paho-mqtt/paho-mqtt_3.1.bb | 21 +- .../recipes-connectivity/sshpass/sshpass.inc | 10 + .../sshpass/sshpass_1.05.bb | 8 + .../recipes-connectivity/zeromq/cppzmq_git.bb | 19 + .../zeromq/zeromq_4.0.4.bb | 6 +- .../recipes-core/images/edison-image.bbappend | 25 +- .../iotkit-agent/iotkit-agent_0.2.0.bb | 84 + .../iotkit-comm-c/iotkit-comm-c_0.1.1.bb | 17 +- .../iotkit-comm-js/iotkit-comm-js_0.1.1.bb | 57 +- .../iotkit-lib-c/iotkit-lib-c_0.1.0.bb | 49 + .../iotkit-opkg/files/iotkit.conf | 1 + .../iotkit-opkg/iotkit-opkg_0.0.1.bb | 22 + .../recipes-devtools/mraa/mraa_0.5.2.bb | 27 + .../recipes-devtools/nodejs/nodejs_0.10.28.bb | 26 +- .../recipes-devtools/oobe/oobe_0.0.1.bb | 31 +- .../recipes-devtools/upm/upm_0.1.8.bb | 17 + .../xdk-daemon/xdk-daemon_0.0.27.bb | 68 + .../meta-edison/conf/machine/edison.conf | 2 +- .../recipes-bsp/u-boot/files/edison.env | 56 + .../recipes-bsp/u-boot/files/fw_env.config | 11 + .../u-boot/files/target_env/blankcdc.env | 10 + .../u-boot/files/target_env/blankrndis.env | 10 + .../u-boot/files/target_env/defaultcdc.env | 10 + .../u-boot/files/target_env/defaultrndis.env | 10 + .../u-boot/files/target_env/ifwi.env | 7 + .../u-boot/files/target_env/prod.env | 6 + .../u-boot/files/upstream_to_edison.patch | 11157 ++++++ .../u-boot/u-boot-fw-utils_2014.04.bb | 28 + .../recipes-bsp/u-boot/u-boot-internal.inc | 10 + .../recipes-bsp/u-boot/u-boot-osip.inc | 208 + .../recipes-bsp/u-boot/u-boot-target-env.inc | 93 + .../u-boot/u-boot-tools_2014.04.bb | 22 + .../recipes-bsp/u-boot/u-boot_2014.04.bb | 7 + .../recipes-kernel/linux/files/defconfig | 106 +- .../linux/files/upstream_to_edison.patch | 30701 +++++++++++++++- .../linux/linux-yocto_3.10.bbappend | 10 - device-software/setup.sh | 64 +- ...handle-syslog-related-files-properly.patch | 74 + ...ternal-src-builds-when-S-B-poky-dora.patch | 3 +- ...rchive-avoid-dependency-on-e2fsprogs.patch | 55 + ...reen-sessions-being-killed-on-discon.patch | 36 + device-software/utils/Makefile.mk | 182 + device-software/utils/create-debian-image.sh | 226 + .../utils/create_devtools_package.sh | 25 +- device-software/utils/flash/flashall.bat | 63 +- device-software/utils/flash/flashall.sh | 85 +- .../flash/ifwi/edison/edison_dnx_fwr.bin | Bin 98196 -> 98196 bytes .../flash/ifwi/edison/edison_dnx_osr.bin | Bin 148996 -> 148996 bytes .../flash/ifwi/edison/edison_ifwi-dbg-00.bin | Bin 4194468 -> 4194468 bytes .../flash/ifwi/edison/edison_ifwi-dbg-01.bin | Bin 4194468 -> 4194468 bytes .../flash/ifwi/edison/edison_ifwi-dbg-02.bin | Bin 4194468 -> 4194468 bytes .../flash/ifwi/edison/edison_ifwi-dbg-03.bin | Bin 4194468 -> 4194468 bytes .../flash/ifwi/edison/edison_ifwi-dbg-04.bin | Bin 4194468 -> 4194468 bytes .../flash/ifwi/edison/edison_ifwi-dbg-05.bin | Bin 4194468 -> 4194468 bytes .../flash/ifwi/edison/edison_ifwi-dbg-06.bin | Bin 4194468 -> 4194468 bytes device-software/utils/flash/postBuild.sh | 74 +- device-software/utils/handle_bash_func.patch | 41 + device-software/utils/invalidate_sstate.sh | 19 +- .../sdk-populate-clean-broken-links.patch | 6 +- mw/oobe/LICENSE | 196 +- mw/oobe/package.json | 11 + mw/oobe/src/configure_edison | 146 +- mw/oobe/src/public/exit-upgrade.html | 33 + mw/oobe/src/public/exit.html | 12 +- mw/oobe/src/public/exiting-without-wifi.html | 12 +- mw/oobe/src/public/index.html | 168 +- mw/oobe/src/public/main.css | 30 +- mw/oobe/src/public/upgrade.html | 61 + mw/oobe/src/server.js | 75 +- 163 files changed, 60762 insertions(+), 811 deletions(-) create mode 100644 Makefile create mode 100644 broadcom_cws/bluetooth/firmware/BCM43341B0_002.001.014.0123.0168.hcd create mode 100644 device-software/meta-edison-devtools/recipes-connectivity/bcm43340-tools/dhdutil.bb create mode 100644 device-software/meta-edison-devtools/recipes-connectivity/bcm43340-tools/wlx.bb create mode 100644 device-software/meta-edison-distro/recipes-connectivity/bluez5/files/obex_set_dbus_session_service.patch create mode 100644 device-software/meta-edison-distro/recipes-connectivity/connman/connman/disable_p2p.patch create mode 100644 device-software/meta-edison-distro/recipes-connectivity/connman/connman_1.27.bb create mode 100644 device-software/meta-edison-distro/recipes-connectivity/connman/connman_1.27.bbappend create mode 100644 device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0195.patch create mode 100644 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100644 device-software/utils/Makefile.mk create mode 100755 device-software/utils/create-debian-image.sh create mode 100755 device-software/utils/handle_bash_func.patch create mode 100644 mw/oobe/package.json create mode 100644 mw/oobe/src/public/exit-upgrade.html create mode 100644 mw/oobe/src/public/upgrade.html diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..674b962 --- /dev/null +++ b/Makefile @@ -0,0 +1,182 @@ +# Top level makefile, repo tool should create a link on this file at the root +# of the build environement. + +.DEFAULT_GOAL := image + +# Parallelism is managed by bitbake for this project +.NOTPARALLEL: + +# In this makefile, all targets are phony because dependencies are managed at the bitbake level. +# We don't need to specify all targets here because no files named like them exist at the top level directory. +.PHONY : bbcache + +# Use a default build tag when none is set by the caller +NOWDATE := $(shell date +"%Y%m%d%H%M%S") +BUILD_TAG ?= custom_build_$(USER)@$(HOSTNAME)$(NOWDATE) +BB_DL_DIR ?= $(CURDIR)/bbcache/downloads +BB_SSTATE_DIR ?= $(CURDIR)/bbcache/sstate-cache + +############################################################################### +# Main targets +############################################################################### +setup: _setup-sdkhost_linux64 + +cleansstate: _check_setup_was_done + /bin/bash -c "source out/current/poky/oe-init-build-env $(CURDIR)/out/current/build ; $(CURDIR)/device-software/utils/invalidate_sstate.sh $(CURDIR)/out/current/build" + +devtools_package: _check_setup_was_done + /bin/bash -c "source out/current/poky/oe-init-build-env $(CURDIR)/out/current/build ; $(CURDIR)/device-software/utils/create_devtools_package.sh $(CURDIR)/out/current/build" + +sdk: _check_setup_was_done + /bin/bash -c "source out/current/poky/oe-init-build-env $(CURDIR)/out/current/build ; bitbake edison-image -c populate_sdk" + +src-package: pub + ./device-software/utils/create_src_package.sh + mv edison-src.tgz $(CURDIR)/pub/edison-src-$(BUILD_TAG).tgz + +clean: + rm -rf out + +u-boot linux-externalsrc edison-image meta-toolchain bootimg: _check_setup_was_done + /bin/bash -c "source out/current/poky/oe-init-build-env $(CURDIR)/out/current/build ; bitbake -c cleansstate $@ ; bitbake $@" + ./device-software/utils/flash/postBuild.sh $(CURDIR)/out/current/build + +bootloader: u-boot + +image: edison-image + +kernel: linux-externalsrc bootimg + +toolchain: meta-toolchain + +flash: _check_postbuild_was_done + ./out/current/build/toFlash/flashall.sh + +flash-kernel: _check_postbuild_was_done + dd if=./out/current/build/toFlash/edison-image-edison.hddimg | ssh root@192.168.2.15 "dd of=/dev/disk/by-partlabel/boot bs=1M" + ssh root@192.168.2.15 "/sbin/reboot -f" + +flash-bootloader: _check_postbuild_was_done + dfu-util -d 8087:0a99 --alt u-boot0 -D ./out/current/build/toFlash/u-boot-edison.bin -R + +cscope: + find linux-kernel/ u-boot -regex '.*\.\(c\|cpp\|h\)$\' > cscope.files + cscope -R -b -k + +list: + @sh -c "$(MAKE) -p _no_targets | awk -F':' '/^[a-zA-Z0-9][^\$$#\/\\t=]*:([^=]|$$)/ {split(\$$1,A,/ /);for(i in A)print A[i]}' | sort" + +debian_image: + $(MAKE) setup SETUP_ARGS="$(SETUP_ARGS) --deb_packages" + $(MAKE) image + @echo '*******************************' + @echo '*******************************' + @echo 'Now run the following command to create the debian rootfs:' + @echo 'sudo $(CURDIR)/device-software/utils/create-debian-image.sh --build_dir=$(CURDIR)/out/current/build' + @echo 'and run a regular make flash' + @echo '*******************************' + +help: + @echo 'Main targets:' + @echo ' help - show this help' + @echo ' clean - remove the out and pub directory' + @echo ' setup - prepare the build env for later build operations' + @echo ' cleansstate - clean the sstate for some recipes to work-around some bitbake limitations' + @echo ' image - build the flashable edison image, results are in out/current/build/toFlash' + @echo ' flash - flash the current build image' + @echo ' sdk - build the SDK for the current build' + @echo ' toolchain - build the cross compilation toolchain for the current build' + @echo ' src-package - create the external source package' + @echo ' devtools_package - build some extra dev tools packages, results are in out/current/build/devtools_packages/' + @echo + @echo 'Continuous Integration targets:' + @sh -c "$(MAKE) -p _no_targets | awk -F':' '/^ci_[a-zA-Z0-9][^\$$#\/\\t=]*:([^=]|$$)/ {split(\$$1,A,/ /);for(i in A)print \" \"A[i]}' | sort" + @echo + @echo 'Environment variables:' + @echo ' BUILD_TAG - set the build name used for e.g. artifact file naming' + @echo ' BB_DL_DIR - defines the directory (absolute path) where bitbake places downloaded files (defaults to bbcache/downloads)' + @echo ' BB_SSTATE_DIR - defines the directory (absolute path) where bitbake places shared-state files (defaults to bbcache/sstate-cache)' + @echo ' SETUP_ARGS - control advanced behaviour of the setup script (run ./device-software/setup.sh --help for more details)' + +############################################################################### +# Private targets +############################################################################### + +_no_targets: + +_check_setup_was_done: + @if [ ! -f $(CURDIR)/out/current/build/conf/local.conf ]; then echo Please run \"make setup\" first ; exit 1 ; fi + +_check_postbuild_was_done: + @if [ ! -f $(CURDIR)/out/current/build/toFlash/flashall.sh ]; then echo Please run \"make image/bootloader/kernel\" first ; exit 1 ; fi + +_setup-sdkhost_%: pub bbcache + @echo Setup buildenv for SDK host $* + @mkdir -p out/$* + ./device-software/setup.sh $(SETUP_ARGS) --dl_dir=$(BB_DL_DIR) --sstate_dir=$(BB_SSTATE_DIR) --build_dir=$(CURDIR)/out/$* --build_name=$(BUILD_TAG) --sdk_host=$* + @rm -f out/current + @ln -s $(CURDIR)/out/$* $(CURDIR)/out/current + @if [ $* = macosx ]; then /bin/bash -c "source out/current/poky/oe-init-build-env $(CURDIR)/out/current/build ; bitbake odcctools2-crosssdk -c cleansstate" ; echo "Please make sure that OSX-sdk.zip is available in your bitbake download directory" ; fi + +pub: + @mkdir -p $@ + +bbcache: + @mkdir -p bbcache + @mkdir -p $(BB_DL_DIR) + @mkdir -p $(BB_SSTATE_DIR) + +_image_archive: + cd $(CURDIR)/out/current/build/toFlash ; zip -r $(CURDIR)/pub/edison-image-$(BUILD_TAG).zip `ls` + cd $(CURDIR)/out/current/build/symbols ; zip -r $(CURDIR)/pub/symbols-$(BUILD_TAG).zip `ls` + +_devtools_package_archive: + cd $(CURDIR)/out/current/build/devtools_packages ; zip -r $(CURDIR)/pub/edison-devtools-packages-$(BUILD_TAG).zip `ls` + +_sdk_archive_%: + cd $(CURDIR)/out/$*/build/tmp/deploy/sdk ; zip -r $(CURDIR)/pub/edison-sdk-$*-$(BUILD_TAG).zip `ls *-edison-image-*` + +_toolchain_archive_%: + cd $(CURDIR)/out/$*/build/tmp/deploy/sdk ; zip -r $(CURDIR)/pub/edison-meta-toolchain-$*-$(BUILD_TAG).zip `ls *-meta-toolchain-*` + + +############################################################################### +# Continuous Integration targets: one per checkbox available in jenkins +# Each target places the the end-user artifact in the pub/ directory +############################################################################### + +ci_image: setup cleansstate devtools_package _devtools_package_archive image _image_archive + +_ci_sdk_%: + $(MAKE) _setup-sdkhost_$* cleansstate sdk _sdk_archive_$* + +_ci_toolchain_%: + $(MAKE) _setup-sdkhost_$* cleansstate toolchain _toolchain_archive_$* + +ci_sdk_win32: _ci_sdk_win32 +ci_sdk_win64: _ci_sdk_win64 +ci_sdk_linux32: _ci_sdk_linux32 +ci_sdk_linux64: _ci_sdk_linux64 +ci_sdk_macosx: _ci_sdk_macosx +ci_toolchain_win32: _ci_toolchain_win32 +ci_toolchain_win64: _ci_toolchain_win64 +ci_toolchain_linux32: _ci_toolchain_linux32 +ci_toolchain_linux64: _ci_toolchain_linux64 +ci_toolchain_macosx: _ci_toolchain_macosx + +ci_image-from-src-package-and-GPL-LGPL-sources_archive: setup src-package + cp $(CURDIR)/pub/edison-src-$(BUILD_TAG).tgz $(CURDIR)/out/current + cd $(CURDIR)/out/current ; tar -xvf edison-src-$(BUILD_TAG).tgz + cd $(CURDIR)/out/current/edison-src ; /bin/bash -c "SETUP_ARGS=\"$(SETUP_ARGS) --create_src_archive\" make setup cleansstate image _image_archive" + cd $(CURDIR)/out/current/edison-src/out/current/build/toFlash ; zip -r $(CURDIR)/pub/edison-image-from-src-package-$(BUILD_TAG).zip `ls` + cd $(CURDIR)/out/current/edison-src/out/current/build/tmp/deploy/sources ; zip -r $(CURDIR)/pub/edison-GPL_LGPL-sources-$(BUILD_TAG).zip `ls` + +ci_full: + $(MAKE) ci_image BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_image-from-src-package-and-GPL-LGPL-sources_archive BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_sdk_win32 ci_toolchain_win32 BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_sdk_win64 ci_toolchain_win64 BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_sdk_linux32 ci_toolchain_linux32 BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_sdk_linux64 ci_toolchain_linux64 BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_sdk_macosx ci_toolchain_macosx BUILD_TAG=$(BUILD_TAG) + diff --git a/arduino/clloader/clloader.c b/arduino/clloader/clloader.c index f2a6952..73a0296 100644 --- a/arduino/clloader/clloader.c +++ b/arduino/clloader/clloader.c @@ -2729,12 +2729,15 @@ int clantonLoaderFSM(int argc, char * argv[]) fprintf(stderr, "host: %s\n", rbuf_from_host); errors = 0; /* TODO: bring out state change of BAUD/LINE and replace magic string */ - if (strncmp(CL_LOADER_CMD_HOST_START_DOWNLOAD_CMD, - rbuf_from_host, - (size_t)strlen(CL_LOADER_CMD_HOST_START_DOWNLOAD_CMD)) == 0) { + if (strncmp(downloadCMD, rbuf_from_host, + ((size_t)strlen(rbuf_from_host)-1)) == 0) { // We got a special command to start download clantonLeavePassThroughState = TRUE; - + } else if (strncmp(CL_LOADER_CMD_HOST_START_DOWNLOAD_CMD, + rbuf_from_host, + ((size_t)strlen(rbuf_from_host)-1)) == 0) { + // Old command string. Allow to download anyway. + clantonLeavePassThroughState = TRUE; } else { write(mystate.tty_slave,rbuf_from_host,ret); //todo check write status } diff --git a/arduino/clloader/clloader.h b/arduino/clloader/clloader.h index c9dd595..749672f 100644 --- a/arduino/clloader/clloader.h +++ b/arduino/clloader/clloader.h @@ -22,6 +22,7 @@ #define MAX_ARGS 0x20 #define CL_LOADER_CMD_HOST_START_DOWNLOAD_CMD "~sketch download" +#define downloadCMD "~sketch downloadEdison" #define CL_LOADER_CMD_STARTCHAR '#' #define CL_LOADER_CMD_START_SKETCH_APP "#Start Sketch:" /* filename args and exec i/o wrapper */ diff --git a/broadcom_cws/bluetooth/firmware/BCM43341B0_002.001.014.0123.0168.hcd b/broadcom_cws/bluetooth/firmware/BCM43341B0_002.001.014.0123.0168.hcd new file mode 100644 index 0000000000000000000000000000000000000000..d20e2e2c825b75afc4764ceab6240c757a1ea7ea GIT binary patch literal 41773 zcmeFa3v^UP)<0Tx`t&33lLrt&gwsjDP6*Ng)Tk(@JK>}|1QHZAIw&0s+QAqaL~SKV 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(channel <= CH_MAX_2G_CHANNEL) { if (!CHSPEC_IS20(c)) continue; @@ -2657,6 +2658,8 @@ channel_to_chanspec(struct wiphy *wiphy, struct net_device *dev, u32 channel, u3 if (buf) kfree(buf); #undef LOCAL_BUF_SIZE + if (ret_c) + ret_c = wl_chspec_host_to_driver(ret_c); WL_INFO(("return chanspec %x %d\n", ret_c, bw)); return ret_c; } @@ -2738,7 +2741,10 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, s32 err = 0; size_t join_params_size; chanspec_t chanspec = 0; - u32 param[2] = {0, 0}; + struct { + u32 band; + u32 bw_cap; + } param = {0, 0}; u32 bw_cap = 0; WL_TRACE(("In\n")); @@ -2808,16 +2814,35 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, cfg->ibss_starter = true; } if (chan) { - if (chan->band == IEEE80211_BAND_5GHZ) - param[0] = WLC_BAND_5G; - else if (chan->band == IEEE80211_BAND_2GHZ) - param[0] = WLC_BAND_2G; - err = wldev_iovar_getint(dev, "bw_cap", param); - if (unlikely(err)) { - WL_ERR(("Get bw_cap Failed (%d)\n", err)); - return err; + if (chan->band == IEEE80211_BAND_5GHZ) { + param.band = WLC_BAND_5G; + err = wldev_iovar_getbuf(dev, "bw_cap", ¶m, sizeof(param), + cfg->ioctl_buf, WLC_IOCTL_SMLEN, &cfg->ioctl_buf_sync); + if (err) { + if (err != BCME_UNSUPPORTED) { + WL_ERR(("bw_cap failed, %d\n", err)); + return err; + } else { + err = wldev_iovar_getint(dev, "mimo_bw_cap", &bw_cap); + if (err) { + WL_ERR(("error get mimo_bw_cap (%d)\n", err)); + } + if (bw_cap != WLC_N_BW_20ALL) + bw_cap = WL_CHANSPEC_BW_40; + } + } + else { + if (WL_BW_CAP_80MHZ(cfg->ioctl_buf[0])) + bw_cap = WL_CHANSPEC_BW_80; + else if (WL_BW_CAP_40MHZ(cfg->ioctl_buf[0])) + bw_cap = WL_CHANSPEC_BW_40; + else + bw_cap = WL_CHANSPEC_BW_20; + } } - bw_cap = param[0]; + else if (chan->band == IEEE80211_BAND_2GHZ) + bw_cap = WL_CHANSPEC_BW_20; + chanspec = channel_to_chanspec(wiphy, dev, cfg->channel, bw_cap); } /* @@ -2851,9 +2876,11 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, } } - join_params.params.chanspec_list[0] = chanspec; - join_params.params.chanspec_num = 1; - wldev_iovar_setint(dev, "chanspec", chanspec); + if (chan) { + join_params.params.chanspec_list[0] = chanspec; + join_params.params.chanspec_num = 1; + wldev_iovar_setint(dev, "chanspec", chanspec); + } join_params_size = sizeof(join_params); /* Disable Authentication, IBSS will add key if it required */ diff --git a/device-software/meta-edison-devtools/recipes-connectivity/bcm43340-tools/dhdutil.bb b/device-software/meta-edison-devtools/recipes-connectivity/bcm43340-tools/dhdutil.bb new file mode 100644 index 0000000..3f08096 --- /dev/null +++ b/device-software/meta-edison-devtools/recipes-connectivity/bcm43340-tools/dhdutil.bb @@ -0,0 +1,15 @@ +SUMMARY = "dhdutil utility" +DESCRIPTION = "dhdutil utility for BCM chipset" +SECTION = "test-tools" +LICENSE = "CLOSED" + +PV = "r1.141" +PR = "r47" + +S = "${EDISONREPO_TOP_DIR}/broadcom_tools/wlan/dhdutil" + +do_install() { + install -v -d ${D}/usr/sbin/ + install -m 0755 ${B}/dhdutil ${D}/usr/sbin +} + diff --git a/device-software/meta-edison-devtools/recipes-connectivity/bcm43340-tools/wlx.bb b/device-software/meta-edison-devtools/recipes-connectivity/bcm43340-tools/wlx.bb new file mode 100644 index 0000000..3d88e6e --- /dev/null +++ b/device-software/meta-edison-devtools/recipes-connectivity/bcm43340-tools/wlx.bb @@ -0,0 +1,19 @@ +SUMMARY = "wlx utility" +DESCRIPTION = "wlx utility for BCM chipset" +SECTION = "test-tools" +LICENSE = "CLOSED" + +PV = "r6.10.190" +PR = "r40" + +S = "${EDISONREPO_TOP_DIR}/broadcom_tools/wlan/wlx" + +do_compile () { + oe_runmake -C wl/exe +} + +do_install() { + install -v -d ${D}/usr/sbin/ + install -m 0755 ${B}/wl/exe/wlx ${D}/usr/sbin +} + diff --git a/device-software/meta-edison-devtools/recipes-connectivity/wfa-tool/wfa-tool.bb b/device-software/meta-edison-devtools/recipes-connectivity/wfa-tool/wfa-tool.bb index 24a78e1..1d21cfe 100644 --- a/device-software/meta-edison-devtools/recipes-connectivity/wfa-tool/wfa-tool.bb +++ b/device-software/meta-edison-devtools/recipes-connectivity/wfa-tool/wfa-tool.bb @@ -20,8 +20,11 @@ do_install() { install -m 0755 ${S}/scripts/wfa_stop_ping ${D}/usr/sbin install -m 0755 ${S}/scripts/wfa_start_dhcp_client ${D}/usr/sbin install -m 0755 ${S}/scripts/wfa_stop_dhcp_client ${D}/usr/sbin + install -m 0755 ${S}/scripts/wfa_start_dhcp_server ${D}/usr/sbin + install -m 0755 ${S}/scripts/wfa_stop_dhcp_server ${D}/usr/sbin install -v -d ${D}${sysconfdir}/sigma + install -m 644 ${S}/scripts/udhcpd.conf ${D}${sysconfdir}/sigma install -m 644 ${S}/certificates/cas.pem ${D}${sysconfdir}/sigma install -m 644 ${S}/certificates/root.pem ${D}${sysconfdir}/sigma install -m 644 ${S}/certificates/wifiuser.pem ${D}${sysconfdir}/sigma diff --git a/device-software/meta-edison-distro/conf/distro/poky-edison.conf b/device-software/meta-edison-distro/conf/distro/poky-edison.conf index 3a9c247..a0e7466 100644 --- a/device-software/meta-edison-distro/conf/distro/poky-edison.conf +++ b/device-software/meta-edison-distro/conf/distro/poky-edison.conf @@ -6,8 +6,8 @@ PREFERRED_VERSION_linux-yocto = "3.10%" PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot" PREFERRED_VERSION_u-boot ?= "2014.04-1" PREFERRED_VERSION_u-boot-fw-utils ?= "2014.04-1" -PREFERRED_VERSION_connman ?= "1.24" -PREFERRED_VERSION_openssl ?= "1.0.1g" +PREFERRED_VERSION_connman ?= "1.27" +PREFERRED_VERSION_openssl ?= "1.0.1j" PREFERRED_VERSION_systemd ?= "213+gitAUTOINC+c9679c652b" DISTRO_FEATURES = "systemd alsa argp bluetooth ext2 largefile usbgadget usbhost wifi xattr nfs zeroconf pci ${DISTRO_FEATURES_LIBC}" diff --git a/device-software/meta-edison-distro/recipes-connectivity/bluetooth-rfkill-event/files/bcm43341.conf b/device-software/meta-edison-distro/recipes-connectivity/bluetooth-rfkill-event/files/bcm43341.conf index dc4ea4f..d43b051 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/bluetooth-rfkill-event/files/bcm43341.conf +++ b/device-software/meta-edison-distro/recipes-connectivity/bluetooth-rfkill-event/files/bcm43341.conf @@ -28,5 +28,5 @@ fw_patch = /etc/firmware/bcm43341.hcd uart_dev = /dev/ttyMFD0 # SCO settings -# N/A now -# scopcm = +# configure sco routing to Transport (HCI); +scopcm = 1,0,0,0,0,0,0,0,0,0 diff --git a/device-software/meta-edison-distro/recipes-connectivity/bluetooth-rfkill-event/files/bluetooth_rfkill_event.c b/device-software/meta-edison-distro/recipes-connectivity/bluetooth-rfkill-event/files/bluetooth_rfkill_event.c index 368328c..9d69805 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/bluetooth-rfkill-event/files/bluetooth_rfkill_event.c +++ b/device-software/meta-edison-distro/recipes-connectivity/bluetooth-rfkill-event/files/bluetooth_rfkill_event.c @@ -298,24 +298,25 @@ void load_bd_add(void) fp = fopen(BD_ADD_FACTORY_FILE, "r"); - /* if BD add file has not been provisioned use default one */ + /* if BD add file has not been provisioned do not send VSC to set BD address: the one configured in OTP will be used or default FW one */ if (fp == NULL) { - memcpy(factory_bd_add, default_bd_addr, sizeof(factory_bd_add)); - main_opts.bd_add = factory_bd_add; - main_opts.set_bd = TRUE; + main_opts.set_bd = FALSE; return; } ret = fscanf(fp, "%17c", factory_bd_add); - /* if factory BD address is not well formatted or not present use default one*/ + /* if factory BD address is not well formatted or not present do not send VSC to set BD address: the one configured in OTP will be used or default FW one */ if (!(ret == 1 && check_bd_format(factory_bd_add))) { - memcpy(factory_bd_add, default_bd_addr, sizeof(factory_bd_add)); + main_opts.set_bd = FALSE; + } + else + { + main_opts.bd_add = factory_bd_add; + main_opts.set_bd = TRUE; } - main_opts.bd_add = factory_bd_add; - main_opts.set_bd = TRUE; fclose(fp); diff --git a/device-software/meta-edison-distro/recipes-connectivity/bluez5/bluez5_5.15.bbappend b/device-software/meta-edison-distro/recipes-connectivity/bluez5/bluez5_5.15.bbappend index a4672a5..3aad093 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/bluez5/bluez5_5.15.bbappend +++ b/device-software/meta-edison-distro/recipes-connectivity/bluez5/bluez5_5.15.bbappend @@ -1,19 +1,22 @@ -# overwrite to 5.18 version and its checksum +# overwrite to 5.24 version and its checksum -PV = "5.18" +PV = "5.24" -SRC_URI[md5sum] = "9c71404f86287cd9441e86783be3aae1" -SRC_URI[sha256sum] = "8c8bb13db83d0de6c85def2da8dfa0a758aff595405fb57a00719ed94d558340" +SRC_URI[md5sum] = "37b785185fb98269b45e51b254bd8d3d" +SRC_URI[sha256sum] = "e870c5fba0bf3496856fc720e2d217856fcf40b59829f8cc0c05902ebb9fb837" # to get bluetooth.conf FILESEXTRAPATHS_prepend := "${THISDIR}/files/" -# few overwrite for 5.18 version +# few overwrite for 5.24 version SRC_URI = "\ ${KERNELORG_MIRROR}/linux/bluetooth/bluez-${PV}.tar.xz \ file://bluetooth.conf \ + file://obex_set_dbus_session_service.patch \ " +RDEPENDS_${PN} += "eglibc-gconv-utf-16" + PACKAGECONFIG[alsa] = "" EXTRA_OECONF = "\ @@ -24,6 +27,7 @@ EXTRA_OECONF = "\ --enable-datafiles \ ${@base_contains('DISTRO_FEATURES', 'systemd', '--with-systemdsystemunitdir=${systemd_unitdir}/system/', '--disable-systemd', d)} \ --enable-library \ + --enable-experimental \ " do_install_append() { @@ -43,6 +47,16 @@ do_install_append() { if [ -f ${S}/src/main.conf ]; then install -m 0644 ${S}/src/main.conf ${D}/${sysconfdir}/bluetooth/ fi + if [ -f ${S}/tools/obexctl ]; then + install -m 0755 ${S}/tools/obexctl ${D}${bindir} + fi + + if ${@base_contains('DISTRO_FEATURES','systemd','true','false',d)}; then + # Copy file service + install -d ${D}/${systemd_unitdir}/system + install -m 644 ${S}/obexd/src/obex.service ${D}/${systemd_unitdir}/system/ + fi + # at_console doesn't really work with the current state of OE, so punch some more holes so people can actually use BT install -m 0644 ${WORKDIR}/bluetooth.conf ${D}/${sysconfdir}/dbus-1/system.d/ } diff --git a/device-software/meta-edison-distro/recipes-connectivity/bluez5/files/bluetooth.conf b/device-software/meta-edison-distro/recipes-connectivity/bluez5/files/bluetooth.conf index e21e72e..162c803 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/bluez5/files/bluetooth.conf +++ b/device-software/meta-edison-distro/recipes-connectivity/bluez5/files/bluetooth.conf @@ -9,8 +9,16 @@ + + + + + + + + diff --git a/device-software/meta-edison-distro/recipes-connectivity/bluez5/files/obex_set_dbus_session_service.patch b/device-software/meta-edison-distro/recipes-connectivity/bluez5/files/obex_set_dbus_session_service.patch new file mode 100644 index 0000000..4000aaf --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/bluez5/files/obex_set_dbus_session_service.patch @@ -0,0 +1,10 @@ +--- a/obexd/src/obex.service.in 2014-10-30 14:40:00.832479049 +0100 ++++ b/obexd/src/obex.service.in 2014-10-30 14:40:41.032477622 +0100 +@@ -4,6 +4,7 @@ + [Service] + Type=dbus + BusName=org.bluez.obex ++Environment="DBUS_SESSION_BUS_ADDRESS=unix:path=/var/run/dbus/system_bus_socket" + ExecStart=@libexecdir@/obexd + + [Install] diff --git a/device-software/meta-edison-distro/recipes-connectivity/connman/connman/disable_p2p.patch b/device-software/meta-edison-distro/recipes-connectivity/connman/connman/disable_p2p.patch new file mode 100644 index 0000000..6cce2e3 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/connman/connman/disable_p2p.patch @@ -0,0 +1,15 @@ +--- a/gsupplicant/supplicant.c ++++ b/gsupplicant/supplicant.c +@@ -1963,8 +1963,11 @@ + if (g_strcmp0(key, "Capabilities") == 0) { + supplicant_dbus_property_foreach(iter, interface_capability, + interface); ++#if 0 ++ /* Disable temporarely p2p */ + if (interface->mode_capa & G_SUPPLICANT_CAPABILITY_MODE_P2P) + interface->p2p_support = true; ++#endif + } else if (g_strcmp0(key, "State") == 0) { + const char *str = NULL; + + diff --git a/device-software/meta-edison-distro/recipes-connectivity/connman/connman_1.27.bb b/device-software/meta-edison-distro/recipes-connectivity/connman/connman_1.27.bb new file mode 100644 index 0000000..70993ac --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/connman/connman_1.27.bb @@ -0,0 +1,11 @@ +require connman.inc + +SRC_URI = "${KERNELORG_MIRROR}/linux/network/${BPN}/${BP}.tar.xz \ + file://0001-plugin.h-Change-visibility-to-default-for-debug-symb.patch \ + file://add_xuser_dbus_permission.patch \ + file://disable_p2p.patch \ + file://connman \ + " +SRC_URI[md5sum] = "4f4b3be54da000c65b153c1b9afcadf2" +SRC_URI[sha256sum] = "13997824c076af150c68d6d79e48277216e8192278a5c6615cfd4905d65600f5" +RRECOMMENDS_${PN} = "connman-conf" diff --git a/device-software/meta-edison-distro/recipes-connectivity/connman/connman_1.27.bbappend b/device-software/meta-edison-distro/recipes-connectivity/connman/connman_1.27.bbappend new file mode 100644 index 0000000..80e7b38 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/connman/connman_1.27.bbappend @@ -0,0 +1,35 @@ + + +LIC_FILES_CHKSUM = "file://COPYING;md5=12f884d2ae1ff87c09e5b7ccc2c4ca7e \ + file://src/main.c;beginline=1;endline=20;md5=486a279a6ab0c8d152bcda3a5b5edc36" + +PACKAGECONFIG ??= "wispr \ + ${@base_contains('DISTRO_FEATURES', 'wifi','wifi', '', d)} \ + ${@base_contains('DISTRO_FEATURES', 'bluetooth','bluetooth', '', d)} \ +" + +PACKAGECONFIG[bluetooth] = "--enable-bluetooth, --disable-bluetooth, bluez5" +PACKAGECONFIG[3g] = "" + +SYSTEMD_AUTO_ENABLE = "disable" + +do_configure_append () { + # Do not usb0 as it is used for SSH connection + sed -i "s/ExecStart=.*/& --nodevice=usb0/" ${S}/src/connman.service +} + + +# These used to be plugins, but now they are core +RPROVIDES_${PN} = "\ + connman-plugin-loopback \ + connman-plugin-ethernet \ + ${@base_contains('PACKAGECONFIG', 'bluetooth','connman-plugin-bluetooth', '', d)} \ + ${@base_contains('PACKAGECONFIG', 'wifi','connman-plugin-wifi', '', d)} \ + " + +RDEPENDS_${PN} = "\ + dbus \ + ${@base_contains('PACKAGECONFIG', 'bluetooth', 'bluez5', '', d)} \ + ${@base_contains('PACKAGECONFIG', 'wifi','wpa-supplicant', '', d)} \ + " + diff --git a/device-software/meta-edison-distro/recipes-connectivity/hostapd/files/hostapd.conf-sane b/device-software/meta-edison-distro/recipes-connectivity/hostapd/files/hostapd.conf-sane index da81096..3e7d794 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/hostapd/files/hostapd.conf-sane +++ b/device-software/meta-edison-distro/recipes-connectivity/hostapd/files/hostapd.conf-sane @@ -424,7 +424,7 @@ wmm_ac_vo_acm=0 # 0 = disabled (default) # 1 = enabled # Note: You will also need to enable WMM for full HT functionality. -#ieee80211n=1 +ieee80211n=1 # ht_capab: HT capabilities (list of flags) # LDPC coding capability: [LDPC] = supported diff --git a/device-software/meta-edison-distro/recipes-connectivity/hostapd/files/udhcpd-for-hostapd.conf b/device-software/meta-edison-distro/recipes-connectivity/hostapd/files/udhcpd-for-hostapd.conf index e25d704..1015e39 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/hostapd/files/udhcpd-for-hostapd.conf +++ b/device-software/meta-edison-distro/recipes-connectivity/hostapd/files/udhcpd-for-hostapd.conf @@ -83,7 +83,7 @@ pidfile /var/run/udhcpd-wlan0.pid #default: /var/run/udhcpd.pid # lines. The only option with a default is 'lease'. # Currently supported options, for more info, see options.c -#opt subnet +opt subnet 255.255.255.0 #opt timezone #opt router #opt timesvr diff --git a/device-software/meta-edison-distro/recipes-connectivity/openssh/openssh/sshdgenkeys.service b/device-software/meta-edison-distro/recipes-connectivity/openssh/openssh/sshdgenkeys.service index 25d27ae..e8133e4 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/openssh/openssh/sshdgenkeys.service +++ b/device-software/meta-edison-distro/recipes-connectivity/openssh/openssh/sshdgenkeys.service @@ -2,6 +2,6 @@ Description=OpenSSH Key Generation [Service] -ExecStart=@BASE_BINDIR@/sh -c "if ! sshd -t > /dev/null ; then rm /etc/ssh/*_key* ; ssh-keygen -A ; sync ; fi" +ExecStart=@BASE_BINDIR@/sh -c "if ! sshd -t &> /dev/null ; then rm /etc/ssh/*_key* ; ssh-keygen -A ; sync ; fi" Type=oneshot RemainAfterExit=yes diff --git a/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0195.patch b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0195.patch new file mode 100644 index 0000000..0c43919 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0195.patch @@ -0,0 +1,40 @@ +commit 208d54db20d58c9a5e45e856a0650caadd7d9612 +Author: Dr. Stephen Henson +Date: Tue May 13 18:48:31 2014 +0100 + + Fix for CVE-2014-0195 + + A buffer overrun attack can be triggered by sending invalid DTLS fragments + to an OpenSSL DTLS client or server. This is potentially exploitable to + run arbitrary code on a vulnerable client or server. + + Fixed by adding consistency check for DTLS fragments. + + Thanks to Jüri Aedla for reporting this issue. + +Patch borrowed from Fedora +Upstream-Status: Backport +Signed-off-by: Paul Eggleton + +diff --git a/ssl/d1_both.c b/ssl/d1_both.c +index 2e8cf68..07f67f8 100644 +--- a/ssl/d1_both.c ++++ b/ssl/d1_both.c +@@ -627,7 +627,16 @@ dtls1_reassemble_fragment(SSL *s, struct hm_header_st* msg_hdr, int *ok) + frag->msg_header.frag_off = 0; + } + else ++ { + frag = (hm_fragment*) item->data; ++ if (frag->msg_header.msg_len != msg_hdr->msg_len) ++ { ++ item = NULL; ++ frag = NULL; ++ goto err; ++ } ++ } ++ + + /* If message is already reassembled, this must be a + * retransmit and can be dropped. + diff --git a/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0198.patch b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0198.patch new file mode 100644 index 0000000..12dcfb7 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0198.patch @@ -0,0 +1,38 @@ +From: Matt Caswell +Date: Sun, 11 May 2014 23:38:37 +0000 (+0100) +Subject: Fixed NULL pointer dereference. See PR#3321 +X-Git-Url: https://git.openssl.org/gitweb/?p=openssl.git;a=commitdiff_plain;h=b107586 + +Fixed NULL pointer dereference. See PR#3321 + +Patch borrowed from Fedora +Upstream-Status: Backport +Signed-off-by: Paul Eggleton + +--- + +diff --git a/ssl/s3_pkt.c b/ssl/s3_pkt.c +index 40eb0dd..d961d12 100644 +--- a/ssl/s3_pkt.c ++++ b/ssl/s3_pkt.c +@@ -657,9 +657,6 @@ static int do_ssl3_write(SSL *s, int type, const unsigned char *buf, + SSL3_BUFFER *wb=&(s->s3->wbuf); + SSL_SESSION *sess; + +- if (wb->buf == NULL) +- if (!ssl3_setup_write_buffer(s)) +- return -1; + + /* first check if there is a SSL3_BUFFER still being written + * out. This will happen with non blocking IO */ +@@ -675,6 +672,10 @@ static int do_ssl3_write(SSL *s, int type, const unsigned char *buf, + /* if it went, fall through and send more stuff */ + } + ++ if (wb->buf == NULL) ++ if (!ssl3_setup_write_buffer(s)) ++ return -1; ++ + if (len == 0 && !create_empty_fragment) + return 0; + diff --git a/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0221.patch b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0221.patch new file mode 100644 index 0000000..bf730a8 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0221.patch @@ -0,0 +1,38 @@ +commit d30e582446b027868cdabd0994681643682045a4 +Author: Dr. Stephen Henson +Date: Fri May 16 13:00:45 2014 +0100 + + Fix CVE-2014-0221 + + Unnecessary recursion when receiving a DTLS hello request can be used to + crash a DTLS client. Fixed by handling DTLS hello request without recursion. + + Thanks to Imre Rad (Search-Lab Ltd.) for discovering this issue. + +Patch borrowed from Fedora +Upstream-Status: Backport +Signed-off-by: Paul Eggleton + +diff --git a/ssl/d1_both.c b/ssl/d1_both.c +index 07f67f8..4c2fd03 100644 +--- a/ssl/d1_both.c ++++ b/ssl/d1_both.c +@@ -793,6 +793,7 @@ dtls1_get_message_fragment(SSL *s, int st1, int stn, long max, int *ok) + int i,al; + struct hm_header_st msg_hdr; + ++ redo: + /* see if we have the required fragment already */ + if ((frag_len = dtls1_retrieve_buffered_fragment(s,max,ok)) || *ok) + { +@@ -851,8 +852,7 @@ dtls1_get_message_fragment(SSL *s, int st1, int stn, long max, int *ok) + s->msg_callback_arg); + + s->init_num = 0; +- return dtls1_get_message_fragment(s, st1, stn, +- max, ok); ++ goto redo; + } + else /* Incorrectly formated Hello request */ + { + diff --git a/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0224.patch b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0224.patch new file mode 100644 index 0000000..0ed1d12 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-0224.patch @@ -0,0 +1,103 @@ +Fix for CVE-2014-0224 + +Only accept change cipher spec when it is expected instead of at any +time. This prevents premature setting of session keys before the master +secret is determined which an attacker could use as a MITM attack. + +Thanks to KIKUCHI Masashi (Lepidum Co. Ltd.) for reporting this issue +and providing the initial fix this patch is based on. + + +Patch borrowed from Fedora +Upstream-Status: Backport +Signed-off-by: Paul Eggleton + + +diff -up openssl-1.0.1e/ssl/ssl3.h.keying-mitm openssl-1.0.1e/ssl/ssl3.h +--- openssl-1.0.1e/ssl/ssl3.h.keying-mitm 2014-06-02 19:48:04.518100562 +0200 ++++ openssl-1.0.1e/ssl/ssl3.h 2014-06-02 19:48:04.642103429 +0200 +@@ -388,6 +388,7 @@ typedef struct ssl3_buffer_st + #define TLS1_FLAGS_TLS_PADDING_BUG 0x0008 + #define TLS1_FLAGS_SKIP_CERT_VERIFY 0x0010 + #define TLS1_FLAGS_KEEP_HANDSHAKE 0x0020 ++#define SSL3_FLAGS_CCS_OK 0x0080 + + /* SSL3_FLAGS_SGC_RESTART_DONE is set when we + * restart a handshake because of MS SGC and so prevents us +diff -up openssl-1.0.1e/ssl/s3_clnt.c.keying-mitm openssl-1.0.1e/ssl/s3_clnt.c +--- openssl-1.0.1e/ssl/s3_clnt.c.keying-mitm 2013-02-11 16:26:04.000000000 +0100 ++++ openssl-1.0.1e/ssl/s3_clnt.c 2014-06-02 19:49:57.042701985 +0200 +@@ -559,6 +559,7 @@ int ssl3_connect(SSL *s) + case SSL3_ST_CR_FINISHED_A: + case SSL3_ST_CR_FINISHED_B: + ++ s->s3->flags |= SSL3_FLAGS_CCS_OK; + ret=ssl3_get_finished(s,SSL3_ST_CR_FINISHED_A, + SSL3_ST_CR_FINISHED_B); + if (ret <= 0) goto end; +@@ -916,6 +917,7 @@ int ssl3_get_server_hello(SSL *s) + SSLerr(SSL_F_SSL3_GET_SERVER_HELLO,SSL_R_ATTEMPT_TO_REUSE_SESSION_IN_DIFFERENT_CONTEXT); + goto f_err; + } ++ s->s3->flags |= SSL3_FLAGS_CCS_OK; + s->hit=1; + } + else /* a miss or crap from the other end */ +diff -up openssl-1.0.1e/ssl/s3_pkt.c.keying-mitm openssl-1.0.1e/ssl/s3_pkt.c +--- openssl-1.0.1e/ssl/s3_pkt.c.keying-mitm 2014-06-02 19:48:04.640103383 +0200 ++++ openssl-1.0.1e/ssl/s3_pkt.c 2014-06-02 19:48:04.643103452 +0200 +@@ -1298,6 +1298,15 @@ start: + goto f_err; + } + ++ if (!(s->s3->flags & SSL3_FLAGS_CCS_OK)) ++ { ++ al=SSL_AD_UNEXPECTED_MESSAGE; ++ SSLerr(SSL_F_SSL3_READ_BYTES,SSL_R_CCS_RECEIVED_EARLY); ++ goto f_err; ++ } ++ ++ s->s3->flags &= ~SSL3_FLAGS_CCS_OK; ++ + rr->length=0; + + if (s->msg_callback) +@@ -1432,7 +1441,7 @@ int ssl3_do_change_cipher_spec(SSL *s) + + if (s->s3->tmp.key_block == NULL) + { +- if (s->session == NULL) ++ if (s->session == NULL || s->session->master_key_length == 0) + { + /* might happen if dtls1_read_bytes() calls this */ + SSLerr(SSL_F_SSL3_DO_CHANGE_CIPHER_SPEC,SSL_R_CCS_RECEIVED_EARLY); +diff -up openssl-1.0.1e/ssl/s3_srvr.c.keying-mitm openssl-1.0.1e/ssl/s3_srvr.c +--- openssl-1.0.1e/ssl/s3_srvr.c.keying-mitm 2014-06-02 19:48:04.630103151 +0200 ++++ openssl-1.0.1e/ssl/s3_srvr.c 2014-06-02 19:48:04.643103452 +0200 +@@ -673,6 +673,7 @@ int ssl3_accept(SSL *s) + case SSL3_ST_SR_CERT_VRFY_A: + case SSL3_ST_SR_CERT_VRFY_B: + ++ s->s3->flags |= SSL3_FLAGS_CCS_OK; + /* we should decide if we expected this one */ + ret=ssl3_get_cert_verify(s); + if (ret <= 0) goto end; +@@ -700,6 +701,7 @@ int ssl3_accept(SSL *s) + + case SSL3_ST_SR_FINISHED_A: + case SSL3_ST_SR_FINISHED_B: ++ s->s3->flags |= SSL3_FLAGS_CCS_OK; + ret=ssl3_get_finished(s,SSL3_ST_SR_FINISHED_A, + SSL3_ST_SR_FINISHED_B); + if (ret <= 0) goto end; +@@ -770,7 +772,10 @@ int ssl3_accept(SSL *s) + s->s3->tmp.next_state=SSL3_ST_SR_FINISHED_A; + #else + if (s->s3->next_proto_neg_seen) ++ { ++ s->s3->flags |= SSL3_FLAGS_CCS_OK; + s->s3->tmp.next_state=SSL3_ST_SR_NEXT_PROTO_A; ++ } + else + s->s3->tmp.next_state=SSL3_ST_SR_FINISHED_A; + #endif diff --git a/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-3470.patch b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-3470.patch new file mode 100644 index 0000000..025727f --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl/openssl-1.0.1e-cve-2014-3470.patch @@ -0,0 +1,31 @@ +commit 4ad43d511f6cf064c66eb4bfd0fb0919b5dd8a86 +Author: Dr. Stephen Henson +Date: Thu May 29 15:00:05 2014 +0100 + + Fix CVE-2014-3470 + + Check session_cert is not NULL before dereferencing it. + +Patch borrowed from Fedora +Upstream-Status: Backport +Signed-off-by: Paul Eggleton + + +diff --git a/ssl/s3_clnt.c b/ssl/s3_clnt.c +index d35376d..4324f8d 100644 +--- a/ssl/s3_clnt.c ++++ b/ssl/s3_clnt.c +@@ -2511,6 +2511,13 @@ int ssl3_send_client_key_exchange(SSL *s) + int ecdh_clnt_cert = 0; + int field_size = 0; + ++ if (s->session->sess_cert == NULL) ++ { ++ ssl3_send_alert(s,SSL3_AL_FATAL,SSL_AD_UNEXPECTED_MESSAGE); ++ SSLerr(SSL_F_SSL3_SEND_CLIENT_KEY_EXCHANGE,SSL_R_UNEXPECTED_MESSAGE); ++ goto err; ++ } ++ + /* Did we send out the client's + * ECDH share for use in premaster + * computation as part of client certificate? diff --git a/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl_1.0.1j.bb b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl_1.0.1j.bb new file mode 100644 index 0000000..ecb31d0 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/openssl/openssl_1.0.1j.bb @@ -0,0 +1,54 @@ +require openssl.inc + +# For target side versions of openssl enable support for OCF Linux driver +# if they are available. +DEPENDS += "cryptodev-linux" + +CFLAG += "-DHAVE_CRYPTODEV -DUSE_CRYPTODEV_DIGESTS" + +LIC_FILES_CHKSUM = "file://LICENSE;md5=f9a8f968107345e0b75aa8c2ecaa7ec8" + +export DIRS = "crypto ssl apps engines" +export OE_LDFLAGS="${LDFLAGS}" + +SRC_URI += "file://configure-targets.patch \ + file://shared-libs.patch \ + file://oe-ldflags.patch \ + file://engines-install-in-libdir-ssl.patch \ + file://openssl-fix-link.patch \ + file://debian/version-script.patch \ + file://debian/pic.patch \ + file://debian/c_rehash-compat.patch \ + file://debian/ca.patch \ + file://debian/make-targets.patch \ + file://debian/no-rpath.patch \ + file://debian/man-dir.patch \ + file://debian/man-section.patch \ + file://debian/no-symbolic.patch \ + file://debian/debian-targets.patch \ + file://openssl_fix_for_x32.patch \ + file://fix-cipher-des-ede3-cfb1.patch \ + file://openssl-avoid-NULL-pointer-dereference-in-EVP_DigestInit_ex.patch \ + file://openssl-avoid-NULL-pointer-dereference-in-dh_pub_encode.patch \ + file://initial-aarch64-bits.patch \ + file://find.pl \ + file://openssl-fix-des.pod-error.patch \ + " + +SRC_URI[md5sum] = "f7175c9cd3c39bb1907ac8bba9df8ed3" +SRC_URI[sha256sum] = "1b60ca8789ba6f03e8ef20da2293b8dc131c39d83814e775069f02d26354edf3" + +PACKAGES =+ " \ + ${PN}-engines \ + ${PN}-engines-dbg \ + " + +FILES_${PN}-engines = "${libdir}/ssl/engines/*.so ${libdir}/engines" +FILES_${PN}-engines-dbg = "${libdir}/ssl/engines/.debug" + +PARALLEL_MAKE = "" +PARALLEL_MAKEINST = "" + +do_configure_prepend() { + cp ${WORKDIR}/find.pl ${S}/util/find.pl +} diff --git a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/defconfig-gnutls b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/defconfig-gnutls index 4f0b510..71f42e6 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/defconfig-gnutls +++ b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/defconfig-gnutls @@ -420,6 +420,10 @@ CONFIG_CTRL_IFACE_DBUS_NEW=y # external RADIUS server can be supported with hostapd. CONFIG_AP=y +# P2P (Wi-Fi Direct) +# This can be used to enable P2P support in wpa_supplicant. See README-P2P for +# more information on P2P operations. +CONFIG_P2P=y CONFIG_BGSCAN_SIMPLE=y # Autoscan @@ -432,8 +436,5 @@ CONFIG_AUTOSCAN_EXPONENTIAL=y # For periodic module: #CONFIG_AUTOSCAN_PERIODIC=y -# WPA_CLI Private commands -# This enables private commands usage by wpa_cli -# -CFLAGS += -DEDISON_USE_PRIVATE_BCM_CMD -CONFIG_USE_VENDOR_PRIVATE_CMD=y +CFLAGS += -DEDISON_TARGET +CFLAGS += -DANDROID_P2P diff --git a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/p2p_supplicant.conf-sane b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/p2p_supplicant.conf-sane new file mode 100644 index 0000000..62e2236 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/p2p_supplicant.conf-sane @@ -0,0 +1,12 @@ +ctrl_interface=/var/run/wpa_supplicant +ctrl_interface_group=0 +config_methods=virtual_push_button virtual_display push_button keypad +update_config=1 +fast_reauth=1 +device_name=Edison +manufacturer=Intel +model_name=Edison +p2p_ssid_postfix=-Edison +persistent_reconnect=1 + + diff --git a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/udhcpd-p2p.conf b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/udhcpd-p2p.conf new file mode 100644 index 0000000..dcd92f2 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/udhcpd-p2p.conf @@ -0,0 +1,107 @@ +# Sample udhcpd configuration file (/etc/udhcpd.conf) + +# The start and end of the IP lease block + +start 192.168.42.20 #default: 192.168.0.20 +end 192.168.42.254 #default: 192.168.0.254 + + +# The interface that udhcpd will use + +interface INTERFACE #default: eth0 + + +# The maximim number of leases (includes addressesd reserved +# by OFFER's, DECLINE's, and ARP conficts + +#max_leases 254 #default: 254 + + +# If remaining is true (default), udhcpd will store the time +# remaining for each lease in the udhcpd leases file. This is +# for embedded systems that cannot keep time between reboots. +# If you set remaining to no, the absolute time that the lease +# expires at will be stored in the dhcpd.leases file. + +#remaining yes #default: yes + + +# The time period at which udhcpd will write out a dhcpd.leases +# file. If this is 0, udhcpd will never automatically write a +# lease file. (specified in seconds) + +#auto_time 7200 #default: 7200 (2 hours) + + +# The amount of time that an IP will be reserved (leased) for if a +# DHCP decline message is received (seconds). + +#decline_time 3600 #default: 3600 (1 hour) + + +# The amount of time that an IP will be reserved (leased) for if an +# ARP conflct occurs. (seconds + +#conflict_time 3600 #default: 3600 (1 hour) + + +# How long an offered address is reserved (leased) in seconds + +#offer_time 60 #default: 60 (1 minute) + +# If a lease to be given is below this value, the full lease time is +# instead used (seconds). + +#min_lease 60 #defult: 60 + + +# The location of the leases file + +#lease_file /var/lib/misc/udhcpd.leases #defualt: /var/lib/misc/udhcpd.leases + +# The location of the pid file +pidfile /var/run/udhcpd-INTERFACE.pid #default: /var/run/udhcpd.pid + +# Every time udhcpd writes a leases file, the below script will be called. +# Useful for writing the lease file to flash every few hours. + +#notify_file #default: (no script) + +#notify_file dumpleases # <--- useful for debugging + +# The following are bootp specific options, setable by udhcpd. + +#siaddr 192.168.0.22 #default: 0.0.0.0 + +#sname zorak #default: (none) + +#boot_file /var/nfs_root #default: (none) + +# The remainer of options are DHCP options and can be specifed with the +# keyword 'opt' or 'option'. If an option can take multiple items, such +# as the dns option, they can be listed on the same line, or multiple +# lines. The only option with a default is 'lease'. + +# Currently supported options, for more info, see options.c +opt subnet 255.255.255.0 +#opt timezone +#opt router +#opt timesvr +#opt namesvr +#opt dns +#opt logsvr +#opt cookiesvr +#opt lprsvr +#opt bootsize +#opt domain +#opt swapsvr +#opt rootpath +#opt ipttl +#opt mtu +#opt broadcast +#opt wins +#opt lease +#opt ntpsrv +#opt tftp +#opt bootfile + diff --git a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa-supplicant-android-4.4.4_r2.0.1.patch b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa-supplicant-android-4.4.4_r2.0.1.patch new file mode 100644 index 0000000..ceee40d --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa-supplicant-android-4.4.4_r2.0.1.patch @@ -0,0 +1,184 @@ + +--- a/wpa_supplicant/src/drivers/driver_nl80211.c 2014-10-01 16:44:14.819137037 +0200 ++++ b/wpa_supplicant/src/drivers/driver_nl80211.c 2014-10-01 16:37:16.979149254 +0200 +@@ -321,7 +321,7 @@ + struct wpa_driver_scan_params *params); + static int android_pno_stop(struct i802_bss *bss); + #endif /* ANDROID */ +-#ifdef ANDROID_P2P ++#if defined(ANDROID_P2P) && !defined(EDISON_TARGET) + int wpa_driver_set_p2p_noa(void *priv, u8 count, int start, int duration); + int wpa_driver_get_p2p_noa(void *priv, u8 *buf, size_t len); + int wpa_driver_set_p2p_ps(void *priv, int legacy_ps, int opp_ps, int ctwindow); +@@ -10329,7 +10329,7 @@ + "opp_ps=%d ctwindow=%d)", legacy_ps, opp_ps, ctwindow); + + if (opp_ps != -1 || ctwindow != -1) +-#ifdef ANDROID_P2P ++#if defined(ANDROID_P2P) && !defined(EDISON_TARGET) + wpa_driver_set_p2p_ps(priv, legacy_ps, opp_ps, ctwindow); + #else + return -1; /* Not yet supported */ +@@ -10832,7 +10832,7 @@ + .update_ft_ies = wpa_driver_nl80211_update_ft_ies, + .get_mac_addr = wpa_driver_nl80211_get_macaddr, + .get_survey = wpa_driver_nl80211_get_survey, +-#ifdef ANDROID_P2P ++#if defined(ANDROID_P2P) && !defined(EDISON_TARGET) + .set_noa = wpa_driver_set_p2p_noa, + .get_noa = wpa_driver_get_p2p_noa, + .set_ap_wps_ie = wpa_driver_set_ap_wps_p2p_ie, + +--- a/wpa_supplicant/wpa_cli.c 2014-10-01 16:52:31.123122526 +0200 ++++ b/wpa_supplicant/wpa_cli.c 2014-10-01 17:05:59.043098904 +0200 +@@ -3625,7 +3625,8 @@ + continue; + #endif /* _DIRENT_HAVE_D_TYPE */ + if (os_strcmp(dent->d_name, ".") == 0 || +- os_strcmp(dent->d_name, "..") == 0) ++ os_strcmp(dent->d_name, "..") == 0 || ++ os_strstr(dent->d_name, "p2p")) + continue; + printf("Selected interface '%s'\n", dent->d_name); + ifname = os_strdup(dent->d_name); + +--- a/wpa_supplicant/p2p_supplicant.c 2014-09-26 12:09:39.856249682 +0200 ++++ b/wpa_supplicant/p2p_supplicant.c 2014-12-17 16:42:39.535846212 +0100 +@@ -3061,6 +3061,13 @@ + int cla, op; + + if (wpa_s->hw.modes == NULL) { ++ wpa_printf(MSG_DEBUG, "P2P: Driver did not support fetching. " ++ "Use supported channels retrieved on interface wlan0"); ++ wpa_s = wpa_s->global->ifaces; ++ ++ } ++ ++ if (wpa_s->hw.modes == NULL) { + wpa_printf(MSG_DEBUG, "P2P: Driver did not support fetching " + "of all supported channels; assume dualband " + "support"); +@@ -3172,7 +3179,8 @@ + } + + +-int wpas_p2p_add_p2pdev_interface(struct wpa_supplicant *wpa_s) ++int wpas_p2p_add_p2pdev_interface(struct wpa_supplicant *wpa_s, ++ const char *conf_p2p_dev) + { + struct wpa_interface iface; + struct wpa_supplicant *p2pdev_wpa_s; +@@ -3198,7 +3206,20 @@ + iface.ifname = wpa_s->pending_interface_name; + iface.driver = wpa_s->driver->name; + iface.driver_param = wpa_s->conf->driver_param; +- iface.confname = wpa_s->confname; ++ ++ /* ++ * If a P2P Device configuration file was given, use it as the interface ++ * configuration file (instead of using parent's configuration file. ++ */ ++ if (conf_p2p_dev) { ++ iface.confname = conf_p2p_dev; ++ iface.ctrl_interface = NULL; ++ } else { ++ iface.confname = wpa_s->confname; ++ iface.ctrl_interface = wpa_s->conf->ctrl_interface; ++ } ++ iface.conf_p2p_dev = NULL; ++ + p2pdev_wpa_s = wpa_supplicant_add_iface(wpa_s->global, &iface); + if (!p2pdev_wpa_s) { + wpa_printf(MSG_DEBUG, "P2P: Failed to add P2P Device interface"); + +--- a/wpa_supplicant/main.c 2014-09-26 12:09:39.856249682 +0200 ++++ b/wpa_supplicant/main.c 2014-12-17 16:42:39.535846212 +0100 +@@ -83,6 +83,9 @@ + #endif /* CONFIG_DBUS */ + printf(" -v = show version\n" + " -W = wait for a control interface monitor before starting\n" ++#ifdef CONFIG_P2P ++ " -m = Configuration file for the P2P Device interface\n" ++#endif /* CONFIG_P2P */ + " -N = start describing new interface\n"); + + printf("example:\n" +@@ -160,7 +163,7 @@ + + for (;;) { + c = getopt(argc, argv, +- "b:Bc:C:D:de:f:g:G:hi:I:KLNo:O:p:P:qsTtuvW"); ++ "b:Bc:C:D:de:f:g:G:hi:I:KLm:No:O:p:P:qsTtuvW"); + if (c < 0) + break; + switch (c) { +@@ -220,6 +223,11 @@ + license(); + exitcode = 0; + goto out; ++#ifdef CONFIG_P2P ++ case 'm': ++ iface->conf_p2p_dev = optarg; ++ break; ++#endif /* CONFIG_P2P */ + case 'o': + params.override_driver = optarg; + break; +@@ -311,7 +319,7 @@ + if (wpa_s->global->p2p == NULL && + (wpa_s->drv_flags & + WPA_DRIVER_FLAGS_DEDICATED_P2P_DEVICE) && +- wpas_p2p_add_p2pdev_interface(wpa_s) < 0) ++ wpas_p2p_add_p2pdev_interface(wpa_s, iface->conf_p2p_dev) < 0) + exitcode = -1; + #endif /* CONFIG_P2P */ + } + +--- a/wpa_supplicant/p2p_supplicant.h 2014-09-26 12:09:39.856249682 +0200 ++++ b/wpa_supplicant/p2p_supplicant.h 2014-12-17 16:42:39.535846212 +0100 +@@ -19,7 +19,8 @@ + int wpas_p2p_init(struct wpa_global *global, struct wpa_supplicant *wpa_s); + void wpas_p2p_deinit(struct wpa_supplicant *wpa_s); + void wpas_p2p_deinit_global(struct wpa_global *global); +-int wpas_p2p_add_p2pdev_interface(struct wpa_supplicant *wpa_s); ++int wpas_p2p_add_p2pdev_interface(struct wpa_supplicant *wpa_s, ++ const char *conf_p2p_dev); + int wpas_p2p_connect(struct wpa_supplicant *wpa_s, const u8 *peer_addr, + const char *pin, enum p2p_wps_method wps_method, + int persistent_group, int auto_join, int join, + +--- a/wpa_supplicant/wpa_supplicant_i.h 2014-09-26 12:09:39.856249682 +0200 ++++ b/wpa_supplicant/wpa_supplicant_i.h 2014-12-17 16:42:39.535846212 +0100 +@@ -63,6 +63,17 @@ + */ + const char *confanother; + ++#ifdef CONFIG_P2P ++ /** ++ * conf_p2p_dev - Configuration file used to hold the ++ * P2P Device configuration parameters. ++ * ++ * This can also be %NULL. In such a case, if a P2P Device dedicated ++ * interfaces is created, the main configuration file will be used. ++ */ ++ const char *conf_p2p_dev; ++#endif /* CONFIG_P2P */ ++ + /** + * ctrl_interface - Control interface parameter + * + +@@ -904,0 +904,0 @@ +--- a/wpa_supplicant/scan.c 2014-09-26 12:09:39.856249682 +0200 ++++ b/wpa_supplicant/scan.c 2014-12-17 16:42:39.535846212 +0100 +@@ -904,7 +904,7 @@ + */ + void wpa_supplicant_req_scan(struct wpa_supplicant *wpa_s, int sec, int usec) + { +-#ifndef ANDROID ++#if !defined(ANDROID) && !defined(EDISON_TARGET) + /* If there's at least one network that should be specifically scanned + * then don't cancel the scan and reschedule. Some drivers do + * background scanning which generates frequent scan results, and that + + diff --git a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_cli-actions.sh b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_cli-actions.sh index b4bd8d8..77b9086 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_cli-actions.sh +++ b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_cli-actions.sh @@ -3,8 +3,10 @@ # This script file is passed as parameter to wpa_cli, started as a daemon, # so that the wpa_supplicant events are sent to this script # and actions executed, like : -# - start DHCP client when Wifi is connected. -# - stop DHCP client when Wifi is disconnected. +# - start DHCP client when STA is connected. +# - stop DHCP client when STA is disconnected. +# - start DHCP client when P2P-GC is connected. +# - stop DHCP server when P2P-GO is disconnected. # # This script skips events if connmand (connman.service) is started # Indeed, it is considered that the Wifi connection is managed through @@ -36,11 +38,14 @@ kill_daemon() { echo "event $CMD received from wpa_supplicant" -# if connman is started, ignore the connmand. -# DHCP connection is triggerd by connman +# if Connman is started, ignore wpa_supplicant +# STA connection event because the DHCP connection +# is triggerd by Connman if [ `systemctl is-active connman` == "active" ] ; then - echo "event $CMD ignored because is started" - exit 0 + if [ "$CMD" = "CONNECTED" ] || [ "$CMD" = "DISCONNECTED" ] ; then + echo "event $CMD ignored because Connman is started" + exit 0 + fi fi if [ "$CMD" = "CONNECTED" ]; then @@ -53,3 +58,31 @@ if [ "$CMD" = "DISCONNECTED" ]; then ifconfig $IFNAME 0.0.0.0 fi +if [ "$CMD" = "P2P-GROUP-STARTED" ]; then + GIFNAME=$3 + if [ "$4" = "GO" ]; then + kill_daemon udhcpc /var/run/udhcpc-$GIFNAME.pid + ifconfig $GIFNAME 192.168.42.1 up + cp /etc/wpa_supplicant/udhcpd-p2p.conf /etc/wpa_supplicant/udhcpd-p2p-itf.conf + sed -i "s/INTERFACE/$GIFNAME/" /etc/wpa_supplicant/udhcpd-p2p-itf.conf + udhcpd /etc/wpa_supplicant/udhcpd-p2p-itf.conf + fi + if [ "$4" = "client" ]; then + kill_daemon udhcpc /var/run/udhcpc-$GIFNAME.pid + kill_daemon udhcpd /var/run/udhcpd-$GIFNAME.pid + udhcpc -i $GIFNAME -p /var/run/udhcpc-$GIFNAME.pid + fi +fi + +if [ "$CMD" = "P2P-GROUP-REMOVED" ]; then + GIFNAME=$3 + if [ "$4" = "GO" ]; then + kill_daemon udhcpd /var/run/udhcpd-$GIFNAME.pid + ifconfig $GIFNAME 0.0.0.0 + fi + if [ "$4" = "client" ]; then + kill_daemon udhcpc /var/run/udhcpc-$GIFNAME.pid + ifconfig $GIFNAME 0.0.0.0 + fi +fi + diff --git a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant.conf-sane b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant.conf-sane index e737c3c..4d37989 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant.conf-sane +++ b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant.conf-sane @@ -1,5 +1,10 @@ ctrl_interface=/var/run/wpa_supplicant ctrl_interface_group=0 +config_methods=virtual_push_button virtual_display push_button keypad update_config=1 -ap_scan=1 +fast_reauth=1 +device_name=Edison +manufacturer=Intel +model_name=Edison + diff --git a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant.service b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant.service index ce95f18..ec363aa 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant.service +++ b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant.service @@ -6,14 +6,16 @@ After=sys-subsystem-net-devices-wlan0.device [Service] Type=simple -# start wpa_supplicant service -ExecStart=/usr/sbin/wpa_supplicant -c/etc/wpa_supplicant/wpa_supplicant.conf -iwlan0 -Dnl80211 -u -O /var/run/wpa_supplicant +# start wpa_supplicant service : +# - the second interface p2p-dev-wlan0 is automatically created at startup +# - the file wpa_supplicant is common to both interfaces wlan0 and p2p-dev-wlan0 +ExecStart=/usr/sbin/wpa_supplicant -u -c/etc/wpa_supplicant/wpa_supplicant.conf -iwlan0 -Dnl80211 -puse_p2p_group_interface=1p2p_device=1 -m/etc/wpa_supplicant/p2p_supplicant.conf -O /var/run/wpa_supplicant -e /etc/wpa_supplicant/entropy.bin # start wpa_supplicant_event service after the start of wpa_supplicant service -ExecStartPost=/bin/systemctl start wpa_supplicant_event +ExecStartPost=/bin/systemctl start wpa_supplicant_wlan0_event ; /bin/systemctl start wpa_supplicant_p2p_event # stop wpa_supplicant_event service after the stop of wpa_supplicant service -ExecStopPost=/bin/systemctl stop wpa_supplicant_event +ExecStopPost=/bin/systemctl stop wpa_supplicant_wlan0_event ; /bin/systemctl stop wpa_supplicant_p2p_event [Install] WantedBy=multi-user.target diff --git a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant_p2p_event.service b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant_p2p_event.service new file mode 100644 index 0000000..b5445a2 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant_p2p_event.service @@ -0,0 +1,13 @@ +[Unit] +Description=Daemon to receive the wpa_supplicant event +Requires=sys-subsystem-net-devices-wlan0.device +After=sys-subsystem-net-devices-wlan0.device + +[Service] +Type=simple +ExecStart=/usr/sbin/wpa_cli -a /etc/wpa_supplicant/wpa_cli-actions.sh -i p2p-dev-wlan0 +Restart=on-failure +RestartSec=1 + +[Install] +WantedBy=multi-user.target diff --git a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant_wlan0_event.service b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant_wlan0_event.service new file mode 100644 index 0000000..7428b4c --- /dev/null +++ b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant/wpa_supplicant_wlan0_event.service @@ -0,0 +1,13 @@ +[Unit] +Description=Daemon to receive the wpa_supplicant event +Requires=sys-subsystem-net-devices-wlan0.device +After=sys-subsystem-net-devices-wlan0.device + +[Service] +Type=simple +ExecStart=/usr/sbin/wpa_cli -a /etc/wpa_supplicant/wpa_cli-actions.sh -i wlan0 +Restart=on-failure +RestartSec=1 + +[Install] +WantedBy=multi-user.target diff --git a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant_2.1.bbappend b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant_2.1.bbappend index ecbfd5c..5063afd 100644 --- a/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant_2.1.bbappend +++ b/device-software/meta-edison-distro/recipes-connectivity/wpa_supplicant/wpa-supplicant_2.1.bbappend @@ -1,33 +1,37 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=ab87f20cd7e8c0d0a6539b34d3791d0e \ - file://README;md5=a07250b28e857455336bb59fc31cb845 \ - file://wpa_supplicant/wpa_supplicant.c;beginline=1;endline=12;md5=e8e021e30f3a6ab7c341b66b86626a5a" + file://README;md5=5c7cc1ea1a4d82b1cbe9a02fe92881b8 \ + file://wpa_supplicant/wpa_supplicant.c;beginline=1;endline=12;md5=cba4fa09fa364da845ca546f21008909" RRECOMMENDS_${PN} = "wpa-supplicant-passphrase wpa-supplicant-cli" -SYSTEMD_SERVICE_${PN} = "wpa_supplicant.service wpa_supplicant_event.service" + +SYSTEMD_SERVICE_${PN} = "wpa_supplicant.service wpa_supplicant_wlan0_event.service wpa_supplicant_p2p_event.service" FILESEXTRAPATHS_prepend := "${THISDIR}/wpa-supplicant:" +PV = "android-4.4.4_r2.0.1" + BASE_SRC_URI = "file://defconfig-gnutls \ - file://wpa_supplicant.conf \ file://wpa_supplicant.conf-sane \ + file://p2p_supplicant.conf-sane \ file://99_wpa_supplicant \ file://fi.w1.wpa_supplicant1.service \ + file://udhcpd-p2p.conf \ file://wpa_supplicant.service \ - file://wpa_supplicant_event.service \ + file://wpa_supplicant_wlan0_event.service \ + file://wpa_supplicant_p2p_event.service \ file://wpa-supplicant.sh \ + file://wpa-supplicant-${PV}.patch \ file://wpa_cli-actions.sh " -PV = "2.2" - SRC_URI = "${BASE_SRC_URI} \ - http://hostap.epitest.fi/releases/wpa_supplicant-${PV}.tar.gz " + git://android.googlesource.com/platform/external/wpa_supplicant_8;protocol=https;tag=android-4.4.4_r2.0.1" +S = "${WORKDIR}/git" PR = "r1" -SRC_URI[md5sum] = "238e8e888bbd558e1a57e3eb28d1dd07" -SRC_URI[sha256sum] = "e0d8b8fd68a659636eaba246bb2caacbf53d22d53b2b6b90eb4b4fef0993c8ed" - +SRC_URI[md5sum] = "f2ed8fef72cf63d8d446a2d0a6da630a" +SRC_URI[sha256sum] = "eaaa5bf3055270e521b2dff64f2d203ec8040f71958b8588269a82c00c9d7b6a" FILES_${PN} += "${datadir}/dbus-1/system-services/* \ ${systemd_unitdir}/system/ \ @@ -52,6 +56,7 @@ do_install () { install -d ${D}${sysconfdir}/wpa_supplicant install -m 600 ${WORKDIR}/wpa_supplicant.conf-sane ${D}${sysconfdir}/wpa_supplicant/wpa_supplicant.conf + install -m 600 ${WORKDIR}/p2p_supplicant.conf-sane ${D}${sysconfdir}/wpa_supplicant/p2p_supplicant.conf install -d ${D}/${sysconfdir}/dbus-1/system.d install -m 644 ${S}/wpa_supplicant/dbus/dbus-wpa_supplicant.conf ${D}/${sysconfdir}/dbus-1/system.d @@ -70,7 +75,11 @@ do_install () { # Install wpa_supplicant_event service for udhcp client start/stop based on wifi connection/disconnection install -m 755 ${WORKDIR}/wpa_cli-actions.sh ${D}${sysconfdir}/wpa_supplicant - install -m 644 ${WORKDIR}/wpa_supplicant_event.service ${D}${systemd_unitdir}/system + install -m 644 ${WORKDIR}/wpa_supplicant_wlan0_event.service ${D}${systemd_unitdir}/system + install -m 644 ${WORKDIR}/wpa_supplicant_p2p_event.service ${D}${systemd_unitdir}/system + + # Install udhcp server configuration file for P2P GO + install -m 644 ${WORKDIR}/udhcpd-p2p.conf ${D}${sysconfdir}/wpa_supplicant fi install -d ${D}/etc/default/volatiles diff --git a/device-software/meta-edison-distro/recipes-core/base-files/base-files/media-sdcard.automount b/device-software/meta-edison-distro/recipes-core/base-files/base-files/media-sdcard.automount new file mode 100644 index 0000000..a577591 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-core/base-files/base-files/media-sdcard.automount @@ -0,0 +1,11 @@ +[Unit] +Description=Automount for SDCard +ConditionPathExists=/dev/mmcblk1p1 +RefuseManualStart=true +RefuseManualStop=true + +[Automount] +Where=/media/sdcard + +[Install] +WantedBy=local-fs.target diff --git a/device-software/meta-edison-distro/recipes-core/base-files/base-files/media-sdcard.mount b/device-software/meta-edison-distro/recipes-core/base-files/base-files/media-sdcard.mount index c7d52ac..a9d310b 100644 --- a/device-software/meta-edison-distro/recipes-core/base-files/base-files/media-sdcard.mount +++ b/device-software/meta-edison-distro/recipes-core/base-files/base-files/media-sdcard.mount @@ -1,10 +1,7 @@ [Unit] Description=Mount for SDCard -Requires=dev-mmcblk1p1.device -After=dev-mmcblk1p1.device - -[Install] -WantedBy=default.target +BindsTo=dev-mmcblk1p1.device +Conflicts=media-sdcard.automount [Mount] What=/dev/mmcblk1p1 diff --git a/device-software/meta-edison-distro/recipes-core/base-files/base-files/share/dot.profile b/device-software/meta-edison-distro/recipes-core/base-files/base-files/share/dot.profile new file mode 100644 index 0000000..4f1d2a0 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-core/base-files/base-files/share/dot.profile @@ -0,0 +1,9 @@ +# ~/.profile: executed by Bourne-compatible login shells. + +if [ -f ~/.bashrc ]; then + . ~/.bashrc +fi + +# path set by /etc/profile +# export PATH + diff --git a/device-software/meta-edison-distro/recipes-core/base-files/base-files_3.0.14.bbappend b/device-software/meta-edison-distro/recipes-core/base-files/base-files_3.0.14.bbappend index 13e7606..dd8d96a 100644 --- a/device-software/meta-edison-distro/recipes-core/base-files/base-files_3.0.14.bbappend +++ b/device-software/meta-edison-distro/recipes-core/base-files/base-files_3.0.14.bbappend @@ -1,26 +1,33 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/base-files:" SRC_URI += "file://fstab" SRC_URI += "file://media-sdcard.mount" +SRC_URI += "file://media-sdcard.automount" SRC_URI += "file://factory.mount" +SRC_URI += "file://share/dot.profile" # override default volatile to suppress var/log link creation volatiles = "tmp" do_install_append() { install -m 0644 ${WORKDIR}/fstab ${D}${sysconfdir}/fstab + install -m 0755 ${WORKDIR}/share/dot.profile ${D}${sysconfdir}/skel/.profile # enable mount of the SDCard in /media/sdcard when inserted install -d ${D}${systemd_unitdir}/system install -c -m 0644 ${WORKDIR}/media-sdcard.mount ${D}${systemd_unitdir}/system + install -c -m 0644 ${WORKDIR}/media-sdcard.automount ${D}${systemd_unitdir}/system install -c -m 0644 ${WORKDIR}/factory.mount ${D}${systemd_unitdir}/system # Enable the service + install -d ${D}${sysconfdir}/systemd/system/local-fs.target.wants + ln -sf ${systemd_unitdir}/system/media-sdcard.automount \ + ${D}${sysconfdir}/systemd/system/local-fs.target.wants/media-sdcard.automount install -d ${D}${sysconfdir}/systemd/system/default.target.wants - ln -sf ${systemd_unitdir}/system/media-sdcard.mount \ - ${D}${sysconfdir}/systemd/system/default.target.wants/media-sdcard.mount - ln -sf ${systemd_unitdir}/system/factory.mount \ + ln -sf ${systemd_unitdir}/system/factory.mount \ ${D}${sysconfdir}/systemd/system/default.target.wants/factory.mount } FILES_${PN} += "${base_libdir}/systemd/system/*.mount" +FILES_${PN} += "${base_libdir}/systemd/system/*.automount" FILES_${PN} += "${sysconfdir}/systemd/system/default.target.wants/*.mount" +FILES_${PN} += "${sysconfdir}/systemd/system/local-fs.target.wants/*.automount" diff --git a/device-software/meta-edison-distro/recipes-core/busybox/busybox_1.22.1.bbappend b/device-software/meta-edison-distro/recipes-core/busybox/busybox_1.22.1.bbappend index 7ce27a9..faf18af 100644 --- a/device-software/meta-edison-distro/recipes-core/busybox/busybox_1.22.1.bbappend +++ b/device-software/meta-edison-distro/recipes-core/busybox/busybox_1.22.1.bbappend @@ -1,4 +1,5 @@ -# to get brctl configuration settings -FILESEXTRAPATHS_prepend := "${THISDIR}/files/" +# to get brctl and log configuration settings +FILESEXTRAPATHS_prepend := "${THISDIR}/files/:" -SRC_URI += "file://brctl-utilities.cfg" +SRC_URI += "file://brctl-utilities.cfg \ + file://busybox-log.cfg " diff --git a/device-software/meta-edison-distro/recipes-core/busybox/files/busybox-log.cfg b/device-software/meta-edison-distro/recipes-core/busybox/files/busybox-log.cfg new file mode 100644 index 0000000..7b7408f --- /dev/null +++ b/device-software/meta-edison-distro/recipes-core/busybox/files/busybox-log.cfg @@ -0,0 +1,3 @@ +CONFIG_KLOGD=n +CONFIG_SYSLOGD=n + diff --git a/device-software/meta-edison-distro/recipes-core/first-install/files/first-install.service b/device-software/meta-edison-distro/recipes-core/first-install/files/first-install.service index 4c00f71..3ebb9d7 100644 --- a/device-software/meta-edison-distro/recipes-core/first-install/files/first-install.service +++ b/device-software/meta-edison-distro/recipes-core/first-install/files/first-install.service @@ -4,6 +4,6 @@ OnFailure=reboot.target Requires=dev-disk-by\x2dpartlabel-home.device dev-disk-by\x2dpartlabel-update.device After=dev-disk-by\x2dpartlabel-home.device dev-disk-by\x2dpartlabel-update.device [Service] -ExecStart=@BASE_BINDIR@/sh @BASE_SBINDIR@/first-install.sh systemd-service +ExecStart=@BASE_BINDIR@/sh -c "shell='sh'; if [ -f /bin/bash ]; then shell='bash'; fi; @BASE_BINDIR@/$shell @BASE_SBINDIR@/first-install.sh systemd-service" StandardOutput=journal+console diff --git a/device-software/meta-edison-distro/recipes-core/first-install/files/first-install.sh b/device-software/meta-edison-distro/recipes-core/first-install/files/first-install.sh index d429c8a..1b29245 100644 --- a/device-software/meta-edison-distro/recipes-core/first-install/files/first-install.sh +++ b/device-software/meta-edison-distro/recipes-core/first-install/files/first-install.sh @@ -1,9 +1,11 @@ -#!/bin/sh +#!/bin/bash # first install script to do post flash install # global variable set to 1 if output is systemd journal fi_journal_out=0 +export PATH="$PATH:/usr/sbin/" + # handle argument, if first-install is called from systemd service # arg1 is "systemd-service" if [ "$1" == "systemd-service" ]; then fi_journal_out=1; fi; @@ -48,11 +50,11 @@ exit_first_install () { # next reboot will be on multi-user target fw_setenv bootargs_target multi-user fi - - fi_echo "Rebooting...." # dump journal to log file journalctl -u first-install -o short-iso >> /first-install.log - reboot + systemctl daemon-reload + systemctl stop home.mount + systemctl default } # continue normal flow or exit on error code @@ -128,15 +130,17 @@ mkfs.ext4 -m0 /dev/disk/by-partlabel/home fi_assert $? "Formatting home partition" # backup initial /home/root directory -cp -R /home/root /tmp +mkdir /tmp/oldhome +cp -R /home/* /tmp/oldhome/ fi_assert $? "Backup home/root contents of rootfs" # mount home partition on /home mount /dev/disk/by-partlabel/home /home fi_assert $? "Mount /home partition" -# copy back contents to /home -mv /tmp/root /home +# copy back contents to /home and cleanup +mv /tmp/oldhome/* /home/ +rm -rf /tmp/oldhome fi_assert $? "Restore home/root contents on new /home partition" # create a fat32 primary partition on all available space diff --git a/device-software/meta-edison-distro/recipes-core/images/edison-image.bb b/device-software/meta-edison-distro/recipes-core/images/edison-image.bb index cea51da..f106657 100644 --- a/device-software/meta-edison-distro/recipes-core/images/edison-image.bb +++ b/device-software/meta-edison-distro/recipes-core/images/edison-image.bb @@ -49,7 +49,8 @@ IMAGE_INSTALL += "connman-tools" IMAGE_INSTALL += "wireless-tools" IMAGE_INSTALL += "wpa-supplicant" IMAGE_INSTALL += "hostapd-daemon" -IMAGE_INSTALL += "bluez5" +IMAGE_INSTALL += "bluez5-dev" +IMAGE_INSTALL += "bluez5-obex" IMAGE_INSTALL += "kernel-modules" IMAGE_INSTALL += "ethtool" IMAGE_INSTALL += "iptables" @@ -57,15 +58,15 @@ IMAGE_INSTALL += "libstdc++" IMAGE_INSTALL += "u-boot" IMAGE_INSTALL += "u-boot-fw-utils" IMAGE_INSTALL += "file" -IMAGE_INSTALL += "otg" IMAGE_INSTALL += "pciutils" IMAGE_INSTALL += "usbutils" IMAGE_INSTALL += "ldd" IMAGE_INSTALL += "i2c-tools" IMAGE_INSTALL += "watchdog-sample" IMAGE_INSTALL += "pwr-button-handler" -IMAGE_INSTALL += "libwebsockets" +IMAGE_INSTALL += "blink-led" IMAGE_INSTALL += "first-install" +IMAGE_INSTALL += "resize-rootfs" IMAGE_INSTALL += "systemd-analyze" IMAGE_INSTALL += "wget" IMAGE_INSTALL += "ota-update" @@ -73,10 +74,17 @@ IMAGE_INSTALL += "ota-update" # Allows to enable OpenMP feature IMAGE_INSTALL += "libgomp" +# Add audio firmware +IMAGE_INSTALL += "sst-fw-bin" + +# ALSA lib and utilities +IMAGE_INSTALL += "alsa-lib" +IMAGE_INSTALL += "alsa-utils-alsamixer alsa-utils-alsactl alsa-utils-aplay alsa-utils-amixer" + # Python and some basic modules IMAGE_INSTALL += "python" IMAGE_INSTALL += "python-dbus python-smartpm python-pygobject python-argparse" -IMAGE_INSTALL += "python-distutils python-pkgutil python-audio python-image python-imaging python-email python-netserver python-xmlrpc python-ctypes python-html python-json python-compile python-misc python-numbers python-unittest" +IMAGE_INSTALL += "python-distutils python-pkgutil python-audio python-image python-imaging python-email python-netserver python-xmlrpc python-ctypes python-html python-json python-compile python-misc python-numbers python-unittest python-pydoc" # Wifi firmware IMAGE_INSTALL += "bcm43340-fw" @@ -91,12 +99,21 @@ IMAGE_INSTALL += "bcm43340-mod" IMAGE_FEATURES += "tools-debug" IMAGE_INSTALL += "crashlog" +# Clean corrupted journald entries +IMAGE_INSTALL += "cleanjournal" + # Adds various other tools IMAGE_INSTALL += "tcpdump" IMAGE_INSTALL += "net-tools" IMAGE_INSTALL += "lsof" IMAGE_INSTALL += "iperf" +# Add pulseaudio +IMAGE_INSTALL += "pulseaudio-server libpulsecore libpulsecommon libpulse libpulse-simple pulseaudio-misc pulseaudio-service" + +# Add Mplayer +IMAGE_INSTALL += "mplayer" + # Those are necessary to manually create partitions and file systems on the eMMC IMAGE_INSTALL += "parted" IMAGE_INSTALL += "e2fsprogs-e2fsck e2fsprogs-mke2fs e2fsprogs-tune2fs e2fsprogs-badblocks libcomerr libss libe2p libext2fs dosfstools" @@ -106,3 +123,8 @@ IMAGE_INSTALL += "tzdata" # SWIG IMAGE_INSTALL += "swig" + +# INTEL MCU FW +IMAGE_INSTALL += "mcu-fw-load" +IMAGE_INSTALL += "mcu-fw-bin" + diff --git a/device-software/meta-edison-distro/recipes-core/ota-update/files/ota-update.sh b/device-software/meta-edison-distro/recipes-core/ota-update/files/ota-update.sh index 5d00b6d..cfbe8ea 100644 --- a/device-software/meta-edison-distro/recipes-core/ota-update/files/ota-update.sh +++ b/device-software/meta-edison-distro/recipes-core/ota-update/files/ota-update.sh @@ -54,7 +54,9 @@ exit_ota_update () { fi_echo "Rebooting...." # dump journal to log file journalctl -u ota-update -o short-iso >> /ota-update.log - reboot + systemctl daemon-reload + systemctl stop home.mount + systemctl default } # continue normal flow or exit on error code diff --git a/device-software/meta-edison-distro/recipes-core/readline/files/readline-fix-segfault-when-pressing-DEL-key-twice.patch b/device-software/meta-edison-distro/recipes-core/readline/files/readline-fix-segfault-when-pressing-DEL-key-twice.patch new file mode 100644 index 0000000..4dcaf89 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-core/readline/files/readline-fix-segfault-when-pressing-DEL-key-twice.patch @@ -0,0 +1,39 @@ +From 8acbcaa6b3d855f3e85e6a108db323278584091e Mon Sep 17 00:00:00 2001 +From: Loic Akue +Date: Mon, 3 Nov 2014 16:26:42 +0100 +Subject: [PATCH] bug readline + +| READLINE PATCH REPORT +| ===================== +| +|Readline-Release: 6.3 +|Patch-ID: readline63-002 +| +|Bug-Reported-by: Anatol Pomozov +|Bug-Reference-ID: +|Bug-Reference-URL: http://lists.gnu.org/archive/html/bug-readline/2014-03/msg00010.html +| +|Bug-Description: +| +|When in callback mode, some readline commands can cause readline to seg +|fault by passing invalid contexts to callback functions. + +Signed-off-by: Loic Akue + +diff --git a/readline.c b/readline.c +index 03eefa6..55c0522 100644 +--- a/readline.c ++++ b/readline.c +@@ -744,7 +744,8 @@ _rl_dispatch_callback (cxt) + r = _rl_subseq_result (r, cxt->oldmap, cxt->okey, (cxt->flags & KSEQ_SUBSEQ)); + + RL_CHECK_SIGNALS (); +- if (r == 0) /* success! */ ++ /* We only treat values < 0 specially to simulate recursion. */ ++ if (r >= 0 || (r == -1 && (cxt->flags & KSEQ_SUBSEQ) == 0)) /* success! or failure! */ + { + _rl_keyseq_chain_dispose (); + RL_UNSETSTATE (RL_STATE_MULTIKEY); +-- +1.7.9.5 + diff --git a/device-software/meta-edison-distro/recipes-core/readline/readline_6.3.bbappend b/device-software/meta-edison-distro/recipes-core/readline/readline_6.3.bbappend new file mode 100644 index 0000000..c8ecc36 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-core/readline/readline_6.3.bbappend @@ -0,0 +1,4 @@ +FILESEXTRAPATHS_prepend := "${THISDIR}/files:" +SRC_URI += "\ + file://readline-fix-segfault-when-pressing-DEL-key-twice.patch \ + " diff --git a/device-software/meta-edison-distro/recipes-core/resize-rootfs/files/resize-rootfs.service b/device-software/meta-edison-distro/recipes-core/resize-rootfs/files/resize-rootfs.service new file mode 100644 index 0000000..708226f --- /dev/null +++ b/device-software/meta-edison-distro/recipes-core/resize-rootfs/files/resize-rootfs.service @@ -0,0 +1,14 @@ +[Unit] +Description=Increases rootfs image size to fit partition +Requires=dev-disk-by\x2dpartlabel-rootfs.device +After=dev-disk-by\x2dpartlabel-rootfs.device + +[Service] +Type=oneshot +ExecStart=/sbin/resize2fs /dev/disk/by-partlabel/rootfs +ExecStart=/bin/systemctl disable resize-rootfs.service + +StandardOutput=journal+console + +[Install] +WantedBy=default.target diff --git a/device-software/meta-edison-distro/recipes-core/resize-rootfs/resize-rootfs.bb b/device-software/meta-edison-distro/recipes-core/resize-rootfs/resize-rootfs.bb new file mode 100644 index 0000000..f91e4ba --- /dev/null +++ b/device-software/meta-edison-distro/recipes-core/resize-rootfs/resize-rootfs.bb @@ -0,0 +1,24 @@ +DESCRIPTION = "Resize Rootfs systemd service" +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/GPL-2.0;md5=801f80980d171dd6425610833a22dbe6" + +SRC_URI = "file://resize-rootfs.service" + +inherit systemd + +SYSTEMD_SERVICE_${PN} = "resize-rootfs.service" + +RDEPENDS_${PN} = "systemd e2fsprogs-resize2fs" + +do_install() { + install -d ${D}${systemd_unitdir}/system + install -c -m 0644 ${WORKDIR}/resize-rootfs.service ${D}${systemd_unitdir}/system +} + +FILES_${PN} = "${base_libdir}/systemd/system/resize-rootfs.service" + +# As this package is tied to systemd, only build it when we're also building systemd. +python () { + if not oe.utils.contains ('DISTRO_FEATURES', 'systemd', True, False, d): + raise bb.parse.SkipPackage("'systemd' not in DISTRO_FEATURES") +} diff --git a/device-software/meta-edison-distro/recipes-core/systemd/files/edison-machine-id.service b/device-software/meta-edison-distro/recipes-core/systemd/files/edison-machine-id.service new file mode 100644 index 0000000..3caa836 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-core/systemd/files/edison-machine-id.service @@ -0,0 +1,14 @@ +[Unit] +Description= Generate unique machine-id +After=systemd-remount-fs.service + +[Service] +Type=oneshot +ExecStartPre=/bin/umount /etc/machine-id +ExecStart=/bin/systemd-machine-id-setup +ExecStartPost=/bin/systemctl disable edison-machine-id +StandardOutput=journal+console + +[Install] +WantedBy=basic.target + diff --git a/device-software/meta-edison-distro/recipes-core/systemd/files/hsu-pm-runtime.service b/device-software/meta-edison-distro/recipes-core/systemd/files/hsu-pm-runtime.service index 1b9f277..e81b6ff 100644 --- a/device-software/meta-edison-distro/recipes-core/systemd/files/hsu-pm-runtime.service +++ b/device-software/meta-edison-distro/recipes-core/systemd/files/hsu-pm-runtime.service @@ -6,6 +6,7 @@ After=getty.target [Service] Type=oneshot ExecStart=/bin/sh -c 'echo auto > /sys/devices/pci0000:00/0000:00:04.3/power/control' +ExecStart=/bin/sh -c 'echo auto > /sys/devices/pci0000:00/0000:00:04.1/power/control' StandardOutput=null [Install] diff --git a/device-software/meta-edison-distro/recipes-core/systemd/files/usb0.network b/device-software/meta-edison-distro/recipes-core/systemd/files/usb0.network new file mode 100644 index 0000000..b7d1042 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-core/systemd/files/usb0.network @@ -0,0 +1,6 @@ +[Match] +Name=usb0 + +[Network] +Address=192.168.2.15/24 + diff --git a/device-software/meta-edison-distro/recipes-core/systemd/systemd_%.bbappend b/device-software/meta-edison-distro/recipes-core/systemd/systemd_%.bbappend index 23bcc0c..07b6cb2 100644 --- a/device-software/meta-edison-distro/recipes-core/systemd/systemd_%.bbappend +++ b/device-software/meta-edison-distro/recipes-core/systemd/systemd_%.bbappend @@ -4,13 +4,15 @@ SRC_URI += "file://journald.conf \ file://system.conf \ file://systemd-reboot-service.patch \ file://hsu-pm-runtime.service \ - file://spi-disable-pm-runtime.service" + file://usb0.network \ + file://edison-machine-id.service" do_install_append() { # Push the custom conf files on target install -m 0644 ${WORKDIR}/journald.conf ${D}${sysconfdir}/systemd install -m 0644 ${WORKDIR}/system.conf ${D}${sysconfdir}/systemd install -m 0644 ${WORKDIR}/timesyncd.conf ${D}${sysconfdir}/systemd + install -m 0644 ${WORKDIR}/usb0.network ${D}${sysconfdir}/systemd/network # enable timesyncd service install -d ${D}${sysconfdir}/systemd/system/sysinit.target.wants @@ -22,11 +24,11 @@ do_install_append() { install -m 0644 ${WORKDIR}/hsu-pm-runtime.service \ ${D}${systemd_unitdir}/system/hsu-pm-runtime.service - # enable a custom service to disable the ssp_spi driver's runtime pm - install -d ${D}${sysconfdir}/systemd/system/default.target.wants - install -m 0644 ${WORKDIR}/spi-disable-pm-runtime.service \ - ${D}${systemd_unitdir}/system/spi-disable-pm-runtime.service - ln -sf ${systemd_unitdir}/system/spi-disable-pm-runtime.service \ - ${D}${sysconfdir}/systemd/system/default.target.wants/spi-disable-pm-runtime.service + # enable a custom service to provide a persistant machine-id value to Edison + install -d ${D}${sysconfdir}/systemd/system/basic.target.wants + install -m 0644 ${WORKDIR}/edison-machine-id.service \ + ${D}${systemd_unitdir}/system/edison-machine-id.service + ln -sf ${systemd_unitdir}/system/edison-machine-id.service \ + ${D}${sysconfdir}/systemd/system/basic.target.wants/edison-machine-id.service } diff --git a/device-software/meta-edison-distro/recipes-devtools/e2fsprogs/e2fsprogs_%.bbappend b/device-software/meta-edison-distro/recipes-devtools/e2fsprogs/e2fsprogs_%.bbappend new file mode 100644 index 0000000..01a6d33 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-devtools/e2fsprogs/e2fsprogs_%.bbappend @@ -0,0 +1,11 @@ +# Add resize2fs tool + + +EXTRA_OECONF += "\ + --enable-resizer \ +" + +PACKAGES =+ "e2fsprogs-resize2fs" + +FILES_e2fsprogs-resize2fs = "${base_sbindir}/resize2fs" + diff --git a/device-software/meta-edison-distro/recipes-devtools/swig/swig.inc b/device-software/meta-edison-distro/recipes-devtools/swig/swig.inc new file mode 100644 index 0000000..5571a55 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-devtools/swig/swig.inc @@ -0,0 +1,63 @@ +DESCRIPTION = "SWIG - Simplified Wrapper and Interface Generator" +HOMEPAGE = "http://swig.sourceforge.net/" +LICENSE = "BSD & GPLv3" +LIC_FILES_CHKSUM = "file://LICENSE;md5=e7807a6282784a7dde4c846626b08fc6 \ + file://LICENSE-GPL;md5=d32239bcb673463ab874e80d47fae504 \ + file://LICENSE-UNIVERSITIES;md5=8ce9dcc8f7c994de4a408b205c72ba08" + +SECTION = "devel" + +DEPENDS = "libpcre python" + +SRC_URI = "${SOURCEFORGE_MIRROR}/${BPN}/${BPN}-${PV}.tar.gz" + +inherit autotools pythonnative + +EXTRA_OECONF = " \ + --with-python=${PYTHON} \ + --without-allegrocl \ + --without-android \ + --without-boost \ + --without-chicken \ + --without-clisp \ + --without-csharp \ + --without-d \ + --without-gcj \ + --without-go \ + --without-guile \ + --without-java \ + --without-lua \ + --without-mzscheme \ + --without-ocaml \ + --without-octave \ + --without-perl5 \ + --without-pike \ + --without-php \ + --without-python3 \ + --without-r \ + --without-ruby \ + --without-tcl \ +" + +BBCLASSEXTEND = "native nativesdk" + +do_configure() { + install -m 0755 ${STAGING_DATADIR_NATIVE}/gnu-config/config.guess ${S}/Tools/config + install -m 0755 ${STAGING_DATADIR_NATIVE}/gnu-config/config.sub ${S}/Tools/config + install -m 0755 ${STAGING_DATADIR_NATIVE}/gnu-config/config.guess ${S} + install -m 0755 ${STAGING_DATADIR_NATIVE}/gnu-config/config.sub ${S} + oe_runconf +} + +do_install_append_class-nativesdk() { + cd ${D}${bindir} + ln -s swig swig2.0 +} + +def swiglib_relpath(d): + swiglib = d.getVar('datadir', True) + "/" + d.getVar('BPN', True) + "/" + d.getVar('PV', True) + return os.path.relpath(swiglib, d.getVar('bindir', True)) + +do_install_append_class-native() { + create_wrapper ${D}${bindir}/swig SWIG_LIB='`dirname $''realpath`'/${@swiglib_relpath(d)} +} \ No newline at end of file diff --git a/device-software/meta-edison-distro/recipes-devtools/swig/swig/0001-Use-proc-self-exe-for-swig-swiglib-on-non-Win32-plat.patch b/device-software/meta-edison-distro/recipes-devtools/swig/swig/0001-Use-proc-self-exe-for-swig-swiglib-on-non-Win32-plat.patch new file mode 100644 index 0000000..4115469 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-devtools/swig/swig/0001-Use-proc-self-exe-for-swig-swiglib-on-non-Win32-plat.patch @@ -0,0 +1,56 @@ +--- + Source/Modules/main.cxx | 24 ++++++++++++++++++++++-- + 1 file changed, 22 insertions(+), 2 deletions(-) + +diff --git a/Source/Modules/main.cxx b/Source/Modules/main.cxx +index d2f5d3b..cbb0a12 100644 +--- a/Source/Modules/main.cxx ++++ b/Source/Modules/main.cxx +@@ -26,6 +26,11 @@ char cvsroot_main_cxx[] = "$Id$"; + #include "cparse.h" + #include + #include // for INT_MAX ++#ifndef _WIN32 ++#include ++#include // for readlink ++#include // for stat ++#endif + + // Global variables + +@@ -902,9 +907,9 @@ int SWIG_main(int argc, char *argv[], Language *l) { + + // Check for SWIG_LIB environment variable + if ((c = getenv("SWIG_LIB")) == (char *) 0) { ++ char *p; + #if defined(_WIN32) + char buf[MAX_PATH]; +- char *p; + if (!(GetModuleFileName(0, buf, MAX_PATH) == 0 || (p = strrchr(buf, '\\')) == 0)) { + *(p + 1) = '\0'; + SwigLib = NewStringf("%sLib", buf); // Native windows installation path +@@ -914,7 +919,22 @@ int SWIG_main(int argc, char *argv[], Language *l) { + if (Len(SWIG_LIB_WIN_UNIX) > 0) + SwigLibWinUnix = NewString(SWIG_LIB_WIN_UNIX); // Unix installation path using a drive letter (for msys/mingw) + #else +- SwigLib = NewString(SWIG_LIB); ++ char buf[PATH_MAX]; ++ if (0 < ::readlink("/proc/self/exe", buf, sizeof(buf)) && ++ (p = ::strstr(buf, "/bin/swig"))) { ++ int major, minor, patch; ++ const int ret = ::sscanf(VERSION, "%d.%d.%d", &major, &minor, &patch); ++ if (3 == ret) { ++ const ::ptrdiff_t dir_part_len = p - buf; ++ ::snprintf(p, PATH_MAX - dir_part_len, "/share/swig/%d.%d.%d", major, minor, patch); ++ struct ::stat stat_res; ++ if (0 == ::stat(buf, &stat_res) && S_ISDIR(stat_res.st_mode)) { ++ SwigLib = NewString(buf); ++ } ++ } ++ } ++ if (NULL == SwigLib) ++ SwigLib = NewString(SWIG_LIB); + #endif + } else { + SwigLib = NewString(c); +-- diff --git a/device-software/meta-edison-distro/recipes-devtools/swig/swig/0001-configure-use-pkg-config-for-pcre-detection.patch b/device-software/meta-edison-distro/recipes-devtools/swig/swig/0001-configure-use-pkg-config-for-pcre-detection.patch new file mode 100644 index 0000000..5a05d7b --- /dev/null +++ b/device-software/meta-edison-distro/recipes-devtools/swig/swig/0001-configure-use-pkg-config-for-pcre-detection.patch @@ -0,0 +1,55 @@ +--- + configure.ac | 38 +++++++------------------------------- + 1 file changed, 7 insertions(+), 31 deletions(-) + +diff --git a/configure.ac b/configure.ac +index 0c984b7..6edcec1 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -70,38 +70,14 @@ AC_MSG_RESULT([$with_pcre]) + + dnl To make configuring easier, check for a locally built PCRE using the Tools/pcre-build.sh script + if test x"${with_pcre}" = xyes ; then +- AC_MSG_CHECKING([whether to use local PCRE]) +- local_pcre_config=no +- if test -z $PCRE_CONFIG; then +- if test -f `pwd`/pcre/pcre-swig-install/bin/pcre-config; then +- PCRE_CONFIG=`pwd`/pcre/pcre-swig-install/bin/pcre-config +- local_pcre_config=$PCRE_CONFIG +- fi +- fi +- AC_MSG_RESULT([$local_pcre_config]) +-fi +-AS_IF([test "x$with_pcre" != xno], +- [AX_PATH_GENERIC([pcre], +- [], dnl Minimal version of PCRE we need -- accept any +- [], dnl custom sed script for version parsing is not needed +- [AC_DEFINE([HAVE_PCRE], [1], [Define if you have PCRE library]) +- LIBS="$LIBS $PCRE_LIBS" +- CPPFLAGS="$CPPFLAGS $PCRE_CFLAGS" +- ], +- [AC_MSG_FAILURE([ +- Cannot find pcre-config script from PCRE (Perl Compatible Regular Expressions) +- library package. This dependency is needed for configure to complete, +- Either: +- - Install the PCRE developer package on your system (preferred approach). +- - Download the PCRE source tarball, build and install on your system +- as you would for any package built from source distribution. +- - Use the Tools/pcre-build.sh script to build PCRE just for SWIG to statically +- link against. Run 'Tools/pcre-build.sh --help' for instructions. +- (quite easy and does not require privileges to install PCRE on your system) +- - Use configure --without-pcre to disable regular expressions support in SWIG +- (not recommended).]) +- ]) ++ PKG_CHECK_MODULES([PCRE], [libpcre], [ ++ AC_DEFINE([HAVE_PCRE], [1], [Define if you have PCRE library]) ++ LIBS="$LIBS $PCRE_LIBS" ++ CPPFLAGS="$CPPFLAGS $PCRE_CFLAGS" ++ ], [ ++ AC_MSG_WARN([$PCRE_PKG_ERRORS]) + ]) ++fi + + + dnl CCache +-- diff --git a/device-software/meta-edison-distro/recipes-devtools/swig/swig_3.0.2.bb b/device-software/meta-edison-distro/recipes-devtools/swig/swig_3.0.2.bb new file mode 100644 index 0000000..ac41914 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-devtools/swig/swig_3.0.2.bb @@ -0,0 +1,8 @@ +require ${BPN}.inc + +SRC_URI += "file://0001-Use-proc-self-exe-for-swig-swiglib-on-non-Win32-plat.patch \ + file://0001-configure-use-pkg-config-for-pcre-detection.patch \ + " + +SRC_URI[md5sum] = "62f9b0d010cef36a13a010dc530d0d41" +SRC_URI[sha256sum] = "a2669657cabcedc371f63c0457407a183e0b6b2ef4e7e303c1ec9a3964cc7813" diff --git a/device-software/meta-edison-distro/recipes-multimedia/alsa/alsa-utils_%.bbappend b/device-software/meta-edison-distro/recipes-multimedia/alsa/alsa-utils_%.bbappend new file mode 100644 index 0000000..ae82a2b --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/alsa/alsa-utils_%.bbappend @@ -0,0 +1,13 @@ +# Provide default alsa configuration for Edison + +FILESEXTRAPATHS_prepend := "${THISDIR}/files/" + +SRC_URI += "\ + file://asound.state \ +" + +do_install_append() { + install -v -d ${D}/var/lib/alsa/ + install -m 644 ${WORKDIR}/asound.state ${D}/var/lib/alsa/ +} + diff --git a/device-software/meta-edison-distro/recipes-multimedia/alsa/files/asound.state b/device-software/meta-edison-distro/recipes-multimedia/alsa/files/asound.state new file mode 100644 index 0000000..18aa6e2 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/alsa/files/asound.state @@ -0,0 +1,14141 @@ +state.wm8958audio { + control.1 { + iface MIXER + name 'ssp1_out mux 0' + value fm + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 fm + item.1 bt + } + } + control.2 { + iface MIXER + name 'aware_out aware 0 switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.3 { + iface MIXER + name 'modem_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.4 { + iface MIXER + name 'modem_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.5 { + iface MIXER + name 'modem_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.6 { + iface MIXER + name 'modem_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.7 { + iface MIXER + name 'modem_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.8 { + iface MIXER + name 'modem_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.9 { + iface MIXER + name 'modem_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.10 { + iface MIXER + name 'modem_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.11 { + iface MIXER + name 'modem_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.12 { + iface MIXER + name 'modem_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.13 { + iface MIXER + name 'modem_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.14 { + iface MIXER + name 'modem_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.15 { + iface MIXER + name 'modem_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.16 { + iface MIXER + name 'modem_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.17 { + iface MIXER + name 'modem_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.18 { + iface MIXER + name 'modem_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.19 { + iface MIXER + name 'fm_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.20 { + iface MIXER + name 'fm_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.21 { + iface MIXER + name 'fm_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.22 { + iface MIXER + name 'fm_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.23 { + iface MIXER + name 'fm_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.24 { + iface MIXER + name 'fm_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.25 { + iface MIXER + name 'fm_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.26 { + iface MIXER + name 'fm_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.27 { + iface MIXER + name 'fm_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.28 { + iface MIXER + name 'fm_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.29 { + iface MIXER + name 'fm_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.30 { + iface MIXER + name 'fm_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.31 { + iface MIXER + name 'fm_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.32 { + iface MIXER + name 'fm_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.33 { + iface MIXER + name 'fm_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.34 { + iface MIXER + name 'fm_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.35 { + iface MIXER + name 'bt_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.36 { + iface MIXER + name 'bt_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.37 { + iface MIXER + name 'bt_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.38 { + iface MIXER + name 'bt_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.39 { + iface MIXER + name 'bt_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.40 { + iface MIXER + name 'bt_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.41 { + iface MIXER + name 'bt_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.42 { + iface MIXER + name 'bt_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.43 { + iface MIXER + name 'bt_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.44 { + iface MIXER + name 'bt_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.45 { + iface MIXER + name 'bt_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.46 { + iface MIXER + name 'bt_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.47 { + iface MIXER + name 'bt_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.48 { + iface MIXER + name 'bt_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.49 { + iface MIXER + name 'bt_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.50 { + iface MIXER + name 'bt_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.51 { + iface MIXER + name 'codec_out1 mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.52 { + iface MIXER + name 'codec_out1 mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.53 { + iface MIXER + name 'codec_out1 mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.54 { + iface MIXER + name 'codec_out1 mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.55 { + iface MIXER + name 'codec_out1 mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.56 { + iface MIXER + name 'codec_out1 mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.57 { + iface MIXER + name 'codec_out1 mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.58 { + iface MIXER + name 'codec_out1 mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.59 { + iface MIXER + name 'codec_out1 mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.60 { + iface MIXER + name 'codec_out1 mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.61 { + iface MIXER + name 'codec_out1 mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.62 { + iface MIXER + name 'codec_out1 mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.63 { + iface MIXER + name 'codec_out1 mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.64 { + iface MIXER + name 'codec_out1 mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.65 { + iface MIXER + name 'codec_out1 mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.66 { + iface MIXER + name 'codec_out1 mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.67 { + iface MIXER + name 'codec_out0 mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.68 { + iface MIXER + name 'codec_out0 mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.69 { + iface MIXER + name 'codec_out0 mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.70 { + iface MIXER + name 'codec_out0 mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.71 { + iface MIXER + name 'codec_out0 mix 0 sprot_loop_in' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.72 { + iface MIXER + name 'codec_out0 mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.73 { + iface MIXER + name 'codec_out0 mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.74 { + iface MIXER + name 'codec_out0 mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.75 { + iface MIXER + name 'codec_out0 mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.76 { + iface MIXER + name 'codec_out0 mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.77 { + iface MIXER + name 'codec_out0 mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.78 { + iface MIXER + name 'codec_out0 mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.79 { + iface MIXER + name 'codec_out0 mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.80 { + iface MIXER + name 'codec_out0 mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.81 { + iface MIXER + name 'codec_out0 mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.82 { + iface MIXER + name 'codec_out0 mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.83 { + iface MIXER + name 'rxspeech_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.84 { + iface MIXER + name 'rxspeech_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.85 { + iface MIXER + name 'rxspeech_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.86 { + iface MIXER + name 'rxspeech_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.87 { + iface MIXER + name 'rxspeech_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.88 { + iface MIXER + name 'rxspeech_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.89 { + iface MIXER + name 'rxspeech_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.90 { + iface MIXER + name 'rxspeech_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.91 { + iface MIXER + name 'rxspeech_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.92 { + iface MIXER + name 'rxspeech_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.93 { + iface MIXER + name 'rxspeech_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.94 { + iface MIXER + name 'rxspeech_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.95 { + iface MIXER + name 'rxspeech_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.96 { + iface MIXER + name 'rxspeech_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.97 { + iface MIXER + name 'rxspeech_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.98 { + iface MIXER + name 'rxspeech_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.99 { + iface MIXER + name 'speech_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.100 { + iface MIXER + name 'speech_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.101 { + iface MIXER + name 'speech_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.102 { + iface MIXER + name 'speech_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.103 { + iface MIXER + name 'speech_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.104 { + iface MIXER + name 'speech_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.105 { + iface MIXER + name 'speech_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.106 { + iface MIXER + name 'speech_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.107 { + iface MIXER + name 'speech_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.108 { + iface MIXER + name 'speech_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.109 { + iface MIXER + name 'speech_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.110 { + iface MIXER + name 'speech_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.111 { + iface MIXER + name 'speech_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.112 { + iface MIXER + name 'speech_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.113 { + iface MIXER + name 'speech_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.114 { + iface MIXER + name 'speech_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.115 { + iface MIXER + name 'hf_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.116 { + iface MIXER + name 'hf_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.117 { + iface MIXER + name 'hf_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.118 { + iface MIXER + name 'hf_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.119 { + iface MIXER + name 'hf_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.120 { + iface MIXER + name 'hf_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.121 { + iface MIXER + name 'hf_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.122 { + iface MIXER + name 'hf_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.123 { + iface MIXER + name 'hf_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.124 { + iface MIXER + name 'hf_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.125 { + iface MIXER + name 'hf_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.126 { + iface MIXER + name 'hf_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.127 { + iface MIXER + name 'hf_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.128 { + iface MIXER + name 'hf_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.129 { + iface MIXER + name 'hf_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.130 { + iface MIXER + name 'hf_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.131 { + iface MIXER + name 'hf_sns_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.132 { + iface MIXER + name 'hf_sns_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.133 { + iface MIXER + name 'hf_sns_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.134 { + iface MIXER + name 'hf_sns_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.135 { + iface MIXER + name 'hf_sns_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.136 { + iface MIXER + name 'hf_sns_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.137 { + iface MIXER + name 'hf_sns_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.138 { + iface MIXER + name 'hf_sns_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.139 { + iface MIXER + name 'hf_sns_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.140 { + iface MIXER + name 'hf_sns_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.141 { + iface MIXER + name 'hf_sns_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.142 { + iface MIXER + name 'hf_sns_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.143 { + iface MIXER + name 'hf_sns_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.144 { + iface MIXER + name 'hf_sns_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.145 { + iface MIXER + name 'hf_sns_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.146 { + iface MIXER + name 'hf_sns_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.147 { + iface MIXER + name 'vad_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.148 { + iface MIXER + name 'vad_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.149 { + iface MIXER + name 'vad_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.150 { + iface MIXER + name 'vad_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.151 { + iface MIXER + name 'vad_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.152 { + iface MIXER + name 'vad_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.153 { + iface MIXER + name 'vad_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.154 { + iface MIXER + name 'vad_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.155 { + iface MIXER + name 'vad_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.156 { + iface MIXER + name 'vad_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.157 { + iface MIXER + name 'vad_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.158 { + iface MIXER + name 'vad_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.159 { + iface MIXER + name 'vad_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.160 { + iface MIXER + name 'vad_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.161 { + iface MIXER + name 'vad_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.162 { + iface MIXER + name 'vad_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.163 { + iface MIXER + name 'aware_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.164 { + iface MIXER + name 'aware_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.165 { + iface MIXER + name 'aware_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.166 { + iface MIXER + name 'aware_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.167 { + iface MIXER + name 'aware_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.168 { + iface MIXER + name 'aware_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.169 { + iface MIXER + name 'aware_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.170 { + iface MIXER + name 'aware_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.171 { + iface MIXER + name 'aware_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.172 { + iface MIXER + name 'aware_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.173 { + iface MIXER + name 'aware_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.174 { + iface MIXER + name 'aware_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.175 { + iface MIXER + name 'aware_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.176 { + iface MIXER + name 'aware_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.177 { + iface MIXER + name 'aware_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.178 { + iface MIXER + name 'aware_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.179 { + iface MIXER + name 'voip_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.180 { + iface MIXER + name 'voip_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.181 { + iface MIXER + name 'voip_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.182 { + iface MIXER + name 'voip_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.183 { + iface MIXER + name 'voip_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.184 { + iface MIXER + name 'voip_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.185 { + iface MIXER + name 'voip_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.186 { + iface MIXER + name 'voip_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.187 { + iface MIXER + name 'voip_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.188 { + iface MIXER + name 'voip_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.189 { + iface MIXER + name 'voip_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.190 { + iface MIXER + name 'voip_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.191 { + iface MIXER + name 'voip_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.192 { + iface MIXER + name 'voip_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.193 { + iface MIXER + name 'voip_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.194 { + iface MIXER + name 'voip_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.195 { + iface MIXER + name 'media_loop2_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.196 { + iface MIXER + name 'media_loop2_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.197 { + iface MIXER + name 'media_loop2_out mix 0 codec_in0' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.198 { + iface MIXER + name 'media_loop2_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.199 { + iface MIXER + name 'media_loop2_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.200 { + iface MIXER + name 'media_loop2_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.201 { + iface MIXER + name 'media_loop2_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.202 { + iface MIXER + name 'media_loop2_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.203 { + iface MIXER + name 'media_loop2_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.204 { + iface MIXER + name 'media_loop2_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.205 { + iface MIXER + name 'media_loop2_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.206 { + iface MIXER + name 'media_loop2_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.207 { + iface MIXER + name 'media_loop2_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.208 { + iface MIXER + name 'media_loop2_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.209 { + iface MIXER + name 'media_loop2_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.210 { + iface MIXER + name 'media_loop2_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.211 { + iface MIXER + name 'media_loop1_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.212 { + iface MIXER + name 'media_loop1_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.213 { + iface MIXER + name 'media_loop1_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.214 { + iface MIXER + name 'media_loop1_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.215 { + iface MIXER + name 'media_loop1_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.216 { + iface MIXER + name 'media_loop1_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.217 { + iface MIXER + name 'media_loop1_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.218 { + iface MIXER + name 'media_loop1_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.219 { + iface MIXER + name 'media_loop1_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.220 { + iface MIXER + name 'media_loop1_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.221 { + iface MIXER + name 'media_loop1_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.222 { + iface MIXER + name 'media_loop1_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.223 { + iface MIXER + name 'media_loop1_out mix 0 pcm0_in' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.224 { + iface MIXER + name 'media_loop1_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.225 { + iface MIXER + name 'media_loop1_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.226 { + iface MIXER + name 'media_loop1_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.227 { + iface MIXER + name 'sprot_loop_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.228 { + iface MIXER + name 'sprot_loop_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.229 { + iface MIXER + name 'sprot_loop_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.230 { + iface MIXER + name 'sprot_loop_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.231 { + iface MIXER + name 'sprot_loop_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.232 { + iface MIXER + name 'sprot_loop_out mix 0 media_loop1_in' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.233 { + iface MIXER + name 'sprot_loop_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.234 { + iface MIXER + name 'sprot_loop_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.235 { + iface MIXER + name 'sprot_loop_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.236 { + iface MIXER + name 'sprot_loop_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.237 { + iface MIXER + name 'sprot_loop_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.238 { + iface MIXER + name 'sprot_loop_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.239 { + iface MIXER + name 'sprot_loop_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.240 { + iface MIXER + name 'sprot_loop_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.241 { + iface MIXER + name 'sprot_loop_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.242 { + iface MIXER + name 'sprot_loop_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.243 { + iface MIXER + name 'pcm2_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.244 { + iface MIXER + name 'pcm2_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.245 { + iface MIXER + name 'pcm2_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.246 { + iface MIXER + name 'pcm2_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.247 { + iface MIXER + name 'pcm2_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.248 { + iface MIXER + name 'pcm2_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.249 { + iface MIXER + name 'pcm2_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.250 { + iface MIXER + name 'pcm2_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.251 { + iface MIXER + name 'pcm2_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.252 { + iface MIXER + name 'pcm2_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.253 { + iface MIXER + name 'pcm2_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.254 { + iface MIXER + name 'pcm2_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.255 { + iface MIXER + name 'pcm2_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.256 { + iface MIXER + name 'pcm2_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.257 { + iface MIXER + name 'pcm2_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.258 { + iface MIXER + name 'pcm2_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.259 { + iface MIXER + name 'pcm1_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.260 { + iface MIXER + name 'pcm1_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.261 { + iface MIXER + name 'pcm1_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.262 { + iface MIXER + name 'pcm1_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.263 { + iface MIXER + name 'pcm1_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.264 { + iface MIXER + name 'pcm1_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.265 { + iface MIXER + name 'pcm1_out mix 0 media_loop2_in' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.266 { + iface MIXER + name 'pcm1_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.267 { + iface MIXER + name 'pcm1_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.268 { + iface MIXER + name 'pcm1_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.269 { + iface MIXER + name 'pcm1_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.270 { + iface MIXER + name 'pcm1_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.271 { + iface MIXER + name 'pcm1_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.272 { + iface MIXER + name 'pcm1_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.273 { + iface MIXER + name 'pcm1_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.274 { + iface MIXER + name 'pcm1_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.275 { + iface MIXER + name 'pcm0_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.276 { + iface MIXER + name 'pcm0_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.277 { + iface MIXER + name 'pcm0_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.278 { + iface MIXER + name 'pcm0_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.279 { + iface MIXER + name 'pcm0_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.280 { + iface MIXER + name 'pcm0_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.281 { + iface MIXER + name 'pcm0_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.282 { + iface MIXER + name 'pcm0_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.283 { + iface MIXER + name 'pcm0_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.284 { + iface MIXER + name 'pcm0_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.285 { + iface MIXER + name 'pcm0_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.286 { + iface MIXER + name 'pcm0_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.287 { + iface MIXER + name 'pcm0_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.288 { + iface MIXER + name 'pcm0_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.289 { + iface MIXER + name 'pcm0_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.290 { + iface MIXER + name 'pcm0_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.291 { + iface MIXER + name 'media1_out mix 0 media0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.292 { + iface MIXER + name 'media1_out mix 0 media1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.293 { + iface MIXER + name 'media1_out mix 0 media2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.294 { + iface MIXER + name 'media1_out mix 0 media3_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.295 { + iface MIXER + name 'media0_out mix 0 media0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.296 { + iface MIXER + name 'media0_out mix 0 media1_in' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.297 { + iface MIXER + name 'media0_out mix 0 media2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.298 { + iface MIXER + name 'media0_out mix 0 media3_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.299 { + iface MIXER + name 'media0_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.300 { + iface MIXER + name 'media0_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.301 { + iface MIXER + name 'media0_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.302 { + iface MIXER + name 'media1_in gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.303 { + iface MIXER + name 'media1_in gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.304 { + iface MIXER + name 'media1_in gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.305 { + iface MIXER + name 'media2_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.306 { + iface MIXER + name 'media2_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.307 { + iface MIXER + name 'media2_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.308 { + iface MIXER + name 'media3_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.309 { + iface MIXER + name 'media3_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.310 { + iface MIXER + name 'media3_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.311 { + iface MIXER + name 'pcm0_in gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.312 { + iface MIXER + name 'pcm0_in gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.313 { + iface MIXER + name 'pcm0_in gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.314 { + iface MIXER + name 'pcm1_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.315 { + iface MIXER + name 'pcm1_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.316 { + iface MIXER + name 'pcm1_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.317 { + iface MIXER + name 'low_pcm0_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.318 { + iface MIXER + name 'low_pcm0_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.319 { + iface MIXER + name 'low_pcm0_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.320 { + iface MIXER + name 'pcm1_out gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.321 { + iface MIXER + name 'pcm1_out gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.322 { + iface MIXER + name 'pcm1_out gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.323 { + iface MIXER + name 'pcm2_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.324 { + iface MIXER + name 'pcm2_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.325 { + iface MIXER + name 'pcm2_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.326 { + iface MIXER + name 'voip_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.327 { + iface MIXER + name 'voip_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.328 { + iface MIXER + name 'voip_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.329 { + iface MIXER + name 'voip_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.330 { + iface MIXER + name 'voip_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.331 { + iface MIXER + name 'voip_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.332 { + iface MIXER + name 'tone_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.333 { + iface MIXER + name 'tone_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.334 { + iface MIXER + name 'tone_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.335 { + iface MIXER + name 'aware_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.336 { + iface MIXER + name 'aware_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.337 { + iface MIXER + name 'aware_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.338 { + iface MIXER + name 'vad_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.339 { + iface MIXER + name 'vad_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.340 { + iface MIXER + name 'vad_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.341 { + iface MIXER + name 'hf_sns_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.342 { + iface MIXER + name 'hf_sns_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.343 { + iface MIXER + name 'hf_sns_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.344 { + iface MIXER + name 'hf_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.345 { + iface MIXER + name 'hf_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.346 { + iface MIXER + name 'hf_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.347 { + iface MIXER + name 'speech_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.348 { + iface MIXER + name 'speech_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.349 { + iface MIXER + name 'speech_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.350 { + iface MIXER + name 'txspeech_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.351 { + iface MIXER + name 'txspeech_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.352 { + iface MIXER + name 'txspeech_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.353 { + iface MIXER + name 'rxspeech_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.354 { + iface MIXER + name 'rxspeech_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.355 { + iface MIXER + name 'rxspeech_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.356 { + iface MIXER + name 'speech_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.357 { + iface MIXER + name 'speech_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.358 { + iface MIXER + name 'speech_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.359 { + iface MIXER + name 'codec_in0 gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.360 { + iface MIXER + name 'codec_in0 gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.361 { + iface MIXER + name 'codec_in0 gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.362 { + iface MIXER + name 'codec_in1 gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.363 { + iface MIXER + name 'codec_in1 gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.364 { + iface MIXER + name 'codec_in1 gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.365 { + iface MIXER + name 'codec_out0 gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.366 { + iface MIXER + name 'codec_out0 gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.367 { + iface MIXER + name 'codec_out0 gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.368 { + iface MIXER + name 'codec_out1 gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.369 { + iface MIXER + name 'codec_out1 gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.370 { + iface MIXER + name 'codec_out1 gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.371 { + iface MIXER + name 'bt_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.372 { + iface MIXER + name 'bt_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.373 { + iface MIXER + name 'bt_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.374 { + iface MIXER + name 'fm_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.375 { + iface MIXER + name 'fm_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.376 { + iface MIXER + name 'fm_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.377 { + iface MIXER + name 'bt_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.378 { + iface MIXER + name 'bt_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.379 { + iface MIXER + name 'bt_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.380 { + iface MIXER + name 'fm_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.381 { + iface MIXER + name 'fm_in gain 0 mute' + value true + comment { + access 'read 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+ } + control.387 { + iface MIXER + name 'modem_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.388 { + iface MIXER + name 'modem_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.389 { + iface MIXER + name 'media_loop1_out gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.390 { + iface MIXER + name 'media_loop1_out gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.391 { + iface MIXER + name 'media_loop1_out gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.392 { + iface MIXER + name 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'-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.398 { + iface MIXER + name 'media0_in volume 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.399 { + iface MIXER + name 'media0_in volume 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.400 { + iface MIXER + name 'media0_in volume 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.401 { + iface MIXER + name 'sidetone_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.402 { + iface MIXER + name 'sidetone_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.403 { + iface MIXER + name 'sidetone_in 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iface MIXER + name 'speech_out ul_module 0 params sns' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 324 + } + } + control.431 { + iface MIXER + name 'speech_out ul_module 0 params ser' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 42 + } + } + control.432 { + iface MIXER + name 'speech_out ul_module 0 params cni' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 48 + } + } + control.433 { + iface MIXER + name 'speech_out ul_module 0 params ref' + value '000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 24 + } + } + control.434 { + iface MIXER + name 'speech_out ul_module 0 params delay' + value '000000000000' + comment { + access 'read write' + type BYTES + count 6 + } + } + control.435 { + iface MIXER + name 'speech_out ul_module 0 params bmf' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 264 + } + } + control.436 { + iface MIXER + name 'speech_out ul_module 0 params dnr' + value '000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 18 + } + } + control.437 { + iface MIXER + name 'speech_in dl_module 0 params ana' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 52 + } + } + control.438 { + iface MIXER + name 'speech_in dl_module 0 params fir' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 136 + } + } + control.439 { + iface MIXER + name 'speech_in dl_module 0 params iir' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 48 + } + } + control.440 { + iface MIXER + name 'speech_in dl_module 0 params nr' + value '0000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 38 + } + } + control.441 { + iface MIXER + name 'speech_in dl_module 0 params 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'00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' 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codec_out1_0 + item.4 codec_out1_1 + } + } + control.450 { + iface MIXER + name 'codec_out interleaver slot 3' + value codec_out1_1 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 codec_out0_0 + item.2 codec_out0_1 + item.3 codec_out1_0 + item.4 codec_out1_1 + } + } + control.451 { + iface MIXER + name 'codec_in deinterleaver codec_in0_0' + value 'slot 0' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 'slot 0' + item.2 'slot 1' + item.3 'slot 2' + item.4 'slot 3' + } + } + control.452 { + iface MIXER + name 'codec_in deinterleaver codec_in0_1' + value 'slot 1' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 'slot 0' + item.2 'slot 1' + item.3 'slot 2' + item.4 'slot 3' + } + } + control.453 { + iface MIXER + name 'codec_in deinterleaver codec_in1_0' + value none + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 'slot 0' + item.2 'slot 1' + item.3 'slot 2' + item.4 'slot 3' + } + } + control.454 { + iface MIXER + name 'codec_in deinterleaver codec_in1_1' + value none + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 'slot 0' + item.2 'slot 1' + item.3 'slot 2' + item.4 'slot 3' + } + } + control.455 { + iface MIXER + name 'domain voice mode 0' + value narrowband + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 narrowband + item.1 wideband + } + } + control.456 { + iface MIXER + name 'domain bt mode 0' + value narrowband + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 narrowband + item.1 wideband + } + } + control.457 { + iface MIXER + name 'sst debug byte control' + value '0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 512 + } + } + control.458 { + iface MIXER + name 'probe out0 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.459 { + iface MIXER + name 'probe out1 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.460 { + iface MIXER + name 'probe out2 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.461 { + iface MIXER + name 'probe out3 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.462 { + iface MIXER + name 'probe out4 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.463 { + iface MIXER + name 'probe out5 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.464 { + iface MIXER + name 'probe out6 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.465 { + iface MIXER + name 'probe out7 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.466 { + iface MIXER + name 'probe in0 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.467 { + iface MIXER + name 'probe in1 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.468 { + iface MIXER + name 'probe in2 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.469 { + iface MIXER + name 'probe in3 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.470 { + iface MIXER + name 'probe in4 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.471 { + iface MIXER + name 'probe in5 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.472 { + iface MIXER + name 'probe in6 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.473 { + iface MIXER + name 'probe in7 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.474 { + iface MIXER + name 'AIF1.1 DRC' + value '00980845000000000000' + comment { + access 'read write' + type BYTES + count 10 + } + } + control.475 { + iface MIXER + name 'AIF1.2 DRC' + value '00980845000000000000' + comment { + access 'read write' + type BYTES + count 10 + } + } + control.476 { + iface MIXER + name 'AIF2 DRC' + value '00980845000000000000' + comment { + access 'read write' + type BYTES + count 10 + } + } + control.477 { + iface MIXER + name 'AIF1DAC1 EQ1 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.478 { + iface MIXER + name 'AIF1DAC1 EQ2 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.479 { + iface MIXER + name 'AIF1DAC1 EQ3 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.480 { + iface MIXER + name 'AIF1DAC1 EQ4 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.481 { + iface MIXER + name 'AIF1DAC1 EQ5 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.482 { + iface MIXER + name 'AIF1DAC2 EQ1 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.483 { + iface MIXER + name 'AIF1DAC2 EQ2 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.484 { + iface MIXER + name 'AIF1DAC2 EQ3 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.485 { + iface MIXER + name 'AIF1DAC2 EQ4 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.486 { + iface MIXER + name 'AIF1DAC2 EQ5 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.487 { + iface MIXER + name 'AIF2 EQ1 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.488 { + iface MIXER + name 'AIF2 EQ2 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.489 { + iface MIXER + name 'AIF2 EQ3 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.490 { + iface MIXER + name 'AIF2 EQ4 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.491 { + iface MIXER + name 'AIF2 EQ5 Volume' + value 12 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1200 + dbmax 1900 + dbvalue.0 0 + } + } + control.492 { + iface MIXER + name 'IN1L Volume' + value 11 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1650 + dbmax 3000 + dbvalue.0 0 + } + } + control.493 { + iface MIXER + name 'IN1L Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.494 { + iface MIXER + name 'IN1L ZC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.495 { + iface MIXER + name 'IN1R Volume' + value 11 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1650 + dbmax 3000 + dbvalue.0 0 + } + } + control.496 { + iface MIXER + name 'IN1R Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.497 { + iface MIXER + name 'IN1R ZC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.498 { + iface MIXER + name 'IN2L Volume' + value 11 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1650 + dbmax 3000 + dbvalue.0 0 + } + } + control.499 { + iface MIXER + name 'IN2L Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.500 { + iface MIXER + name 'IN2L ZC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.501 { + iface MIXER + name 'IN2R Volume' + value 11 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 31' + dbmin -1650 + dbmax 3000 + dbvalue.0 0 + } + } + control.502 { + iface MIXER + name 'IN2R Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.503 { + iface MIXER + name 'IN2R ZC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.504 { + iface MIXER + name 'MIXINL IN2L Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin 0 + dbmax 3000 + dbvalue.0 0 + } + } + control.505 { + iface MIXER + name 'MIXINL IN1L Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin 0 + dbmax 3000 + dbvalue.0 0 + } + } + control.506 { + iface MIXER + name 'MIXINL Output Record Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -9999999 + dbmax 600 + dbvalue.0 -9999999 + } + } + control.507 { + iface MIXER + name 'MIXINL IN1LP Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -9999999 + dbmax 600 + dbvalue.0 -9999999 + } + } + control.508 { + iface MIXER + name 'MIXINL Direct Voice Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 6' + dbmin -9999999 + dbmax 300 + dbvalue.0 -9999999 + } + } + control.509 { + iface MIXER + name 'MIXINR IN2R Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin 0 + dbmax 3000 + dbvalue.0 0 + } + } + control.510 { + iface MIXER + name 'MIXINR IN1R Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin 0 + dbmax 3000 + dbvalue.0 0 + } + } + control.511 { + iface MIXER + name 'MIXINR Output Record Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -9999999 + dbmax 600 + dbvalue.0 -9999999 + } + } + control.512 { + iface MIXER + name 'MIXINR IN1RP Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -9999999 + dbmax 600 + dbvalue.0 -9999999 + } + } + control.513 { + iface MIXER + name 'MIXINR Direct Voice Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 6' + dbmin -9999999 + dbmax 300 + dbvalue.0 -9999999 + } + } + control.514 { + iface MIXER + name 'Left Output Mixer IN2RN Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.515 { + iface MIXER + name 'Left Output Mixer IN2LN Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.516 { + iface MIXER + name 'Left Output Mixer IN2LP Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.517 { + iface MIXER + name 'Left Output Mixer IN1L Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.518 { + iface MIXER + name 'Left Output Mixer IN1R Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.519 { + iface MIXER + name 'Left Output Mixer Right Input Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.520 { + iface MIXER + name 'Left Output Mixer Left Input Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.521 { + iface MIXER + name 'Left Output Mixer DAC Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.522 { + iface MIXER + name 'Right Output Mixer IN2LN Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.523 { + iface MIXER + name 'Right Output Mixer IN2RN Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.524 { + iface MIXER + name 'Right Output Mixer IN1L Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.525 { + iface MIXER + name 'Right Output Mixer IN1R Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.526 { + iface MIXER + name 'Right Output Mixer IN2RP Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.527 { + iface MIXER + name 'Right Output Mixer Left Input Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.528 { + iface MIXER + name 'Right Output Mixer Right Input Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.529 { + iface MIXER + name 'Right Output Mixer DAC Volume' + value 7 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -2100 + dbmax 0 + dbvalue.0 0 + } + } + control.530 { + iface MIXER + name 'Output Volume' + value.0 57 + value.1 57 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 63' + dbmin -5700 + dbmax 600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.531 { + iface MIXER + name 'Output Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.532 { + iface MIXER + name 'Output ZC Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.533 { + iface MIXER + name 'Earpiece Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.534 { + iface MIXER + name 'Earpiece Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -600 + dbmax 0 + dbvalue.0 0 + } + } + control.535 { + iface MIXER + name 'SPKL Input Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -300 + dbmax 0 + dbvalue.0 0 + } + } + control.536 { + iface MIXER + name 'SPKL IN1LP Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -300 + dbmax 0 + dbvalue.0 0 + } + } + control.537 { + iface MIXER + name 'SPKL Output Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -300 + dbmax 0 + dbvalue.0 0 + } + } + control.538 { + iface MIXER + name 'SPKR Input Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -300 + dbmax 0 + dbvalue.0 0 + } + } + control.539 { + iface MIXER + name 'SPKR IN1RP Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -300 + dbmax 0 + dbvalue.0 0 + } + } + control.540 { + iface MIXER + name 'SPKR Output Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -300 + dbmax 0 + dbvalue.0 0 + } + } + control.541 { + iface MIXER + name 'Speaker Mixer Volume' + value.0 3 + value.1 3 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 3' + dbmin -9999999 + dbmax 0 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.542 { + iface MIXER + name 'Speaker Volume' + value.0 57 + value.1 57 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 63' + dbmin -5700 + dbmax 600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.543 { + iface MIXER + name 'Speaker Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.544 { + iface MIXER + name 'Speaker ZC Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.545 { + iface MIXER + name 'Speaker Boost Volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 7' + dbmin 0 + dbmax 1200 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.546 { + iface MIXER + name 'Speaker Reference' + value SPKVDD/2 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 SPKVDD/2 + item.1 VMID + } + } + control.547 { + iface MIXER + name 'Speaker Mode' + value 'Class D' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'Class D' + item.1 'Class AB' + } + } + control.548 { + iface MIXER + name 'Headphone Volume' + value.0 45 + value.1 45 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 63' + dbmin -5700 + dbmax 600 + dbvalue.0 -1200 + dbvalue.1 -1200 + } + } + control.549 { + iface MIXER + name 'Headphone Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.550 { + iface MIXER + name 'Headphone ZC Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.551 { + iface MIXER + name 'LINEOUT1N Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.552 { + iface MIXER + name 'LINEOUT1P Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.553 { + iface MIXER + name 'LINEOUT1 Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -600 + dbmax 0 + dbvalue.0 0 + } + } + control.554 { + iface MIXER + name 'LINEOUT2N Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.555 { + iface MIXER + name 'LINEOUT2P Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.556 { + iface MIXER + name 'LINEOUT2 Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -600 + dbmax 0 + dbvalue.0 0 + } + } + control.557 { + iface MIXER + name 'AIF1ADC1 Volume' + value.0 110 + value.1 110 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 120' + dbmin -9999999 + dbmax 1800 + dbvalue.0 1050 + dbvalue.1 1050 + } + } + control.558 { + iface MIXER + name 'AIF1ADC2 Volume' + value.0 96 + value.1 96 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 120' + dbmin -9999999 + dbmax 1800 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.559 { + iface MIXER + name 'AIF2ADC Volume' + value.0 96 + value.1 96 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 120' + dbmin -9999999 + dbmax 1800 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.560 { + iface MIXER + name 'AIF1ADCL Source' + value Left + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Left + item.1 Right + } + } + control.561 { + iface MIXER + name 'AIF1ADCR Source' + value Right + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Left + item.1 Right + } + } + control.562 { + iface MIXER + name 'AIF2ADCL Source' + value Left + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Left + item.1 Right + } + } + control.563 { + iface MIXER + name 'AIF2ADCR Source' + value Right + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Left + item.1 Right + } + } + control.564 { + iface MIXER + name 'AIF1DACL Source' + value Left + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Left + item.1 Right + } + } + control.565 { + iface MIXER + name 'AIF1DACR Source' + value Right + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Left + item.1 Right + } + } + control.566 { + iface MIXER + name 'AIF2DACL Source' + value Left + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Left + item.1 Right + } + } + control.567 { + iface MIXER + name 'AIF2DACR Source' + value Right + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Left + item.1 Right + } + } + control.568 { + iface MIXER + name 'AIF1DAC1 Volume' + value.0 96 + value.1 96 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 96' + dbmin -9999999 + dbmax 0 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.569 { + iface MIXER + name 'AIF1DAC2 Volume' + value.0 96 + value.1 96 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 96' + dbmin -9999999 + dbmax 0 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.570 { + iface MIXER + name 'AIF2DAC Volume' + value.0 96 + value.1 96 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 96' + dbmin -9999999 + dbmax 0 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.571 { + iface MIXER + name 'AIF1 Boost Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 3' + dbmin 0 + dbmax 1800 + dbvalue.0 0 + } + } + control.572 { + iface MIXER + name 'AIF2 Boost Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 3' + dbmin 0 + dbmax 1800 + dbvalue.0 0 + } + } + control.573 { + iface MIXER + name 'AIF1DAC1 EQ Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.574 { + iface MIXER + name 'AIF1DAC2 EQ Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.575 { + iface MIXER + name 'AIF2 EQ Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.576 { + iface MIXER + name 'AIF1DAC1 DRC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.577 { + iface MIXER + name 'AIF1ADC1L DRC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.578 { + iface MIXER + name 'AIF1ADC1R DRC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.579 { + iface MIXER + name 'AIF1DAC2 DRC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.580 { + iface MIXER + name 'AIF1ADC2L DRC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.581 { + iface MIXER + name 'AIF1ADC2R DRC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.582 { + iface MIXER + name 'AIF2DAC DRC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.583 { + iface MIXER + name 'AIF2ADCL DRC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.584 { + iface MIXER + name 'AIF2ADCR DRC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.585 { + iface MIXER + name 'DAC1 Right Sidetone Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 12' + dbmin -3600 + dbmax 0 + dbvalue.0 -3600 + } + } + control.586 { + iface MIXER + name 'DAC1 Left Sidetone Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 12' + dbmin -3600 + dbmax 0 + dbvalue.0 -3600 + } + } + control.587 { + iface MIXER + name 'DAC2 Right Sidetone Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 12' + dbmin -3600 + dbmax 0 + dbvalue.0 -3600 + } + } + control.588 { + iface MIXER + name 'DAC2 Left Sidetone Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 12' + dbmin -3600 + dbmax 0 + dbvalue.0 -3600 + } + } + control.589 { + iface MIXER + name 'Sidetone HPF Mux' + value '2.7kHz' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 '2.7kHz' + item.1 '1.35kHz' + item.2 '675Hz' + item.3 '370Hz' + item.4 '180Hz' + item.5 '90Hz' + item.6 '45Hz' + } + } + control.590 { + iface MIXER + name 'Sidetone HPF Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.591 { + iface MIXER + name 'AIF1ADC1 HPF Mode' + value HiFi + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 HiFi + item.1 'Voice 1' + item.2 'Voice 2' + item.3 'Voice 3' + } + } + control.592 { + iface MIXER + name 'AIF1ADC1 HPF Switch' + value.0 false + value.1 false + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.593 { + iface MIXER + name 'AIF1ADC2 HPF Mode' + value HiFi + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 HiFi + item.1 'Voice 1' + item.2 'Voice 2' + item.3 'Voice 3' + } + } + control.594 { + iface MIXER + name 'AIF1ADC2 HPF Switch' + value.0 false + value.1 false + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.595 { + iface MIXER + name 'AIF2ADC HPF Mode' + value HiFi + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 HiFi + item.1 'Voice 1' + item.2 'Voice 2' + item.3 'Voice 3' + } + } + control.596 { + iface MIXER + name 'AIF2ADC HPF Switch' + value.0 false + value.1 false + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.597 { + iface MIXER + name 'ADC OSR' + value 'High Performance' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'Low Power' + item.1 'High Performance' + } + } + control.598 { + iface MIXER + name 'DAC OSR' + value 'Low Power' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'Low Power' + item.1 'High Performance' + } + } + control.599 { + iface MIXER + name 'DAC1 Volume' + value.0 96 + value.1 96 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 112' + dbmin -9999999 + dbmax 1200 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.600 { + iface MIXER + name 'DAC1 Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.601 { + iface MIXER + name 'DAC2 Volume' + value.0 96 + value.1 96 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 112' + dbmin -9999999 + dbmax 1200 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.602 { + iface MIXER + name 'DAC2 Switch' + value.0 false + value.1 false + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.603 { + iface MIXER + name 'SPKL DAC2 Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -300 + dbmax 0 + dbvalue.0 0 + } + } + control.604 { + iface MIXER + name 'SPKL DAC1 Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -300 + dbmax 0 + dbvalue.0 0 + } + } + control.605 { + iface MIXER + name 'SPKR DAC2 Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -300 + dbmax 0 + dbvalue.0 0 + } + } + control.606 { + iface MIXER + name 'SPKR DAC1 Volume' + value 1 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 1' + dbmin -300 + dbmax 0 + dbvalue.0 0 + } + } + control.607 { + iface MIXER + name 'AIF1DAC1 3D Stereo Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 15' + dbmin -1600 + dbmax 1145 + dbvalue.0 -1600 + } + } + control.608 { + iface MIXER + name 'AIF1DAC1 3D Stereo Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.609 { + iface MIXER + name 'AIF1DAC2 3D Stereo Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 15' + dbmin -1600 + dbmax 1145 + dbvalue.0 -1600 + } + } + control.610 { + iface MIXER + name 'AIF1DAC2 3D Stereo Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.611 { + iface MIXER + name 'AIF2DAC 3D Stereo Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 15' + dbmin -1600 + dbmax 1145 + dbvalue.0 -1600 + } + } + control.612 { + iface MIXER + name 'AIF2DAC 3D Stereo Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.613 { + iface MIXER + name 'MIXINL MIXOUTL Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin 0 + dbmax 6300 + dbvalue.0 0 + } + } + control.614 { + iface MIXER + name 'MIXINR MIXOUTR Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin 0 + dbmax 6300 + dbvalue.0 0 + } + } + control.615 { + iface MIXER + name 'AIF3 Boost Volume' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 3' + dbmin 0 + dbmax 1800 + dbvalue.0 0 + } + } + control.616 { + iface MIXER + name 'AIF1DAC1 Noise Gate Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.617 { + iface MIXER + name 'AIF1DAC1 Noise Gate Hold Time' + value '30ms' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 '30ms' + item.1 '125ms' + item.2 '250ms' + item.3 '500ms' + } + } + control.618 { + iface MIXER + name 'AIF1DAC1 Noise Gate Threshold Volume' + value 3 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -10200 + dbmax -6000 + dbvalue.0 -8400 + } + } + control.619 { + iface MIXER + name 'AIF1DAC2 Noise Gate Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.620 { + iface MIXER + name 'AIF1DAC2 Noise Gate Hold Time' + value '30ms' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 '30ms' + item.1 '125ms' + item.2 '250ms' + item.3 '500ms' + } + } + control.621 { + iface MIXER + name 'AIF1DAC2 Noise Gate Threshold Volume' + value 3 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -10200 + dbmax -6000 + dbvalue.0 -8400 + } + } + control.622 { + iface MIXER + name 'AIF2DAC Noise Gate Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.623 { + iface MIXER + name 'AIF2DAC Noise Gate Hold Time' + value '30ms' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 '30ms' + item.1 '125ms' + item.2 '250ms' + item.3 '500ms' + } + } + control.624 { + iface MIXER + name 'AIF2DAC Noise Gate Threshold Volume' + value 3 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + dbmin -10200 + dbmax -6000 + dbvalue.0 -8400 + } + } + control.625 { + iface MIXER + name 'AIF1DAC1 MBC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.626 { + iface MIXER + name 'AIF1DAC2 MBC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.627 { + iface MIXER + name 'AIF2DAC MBC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.628 { + iface MIXER + name 'AIF1DAC1 VSS Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.629 { + iface MIXER + name 'AIF1DAC2 VSS Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.630 { + iface MIXER + name 'AIF2DAC VSS Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.631 { + iface MIXER + name 'AIF1DAC1 HPF1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.632 { + iface MIXER + name 'AIF1DAC2 HPF1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.633 { + iface MIXER + name 'AIF2DAC HPF1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.634 { + iface MIXER + name 'AIF1DAC1 HPF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.635 { + iface MIXER + name 'AIF1DAC2 HPF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.636 { + iface MIXER + name 'AIF2DAC HPF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.637 { + iface MIXER + name 'AIF1DAC1 Enhanced EQ Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.638 { + iface MIXER + name 'AIF1DAC2 Enhanced EQ Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.639 { + iface MIXER + name 'AIF2DAC Enhanced EQ Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.640 { + iface MIXER + name 'ADCR Mux' + value DMIC + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 ADC + item.1 DMIC + } + } + control.641 { + iface MIXER + name 'ADCL Mux' + value DMIC + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 ADC + item.1 DMIC + } + } + control.642 { + iface MIXER + name 'Right Headphone Mux' + value Mixer + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Mixer + item.1 DAC + } + } + control.643 { + iface MIXER + name 'Left Headphone Mux' + value Mixer + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Mixer + item.1 DAC + } + } + control.644 { + iface MIXER + name 'SPKR DAC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.645 { + iface MIXER + name 'SPKR Input Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.646 { + iface MIXER + name 'SPKR IN1RP Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.647 { + iface MIXER + name 'SPKR Output Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.648 { + iface MIXER + name 'SPKR DAC1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.649 { + iface MIXER + name 'SPKL DAC2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.650 { + iface MIXER + name 'SPKL Input Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.651 { + iface MIXER + name 'SPKL IN1LP Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.652 { + iface MIXER + name 'SPKL Output Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.653 { + iface MIXER + name 'SPKL DAC1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.654 { + iface MIXER + name 'AIF3ADC Mux' + value AIF1ADCDAT + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 AIF1ADCDAT + item.1 AIF2ADCDAT + item.2 AIF2DACDAT + item.3 'Mono PCM' + } + } + control.655 { + iface MIXER + name 'AIF2DACR Mux' + value AIF2 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 AIF2 + item.1 AIF3 + } + } + control.656 { + iface MIXER + name 'AIF2DACL Mux' + value AIF2 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 AIF2 + item.1 AIF3 + } + } + control.657 { + iface MIXER + name 'Mono PCM Out Mux' + value None + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 None + item.1 AIF2ADCL + item.2 AIF2ADCR + } + } + control.658 { + iface MIXER + name 'AIF2 Loopback' + value None + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 None + item.1 ADCDAT + } + } + control.659 { + iface MIXER + name 'AIF1 Loopback' + value None + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 None + item.1 ADCDAT + } + } + control.660 { + iface MIXER + name 'AIF2ADC Mux' + value AIF2ADCDAT + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 AIF2ADCDAT + item.1 AIF3DACDAT + } + } + control.661 { + iface MIXER + name 'AIF2DAC Mux' + value AIF2DACDAT + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 AIF2DACDAT + item.1 AIF3DACDAT + } + } + control.662 { + iface MIXER + name 'AIF1DAC Mux' + value AIF1DACDAT + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 AIF1DACDAT + item.1 AIF3DACDAT + } + } + control.663 { + iface MIXER + name 'DAC1R Mixer Right Sidetone Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.664 { + iface MIXER + name 'DAC1R Mixer Left Sidetone Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.665 { + iface MIXER + name 'DAC1R Mixer AIF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.666 { + iface MIXER + name 'DAC1R Mixer AIF1.2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.667 { + iface MIXER + name 'DAC1R Mixer AIF1.1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.668 { + iface MIXER + name 'DAC1L Mixer Right Sidetone Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.669 { + iface MIXER + name 'DAC1L Mixer Left Sidetone Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.670 { + iface MIXER + name 'DAC1L Mixer AIF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.671 { + iface MIXER + name 'DAC1L Mixer AIF1.2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.672 { + iface MIXER + name 'DAC1L Mixer AIF1.1 Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.673 { + iface MIXER + name 'Right Sidetone' + value ADC/DMIC1 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 ADC/DMIC1 + item.1 DMIC2 + } + } + control.674 { + iface MIXER + name 'Left Sidetone' + value ADC/DMIC1 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 ADC/DMIC1 + item.1 DMIC2 + } + } + control.675 { + iface MIXER + name 'AIF2DAC2R Mixer Right Sidetone Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.676 { + iface MIXER + name 'AIF2DAC2R Mixer Left Sidetone Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.677 { + iface MIXER + name 'AIF2DAC2R Mixer AIF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.678 { + iface MIXER + name 'AIF2DAC2R Mixer AIF1.2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.679 { + iface MIXER + name 'AIF2DAC2R Mixer AIF1.1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.680 { + iface MIXER + name 'AIF2DAC2L Mixer Right Sidetone Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.681 { + iface MIXER + name 'AIF2DAC2L Mixer Left Sidetone Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.682 { + iface MIXER + name 'AIF2DAC2L Mixer AIF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.683 { + iface MIXER + name 'AIF2DAC2L Mixer AIF1.2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.684 { + iface MIXER + name 'AIF2DAC2L Mixer AIF1.1 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.685 { + iface MIXER + name 'AIF1ADC2R Mixer DMIC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.686 { + iface MIXER + name 'AIF1ADC2R Mixer AIF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.687 { + iface MIXER + name 'AIF1ADC2L Mixer DMIC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.688 { + iface MIXER + name 'AIF1ADC2L Mixer AIF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.689 { + iface MIXER + name 'AIF1ADC1R Mixer ADC/DMIC Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.690 { + iface MIXER + name 'AIF1ADC1R Mixer AIF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.691 { + iface MIXER + name 'AIF1ADC1L Mixer ADC/DMIC Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.692 { + iface MIXER + name 'AIF1ADC1L Mixer AIF2 Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.693 { + iface MIXER + name 'LINEOUT2P Mixer Right Output Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.694 { + iface MIXER + name 'LINEOUT2N Mixer Left Output Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.695 { + iface MIXER + name 'LINEOUT2N Mixer Right Output Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.696 { + iface MIXER + name 'LINEOUT1P Mixer Left Output Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.697 { + iface MIXER + name 'LINEOUT1N Mixer Left Output Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.698 { + iface MIXER + name 'LINEOUT1N Mixer Right Output Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.699 { + iface MIXER + name 'SPKR Boost Direct Voice Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.700 { + iface MIXER + name 'SPKR Boost SPKL Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.701 { + iface MIXER + name 'SPKR Boost SPKR Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.702 { + iface MIXER + name 'SPKL Boost Direct Voice Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.703 { + iface MIXER + name 'SPKL Boost SPKL Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.704 { + iface MIXER + name 'SPKL Boost SPKR Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.705 { + iface MIXER + name 'Earpiece Mixer Direct Voice Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.706 { + iface MIXER + name 'Earpiece Mixer Left Output Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.707 { + iface MIXER + name 'Earpiece Mixer Right Output Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.708 { + iface MIXER + name 'Right Output Mixer Left Input Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.709 { + iface MIXER + name 'Right Output Mixer Right Input Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.710 { + iface MIXER + name 'Right Output Mixer IN2LN Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.711 { + iface MIXER + name 'Right Output Mixer IN2RN Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.712 { + iface MIXER + name 'Right Output Mixer IN1L Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.713 { + iface MIXER + name 'Right Output Mixer IN1R Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.714 { + iface MIXER + name 'Right Output Mixer IN2RP Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.715 { + iface MIXER + name 'Right Output Mixer DAC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.716 { + iface MIXER + name 'Left Output Mixer Right Input Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.717 { + iface MIXER + name 'Left Output Mixer Left Input Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.718 { + iface MIXER + name 'Left Output Mixer IN2RN Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.719 { + iface MIXER + name 'Left Output Mixer IN2LN Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.720 { + iface MIXER + name 'Left Output Mixer IN2LP Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.721 { + iface MIXER + name 'Left Output Mixer IN1R Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.722 { + iface MIXER + name 'Left Output Mixer IN1L Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.723 { + iface MIXER + name 'Left Output Mixer DAC Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.724 { + iface MIXER + name 'MIXINR IN2R Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.725 { + iface MIXER + name 'MIXINR IN1R Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.726 { + iface MIXER + name 'MIXINL IN2L Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.727 { + iface MIXER + name 'MIXINL IN1L Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.728 { + iface MIXER + name 'IN2R PGA IN2RP Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.729 { + iface MIXER + name 'IN2R PGA IN2RN Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.730 { + iface MIXER + name 'IN2L PGA IN2LP Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.731 { + iface MIXER + name 'IN2L PGA IN2LN Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.732 { + iface MIXER + name 'IN1R PGA IN1RP Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.733 { + iface MIXER + name 'IN1R PGA IN1RN Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.734 { + iface MIXER + name 'IN1L PGA IN1LP Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.735 { + iface MIXER + name 'IN1L PGA IN1LN Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } +} +state.dummyaudio { + control.1 { + iface MIXER + name 'ssp1_out mux 0' + value fm + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 fm + item.1 bt + } + } + control.2 { + iface MIXER + name 'aware_out aware 0 switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.3 { + iface MIXER + name 'modem_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.4 { + iface MIXER + name 'modem_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.5 { + iface MIXER + name 'modem_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.6 { + iface MIXER + name 'modem_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.7 { + iface MIXER + name 'modem_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.8 { + iface MIXER + name 'modem_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.9 { + iface MIXER + name 'modem_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.10 { + iface MIXER + name 'modem_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.11 { + iface MIXER + name 'modem_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.12 { + iface MIXER + name 'modem_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.13 { + iface MIXER + name 'modem_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.14 { + iface MIXER + name 'modem_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.15 { + iface MIXER + name 'modem_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.16 { + iface MIXER + name 'modem_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.17 { + iface MIXER + name 'modem_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.18 { + iface MIXER + name 'modem_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.19 { + iface MIXER + name 'fm_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.20 { + iface MIXER + name 'fm_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.21 { + iface MIXER + name 'fm_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.22 { + iface MIXER + name 'fm_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.23 { + iface MIXER + name 'fm_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.24 { + iface MIXER + name 'fm_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.25 { + iface MIXER + name 'fm_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.26 { + iface MIXER + name 'fm_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.27 { + iface MIXER + name 'fm_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.28 { + iface MIXER + name 'fm_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.29 { + iface MIXER + name 'fm_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.30 { + iface MIXER + name 'fm_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.31 { + iface MIXER + name 'fm_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.32 { + iface MIXER + name 'fm_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.33 { + iface MIXER + name 'fm_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.34 { + iface MIXER + name 'fm_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.35 { + iface MIXER + name 'bt_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.36 { + iface MIXER + name 'bt_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.37 { + iface MIXER + name 'bt_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.38 { + iface MIXER + name 'bt_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.39 { + iface MIXER + name 'bt_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.40 { + iface MIXER + name 'bt_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.41 { + iface MIXER + name 'bt_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.42 { + iface MIXER + name 'bt_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.43 { + iface MIXER + name 'bt_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.44 { + iface MIXER + name 'bt_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.45 { + iface MIXER + name 'bt_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.46 { + iface MIXER + name 'bt_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.47 { + iface MIXER + name 'bt_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.48 { + iface MIXER + name 'bt_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.49 { + iface MIXER + name 'bt_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.50 { + iface MIXER + name 'bt_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.51 { + iface MIXER + name 'codec_out1 mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.52 { + iface MIXER + name 'codec_out1 mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.53 { + iface MIXER + name 'codec_out1 mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.54 { + iface MIXER + name 'codec_out1 mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.55 { + iface MIXER + name 'codec_out1 mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.56 { + iface MIXER + name 'codec_out1 mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.57 { + iface MIXER + name 'codec_out1 mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.58 { + iface MIXER + name 'codec_out1 mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.59 { + iface MIXER + name 'codec_out1 mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.60 { + iface MIXER + name 'codec_out1 mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.61 { + iface MIXER + name 'codec_out1 mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.62 { + iface MIXER + name 'codec_out1 mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.63 { + iface MIXER + name 'codec_out1 mix 0 pcm0_in' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.64 { + iface MIXER + name 'codec_out1 mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.65 { + iface MIXER + name 'codec_out1 mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.66 { + iface MIXER + name 'codec_out1 mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.67 { + iface MIXER + name 'codec_out0 mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.68 { + iface MIXER + name 'codec_out0 mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.69 { + iface MIXER + name 'codec_out0 mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.70 { + iface MIXER + name 'codec_out0 mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.71 { + iface MIXER + name 'codec_out0 mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.72 { + iface MIXER + name 'codec_out0 mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.73 { + iface MIXER + name 'codec_out0 mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.74 { + iface MIXER + name 'codec_out0 mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.75 { + iface MIXER + name 'codec_out0 mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.76 { + iface MIXER + name 'codec_out0 mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.77 { + iface MIXER + name 'codec_out0 mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.78 { + iface MIXER + name 'codec_out0 mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.79 { + iface MIXER + name 'codec_out0 mix 0 pcm0_in' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.80 { + iface MIXER + name 'codec_out0 mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.81 { + iface MIXER + name 'codec_out0 mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.82 { + iface MIXER + name 'codec_out0 mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.83 { + iface MIXER + name 'rxspeech_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.84 { + iface MIXER + name 'rxspeech_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.85 { + iface MIXER + name 'rxspeech_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.86 { + iface MIXER + name 'rxspeech_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.87 { + iface MIXER + name 'rxspeech_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.88 { + iface MIXER + name 'rxspeech_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.89 { + iface MIXER + name 'rxspeech_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.90 { + iface MIXER + name 'rxspeech_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.91 { + iface MIXER + name 'rxspeech_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.92 { + iface MIXER + name 'rxspeech_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.93 { + iface MIXER + name 'rxspeech_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.94 { + iface MIXER + name 'rxspeech_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.95 { + iface MIXER + name 'rxspeech_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.96 { + iface MIXER + name 'rxspeech_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.97 { + iface MIXER + name 'rxspeech_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.98 { + iface MIXER + name 'rxspeech_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.99 { + iface MIXER + name 'speech_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.100 { + iface MIXER + name 'speech_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.101 { + iface MIXER + name 'speech_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.102 { + iface MIXER + name 'speech_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.103 { + iface MIXER + name 'speech_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.104 { + iface MIXER + name 'speech_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.105 { + iface MIXER + name 'speech_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.106 { + iface MIXER + name 'speech_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.107 { + iface MIXER + name 'speech_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.108 { + iface MIXER + name 'speech_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.109 { + iface MIXER + name 'speech_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.110 { + iface MIXER + name 'speech_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.111 { + iface MIXER + name 'speech_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.112 { + iface MIXER + name 'speech_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.113 { + iface MIXER + name 'speech_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.114 { + iface MIXER + name 'speech_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.115 { + iface MIXER + name 'hf_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.116 { + iface MIXER + name 'hf_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.117 { + iface MIXER + name 'hf_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.118 { + iface MIXER + name 'hf_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.119 { + iface MIXER + name 'hf_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.120 { + iface MIXER + name 'hf_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.121 { + iface MIXER + name 'hf_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.122 { + iface MIXER + name 'hf_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.123 { + iface MIXER + name 'hf_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.124 { + iface MIXER + name 'hf_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.125 { + iface MIXER + name 'hf_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.126 { + iface MIXER + name 'hf_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.127 { + iface MIXER + name 'hf_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.128 { + iface MIXER + name 'hf_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.129 { + iface MIXER + name 'hf_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.130 { + iface MIXER + name 'hf_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.131 { + iface MIXER + name 'hf_sns_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.132 { + iface MIXER + name 'hf_sns_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.133 { + iface MIXER + name 'hf_sns_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.134 { + iface MIXER + name 'hf_sns_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.135 { + iface MIXER + name 'hf_sns_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.136 { + iface MIXER + name 'hf_sns_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.137 { + iface MIXER + name 'hf_sns_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.138 { + iface MIXER + name 'hf_sns_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.139 { + iface MIXER + name 'hf_sns_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.140 { + iface MIXER + name 'hf_sns_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.141 { + iface MIXER + name 'hf_sns_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.142 { + iface MIXER + name 'hf_sns_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.143 { + iface MIXER + name 'hf_sns_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.144 { + iface MIXER + name 'hf_sns_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.145 { + iface MIXER + name 'hf_sns_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.146 { + iface MIXER + name 'hf_sns_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.147 { + iface MIXER + name 'vad_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.148 { + iface MIXER + name 'vad_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.149 { + iface MIXER + name 'vad_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.150 { + iface MIXER + name 'vad_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.151 { + iface MIXER + name 'vad_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.152 { + iface MIXER + name 'vad_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.153 { + iface MIXER + name 'vad_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.154 { + iface MIXER + name 'vad_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.155 { + iface MIXER + name 'vad_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.156 { + iface MIXER + name 'vad_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.157 { + iface MIXER + name 'vad_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.158 { + iface MIXER + name 'vad_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.159 { + iface MIXER + name 'vad_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.160 { + iface MIXER + name 'vad_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.161 { + iface MIXER + name 'vad_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.162 { + iface MIXER + name 'vad_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.163 { + iface MIXER + name 'aware_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.164 { + iface MIXER + name 'aware_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.165 { + iface MIXER + name 'aware_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.166 { + iface MIXER + name 'aware_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.167 { + iface MIXER + name 'aware_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.168 { + iface MIXER + name 'aware_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.169 { + iface MIXER + name 'aware_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.170 { + iface MIXER + name 'aware_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.171 { + iface MIXER + name 'aware_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.172 { + iface MIXER + name 'aware_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.173 { + iface MIXER + name 'aware_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.174 { + iface MIXER + name 'aware_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.175 { + iface MIXER + name 'aware_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.176 { + iface MIXER + name 'aware_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.177 { + iface MIXER + name 'aware_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.178 { + iface MIXER + name 'aware_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.179 { + iface MIXER + name 'voip_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.180 { + iface MIXER + name 'voip_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.181 { + iface MIXER + name 'voip_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.182 { + iface MIXER + name 'voip_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.183 { + iface MIXER + name 'voip_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.184 { + iface MIXER + name 'voip_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.185 { + iface MIXER + name 'voip_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.186 { + iface MIXER + name 'voip_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.187 { + iface MIXER + name 'voip_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.188 { + iface MIXER + name 'voip_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.189 { + iface MIXER + name 'voip_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.190 { + iface MIXER + name 'voip_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.191 { + iface MIXER + name 'voip_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.192 { + iface MIXER + name 'voip_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.193 { + iface MIXER + name 'voip_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.194 { + iface MIXER + name 'voip_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.195 { + iface MIXER + name 'media_loop2_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.196 { + iface MIXER + name 'media_loop2_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.197 { + iface MIXER + name 'media_loop2_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.198 { + iface MIXER + name 'media_loop2_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.199 { + iface MIXER + name 'media_loop2_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.200 { + iface MIXER + name 'media_loop2_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.201 { + iface MIXER + name 'media_loop2_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.202 { + iface MIXER + name 'media_loop2_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.203 { + iface MIXER + name 'media_loop2_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.204 { + iface MIXER + name 'media_loop2_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.205 { + iface MIXER + name 'media_loop2_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.206 { + iface MIXER + name 'media_loop2_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.207 { + iface MIXER + name 'media_loop2_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.208 { + iface MIXER + name 'media_loop2_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.209 { + iface MIXER + name 'media_loop2_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.210 { + iface MIXER + name 'media_loop2_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.211 { + iface MIXER + name 'media_loop1_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.212 { + iface MIXER + name 'media_loop1_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.213 { + iface MIXER + name 'media_loop1_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.214 { + iface MIXER + name 'media_loop1_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.215 { + iface MIXER + name 'media_loop1_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.216 { + iface MIXER + name 'media_loop1_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.217 { + iface MIXER + name 'media_loop1_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.218 { + iface MIXER + name 'media_loop1_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.219 { + iface MIXER + name 'media_loop1_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.220 { + iface MIXER + name 'media_loop1_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.221 { + iface MIXER + name 'media_loop1_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.222 { + iface MIXER + name 'media_loop1_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.223 { + iface MIXER + name 'media_loop1_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.224 { + iface MIXER + name 'media_loop1_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.225 { + iface MIXER + name 'media_loop1_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.226 { + iface MIXER + name 'media_loop1_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.227 { + iface MIXER + name 'sprot_loop_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.228 { + iface MIXER + name 'sprot_loop_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.229 { + iface MIXER + name 'sprot_loop_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.230 { + iface MIXER + name 'sprot_loop_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.231 { + iface MIXER + name 'sprot_loop_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.232 { + iface MIXER + name 'sprot_loop_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.233 { + iface MIXER + name 'sprot_loop_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.234 { + iface MIXER + name 'sprot_loop_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.235 { + iface MIXER + name 'sprot_loop_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.236 { + iface MIXER + name 'sprot_loop_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.237 { + iface MIXER + name 'sprot_loop_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.238 { + iface MIXER + name 'sprot_loop_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.239 { + iface MIXER + name 'sprot_loop_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.240 { + iface MIXER + name 'sprot_loop_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.241 { + iface MIXER + name 'sprot_loop_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.242 { + iface MIXER + name 'sprot_loop_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.243 { + iface MIXER + name 'pcm2_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.244 { + iface MIXER + name 'pcm2_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.245 { + iface MIXER + name 'pcm2_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.246 { + iface MIXER + name 'pcm2_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.247 { + iface MIXER + name 'pcm2_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.248 { + iface MIXER + name 'pcm2_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.249 { + iface MIXER + name 'pcm2_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.250 { + iface MIXER + name 'pcm2_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.251 { + iface MIXER + name 'pcm2_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.252 { + iface MIXER + name 'pcm2_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.253 { + iface MIXER + name 'pcm2_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.254 { + iface MIXER + name 'pcm2_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.255 { + iface MIXER + name 'pcm2_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.256 { + iface MIXER + name 'pcm2_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.257 { + iface MIXER + name 'pcm2_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.258 { + iface MIXER + name 'pcm2_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.259 { + iface MIXER + name 'pcm1_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.260 { + iface MIXER + name 'pcm1_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.261 { + iface MIXER + name 'pcm1_out mix 0 codec_in0' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.262 { + iface MIXER + name 'pcm1_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.263 { + iface MIXER + name 'pcm1_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.264 { + iface MIXER + name 'pcm1_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.265 { + iface MIXER + name 'pcm1_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.266 { + iface MIXER + name 'pcm1_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.267 { + iface MIXER + name 'pcm1_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.268 { + iface MIXER + name 'pcm1_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.269 { + iface MIXER + name 'pcm1_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.270 { + iface MIXER + name 'pcm1_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.271 { + iface MIXER + name 'pcm1_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.272 { + iface MIXER + name 'pcm1_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.273 { + iface MIXER + name 'pcm1_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.274 { + iface MIXER + name 'pcm1_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.275 { + iface MIXER + name 'pcm0_out mix 0 modem_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.276 { + iface MIXER + name 'pcm0_out mix 0 bt_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.277 { + iface MIXER + name 'pcm0_out mix 0 codec_in0' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.278 { + iface MIXER + name 'pcm0_out mix 0 codec_in1' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.279 { + iface MIXER + name 'pcm0_out mix 0 sprot_loop_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.280 { + iface MIXER + name 'pcm0_out mix 0 media_loop1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.281 { + iface MIXER + name 'pcm0_out mix 0 media_loop2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.282 { + iface MIXER + name 'pcm0_out mix 0 sidetone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.283 { + iface MIXER + name 'pcm0_out mix 0 txspeech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.284 { + iface MIXER + name 'pcm0_out mix 0 speech_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.285 { + iface MIXER + name 'pcm0_out mix 0 tone_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.286 { + iface MIXER + name 'pcm0_out mix 0 voip_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.287 { + iface MIXER + name 'pcm0_out mix 0 pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.288 { + iface MIXER + name 'pcm0_out mix 0 pcm1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.289 { + iface MIXER + name 'pcm0_out mix 0 low_pcm0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.290 { + iface MIXER + name 'pcm0_out mix 0 fm_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.291 { + iface MIXER + name 'media1_out mix 0 media0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.292 { + iface MIXER + name 'media1_out mix 0 media1_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.293 { + iface MIXER + name 'media1_out mix 0 media2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.294 { + iface MIXER + name 'media1_out mix 0 media3_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.295 { + iface MIXER + name 'media0_out mix 0 media0_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.296 { + iface MIXER + name 'media0_out mix 0 media1_in' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.297 { + iface MIXER + name 'media0_out mix 0 media2_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.298 { + iface MIXER + name 'media0_out mix 0 media3_in' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.299 { + iface MIXER + name 'media0_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.300 { + iface MIXER + name 'media0_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.301 { + iface MIXER + name 'media0_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.302 { + iface MIXER + name 'media1_in gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.303 { + iface MIXER + name 'media1_in gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.304 { + iface MIXER + name 'media1_in gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.305 { + iface MIXER + name 'media2_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.306 { + iface MIXER + name 'media2_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.307 { + iface MIXER + name 'media2_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.308 { + iface MIXER + name 'media3_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.309 { + iface MIXER + name 'media3_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.310 { + iface MIXER + name 'media3_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.311 { + iface MIXER + name 'pcm0_in gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.312 { + iface MIXER + name 'pcm0_in gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.313 { + iface MIXER + name 'pcm0_in gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.314 { + iface MIXER + name 'pcm1_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.315 { + iface MIXER + name 'pcm1_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.316 { + iface MIXER + name 'pcm1_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.317 { + iface MIXER + name 'low_pcm0_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.318 { + iface MIXER + name 'low_pcm0_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.319 { + iface MIXER + name 'low_pcm0_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.320 { + iface MIXER + name 'pcm1_out gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.321 { + iface MIXER + name 'pcm1_out gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.322 { + iface MIXER + name 'pcm1_out gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.323 { + iface MIXER + name 'pcm2_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.324 { + iface MIXER + name 'pcm2_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.325 { + iface MIXER + name 'pcm2_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.326 { + iface MIXER + name 'voip_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.327 { + iface MIXER + name 'voip_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.328 { + iface MIXER + name 'voip_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.329 { + iface MIXER + name 'voip_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.330 { + iface MIXER + name 'voip_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.331 { + iface MIXER + name 'voip_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.332 { + iface MIXER + name 'tone_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.333 { + iface MIXER + name 'tone_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.334 { + iface MIXER + name 'tone_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.335 { + iface MIXER + name 'aware_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.336 { + iface MIXER + name 'aware_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.337 { + iface MIXER + name 'aware_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.338 { + iface MIXER + name 'vad_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.339 { + iface MIXER + name 'vad_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.340 { + iface MIXER + name 'vad_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.341 { + iface MIXER + name 'hf_sns_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.342 { + iface MIXER + name 'hf_sns_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.343 { + iface MIXER + name 'hf_sns_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.344 { + iface MIXER + name 'hf_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.345 { + iface MIXER + name 'hf_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.346 { + iface MIXER + name 'hf_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.347 { + iface MIXER + name 'speech_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.348 { + iface MIXER + name 'speech_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.349 { + iface MIXER + name 'speech_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.350 { + iface MIXER + name 'txspeech_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.351 { + iface MIXER + name 'txspeech_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.352 { + iface MIXER + name 'txspeech_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.353 { + iface MIXER + name 'rxspeech_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.354 { + iface MIXER + name 'rxspeech_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.355 { + iface MIXER + name 'rxspeech_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.356 { + iface MIXER + name 'speech_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.357 { + iface MIXER + name 'speech_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.358 { + iface MIXER + name 'speech_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.359 { + iface MIXER + name 'codec_in0 gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.360 { + iface MIXER + name 'codec_in0 gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.361 { + iface MIXER + name 'codec_in0 gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.362 { + iface MIXER + name 'codec_in1 gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.363 { + iface MIXER + name 'codec_in1 gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.364 { + iface MIXER + name 'codec_in1 gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.365 { + iface MIXER + name 'codec_out0 gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.366 { + iface MIXER + name 'codec_out0 gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.367 { + iface MIXER + name 'codec_out0 gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.368 { + iface MIXER + name 'codec_out1 gain 0 rampduration' + value 50 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.369 { + iface MIXER + name 'codec_out1 gain 0 mute' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.370 { + iface MIXER + name 'codec_out1 gain 0 volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.371 { + iface MIXER + name 'bt_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.372 { + iface MIXER + name 'bt_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.373 { + iface MIXER + name 'bt_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.374 { + iface MIXER + name 'fm_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.375 { + iface MIXER + name 'fm_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.376 { + iface MIXER + name 'fm_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.377 { + iface MIXER + name 'bt_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.378 { + iface MIXER + name 'bt_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.379 { + iface MIXER + name 'bt_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.380 { + iface MIXER + name 'fm_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.381 { + iface MIXER + name 'fm_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.382 { + iface MIXER + name 'fm_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.383 { + iface MIXER + name 'modem_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.384 { + iface MIXER + name 'modem_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.385 { + iface MIXER + name 'modem_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.386 { + iface MIXER + name 'modem_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.387 { + iface MIXER + name 'modem_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.388 { + iface MIXER + name 'modem_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.389 { + iface MIXER + name 'media_loop1_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.390 { + iface MIXER + name 'media_loop1_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.391 { + iface MIXER + name 'media_loop1_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.392 { + iface MIXER + name 'media_loop2_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.393 { + iface MIXER + name 'media_loop2_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.394 { + iface MIXER + name 'media_loop2_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.395 { + iface MIXER + name 'sprot_loop_out gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.396 { + iface MIXER + name 'sprot_loop_out gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.397 { + iface MIXER + name 'sprot_loop_out gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.398 { + iface MIXER + name 'media0_in volume 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.399 { + iface MIXER + name 'media0_in volume 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.400 { + iface MIXER + name 'media0_in volume 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.401 { + iface MIXER + name 'sidetone_in gain 0 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.402 { + iface MIXER + name 'sidetone_in gain 0 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.403 { + iface MIXER + name 'sidetone_in gain 0 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.404 { + iface MIXER + name 'speech_out gain 1 rampduration' + value 5 + comment { + access 'read write' + type INTEGER + count 1 + range '5 - 5000' + } + } + control.405 { + iface MIXER + name 'speech_out gain 1 mute' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.406 { + iface MIXER + name 'speech_out gain 1 volume' + value.0 -1440 + value.1 -1440 + comment { + access 'read write' + type INTEGER + count 2 + range '-1440 - 360' + dbmin -14400 + dbmax 3600 + dbvalue.0 -14400 + dbvalue.1 -14400 + } + } + control.407 { + iface MIXER + name 'media_loop1_out fir 0 params' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 138 + } + } + control.408 { + iface MIXER + name 'media_loop1_out iir 0 params' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 300 + } + } + control.409 { + iface MIXER + name 'media_loop1_out mdrp 0 params' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 76 + } + } + control.410 { + iface MIXER + name 'media_loop2_out fir 0 params' + value '0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 272 + } + } + control.411 { + iface MIXER + name 'media_loop2_out iir 0 params' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 300 + } + } + control.412 { + iface MIXER + name 'media_loop2_out mdrp 0 params' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 76 + } + } + control.413 { + iface MIXER + name 'aware_out fir 0 params' + value '0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 272 + } + } + control.414 { + iface MIXER + name 'aware_out iir 0 params' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 300 + } + } + control.415 { + iface MIXER + name 'aware_out aware 0 params' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 48 + } + } + control.416 { + iface MIXER + name 'vad_out fir 0 params' + value '0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 272 + } + } + control.417 { + iface MIXER + name 'vad_out iir 0 params' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 300 + } + } + control.418 { + iface MIXER + name 'sprot_loop_out lpro 0 params' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 192 + } + } + control.419 { + iface MIXER + name 'codec_in0 dcr 0 params' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 300 + } + } + control.420 { + iface MIXER + name 'codec_in1 dcr 0 params' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 300 + } + } + control.421 { + iface MIXER + name 'speech_out ul_module 0 params fir_speech' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 136 + } + } + control.422 { + iface MIXER + name 'speech_out ul_module 0 params fir_hf_sns' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 136 + } + } + control.423 { + iface MIXER + name 'speech_out ul_module 0 params iir_speech' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 48 + } + } + control.424 { + iface MIXER + name 'speech_out ul_module 0 params iir_hf_sns' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 48 + } + } + control.425 { + iface MIXER + name 'speech_out ul_module 0 params aec' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 640 + } + } + control.426 { + iface MIXER + name 'speech_out ul_module 0 params nr' + value '0000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 38 + } + } + control.427 { + iface MIXER + name 'speech_out ul_module 0 params agc' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 58 + } + } + control.428 { + iface MIXER + name 'speech_out ul_module 0 params biquad' + value '00000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 22 + } + } + control.429 { + iface MIXER + name 'speech_out ul_module 0 params compr' + value '000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 36 + } + } + control.430 { + iface MIXER + name 'speech_out ul_module 0 params sns' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 324 + } + } + control.431 { + iface MIXER + name 'speech_out ul_module 0 params ser' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 42 + } + } + control.432 { + iface MIXER + name 'speech_out ul_module 0 params cni' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 48 + } + } + control.433 { + iface MIXER + name 'speech_out ul_module 0 params ref' + value '000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 24 + } + } + control.434 { + iface MIXER + name 'speech_out ul_module 0 params delay' + value '000000000000' + comment { + access 'read write' + type BYTES + count 6 + } + } + control.435 { + iface MIXER + name 'speech_out ul_module 0 params bmf' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 264 + } + } + control.436 { + iface MIXER + name 'speech_out ul_module 0 params dnr' + value '000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 18 + } + } + control.437 { + iface MIXER + name 'speech_in dl_module 0 params ana' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 52 + } + } + control.438 { + iface MIXER + name 'speech_in dl_module 0 params fir' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 136 + } + } + control.439 { + iface MIXER + name 'speech_in dl_module 0 params iir' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 48 + } + } + control.440 { + iface MIXER + name 'speech_in dl_module 0 params nr' + value '0000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 38 + } + } + control.441 { + iface MIXER + name 'speech_in dl_module 0 params biquad' + value '00000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 22 + } + } + control.442 { + iface MIXER + name 'speech_in dl_module 0 params compr' + value '000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 36 + } + } + control.443 { + iface MIXER + name 'speech_in dl_module 0 params cni' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 48 + } + } + control.444 { + iface MIXER + name 'speech_in dl_module 0 params bwx' + value '000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 54 + } + } + control.445 { + iface MIXER + name 'speech_in dl_module 0 params gmm' + value '00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 586 + } + } + control.446 { + iface MIXER + name 'speech_in dl_module 0 params glc' + value '000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 18 + } + } + control.447 { + iface MIXER + name 'codec_out interleaver slot 0' + value codec_out0_0 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 codec_out0_0 + item.2 codec_out0_1 + item.3 codec_out1_0 + item.4 codec_out1_1 + } + } + control.448 { + iface MIXER + name 'codec_out interleaver slot 1' + value codec_out0_1 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 codec_out0_0 + item.2 codec_out0_1 + item.3 codec_out1_0 + item.4 codec_out1_1 + } + } + control.449 { + iface MIXER + name 'codec_out interleaver slot 2' + value codec_out1_0 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 codec_out0_0 + item.2 codec_out0_1 + item.3 codec_out1_0 + item.4 codec_out1_1 + } + } + control.450 { + iface MIXER + name 'codec_out interleaver slot 3' + value codec_out1_1 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 codec_out0_0 + item.2 codec_out0_1 + item.3 codec_out1_0 + item.4 codec_out1_1 + } + } + control.451 { + iface MIXER + name 'codec_in deinterleaver codec_in0_0' + value 'slot 0' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 'slot 0' + item.2 'slot 1' + item.3 'slot 2' + item.4 'slot 3' + } + } + control.452 { + iface MIXER + name 'codec_in deinterleaver codec_in0_1' + value 'slot 1' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 'slot 0' + item.2 'slot 1' + item.3 'slot 2' + item.4 'slot 3' + } + } + control.453 { + iface MIXER + name 'codec_in deinterleaver codec_in1_0' + value 'slot 2' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 'slot 0' + item.2 'slot 1' + item.3 'slot 2' + item.4 'slot 3' + } + } + control.454 { + iface MIXER + name 'codec_in deinterleaver codec_in1_1' + value 'slot 3' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 none + item.1 'slot 0' + item.2 'slot 1' + item.3 'slot 2' + item.4 'slot 3' + } + } + control.455 { + iface MIXER + name 'domain voice mode 0' + value narrowband + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 narrowband + item.1 wideband + } + } + control.456 { + iface MIXER + name 'domain bt mode 0' + value narrowband + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 narrowband + item.1 wideband + } + } + control.457 { + iface MIXER + name 'sst debug byte control' + value '0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000' + comment { + access 'read write' + type BYTES + count 512 + } + } + control.458 { + iface MIXER + name 'probe out0 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.459 { + iface MIXER + name 'probe out1 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.460 { + iface MIXER + name 'probe out2 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.461 { + iface MIXER + name 'probe out3 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.462 { + iface MIXER + name 'probe out4 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.463 { + iface MIXER + name 'probe out5 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.464 { + iface MIXER + name 'probe out6 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.465 { + iface MIXER + name 'probe out7 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.466 { + iface MIXER + name 'probe in0 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.467 { + iface MIXER + name 'probe in1 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.468 { + iface MIXER + name 'probe in2 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.469 { + iface MIXER + name 'probe in3 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.470 { + iface MIXER + name 'probe in4 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.471 { + iface MIXER + name 'probe in5 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.472 { + iface MIXER + name 'probe in6 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } + control.473 { + iface MIXER + name 'probe in7 connection' + value 'media0_in gain' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'media0_in gain' + item.1 'media1_in gain' + item.2 'media2_in gain' + item.3 'media3_in gain' + item.4 'pcm0_in gain' + item.5 'pcm1_in gain' + item.6 'pcm1_out gain' + item.7 'pcm2_out gain' + item.8 'voip_in gain' + item.9 'voip_out gain' + item.10 'aware_out gain' + item.11 'vad_out gain' + item.12 'hf_sns_out gain' + item.13 'hf_out gain' + item.14 'speech_out gain' + item.15 'txspeech_in gain' + item.16 'rxspeech_out gain' + item.17 'speech_in gain' + item.18 'media_loop1_out gain' + item.19 'media_loop2_out gain' + item.20 'tone_in gain' + item.21 'codec_out0 gain' + item.22 'codec_out1 gain' + item.23 'bt_out gain' + item.24 'fm_out gain' + item.25 'modem_out gain' + item.26 'codec_in0 gain' + item.27 'codec_in1 gain' + item.28 'bt_in gain' + item.29 'fm_in gain' + item.30 'modem_in gain' + } + } +} diff --git a/device-software/meta-edison-distro/recipes-multimedia/libav/libav_0.8.9.bbappend b/device-software/meta-edison-distro/recipes-multimedia/libav/libav_0.8.9.bbappend new file mode 100644 index 0000000..939e988 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/libav/libav_0.8.9.bbappend @@ -0,0 +1,23 @@ +# Disable features that have potential commercial licensing restrictions +EXTRA_OECONF += "\ + --disable-encoder=libmp3lame \ + --disable-decoder=mp3 \ + --disable-decoder=mp3adu \ + --disable-decoder=mp3adufloat \ + --disable-decoder=mp3float \ + --disable-decoder=mp3on4 \ + --disable-decoder=mp3on4float \ + --disable-muxer=mp3 \ + --disable-demuxer=mp3 \ + --disable-bsf=mp3_header_decompress \ + --disable-bsf=mp3_header_compress \ + \ + --disable-encoder=mpeg2video \ + --disable-decoder=mpeg2video \ + --disable-hwaccel=mpeg2_vaapi\ + --disable-hwaccel=mpeg2_dxva2\ + --disable-muxer=mpeg2dvd \ + --disable-muxer=mpeg2svcd \ + --disable-muxer=mpeg2video \ + --disable-muxer=mpeg2vob \ +" diff --git a/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer-common.bb b/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer-common.bb new file mode 100644 index 0000000..889bb95 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer-common.bb @@ -0,0 +1,22 @@ +# Copyright Matthias Hentges (c) 2006 +# License: MIT (see COPYING.MIT) + +DESCRIPTION = "Preconfigured mplayer preferences" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/COPYING.MIT;md5=3da9cfbcb788c80a0384361b4de20420" + +PV = "0.0.1" + +SRC_URI = "file://mplayer.conf" + +# Yes, really /usr/etc!!! +do_install() { + install -d "${D}/usr${sysconfdir}/mplayer" + + install -m 0644 ${WORKDIR}/mplayer.conf "${D}/usr${sysconfdir}/mplayer" +} + +FILES_${PN} = "/usr${sysconfdir}/mplayer" + +inherit allarch diff --git a/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer-common/mplayer.conf b/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer-common/mplayer.conf new file mode 100644 index 0000000..37ad65f --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer-common/mplayer.conf @@ -0,0 +1,15 @@ + +# You probably shouldn't touch these +ac=mad, +ao=alsa, + +# Required on SL-Cxxxx for correct rotation in the *VT*, +# breaks rotation in X! +# vf=rotate=1 + +# Enable fullscreen display by default +# fs=true + +# Drop frames to keep audio and video in sync +framedrop=true + diff --git a/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer2/cross.compile.codec-cfg.patch b/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer2/cross.compile.codec-cfg.patch new file mode 100644 index 0000000..7b290b5 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer2/cross.compile.codec-cfg.patch @@ -0,0 +1,16 @@ +Upstream-Status: Pending +Signed-off-by: Martin Jansa + +diff --git a/Makefile b/Makefile +index 6013ca3..28c6383 100644 +--- a/Makefile ++++ b/Makefile +@@ -600,7 +602,7 @@ mplayer$(EXESUF): + $(CC) -o $@ $^ $(EXTRALIBS) + + codec-cfg$(EXESUF): codec-cfg.c codec-cfg.h +- $(HOST_CC) -O -DCODECS2HTML -I. -o $@ $< ++ $(BUILD_CC) -O -DCODECS2HTML -I. -Iffmpeg -o $@ $< + + codecs.conf.h: codec-cfg$(EXESUF) etc/codecs.conf + ./$^ > $@ diff --git a/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer2_git.bb b/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer2_git.bb new file mode 100644 index 0000000..820bffa --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/mplayer/mplayer2_git.bb @@ -0,0 +1,161 @@ +DESCRIPTION = "Open Source multimedia player." +SECTION = "multimedia" +HOMEPAGE = "http://www.mplayerhq.hu/" +DEPENDS = "libtheora ffmpeg zlib libpng jpeg liba52 freetype fontconfig alsa-lib lzo ncurses lame pulseaudio \ + ${@base_conditional('ENTERPRISE_DISTRO', '1', '', 'libmad liba52 lame', d)}" + +RDEPENDS_${PN} = "mplayer-common" +PROVIDES = "mplayer" +RPROVIDES_${PN} = "mplayer" +RCONFLICTS_${PN} = "mplayer" + +LICENSE = "GPLv3" +LIC_FILES_CHKSUM = "file://LICENSE;md5=d32239bcb673463ab874e80d47fae504" + +SRC_URI = "git://repo.or.cz/mplayer.git;protocol=git;branch=master \ + file://cross.compile.codec-cfg.patch \ +" + +SRCREV = "e3f5043233336d8b4b0731c6a8b42a8fda5535ac" + +ARM_INSTRUCTION_SET = "arm" + +PV = "2.0+gitr${SRCPV}" +PR = "r8" + +PARALLEL_MAKE = "" + +S = "${WORKDIR}/git" + +FILES_${PN} = "${bindir}/mplayer ${libdir} /usr/etc/mplayer/" +CONFFILES_${PN} += "/usr/etc/mplayer/input.conf \ + /usr/etc/mplayer/example.conf \ + /usr/etc/mplayer/codecs.conf \ + " + +inherit autotools pkgconfig + +EXTRA_OECONF = " \ + --prefix=/usr \ + --mandir=${mandir} \ + --target=${SIMPLE_TARGET_SYS} \ + \ + --disable-fontconfig \ + --disable-libass \ + --disable-lirc \ + --disable-lircc \ + --disable-joystick \ + --disable-vm \ + --disable-xf86keysym \ + --disable-tv \ + --disable-tv-v4l1 \ + --disable-tv-v4l2 \ + --disable-tv-bsdbt848 \ + --enable-rtc \ + --disable-networking \ + --disable-smb \ + --disable-live \ + --disable-dvdnav \ + --disable-dvdread \ + --disable-dvdread-internal \ + --disable-libdvdcss-internal \ + --disable-cdparanoia \ + --enable-freetype \ + --disable-sortsub \ + --disable-fribidi \ + --disable-enca \ + --disable-ftp \ + --disable-vstream \ + \ + --disable-gif \ + --disable-png \ + --disable-jpeg \ + --disable-libcdio \ + --disable-qtx \ + --disable-xanim \ + --disable-real \ + --disable-xvid \ + \ + --disable-mpg123 \ + --disable-speex \ + --enable-theora \ + --disable-ladspa \ + --disable-libdv \ + --disable-mad \ + --disable-xmms \ + --disable-musepack \ + \ + --disable-gl \ + --disable-vesa \ + --disable-svga \ + --disable-sdl \ + --disable-aa \ + --disable-caca \ + --disable-ggi \ + --disable-ggiwmh \ + --disable-directx \ + --disable-dxr3 \ + --disable-dvb \ + --disable-mga \ + --disable-xmga \ + --disable-xv \ + --disable-vm \ + --disable-xinerama \ + --disable-x11 \ + --disable-fbdev \ + --disable-3dfx \ + --disable-tdfxfb \ + --disable-s3fb \ + --disable-directfb \ + --disable-bl \ + --disable-tdfxvid \ + --disable-tga \ + --disable-pnm \ + --disable-md5sum \ + \ + --disable-alsa \ + --disable-ossaudio \ + --disable-arts \ + --disable-esd \ + --enable-pulse \ + --disable-jack \ + --disable-openal \ + --disable-nas \ + --disable-sgiaudio \ + --disable-sunaudio \ + --disable-win32waveout \ + --enable-select \ + \ + --extra-libs=' -lstdc++ -lvorbis ' \ +" + +EXTRA_OECONF_append_armv6 = " --enable-armv6" +EXTRA_OECONF_append_armv7a = " --enable-armv6 --enable-neon" + +FULL_OPTIMIZATION = "-fexpensive-optimizations -fomit-frame-pointer -frename-registers -O4 -ffast-math" +BUILD_OPTIMIZATION = "${FULL_OPTIMIZATION}" + +CFLAGS_append = " -I${S}/libdvdread4 " + +do_configure() { + sed -i 's|/usr/include|${STAGING_INCDIR}|g' ${S}/configure + sed -i 's|/usr/lib|${STAGING_LIBDIR}|g' ${S}/configure + sed -i 's|/usr/\S*include[\w/]*||g' ${S}/configure + sed -i 's|/usr/\S*lib[\w/]*||g' ${S}/configure + sed -i 's|_install_strip="-s"|_install_strip=""|g' ${S}/configure + sed -i 's|HOST_CC|BUILD_CC|' ${S}/Makefile + + export SIMPLE_TARGET_SYS="$(echo ${TARGET_SYS} | sed s:${TARGET_VENDOR}::g)" + ./configure ${EXTRA_OECONF} +} + +do_compile () { + oe_runmake +} + +do_install_append() { + install -d ${D}/usr/etc/mplayer + install ${S}/etc/input.conf ${D}/usr/etc/mplayer/ + install ${S}/etc/example.conf ${D}/usr/etc/mplayer/ + install ${S}/etc/codecs.conf ${D}/usr/etc/mplayer/ +} diff --git a/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/files/pulseaudio.service b/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/files/pulseaudio.service new file mode 100644 index 0000000..0f43b1f --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/files/pulseaudio.service @@ -0,0 +1,12 @@ +[Unit] +Description=PulseAudio Sound System +After=alsa-restore.service + +[Service] +BusName=org.pulseaudio.Server +ExecStart=/usr/bin/pulseaudio --system --resample-method=src-sinc-fastest +Restart=always + +[Install] +WantedBy=multi-user.target + diff --git a/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/files/system.pa b/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/files/system.pa new file mode 100644 index 0000000..77e5a35 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/files/system.pa @@ -0,0 +1,66 @@ +#!/usr/bin/pulseaudio -nF +# +# This file is part of PulseAudio. +# +# PulseAudio is free software; you can redistribute it and/or modify it +# under the terms of the GNU Lesser General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# PulseAudio is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public License +# along with PulseAudio; if not, write to the Free Software Foundation, +# Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. + +# This startup script is used only if PulseAudio is started in system +# mode. + +### Automatically load driver modules depending on the hardware available +.ifexists module-udev-detect.so +load-module module-udev-detect +.else +### Use the static hardware detection module (for systems that lack udev/hal support) +load-module module-detect +.endif + +### Load several protocols +.ifexists module-esound-protocol-unix.so +load-module module-esound-protocol-unix +.endif +load-module module-native-protocol-unix + +### Load bluetooth modules +.ifexists module-bluetooth-policy.so +load-module module-bluetooth-policy +.endif + +.ifexists module-bluez5-discover.so +load-module module-bluez5-discover +.endif + +### Automatically restore the volume of streams and devices +load-module module-stream-restore +load-module module-device-restore + +### Automatically restore the default sink/source when changed by the user +### during runtime +### NOTE: This should be loaded as early as possible so that subsequent modules +### that look up the default sink/source get the right value +load-module module-default-device-restore + +### Automatically move streams to the default sink if the sink they are +### connected to dies, similar for sources +load-module module-rescue-streams + +### Make sure we always have a sink around, even if it is a null sink. +load-module module-always-sink + +### Automatically suspend sinks/sources that become idle for too long +load-module module-suspend-on-idle + +### Enable positioned event sounds +load-module module-position-event-sounds \ No newline at end of file diff --git a/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/pulseaudio-service_1.0.bb b/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/pulseaudio-service_1.0.bb new file mode 100644 index 0000000..e8e10b5 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/pulseaudio-service_1.0.bb @@ -0,0 +1,28 @@ +DESCRIPTION = "Pulseaudio systemd service" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +inherit systemd useradd + +DEPENDS = "pulseaudio" + +SRC_URI += "\ + file://pulseaudio.service \ + " + +SYSTEMD_SERVICE_${PN} = "pulseaudio.service" + +FILES_${PN} = " \ + ${systemd_unitdir} \ +" + +USERADD_PACKAGES = "pulseaudio-service" +GROUPMEMS_PARAM_pulseaudio-service = " --add root --group audio" + +do_install_append() { + if ${@base_contains('DISTRO_FEATURES','systemd','true','false',d)}; then + install -d ${D}${systemd_unitdir}/system + install -m 0644 ${WORKDIR}/pulseaudio.service ${D}/${systemd_unitdir}/system/ + fi +} + diff --git a/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/pulseaudio_5.0.bbappend b/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/pulseaudio_5.0.bbappend new file mode 100644 index 0000000..7900344 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-multimedia/pulseaudio/pulseaudio_5.0.bbappend @@ -0,0 +1,22 @@ +# Overlay the pulseaudio recipe to embed bluetooth modules for A2DP + +FILESEXTRAPATHS_prepend := "${THISDIR}/files/" + +SRC_URI += "\ + file://system.pa \ + " + +PACKAGECONFIG ??= "${@base_contains('DISTRO_FEATURES', 'bluetooth', 'bluez5', '', d)} \ + ${@base_contains('DISTRO_FEATURES', 'systemd', 'systemd', '', d)} \ + ${@base_contains('DISTRO_FEATURES', 'zeroconf', 'avahi', '', d)} \ + ${@base_contains('DISTRO_FEATURES', 'x11', 'x11', '', d)}" + +RDEPENDS_pulseaudio-server += " \ + pulseaudio-module-loopback \ + pulseaudio-module-bluez5-discover \ + pulseaudio-module-bluez5-device \ + pulseaudio-module-bluetooth-policy" + +do_install_append() { + install -m 0644 ${WORKDIR}/system.pa ${D}/${sysconfdir}/pulse/ +} diff --git a/device-software/meta-edison-distro/recipes-support/blink-led/blink-led_0.1.bb b/device-software/meta-edison-distro/recipes-support/blink-led/blink-led_0.1.bb new file mode 100644 index 0000000..9fff7d2 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-support/blink-led/blink-led_0.1.bb @@ -0,0 +1,23 @@ +DESCRIPTION = "Blinks the Edison LED" +SECTION = "base" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +FILESEXTRAPATHS_prepend := "${THISDIR}/files/" + +SRC_URI = "file://blink-led" +SRC_URI += "file://blink-led.service" + +S = "${WORKDIR}" + +do_install() { + install -d ${D}${bindir} + install -m 0755 blink-led ${D}${bindir} + + # Copy service file + install -d ${D}/${systemd_unitdir}/system + install -m 644 ${WORKDIR}/blink-led.service ${D}/${systemd_unitdir}/system +} + +FILES_${PN} += "${base_libdir}/systemd/system/blink-led.service" +FILES_${PN} += "${bindir}/blink-led" diff --git a/device-software/meta-edison-distro/recipes-support/blink-led/files/blink-led b/device-software/meta-edison-distro/recipes-support/blink-led/files/blink-led new file mode 100755 index 0000000..f8b884f --- /dev/null +++ b/device-software/meta-edison-distro/recipes-support/blink-led/files/blink-led @@ -0,0 +1,109 @@ +#!/usr/bin/env python + +# +# Edison LED blinker +# +# Copyright (c) 2014, Intel Corporation. +# Fabien Chereau +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# This is a very poor implementation as it uses subprocesses for init + +import subprocess +import time +import argparse +import signal +import sys + +initial_led_state = "high" + +def write_led(value): + with open("/sys/class/gpio/gpio40/direction","w") as lf: + lf.write(value) + +def blink_once(): + write_led("low") + time.sleep(1./args.frequency*args.duty_cycle) + write_led("high") + time.sleep(1./args.frequency*(1.-args.duty_cycle)) + +def deinit_led_gpio(): + # Revert to default state with LED activated + write_led(initial_led_state) + + # Deinit LED GPIO + subprocess.call(""" + echo 40 >/sys/class/gpio/unexport + echo 214 >/sys/class/gpio/unexport + echo 243 >/sys/class/gpio/unexport + echo 261 >/sys/class/gpio/unexport + """, shell=True) + +def signal_term_handler(signal, frame): + print 'Signal intercepted: de-initing LED GPIOs' + deinit_led_gpio() + sys.exit(0) + + +parser = argparse.ArgumentParser(description='Blink the Edison Arduino board LED.') +parser.add_argument('--frequency', type=float, default=4, help='blink frequency in Hz') +parser.add_argument('--duration', type=float, default=-1, help='duration of the blink in seconds. Negative value means no timeout, i.e. it will stop when the program is killed.') +parser.add_argument('--duty_cycle', type=float, default=0.5, help='duty cycle between 0 and 1') + +args = parser.parse_args() + +# Allows to quit cleanly with CRTL+C or SIGTERM (systemd use SIGTERM to kill a service by default) +signal.signal(signal.SIGTERM, signal_term_handler) +signal.signal(signal.SIGINT, signal_term_handler) + +# Init GPIO mux for LED control +subprocess.call(""" +echo 40 >/sys/class/gpio/export +echo 214 >/sys/class/gpio/export +echo 243 >/sys/class/gpio/export +echo 261 >/sys/class/gpio/export +echo high >/sys/class/gpio/gpio214/direction +echo mode0 > /sys/kernel/debug/gpio_debug/gpio40/current_pinmux +echo low >/sys/class/gpio/gpio243/direction +echo high >/sys/class/gpio/gpio261/direction +echo low >/sys/class/gpio/gpio214/direction""", shell=True) + +# Save current LED value for reverting to proper state at exit +try: + lf = open("/sys/class/gpio/gpio40/value","r") + v = lf.read() + lf.close() + if v[0] == '0': + initial_led_state = "low" + else: + initial_led_state = "high" +except: + print "Can't get current LED state" + +# Blink LED +if args.duration >= 0: + for i in range(0, int(args.duration*args.frequency)): + blink_once() +else: + while True: + blink_once() + +deinit_led_gpio() + diff --git a/device-software/meta-edison-distro/recipes-support/blink-led/files/blink-led.service b/device-software/meta-edison-distro/recipes-support/blink-led/files/blink-led.service new file mode 100644 index 0000000..3dcb2ab --- /dev/null +++ b/device-software/meta-edison-distro/recipes-support/blink-led/files/blink-led.service @@ -0,0 +1,10 @@ +[Unit] +Description=Edison Arduino board LED Blinker + +[Service] +ExecStart=/usr/bin/blink-led +Restart=on-failure + +[Install] +WantedBy=basic.target + diff --git a/device-software/meta-edison-distro/recipes-support/cleanjournal/cleanjournal.bb b/device-software/meta-edison-distro/recipes-support/cleanjournal/cleanjournal.bb new file mode 100644 index 0000000..cc21638 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-support/cleanjournal/cleanjournal.bb @@ -0,0 +1,31 @@ +DESCRIPTION = "Cleanjournal tool. Remove all corrupted journald entries at startup." +SECTION = "base" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + + +SRC_URI += "file://cleanjournal.service" +SRC_URI += "file://clean_journal.sh" + +SYSTEMD_SERVICE_${PN} = "cleanjournal.service" + +RDEPENDS_${PN} = "systemd" +DEPENDS = "systemd" +inherit systemd + +do_install() { + # install service file + install -d ${D}${systemd_unitdir}/system + install -c -m 0644 ${WORKDIR}/cleanjournal.service ${D}${systemd_unitdir}/system + + # install cleanjournal script + install -d ${D}${sbindir} + install -c -m 0755 ${WORKDIR}/clean_journal.sh ${D}${sbindir} +} + +# As this package is tied to systemd, only build it when we're also building systemd. +python () { + if not oe.utils.contains ('DISTRO_FEATURES', 'systemd', True, False, d): + raise bb.parse.SkipPackage("'systemd' not in DISTRO_FEATURES") +} + diff --git a/device-software/meta-edison-distro/recipes-support/cleanjournal/files/clean_journal.sh b/device-software/meta-edison-distro/recipes-support/cleanjournal/files/clean_journal.sh new file mode 100644 index 0000000..5758d09 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-support/cleanjournal/files/clean_journal.sh @@ -0,0 +1,60 @@ +#!/bin/sh + +# +# Cleanjournal script +# +# Copyright (c) 2014, Intel Corporation. +# Fabien Rodriguez +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. +# + +# +# This script checks if the remaining space in root partition is lower than 10%. +# In that case, the corrupted journald entries (ended by '~') will be deleted +# one by one until remaining space becomes greater or equal to 10%. +# At each boot, the script is launched by systemd at startup. +# + +# max allowed free space is 10% +max_allowed_free_space=10 + +# check remaining space and update clean_journal_needed variable +check_free_space() { + current_free_space=$(df -h | grep /dev/root | awk '{print 100 - $5}' | sed 's/%//') + if [ "$current_free_space" -lt "$max_allowed_free_space" ]; then + clean_journal_needed=true + else + clean_journal_needed=false + fi +} + +check_free_space +if [ "$clean_journal_needed" = true ]; then + # delete each journald corrupted entry + # until remaining space becomes greater than 10% + for corrupted_journal_file in $(find /var/log/journal/ -name '*~'); do + rm "$corrupted_journal_file" + check_free_space + if [ "$clean_journal_needed" = false ]; then + break + fi + done +fi + diff --git a/device-software/meta-edison-distro/recipes-support/cleanjournal/files/cleanjournal.service b/device-software/meta-edison-distro/recipes-support/cleanjournal/files/cleanjournal.service new file mode 100644 index 0000000..ab704f3 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-support/cleanjournal/files/cleanjournal.service @@ -0,0 +1,10 @@ +[Unit] +Description=Cleanjournal service + +[Service] +ExecStart=/usr/sbin/clean_journal.sh +Restart=no + +[Install] +WantedBy=basic.target + diff --git a/device-software/meta-edison-distro/recipes-support/crashlog/files/retrieve_crashlog.sh b/device-software/meta-edison-distro/recipes-support/crashlog/files/retrieve_crashlog.sh index dcb987c..a7f007c 100755 --- a/device-software/meta-edison-distro/recipes-support/crashlog/files/retrieve_crashlog.sh +++ b/device-software/meta-edison-distro/recipes-support/crashlog/files/retrieve_crashlog.sh @@ -34,32 +34,65 @@ # ipanic_console_path=/proc/emmc_ipanic_console -crashlog_path=/home/root/ +crashlog_path=/home/root # line containing 'WAKESRC' looks like: -# '[ 0.530153] [BOOT] WAKESRC=[real reset] (osnib)' -# wakesrc is the 6th field with [ and ] separators +# 'Jan 01 00:00:12 edison kernel: [BOOT] WAKESRC=[real reset] (osnib)' +# wakesrc is the 4th field with [ and ] separators # List of available wake sources is in driver/platform/x86/intel_scu_ipcutil.c -wakesrc=`dmesg | grep WAKESRC | awk -F'[][]' '{print $6}'` +wakesrc=$(journalctl -k -b -0 | grep WAKESRC | awk -F'[][]' '{print $4}') # any watchdog boot implies a crash -tmp=`echo -n "${wakesrc}" | grep watchdog` +tmp=$(echo -n "${wakesrc}" | grep watchdog) if [ -n "${tmp}" ]; then - # get the last sequence number (ie for crashlog_00001, get the 1) - last_file_sequence_number=`ls ${crashlog_path}/crashlog_* | tail -1 | awk -F_ '{print $NF}'` - if [ -z $last_file_sequence_number ]; then - last_file_sequence_number="0" - fi - - new_file_sequence_number=`expr ${last_file_sequence_number} + 1` - new_file_name=`printf "${crashlog_path}/crashlog_%05d\n" $new_file_sequence_number` - echo "****** Wake Source is [ ${wakesrc} ] ******" > ${new_file_name} - - if [ -e ${ipanic_console_path} ]; then - # we got an epanic trace - standard case - cat ${ipanic_console_path} >> ${new_file_name} - echo clear > ${ipanic_console_path} - fi + # get the last sequence number (ie for crashlog_00001, get the 1) + last_sequence_number=$(ls ${crashlog_path}/crashlog_* | tail -1 | awk -F_ '{print $NF}' | awk -F. '{print $NR}') + if [ -z $last_sequence_number ]; then + last_sequence_number="0" + fi + + new_sequence_number=$(expr ${last_sequence_number} + 1) + new_name=$(printf "crashlog_%05d" $new_sequence_number) + + # create working directory + mkdir ${crashlog_path}/${new_name} + + # write crashfile + crashfile_path=${crashlog_path}/${new_name}/crashfile + + event="CRASH" + manufacturer="Intel Corporation" + product_name=$(cat /factory/hardware_model) + version=$(cat /factory/hardware_version) + serial_number=$(cat /factory/serial_number) + linux_version=$(uname -a) + build_version=$(cat /etc/version) + date=$(date) + + echo "EVENT=${event}" > ${crashfile_path} + echo "Manufacturer : ${manufacturer}" >> ${crashfile_path} + echo "Product name : ${product_name}" >> ${crashfile_path} + echo "Version : ${version}" >> ${crashfile_path} + echo "Serial Number : ${serial_number}" >> ${crashfile_path} + echo "Linux version : ${linux_version}" >> ${crashfile_path} + echo "Build version : ${build_version}" >> ${crashfile_path} + echo "Date : ${date}" >> ${crashfile_path} + echo -e "Wake source : ${wakesrc}" >> ${crashfile_path} + + # write full journal binary & logs from previous boot + journalctl -b -1 -o short-monotonic > ${crashlog_path}/${new_name}/journal_logs + journalctl -b -1 -o export > ${crashlog_path}/${new_name}/journal_binary + + # write panic trace + if [ -e ${ipanic_console_path} ]; then + cat ${ipanic_console_path} > ${crashlog_path}/${new_name}/panic + echo clear > ${ipanic_console_path} + fi + + # create archive and clear folder + tar -zcf ${crashlog_path}/${new_name}.tar.gz -C ${crashlog_path} ${new_name} + rm -rf ${crashlog_path}/${new_name} + fi diff --git a/device-software/meta-edison-distro/recipes-support/edison-mcu/files/intel_mcu.bin b/device-software/meta-edison-distro/recipes-support/edison-mcu/files/intel_mcu.bin new file mode 100644 index 0000000000000000000000000000000000000000..dcf054447947db9cd557fe5abd56cda525f56861 GIT binary patch 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b/device-software/meta-edison-distro/recipes-support/edison-mcu/files/mcu_fw_loader.service @@ -0,0 +1,10 @@ +[Unit] +Description=Daemon to load edison mcu app binary +After=syslog.target + +[Service] +ExecStart=/etc/intel_mcu/mcu_fw_loader.sh + +[Install] +WantedBy=multi-user.target + diff --git a/device-software/meta-edison-distro/recipes-support/edison-mcu/files/mcu_fw_loader.sh b/device-software/meta-edison-distro/recipes-support/edison-mcu/files/mcu_fw_loader.sh new file mode 100644 index 0000000..734352d --- /dev/null +++ b/device-software/meta-edison-distro/recipes-support/edison-mcu/files/mcu_fw_loader.sh @@ -0,0 +1,12 @@ +#!/bin/sh +#author: JiuJin Hong (jiujinx.hong@intel.com) +if [ ! -d "/sys/devices/platform/intel_mcu" ];then + exit +fi + +if [ ! -f "/lib/firmware/intel_mcu.bin" ];then + exit +fi + +echo "load mcu app" > /sys/devices/platform/intel_mcu/control + diff --git a/device-software/meta-edison-distro/recipes-support/edison-mcu/mcu-fw-bin_0.1.bb b/device-software/meta-edison-distro/recipes-support/edison-mcu/mcu-fw-bin_0.1.bb new file mode 100644 index 0000000..eafb813 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-support/edison-mcu/mcu-fw-bin_0.1.bb @@ -0,0 +1,17 @@ +DESCRIPTION = "This is edison mcu fw binary." +HOMEPAGE = "http://www.intel.com" +LICENSE = "CLOSED" + +FILESEXTRAPATHS_prepend := "${THISDIR}/files/" + +SRC_URI = "file://intel_mcu.bin" + +S = "${WORKDIR}" + +do_install () { + install -v -d ${D}/${base_libdir}/firmware/ + install -m 644 intel_mcu.bin ${D}/${base_libdir}/firmware/ +} + +FILES_${PN} = "${base_libdir}/firmware/" + diff --git a/device-software/meta-edison-distro/recipes-support/edison-mcu/mcu-fw-load_0.1.bb b/device-software/meta-edison-distro/recipes-support/edison-mcu/mcu-fw-load_0.1.bb new file mode 100644 index 0000000..a48aa10 --- /dev/null +++ b/device-software/meta-edison-distro/recipes-support/edison-mcu/mcu-fw-load_0.1.bb @@ -0,0 +1,23 @@ +DESCRIPTION = "This is intel mcu app download daemon." +HOMEPAGE = "http://www.intel.com" +LICENSE = "CLOSED" + +FILESEXTRAPATHS_prepend := "${THISDIR}/files/" + +SRC_URI = "file://mcu_fw_loader.service \ + file://mcu_fw_loader.sh" + +SYSTEMD_SERVICE_${PN} = "mcu_fw_loader.service" + +S = "${WORKDIR}" + +inherit systemd + +do_install () { + install -d ${D}${sysconfdir}/intel_mcu/ + install -m 0755 mcu_fw_loader.sh ${D}${sysconfdir}/intel_mcu/ + + install -d ${D}${systemd_unitdir}/system/ + install -m 0644 mcu_fw_loader.service ${D}${systemd_unitdir}/system/ +} + diff --git a/device-software/meta-edison-distro/recipes-support/edison-sst/files/fw_sst_119a.bin b/device-software/meta-edison-distro/recipes-support/edison-sst/files/fw_sst_119a.bin new file mode 100644 index 0000000000000000000000000000000000000000..b704fb62c6159e47614dc72450b3bf133d22879d GIT binary patch literal 464927 zcmce<2UrzL_OIQ0lN80A6(oazf~W{83MyhmQBlBv0aOGrAxcI(#$(Po=bY0q=bRIY zVvd+2!QJ1xHac_uGxL4(-RIutGS7Po_wHYJ)vC2tRaaLtseY}SX*3$;_m5WTt`z*s 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non PWR button events */ if (event.type != EV_KEY || event.code != KEY_POWER) continue; @@ -116,6 +136,7 @@ int main(int argc, char **argv) { case 1: /* Regular press */ assert(time_at_last_press==0); + assert(event_already_fired==0); time_at_last_press = tv.tv_sec; break; case 2: /* Auto repeat press */ @@ -126,14 +147,14 @@ int main(int argc, char **argv) } break; case 0: /* Release */ - if (tv.tv_sec - time_at_last_press >= EDISON_OOBE_PRESS_TIMEOUT) + if (event_already_fired != 0) { - time_at_last_press = 0; - printf("Edison PWR button was pressed more than 2s, starting OOBE service..\n"); + printf("Edison PWR button was pressed more than 2s and released\n"); fflush(stdout); - system(CALLED_COMMAND_ON_TIMEOUT); + system(argv[2]); } time_at_last_press = 0; + event_already_fired = 0; break; default: printf("Warning: unhandled PWR button event value: %u\n", event.value); diff --git a/device-software/meta-edison-distro/recipes-support/pwr-button-handler/files/pwr-button-handler.service b/device-software/meta-edison-distro/recipes-support/pwr-button-handler/files/pwr-button-handler.service index 48e9266..a53c10b 100644 --- a/device-software/meta-edison-distro/recipes-support/pwr-button-handler/files/pwr-button-handler.service +++ b/device-software/meta-edison-distro/recipes-support/pwr-button-handler/files/pwr-button-handler.service @@ -2,7 +2,7 @@ Description=Edison PWR button handler [Service] -ExecStart=/usr/bin/pwr_button_handler +ExecStart=/usr/bin/pwr_button_handler "/bin/systemctl start blink-led" "sh -c \"/bin/systemctl stop blink-led && /usr/bin/configure_edison --enableOneTimeSetup\"" Restart=on-failure [Install] diff --git a/device-software/meta-edison-middleware/recipes-connectivity/c-ares/c-ares_1.10.0.bb b/device-software/meta-edison-middleware/recipes-connectivity/c-ares/c-ares_1.10.0.bb new file mode 100644 index 0000000..0d1ef9d --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-connectivity/c-ares/c-ares_1.10.0.bb @@ -0,0 +1,13 @@ +DESCRIPTION = "C library for asynchronous DNS requests (including name resolves)" +HOMEPAGE = "http://c-ares.haxx.se/" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://README;beginline=17;endline=23;md5=d08205a43bc63c12cf394ac1d2cce7c3" + +PR = "r0" + +SRC_URI = "http://c-ares.haxx.se/download/c-ares-${PV}.tar.gz" + +SRC_URI[md5sum] = "1196067641411a75d3cbebe074fd36d8" +SRC_URI[sha256sum] = "3d701674615d1158e56a59aaede7891f2dde3da0f46a6d3c684e0ae70f52d3db" + +inherit autotools diff --git a/device-software/meta-edison-middleware/recipes-connectivity/mdns/files/build.patch b/device-software/meta-edison-middleware/recipes-connectivity/mdns/files/build.patch new file mode 100644 index 0000000..a1a2c89 --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-connectivity/mdns/files/build.patch @@ -0,0 +1,191 @@ +--- a/Clients/Makefile ++++ b/Clients/Makefile +@@ -30,9 +30,17 @@ TARGETS = build/dns-sd build/dns-sd64 + LIBS = + else + TARGETS = build/dns-sd ++# Set up diverging paths for debug vs. prod builds ++DEBUG?=1 ++ifeq ($(DEBUG),1) ++LIBS = -L../mDNSPosix/build/debug/ -ldns_sd ++else + LIBS = -L../mDNSPosix/build/prod/ -ldns_sd + endif + ++ ++endif ++ + all: $(TARGETS) + + clean: +@@ -42,10 +50,10 @@ build: + mkdir build + + build/dns-sd: build dns-sd.c ClientCommon.c +- cc $(filter %.c %.o, $+) $(LIBS) -I../mDNSShared -Wall -o $@ ++ $(CC) $(filter %.c %.o, $+) $(LIBS) -I../mDNSShared -Wall -o $@ + + build/dns-sd64: build dns-sd.c ClientCommon.c +- cc $(filter %.c %.o, $+) $(LIBS) -I../mDNSShared -Wall -o $@ -m64 ++ $(CC) $(filter %.c %.o, $+) $(LIBS) -I../mDNSShared -Wall -o $@ -m64 + + # Note, we can make a 'fat' version of dns-sd using 'lipo', as shown below, but we + # don't, because we don't want or need a 'fat' version of dns-sd, because it will +--- a/mDNSPosix/Makefile ++++ b/mDNSPosix/Makefile +@@ -50,6 +50,7 @@ + + LIBVERS = 1 + ++POSIXDIR = ../mDNSPosix + COREDIR = ../mDNSCore + SHAREDDIR ?= ../mDNSShared + JDK = /usr/jdk +@@ -57,11 +58,11 @@ JDK = /usr/jdk + CC = @cc + BISON = @bison + FLEX = @flex +-LD = ld -shared ++LD =@LD + CP = cp + RM = rm + LN = ln -s -f +-CFLAGS_COMMON = -I$(COREDIR) -I$(SHAREDDIR) -I$(OBJDIR) -fwrapv -W -Wall -DPID_FILE=\"/var/run/mdnsd.pid\" -DMDNS_UDS_SERVERPATH=\"/var/run/mdnsd\" ++CFLAGS_COMMON = -I$(POSIXDIR) -I$(COREDIR) -I$(SHAREDDIR) -I$(OBJDIR) -fwrapv -W -Wall -DPID_FILE=\"/var/run/mdnsd.pid\" -DMDNS_UDS_SERVERPATH=\"/var/run/mdnsd\" + CFLAGS_PTHREAD = + LINKOPTS = + LINKOPTS_PTHREAD = -lpthread +@@ -69,7 +70,7 @@ LDSUFFIX = so + JAVACFLAGS_OS = -fPIC -shared -ldns_sd + + # Set up diverging paths for debug vs. prod builds +-DEBUG=0 ++DEBUG?=1 + ifeq ($(DEBUG),1) + CFLAGS_DEBUG = -g -DMDNS_DEBUGMSGS=2 + OBJDIR = objects/debug +@@ -103,6 +104,7 @@ else + ifeq ($(findstring linux,$(os)),linux) + CFLAGS_OS = -D_GNU_SOURCE -DHAVE_IPV6 -DNOT_HAVE_SA_LEN -DUSES_NETLINK -DHAVE_LINUX -DTARGET_OS_LINUX -fno-strict-aliasing + LD = gcc -shared ++LINKOPTS = --hash-style=gnu + FLEXFLAGS_OS = -l + JAVACFLAGS_OS += -I$(JDK)/include/linux + +@@ -210,7 +212,7 @@ endif + endif + endif + +-CFLAGS = $(CFLAGS_COMMON) $(CFLAGS_OS) $(CFLAGS_DEBUG) ++CFLAGS_BUILD = $(CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_OS) $(CFLAGS_DEBUG) + + ############################################################################# + +@@ -246,8 +248,7 @@ Daemon: setup $(BUILDDIR)/mdnsd + @echo "Responder daemon done" + + $(BUILDDIR)/mdnsd: $(DAEMONOBJS) +- $(CC) -o $@ $+ $(LINKOPTS) +- @$(STRIP) $@ ++ $(CC) -o $@ $+ + + # libdns_sd target builds the client library + libdns_sd: setup $(BUILDDIR)/libdns_sd.$(LDSUFFIX) +@@ -256,22 +257,18 @@ libdns_sd: setup $(BUILDDIR)/libdns_sd.$ + CLIENTLIBOBJS = $(OBJDIR)/dnssd_clientlib.c.so.o $(OBJDIR)/dnssd_clientstub.c.so.o $(OBJDIR)/dnssd_ipc.c.so.o + + $(BUILDDIR)/libdns_sd.$(LDSUFFIX): $(CLIENTLIBOBJS) +- @$(LD) $(LINKOPTS) -o $@ $+ +- @$(STRIP) $@ ++ $(LD) -shared $(LINKOPTS) -o $@ $+ + +-Clients: setup libdns_sd ../Clients/build/dns-sd ++Clients: setup libdns_sd ++ @$(MAKE) -C ../Clients DEBUG=${DEBUG} + @echo "Clients done" + +-../Clients/build/dns-sd: +- @$(MAKE) -C ../Clients +- + # nss_mdns target builds the Name Service Switch module + nss_mdns: setup $(BUILDDIR)/$(NSSLIBFILE) + @echo "Name Service Switch module done" + + $(BUILDDIR)/$(NSSLIBFILE): $(CLIENTLIBOBJS) $(OBJDIR)/nss_mdns.c.so.o +- @$(LD) $(LINKOPTS) -o $@ $+ +- @$(STRIP) $@ ++ $(LD) -shared $(LINKOPTS) -o $@ $+ + + ############################################################################# + +@@ -469,55 +466,55 @@ dnsextd: setup $(BUILDDIR)/dnsextd + @echo "dnsextd done" + + $(BUILDDIR)/mDNSClientPosix: $(APPOBJ) $(OBJDIR)/Client.c.o +- $(CC) $+ -o $@ $(LINKOPTS) ++ $(CC) $+ -o $@ + + $(BUILDDIR)/mDNSResponderPosix: $(COMMONOBJ) $(OBJDIR)/Responder.c.o +- $(CC) $+ -o $@ $(LINKOPTS) ++ $(CC) $+ -o $@ + + $(BUILDDIR)/mDNSProxyResponderPosix: $(COMMONOBJ) $(OBJDIR)/ProxyResponder.c.o +- $(CC) $+ -o $@ $(LINKOPTS) ++ $(CC) $+ -o $@ + + $(BUILDDIR)/mDNSIdentify: $(SPECIALOBJ) $(OBJDIR)/Identify.c.o +- $(CC) $+ -o $@ $(LINKOPTS) ++ $(CC) $+ -o $@ + + $(OBJDIR)/Identify.c.o: $(COREDIR)/mDNS.c # Note: Identify.c textually imports mDNS.c + + $(BUILDDIR)/mDNSNetMonitor: $(SPECIALOBJ) $(OBJDIR)/NetMonitor.c.o +- $(CC) $+ -o $@ $(LINKOPTS) ++ $(CC) $+ -o $@ + + $(OBJDIR)/NetMonitor.c.o: $(COREDIR)/mDNS.c # Note: NetMonitor.c textually imports mDNS.c + + $(BUILDDIR)/dnsextd: $(DNSEXTDOBJ) $(OBJDIR)/dnsextd.c.threadsafe.o +- $(CC) $+ -o $@ $(LINKOPTS) $(LINKOPTS_PTHREAD) ++ $(CC) $+ -o $@ $(LINKOPTS_PTHREAD) + + ############################################################################# + + # Implicit rules + $(OBJDIR)/%.c.o: %.c +- $(CC) $(CFLAGS) -c -o $@ $< ++ $(CC) $(CFLAGS_BUILD) -c -o $@ $< + + $(OBJDIR)/%.c.o: $(COREDIR)/%.c +- $(CC) $(CFLAGS) -c -o $@ $< ++ $(CC) $(CFLAGS_BUILD) -c -o $@ $< + + $(OBJDIR)/%.c.o: $(SHAREDDIR)/%.c +- $(CC) $(CFLAGS) -c -o $@ $< ++ $(CC) $(CFLAGS_BUILD) -c -o $@ $< + + $(OBJDIR)/%.c.threadsafe.o: %.c +- $(CC) $(CFLAGS) $(CFLAGS_PTHREAD) -D_REENTRANT -c -o $@ $< ++ $(CC) $(CFLAGS_BUILD) $(CFLAGS_PTHREAD) -D_REENTRANT -c -o $@ $< + + $(OBJDIR)/%.c.threadsafe.o: $(SHAREDDIR)/%.c +- $(CC) $(CFLAGS) $(CFLAGS_PTHREAD) -D_REENTRANT -c -o $@ $< ++ $(CC) $(CFLAGS_BUILD) $(CFLAGS_PTHREAD) -D_REENTRANT -c -o $@ $< + + $(OBJDIR)/%.c.so.o: %.c +- $(CC) $(CFLAGS) -c -fPIC -o $@ $< ++ $(CC) $(CFLAGS_BUILD) -c -fPIC -o $@ $< + + $(OBJDIR)/%.c.so.o: $(SHAREDDIR)/%.c +- $(CC) $(CFLAGS) -c -fPIC -o $@ $< ++ $(CC) $(CFLAGS_BUILD) -c -fPIC -o $@ $< + + $(OBJDIR)/%.y.o: $(SHAREDDIR)/%.y + $(BISON) -o $(OBJDIR)/$*.c -d $< +- $(CC) $(CFLAGS) -c -o $@ $(OBJDIR)/$*.c ++ $(CC) $(CFLAGS_BUILD) -c -o $@ $(OBJDIR)/$*.c + + $(OBJDIR)/%.l.o: $(SHAREDDIR)/%.l + $(FLEX) $(FLEXFLAGS_OS) -i -o$(OBJDIR)/$*.l.c $< +- $(CC) $(CFLAGS) -Wno-error -c -o $@ $(OBJDIR)/$*.l.c ++ $(CC) $(CFLAGS_BUILD) -Wno-error -c -o $@ $(OBJDIR)/$*.l.c diff --git a/device-software/meta-edison-middleware/recipes-connectivity/mdns/files/mdns.service b/device-software/meta-edison-middleware/recipes-connectivity/mdns/files/mdns.service index 5732e78..531d142 100644 --- a/device-software/meta-edison-middleware/recipes-connectivity/mdns/files/mdns.service +++ b/device-software/meta-edison-middleware/recipes-connectivity/mdns/files/mdns.service @@ -3,7 +3,11 @@ Description=Zero-configuration networking After=network.target [Service] +Type=forking +ExecStartPre=/bin/rm -f /var/run/mdnsd.pid ExecStart=/usr/sbin/mdnsd +ExecReload=/bin/kill -HUP $MAINPID +PIDFile=/var/run/mdnsd.pid Restart=always RestartSec=10s diff --git a/device-software/meta-edison-middleware/recipes-connectivity/mdns/mdns_544.bb b/device-software/meta-edison-middleware/recipes-connectivity/mdns/mdns_544.bb index e1633b1..1d3f0bd 100644 --- a/device-software/meta-edison-middleware/recipes-connectivity/mdns/mdns_544.bb +++ b/device-software/meta-edison-middleware/recipes-connectivity/mdns/mdns_544.bb @@ -1,28 +1,33 @@ DESCRIPTION = "Bonjour, also known as zero-configuration networking, enables automatic discovery of computers, devices, and services on IP networks." HOMEPAGE = "http://developer.apple.com/networking/bonjour/" LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=31c50371921e0fb731003bbc665f29bf" -S = "${EDISONREPO_TOP_DIR}/mw/mdns" +PR = "r1" -SRC_URI = "file://mdns.service" - -LIC_FILES_CHKSUM = " \ - file://LICENSE;md5=31c50371921e0fb731003bbc665f29bf \ +SRC_URI = "http://opensource.apple.com/tarballs/mDNSResponder/mDNSResponder-${PV}.tar.gz \ + file://build.patch \ + file://mdns.service \ " +SRC_URI[md5sum] = "39142ab70bd82a096801ce346f86cbab" +SRC_URI[sha256sum] = "c6ad1d53c28d28c0e3689bdf5efd9ce6f5c4c3692e8ad76e5eeb4d0c248929ac" + PARALLEL_MAKE = "" +S = "${WORKDIR}/mDNSResponder-544" + do_compile() { cd mDNSPosix - oe_runmake os=linux + oe_runmake os=linux DEBUG=0 } do_install () { install -d ${D}${sbindir} - install -m 0755 mDNSPosix/build/debug/mdnsd ${D}${sbindir} + install -m 0755 mDNSPosix/build/prod/mdnsd ${D}${sbindir} install -d ${D}${libdir} - cp mDNSPosix/build/debug/libdns_sd.so ${D}${libdir}/libdns_sd.so.1 + cp mDNSPosix/build/prod/libdns_sd.so ${D}${libdir}/libdns_sd.so.1 chmod 0644 ${D}${libdir}/libdns_sd.so.1 ln -s libdns_sd.so.1 ${D}${libdir}/libdns_sd.so @@ -36,7 +41,7 @@ do_install () { install -m 0755 Clients/build/dns-sd ${D}${bindir} install -d ${D}${libdir} - oe_libinstall -C mDNSPosix/build/debug -so libnss_mdns-0.2 ${D}${libdir} + oe_libinstall -C mDNSPosix/build/prod -so libnss_mdns-0.2 ${D}${libdir} ln -s libnss_mdns-0.2.so ${D}${libdir}/libnss_mdns.so.2 install -d ${D}${sysconfdir} diff --git a/device-software/meta-edison-middleware/recipes-connectivity/mosquitto/files/build.patch b/device-software/meta-edison-middleware/recipes-connectivity/mosquitto/files/build.patch new file mode 100644 index 0000000..48c0653 --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-connectivity/mosquitto/files/build.patch @@ -0,0 +1,71 @@ +Index: mosquitto-1.3.4/client/Makefile +=================================================================== +--- mosquitto-1.3.4.orig/client/Makefile ++++ mosquitto-1.3.4/client/Makefile +@@ -21,8 +21,8 @@ sub_client.o : sub_client.c ../lib/libmo + + install : all + $(INSTALL) -d ${DESTDIR}$(prefix)/bin +- $(INSTALL) -s --strip-program=$(STRIP) mosquitto_pub ${DESTDIR}${prefix}/bin/mosquitto_pub +- $(INSTALL) -s --strip-program=$(STRIP) mosquitto_sub ${DESTDIR}${prefix}/bin/mosquitto_sub ++ $(INSTALL) mosquitto_pub ${DESTDIR}${prefix}/bin/mosquitto_pub ++ $(INSTALL) mosquitto_sub ${DESTDIR}${prefix}/bin/mosquitto_sub + + uninstall : + -rm -f ${DESTDIR}${prefix}/bin/mosquitto_pub +Index: mosquitto-1.3.4/config.mk +=================================================================== +--- mosquitto-1.3.4.orig/config.mk ++++ mosquitto-1.3.4/config.mk +@@ -213,7 +213,7 @@ endif + + + INSTALL?=install +-prefix=/usr/local ++prefix=/usr + mandir=${prefix}/share/man + localedir=${prefix}/share/locale + STRIP?=strip +Index: mosquitto-1.3.4/lib/Makefile +=================================================================== +--- mosquitto-1.3.4.orig/lib/Makefile ++++ mosquitto-1.3.4/lib/Makefile +@@ -25,7 +25,7 @@ all : libmosquitto.so.${SOVERSION} libmo + + install : all + $(INSTALL) -d ${DESTDIR}$(prefix)/lib${LIB_SUFFIX}/ +- $(INSTALL) -s --strip-program=$(STRIP) libmosquitto.so.${SOVERSION} ${DESTDIR}${prefix}/lib${LIB_SUFFIX}/libmosquitto.so.${SOVERSION} ++ $(INSTALL) libmosquitto.so.${SOVERSION} ${DESTDIR}${prefix}/lib${LIB_SUFFIX}/libmosquitto.so.${SOVERSION} + ln -sf libmosquitto.so.${SOVERSION} ${DESTDIR}${prefix}/lib${LIB_SUFFIX}/libmosquitto.so + $(INSTALL) -d ${DESTDIR}${prefix}/include/ + $(INSTALL) mosquitto.h ${DESTDIR}${prefix}/include/mosquitto.h +Index: mosquitto-1.3.4/lib/cpp/Makefile +=================================================================== +--- mosquitto-1.3.4.orig/lib/cpp/Makefile ++++ mosquitto-1.3.4/lib/cpp/Makefile +@@ -10,7 +10,7 @@ all : libmosquittopp.so.${SOVERSION} + + install : all + $(INSTALL) -d ${DESTDIR}$(prefix)/lib${LIB_SUFFIX}/ +- $(INSTALL) -s --strip-program=$(STRIP) libmosquittopp.so.${SOVERSION} ${DESTDIR}${prefix}/lib${LIB_SUFFIX}/libmosquittopp.so.${SOVERSION} ++ $(INSTALL) libmosquittopp.so.${SOVERSION} ${DESTDIR}${prefix}/lib${LIB_SUFFIX}/libmosquittopp.so.${SOVERSION} + ln -sf libmosquittopp.so.${SOVERSION} ${DESTDIR}${prefix}/lib${LIB_SUFFIX}/libmosquittopp.so + $(INSTALL) -d ${DESTDIR}${prefix}/include/ + $(INSTALL) mosquittopp.h ${DESTDIR}${prefix}/include/mosquittopp.h +Index: mosquitto-1.3.4/src/Makefile +=================================================================== +--- mosquitto-1.3.4.orig/src/Makefile ++++ mosquitto-1.3.4/src/Makefile +@@ -100,10 +100,10 @@ mosquitto_passwd.o : mosquitto_passwd.c + + install : all + $(INSTALL) -d ${DESTDIR}$(prefix)/sbin +- $(INSTALL) -s --strip-program=$(STRIP) mosquitto ${DESTDIR}${prefix}/sbin/mosquitto ++ $(INSTALL) mosquitto ${DESTDIR}${prefix}/sbin/mosquitto + $(INSTALL) mosquitto_plugin.h ${DESTDIR}${prefix}/include/mosquitto_plugin.h + ifeq ($(WITH_TLS),yes) +- $(INSTALL) -s --strip-program=$(STRIP) mosquitto_passwd ${DESTDIR}${prefix}/bin/mosquitto_passwd ++ $(INSTALL) mosquitto_passwd ${DESTDIR}${prefix}/bin/mosquitto_passwd + endif + + uninstall : diff --git a/device-software/meta-edison-middleware/recipes-connectivity/mosquitto/files/mosquitto.service b/device-software/meta-edison-middleware/recipes-connectivity/mosquitto/files/mosquitto.service new file mode 100644 index 0000000..25f68fa --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-connectivity/mosquitto/files/mosquitto.service @@ -0,0 +1,15 @@ +[Unit] +Description=Mosquitto - lightweight server implementation of the MQTT and MQTT-SN protocols +ConditionPathExists=/etc/mosquitto/mosquitto.conf +After=network.target + +[Service] +Type=simple +ExecStartPre=/bin/rm -f /var/run/mosquitto.pid +ExecStart=/usr/sbin/mosquitto -c /etc/mosquitto/mosquitto.conf +ExecReload=/bin/kill -HUP $MAINPID +PIDFile=/var/run/mosquitto.pid +Restart=on-failure + +[Install] +WantedBy=multi-user.target diff --git a/device-software/meta-edison-middleware/recipes-connectivity/mosquitto/mosquitto_1.3.4.bb b/device-software/meta-edison-middleware/recipes-connectivity/mosquitto/mosquitto_1.3.4.bb new file mode 100644 index 0000000..84c3307 --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-connectivity/mosquitto/mosquitto_1.3.4.bb @@ -0,0 +1,55 @@ +SUMMARY = "Open source MQTT v3.1 implemention" +DESCRIPTION = "Mosquitto is an open source (BSD licensed) message broker that implements the MQ Telemetry Transport protocol version 3.1. MQTT provides a lightweight method of carrying out messaging using a publish/subscribe model. " +HOMEPAGE = "http://mosquitto.org/" +SECTION = "console/network" +LICENSE = "BSD" +LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=89aa5ea5f32e4260d84c5d185ee3add4" + +DEPENDS = "openssl c-ares" + +PR = "r0" + +SRC_URI = "http://mosquitto.org/files/source/mosquitto-${PV}.tar.gz \ + file://build.patch \ + file://mosquitto.service \ +" + +SRC_URI[md5sum] = "9d729849efd74c6e3eee17a4a002e1e9" +SRC_URI[sha256sum] = "0a3982d6b875a458909c8828731da04772035468700fa7eb2f0885f4bd6d0dbc" + +inherit autotools + +do_install_append () { + install -d ${D}${libbir} + install -m 0644 lib/libmosquitto.a ${D}${libdir}/ + + install -d ${D}${systemd_unitdir}/system/ + install -m 0644 ${WORKDIR}/mosquitto.service ${D}${systemd_unitdir}/system/ + + cp ${D}${sysconfdir}/mosquitto/mosquitto.conf.example ${D}${sysconfdir}/mosquitto/mosquitto.conf + sed 's/#user mosquitto/user root/' -i ${D}${sysconfdir}/mosquitto/mosquitto.conf +} + +PACKAGES += "libmosquitto1 libmosquittopp1 ${PN}-clients ${PN}-python" + +FILES_${PN} = "${sbindir}/mosquitto \ + ${bindir}/mosquitto_passwd \ + ${sysconfdir} \ + ${systemd_unitdir}/system/mosquitto.service \ +" + +FILES_libmosquitto1 = "${libdir}/libmosquitto.so.1" + +FILES_libmosquittopp1 = "${libdir}/libmosquittopp.so.1" + +FILES_${PN}-clients = "${bindir}/mosquitto_pub \ + ${bindir}/mosquitto_sub \ +" + +FILES_${PN}-staticdev += "${libdir}/libmosquitto.a" + +FILES_${PN}-python = "/usr/lib/python2.7/site-packages" + +inherit systemd + +SYSTEMD_SERVICE_${PN} = "mosquitto.service" diff --git a/device-software/meta-edison-middleware/recipes-connectivity/paho-mqtt/files/makefile.patch b/device-software/meta-edison-middleware/recipes-connectivity/paho-mqtt/files/makefile.patch new file mode 100644 index 0000000..4d1e25b --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-connectivity/paho-mqtt/files/makefile.patch @@ -0,0 +1,19 @@ +--- + Makefile | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/Makefile b/Makefile +index 33bd2d0..84262bd 100644 +--- a/Makefile ++++ b/Makefile +@@ -115,7 +115,8 @@ LDFLAGS_AS = -shared -Wl,-soname,lib${MQTTLIB_AS}.so.${MAJOR_VERSION} -lpthread + + all: build + +-build: | mkdir ${MQTTLIB_C_TARGET} ${MQTTLIB_CS_TARGET} ${MQTTLIB_A_TARGET} ${MQTTLIB_AS_TARGET} ${MQTTVERSION_TARGET} ${SYNC_SAMPLES} ${ASYNC_SAMPLES} ${SYNC_TESTS} ${SYNC_SSL_TESTS} ${ASYNC_TESTS} ${ASYNC_SSL_TESTS} ++build: | mkdir ${MQTTLIB_C_TARGET} ${MQTTLIB_CS_TARGET} ${MQTTLIB_A_TARGET} ${MQTTLIB_AS_TARGET} ++#${MQTTVERSION_TARGET} ${SYNC_SAMPLES} ${ASYNC_SAMPLES} ${SYNC_TESTS} ${SYNC_SSL_TESTS} ${ASYNC_TESTS} ${ASYNC_SSL_TESTS} + + clean: + rm -rf ${blddir}/* +-- diff --git a/device-software/meta-edison-middleware/recipes-connectivity/paho-mqtt/paho-mqtt_3.1.bb b/device-software/meta-edison-middleware/recipes-connectivity/paho-mqtt/paho-mqtt_3.1.bb index 7f3bd2f..37cab21 100644 --- a/device-software/meta-edison-middleware/recipes-connectivity/paho-mqtt/paho-mqtt_3.1.bb +++ b/device-software/meta-edison-middleware/recipes-connectivity/paho-mqtt/paho-mqtt_3.1.bb @@ -1,13 +1,24 @@ DESCRIPTION = "Paho MQTT - user libraries for the MQTT and MQTT-SN protocols" +DESCRIPTION = "Client implementation of open and standard messaging protocols for Machine-to-Machine (M2M) and Internet of Things (IoT)." +HOMEPAGE = "http://www.eclipse.org/paho/" +SECTION = "console/network" LICENSE = "EPL-1.0 | EDL-1.0" -S = "${EDISONREPO_TOP_DIR}/mw/mqtt" - LIC_FILES_CHKSUM = " \ - file://edl-v10;md5=3adfcc70f5aeb7a44f3f9b495aa1fbf3 \ - file://epl-v10;md5=659c8e92a40b6df1d9e3dccf5ae45a08 \ + file://edl-v10;md5=3adfcc70f5aeb7a44f3f9b495aa1fbf3 \ + file://epl-v10;md5=659c8e92a40b6df1d9e3dccf5ae45a08 \ +" + +PR = "r1" + +SRC_URI = "git://git.eclipse.org/gitroot/paho/org.eclipse.paho.mqtt.c.git;protocol=http \ + file://makefile.patch \ " +SRCREV = "93a064dbe9fd2fc84b8bb2701e10d2de8004a11c" + +S = "${WORKDIR}/git" + do_compile() { oe_runmake } @@ -25,4 +36,4 @@ do_install() { } DEPENDS = "openssl" - +RDEPENDS_${PN} = "openssl" diff --git a/device-software/meta-edison-middleware/recipes-connectivity/sshpass/sshpass.inc b/device-software/meta-edison-middleware/recipes-connectivity/sshpass/sshpass.inc new file mode 100644 index 0000000..b19ae43 --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-connectivity/sshpass/sshpass.inc @@ -0,0 +1,10 @@ +DESCRIPTION = "Non-interactive ssh password auth" +HOMEPAGE = "http://sshpass.sourceforge.net/" +SECTION = "console/network" +LICENSE = "GPLv2" + +SRC_URI = "${SOURCEFORGE_MIRROR}/sshpass/sshpass-${PV}.tar.gz" + +INC_PR = "r0" + +inherit autotools diff --git a/device-software/meta-edison-middleware/recipes-connectivity/sshpass/sshpass_1.05.bb b/device-software/meta-edison-middleware/recipes-connectivity/sshpass/sshpass_1.05.bb new file mode 100644 index 0000000..a345dbd --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-connectivity/sshpass/sshpass_1.05.bb @@ -0,0 +1,8 @@ +PR = "${INC_PR}.0" + +require sshpass.inc + +LIC_FILES_CHKSUM = "file://COPYING;md5=94d55d512a9ba36caa9b7df079bae19f" + +SRC_URI[md5sum] = "c52d65fdee0712af6f77eb2b60974ac7" +SRC_URI[sha256sum] = "c3f78752a68a0c3f62efb3332cceea0c8a1f04f7cf6b46e00ec0c3000bc8483e" diff --git a/device-software/meta-edison-middleware/recipes-connectivity/zeromq/cppzmq_git.bb b/device-software/meta-edison-middleware/recipes-connectivity/zeromq/cppzmq_git.bb new file mode 100644 index 0000000..26e89b1 --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-connectivity/zeromq/cppzmq_git.bb @@ -0,0 +1,19 @@ +DESCRIPTION = "C++ bindings for ZeroMQ" +HOMEPAGE = "http://www.zeromq.org" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE;md5=db174eaf7b55a34a7c89551197f66e94" +DEPENDS = "zeromq" +SRCREV = "ee47ae4cddc304741526c9bb2035f98c3274e0ec" + +SRC_URI = "git://github.com/zeromq/cppzmq.git" + +S = "${WORKDIR}/git" + +do_install () { + install -d ${D}/usr/include + install -m 0755 ${S}/zmq.hpp ${D}/usr/include/ +} + +PACKAGES = "${PN}-dev" + +RDEPENDS_${PN}-dev = "zeromq-dev" diff --git a/device-software/meta-edison-middleware/recipes-connectivity/zeromq/zeromq_4.0.4.bb b/device-software/meta-edison-middleware/recipes-connectivity/zeromq/zeromq_4.0.4.bb index 64235d4..2b6b225 100644 --- a/device-software/meta-edison-middleware/recipes-connectivity/zeromq/zeromq_4.0.4.bb +++ b/device-software/meta-edison-middleware/recipes-connectivity/zeromq/zeromq_4.0.4.bb @@ -2,7 +2,7 @@ DESCRIPTION = "Zeromq - The Intelligent Transport Layer" HOMEPAGE = "http://www.zeromq.org" LICENSE = "LGPLv3+" -PR = "r1" +PR = "r2" LIC_FILES_CHKSUM = " \ file://COPYING.LESSER;md5=d5311495d952062e0e4fbba39cbf3de1 \ @@ -13,7 +13,3 @@ SRC_URI[md5sum] = "f3c3defbb5ef6cc000ca65e529fdab3b" SRC_URI[sha256sum] = "1ef71d46e94f33e27dd5a1661ed626cd39be4d2d6967792a275040e34457d399" inherit autotools gettext - -do_configure_prepend() { - ./autogen.sh -} diff --git a/device-software/meta-edison-middleware/recipes-core/images/edison-image.bbappend b/device-software/meta-edison-middleware/recipes-core/images/edison-image.bbappend index 976bdf3..c43c465 100644 --- a/device-software/meta-edison-middleware/recipes-core/images/edison-image.bbappend +++ b/device-software/meta-edison-middleware/recipes-core/images/edison-image.bbappend @@ -1,19 +1,28 @@ IMAGE_INSTALL += "packagegroup-core-buildessential" -IMAGE_INSTALL += "zeromq zeromq-dev" -IMAGE_INSTALL += "rsmb" -IMAGE_INSTALL += "nodejs" -IMAGE_INSTALL += "paho-mqtt paho-mqtt-dev" -IMAGE_INSTALL += "mdns mdns-dev" +IMAGE_INSTALL += "iotkit-opkg" +IMAGE_INSTALL += "zeromq-dev" +IMAGE_INSTALL += "cppzmq-dev" +IMAGE_INSTALL += "paho-mqtt-dev" +IMAGE_INSTALL += "mdns-dev" IMAGE_INSTALL += "iotkit-comm-js" -IMAGE_INSTALL += "iotkit-comm-c iotkit-comm-c-dev" +IMAGE_INSTALL += "iotkit-comm-c-dev" IMAGE_INSTALL += "iotkit-agent" +IMAGE_INSTALL += "iotkit-lib-c-dev" IMAGE_INSTALL += "xdk-daemon" IMAGE_INSTALL += "oobe" +# mosquitto and dependencies +IMAGE_INSTALL += "mosquitto-dev" +IMAGE_INSTALL += "mosquitto-clients" + +# node and sub-components +IMAGE_INSTALL += "nodejs-dev" +IMAGE_INSTALL += "nodejs-npm" + # MRAA -IMAGE_INSTALL += "mraa mraa-dev" +IMAGE_INSTALL += "mraa-dev" IMAGE_INSTALL += "mraa-doc" # UPM -IMAGE_INSTALL += "upm upm-dev" +IMAGE_INSTALL += "upm-dev" diff --git a/device-software/meta-edison-middleware/recipes-devtools/iotkit-agent/iotkit-agent_0.2.0.bb b/device-software/meta-edison-middleware/recipes-devtools/iotkit-agent/iotkit-agent_0.2.0.bb new file mode 100644 index 0000000..29d7d70 --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-devtools/iotkit-agent/iotkit-agent_0.2.0.bb @@ -0,0 +1,84 @@ +DESCRIPTION = "Transparently implements the necessary message formats and transport security as well as device registration" +HOMEPAGE = "http://enableiot.com" +LICENSE = "BSD-2-Clause & BSD-3-Clause & GPL-2.0 & Apache-2.0 & MIT & PD" + +LIC_FILES_CHKSUM = "file://${WORKDIR}/git/LICENSE;md5=30c8ae0368f724cf5f753d08bf033034" + +DEPENDS = "nodejs-native" + +SRC_URI = "git://github.com/intel-iot-devkit/iotkit-agent.git;protocol=https;branch=dprelease;tag=prod-v${PV}" + +S = "${WORKDIR}/git" + +do_compile () { + # changing the home directory to the working directory, the .npmrc will be created in this directory + export HOME=${WORKDIR} + + # does not build dev packages + npm config set dev false + + # access npm registry using http + npm set strict-ssl false + npm config set registry http://registry.npmjs.org/ + + # configure http proxy if neccessary + if [ -n "${http_proxy}" ]; then + npm config set proxy ${http_proxy} + fi + if [ -n "${HTTP_PROXY}" ]; then + npm config set proxy ${HTTP_PROXY} + fi + + # configure cache to be in working directory + npm set cache ${WORKDIR}/npm_cache + + # clear local cache prior to each compile + npm cache clear + + # compile and install node modules in source directory + npm --arch=${TARGET_ARCH} --production --verbose install +} + +do_install () { + install -d ${D}${libdir} + install -d ${D}${libdir}/node_modules/ + install -d ${D}${libdir}/node_modules/iotkit-agent/ + install -d ${D}${sysconfdir}/iotkit-agent/ + install -d ${D}${libdir}/node_modules/iotkit-agent/config/ + install -m 0644 ${S}/package.json ${D}${libdir}/node_modules/iotkit-agent/ + install -m 0644 ${S}/config/config.json ${D}${sysconfdir}/iotkit-agent/ + install -d ${D}${datadir}/iotkit-agent/ + install -d ${D}${bindir} + + cp -r ${S}/node_modules ${D}${libdir}/node_modules/iotkit-agent/ + cp -r ${S}/admin ${D}${libdir}/node_modules/iotkit-agent/ + cp -r ${S}/api ${D}${libdir}/node_modules/iotkit-agent/ + cp -r ${S}/bin ${D}${libdir}/node_modules/iotkit-agent/ + cp -r ${S}/certs ${D}${datadir}/iotkit-agent/ + cp -r ${S}/data ${D}${datadir}/iotkit-agent/ + cp -r ${S}/lib ${D}${libdir}/node_modules/iotkit-agent/ + cp -r ${S}/listeners ${D}${libdir}/node_modules/iotkit-agent/ + install -m 0644 ${S}/config/index.js ${D}${libdir}/node_modules/iotkit-agent/config + install -m 0755 ${S}/iotkit-admin.js ${D}${libdir}/node_modules/iotkit-agent/ + install -m 0755 ${S}/iotkit-agent.js ${D}${libdir}/node_modules/iotkit-agent/ + ln -s ../lib/node_modules/iotkit-agent/iotkit-agent.js ${D}${bindir}/iotkit-agent + ln -s ../lib/node_modules/iotkit-agent/iotkit-admin.js ${D}${bindir}/iotkit-admin + + install -d ${D}${systemd_unitdir}/system/ + install -m 0644 ${S}/iotkit-agent.service ${D}${systemd_unitdir}/system/ +} + +inherit systemd + +# since the agent requires registration before running we don't want to start +# the systemd service by default +SYSTEMD_AUTO_ENABLE = "disable" +SYSTEMD_SERVICE_${PN} = "iotkit-agent.service" + +FILES_${PN} = "${libdir}/node_modules/ \ + ${bindir}/iotkit-agent \ + ${bindir}/iotkit-admin \ + ${datadir}/iotkit-agent/ \ + ${sysconfdir}/iotkit-agent/" + +PACKAGES = "${PN}" diff --git a/device-software/meta-edison-middleware/recipes-devtools/iotkit-comm-c/iotkit-comm-c_0.1.1.bb b/device-software/meta-edison-middleware/recipes-devtools/iotkit-comm-c/iotkit-comm-c_0.1.1.bb index ffcb8f3..c1c0260 100644 --- a/device-software/meta-edison-middleware/recipes-devtools/iotkit-comm-c/iotkit-comm-c_0.1.1.bb +++ b/device-software/meta-edison-middleware/recipes-devtools/iotkit-comm-c/iotkit-comm-c_0.1.1.bb @@ -1,12 +1,17 @@ DESCRIPTION = "Inter of Things communication library for device-to-device and device-to-cloud messaging" -LICENSE = "LGPLv2.1" +LICENSE = "MIT" -S = "${EDISONREPO_TOP_DIR}/mw/iecf-c" +PR = "r2" + +SRC_URI = "git://github.com/intel-iot-devkit/iotkit-comm-c.git;protocol=git" +SRCREV = "2367175b07852a8d2600677f5d893af49973f422" LIC_FILES_CHKSUM = " \ - file://LICENSE;md5=1a6d268fd218675ffea8be556788b780 \ + file://COPYING;md5=e8db6501ed294e65418a933925d12058 \ " +S = "${WORKDIR}/git" + DEPENDS = "zeromq mdns paho-mqtt" inherit pkgconfig cmake @@ -33,7 +38,9 @@ do_install() { install -d ${D}${libdir} install ${B}/lib/libiotkit-comm/libiotkit-comm.so ${D}${libdir}/ install ${B}/lib/plugins/libiotkitpubsub/libiotkit-agent-client.so ${D}${libdir}/ + install ${B}/lib/plugins/libiotkitpubsub/libiotkit-agent-service.so ${D}${libdir}/ install ${B}/lib/plugins/libmqttpubsub/libmqttpubsub-client.so ${D}${libdir}/ + install ${B}/lib/plugins/libmqttpubsub/libmqttpubsub-service.so ${D}${libdir}/ install ${B}/lib/plugins/libzmqpubsub/libzmqpubsub-client.so ${D}${libdir}/ install ${B}/lib/plugins/libzmqpubsub/libzmqpubsub-service.so ${D}${libdir}/ install ${B}/lib/plugins/libzmqreqrep/libzmqreqrep-client.so ${D}${libdir}/ @@ -97,10 +104,10 @@ do_install() { } FILES_${PN} += "${libdir}" -RDEPENDS_${PN} = "zeromq mdns paho-mqtt rsmb" +RDEPENDS_${PN} = "zeromq mdns paho-mqtt mosquitto sshpass" PACKAGES += "${PN}-tests" -RDEPENDS_${PN}-tests += "${PN} gcov" +RDEPENDS_${PN}-tests += "${PN} gcov cmake" FILES_${PN}-dev = "${includedir} ${datadir}/iotkit-comm/examples/c/" FILES_${PN}-dbg += "${datadir}/iotkit-comm/examples/c/.debug/ ${datadir}/iotkit-comm/tests/c/iotkitpubsub/.debug/ ${datadir}/iotkit-comm/tests/c/mqttpubsub/.debug/ ${datadir}/iotkit-comm/tests/c/zmqpubsub/.debug/ ${datadir}/iotkit-comm/tests/c/libiotkit-comm/.debug/ ${datadir}/iotkit-comm/tests/c/zmqreqrep/.debug/" diff --git a/device-software/meta-edison-middleware/recipes-devtools/iotkit-comm-js/iotkit-comm-js_0.1.1.bb b/device-software/meta-edison-middleware/recipes-devtools/iotkit-comm-js/iotkit-comm-js_0.1.1.bb index 864e46e..8b0d20f 100644 --- a/device-software/meta-edison-middleware/recipes-devtools/iotkit-comm-js/iotkit-comm-js_0.1.1.bb +++ b/device-software/meta-edison-middleware/recipes-devtools/iotkit-comm-js/iotkit-comm-js_0.1.1.bb @@ -1,12 +1,17 @@ DESCRIPTION = "Inter of Things communication library for device-to-device and device-to-cloud messaging" -LICENSE = "LGPLv2.1" +LICENSE = "MIT" -S = "${EDISONREPO_TOP_DIR}/mw/iecf-js" +PR = "r2" + +SRC_URI = "git://github.com/intel-iot-devkit/iotkit-comm-js.git;protocol=git" +SRCREV = "5ccea56e88755c9f6e3cd37bb5fc5d747b8496aa" LIC_FILES_CHKSUM = " \ - file://LICENSE;md5=1a6d268fd218675ffea8be556788b780 \ + file://COPYING;md5=e8db6501ed294e65418a933925d12058 \ " +S = "${WORKDIR}/git" + DEPENDS = "nodejs-native zeromq mdns paho-mqtt" do_compile () { @@ -35,14 +40,14 @@ do_compile () { npm cache clear # compile and install node modules in source directory - npm --arch=${TARGET_ARCH} --production --verbose install + npm --arch=${TARGET_ARCH} --verbose install } do_install () { install -d ${D}${libdir}/node_modules/iotkit-comm/ cp -r ${S}/node_modules ${D}${libdir}/node_modules/iotkit-comm/ install -m 644 ${S}/package.json ${D}${libdir}/node_modules/iotkit-comm/ - install -m 644 ${S}/LICENSE ${D}${libdir}/node_modules/iotkit-comm/ + install -m 644 ${S}/COPYING ${D}${libdir}/node_modules/iotkit-comm/ install -m 644 ${S}/README.md ${D}${libdir}/node_modules/iotkit-comm/ install -m 644 ${S}/jsdoc-conf.json ${D}${libdir}/node_modules/iotkit-comm/ cp -r ${S}/lib ${D}${libdir}/node_modules/iotkit-comm/ @@ -50,12 +55,46 @@ do_install () { cp -r ${S}/doc ${D}${libdir}/node_modules/iotkit-comm/ install -d ${D}${datadir}/iotkit-comm/examples/node cp -r ${S}/example/* ${D}${datadir}/iotkit-comm/examples/node + + chmod 755 ${D}${libdir}/node_modules/iotkit-comm/lib/setup.js + install -d ${D}${bindir} + ln -s ../lib/node_modules/iotkit-comm/lib/setup.js ${D}${bindir}/iotkit-comm } -INHIBIT_PACKAGE_DEBUG_SPLIT = "1" INHIBIT_PACKAGE_STRIP = "1" -FILES_${PN} = "${libdir}/node_modules/ ${datadir}/iotkit-comm/examples" -RDEPENDS_${PN} = "nodejs zeromq mdns paho-mqtt rsmb" +PACKAGES = "${PN} ${PN}-test-dependencies" + +FILES_${PN}-test-dependencies = " \ + ${libdir}/node_modules/iotkit-comm/node_modules/.bin/istanbul \ + ${libdir}/node_modules/iotkit-comm/node_modules/.bin/jsdoc \ + ${libdir}/node_modules/iotkit-comm/node_modules/.bin/mocha \ + ${libdir}/node_modules/iotkit-comm/node_modules/.bin/_mocha \ + ${libdir}/node_modules/iotkit-comm/node_modules/chai/ \ + ${libdir}/node_modules/iotkit-comm/node_modules/istanbul/ \ + ${libdir}/node_modules/iotkit-comm/node_modules/jsdoc/ \ + ${libdir}/node_modules/iotkit-comm/node_modules/mocha/ \ +" + +FILES_${PN} = " \ + ${libdir}/node_modules/iotkit-comm/doc/ \ + ${libdir}/node_modules/iotkit-comm/jsdoc-conf.json \ + ${libdir}/node_modules/iotkit-comm/COPYING \ + ${libdir}/node_modules/iotkit-comm/lib/ \ + ${libdir}/node_modules/iotkit-comm/package.json \ + ${libdir}/node_modules/iotkit-comm/README.md \ + ${libdir}/node_modules/iotkit-comm/test \ + ${libdir}/node_modules/iotkit-comm/node_modules/.bin/mqtt_pub \ + ${libdir}/node_modules/iotkit-comm/node_modules/.bin/mqtt_sub \ + ${libdir}/node_modules/iotkit-comm/node_modules/async/ \ + ${libdir}/node_modules/iotkit-comm/node_modules/commander/ \ + ${libdir}/node_modules/iotkit-comm/node_modules/mdns2/ \ + ${libdir}/node_modules/iotkit-comm/node_modules/mqtt/ \ + ${libdir}/node_modules/iotkit-comm/node_modules/read/ \ + ${libdir}/node_modules/iotkit-comm/node_modules/zmq/ \ + ${datadir}/iotkit-comm/examples/ \ + ${bindir}/iotkit-comm \ +" -PACKAGES = "${PN}" +RDEPENDS_${PN} = "nodejs zeromq mdns paho-mqtt mosquitto sshpass" +RDEPENDS_${PN}-test-dependencies = "${PN}" diff --git a/device-software/meta-edison-middleware/recipes-devtools/iotkit-lib-c/iotkit-lib-c_0.1.0.bb b/device-software/meta-edison-middleware/recipes-devtools/iotkit-lib-c/iotkit-lib-c_0.1.0.bb new file mode 100644 index 0000000..629cee7 --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-devtools/iotkit-lib-c/iotkit-lib-c_0.1.0.bb @@ -0,0 +1,49 @@ +SUMMARY = "Transparently implements the necessary message formats and transport security as well as device registration" +SECTION = "libs" +HOMEPAGE = "http://enableiot.com" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://COPYING;md5=e8db6501ed294e65418a933925d12058" + +DEPENDS = "nodejs-native swig-native curl" + +PR = "r1" + +SRC_URI = "git://github.com/enableiot/iotkit-lib-c.git;protocol=https;tag=v1.4.0" + +S = "${WORKDIR}/git" + +EXTRA_OECMAKE += " -DSTAGING_DIR_TARGET=${STAGING_DIR_TARGET}" + +inherit distutils-base pkgconfig python-dir cmake + +do_compile_prepend () { + # when yocto builds in ${D} it does not have access to ../git/.git so git + # describe --tags fails. In order not to tag our version as dirty we use this + # trick + sed -i 's/-dirty//' src/version.c +} + +do_install_prepend () { + # Copy config file + install -d ${D}${sysconfdir}/iotkit-lib + install -d ${D}${datadir}/iotkit-lib + install -m 644 ${S}/config/config.json ${D}${sysconfdir}/iotkit-lib/ + + # Copy test programs + cp -r ${B}/tests/ ${D}${datadir}/iotkit-lib/ + rm -rf ${D}${datadir}/iotkit-lib/tests/CMakeFiles/ + touch ${D}${datadir}/iotkit-lib/.setup.done +} + +PACKAGES =+ "${PN}-tests" + +FILES_${PN}-dbg += "${libdir}/node_modules/iotkitjs/.debug/ \ + ${PYTHON_SITEPACKAGES_DIR}/.debug/ \ + ${datadir}/iotkit-lib/tests/.debug/" + +FILES_${PN}-tests = "${datadir}/iotkit-lib/tests/*" + +FILES_${PN} += "${sysconfdir} \ + ${datadir}/iotkit-lib/.setup.done" + +RDEPENDS_${PN}-tests += "${PN} gcov cmake" diff --git a/device-software/meta-edison-middleware/recipes-devtools/iotkit-opkg/files/iotkit.conf b/device-software/meta-edison-middleware/recipes-devtools/iotkit-opkg/files/iotkit.conf new file mode 100644 index 0000000..a44c5c0 --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-devtools/iotkit-opkg/files/iotkit.conf @@ -0,0 +1 @@ +src iotkit http://iotdk.intel.com/repos/1.1/intelgalactic diff --git a/device-software/meta-edison-middleware/recipes-devtools/iotkit-opkg/iotkit-opkg_0.0.1.bb b/device-software/meta-edison-middleware/recipes-devtools/iotkit-opkg/iotkit-opkg_0.0.1.bb new file mode 100644 index 0000000..019c9ba --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-devtools/iotkit-opkg/iotkit-opkg_0.0.1.bb @@ -0,0 +1,22 @@ +DESCRIPTION="This configures the opkg sources for the iotkit packages" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +SRC_URI = " \ + file://iotkit.conf \ +" + +PR = "r0" + +do_install() { + install -d ${D}${sysconfdir}/opkg + install -m 0644 ${WORKDIR}/iotkit.conf ${D}${sysconfdir}/opkg +} + + +RDEPENDS_${PN} = "opkg" + +FILES_${PN} = "${sysconfdir}/opkg" + +PACKAGES = "${PN}" + diff --git a/device-software/meta-edison-middleware/recipes-devtools/mraa/mraa_0.5.2.bb b/device-software/meta-edison-middleware/recipes-devtools/mraa/mraa_0.5.2.bb new file mode 100644 index 0000000..787c36b --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-devtools/mraa/mraa_0.5.2.bb @@ -0,0 +1,27 @@ +SUMMARY = "Low Level Skeleton Library for Communication on Intel platforms" +SECTION = "libs" +AUTHOR = "Brendan Le Foll, Tom Ingleby" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://COPYING;md5=e8db6501ed294e65418a933925d12058" + +DEPENDS = "nodejs swig-native" + +SRC_URI = "git://github.com/intel-iot-devkit/mraa.git;protocol=git" +SRCREV = "bb3228ad5854b5f289c32737a6a106b139e24a05" + +S = "${WORKDIR}/git" + +inherit distutils-base pkgconfig python-dir cmake + +FILES_${PN}-doc += "${datadir}/mraa/examples/" + +FILES_${PN}-dbg += "${libdir}/node_modules/mraajs/.debug/ \ + ${PYTHON_SITEPACKAGES_DIR}/.debug/" + +do_compile_prepend () { + # when yocto builds in ${D} it does not have access to ../git/.git so git + # describe --tags fails. In order not to tag our version as dirty we use this + # trick + sed -i 's/-dirty//' src/version.c +} \ No newline at end of file diff --git a/device-software/meta-edison-middleware/recipes-devtools/nodejs/nodejs_0.10.28.bb b/device-software/meta-edison-middleware/recipes-devtools/nodejs/nodejs_0.10.28.bb index c2eb76f..a463bc8 100644 --- a/device-software/meta-edison-middleware/recipes-devtools/nodejs/nodejs_0.10.28.bb +++ b/device-software/meta-edison-middleware/recipes-devtools/nodejs/nodejs_0.10.28.bb @@ -7,6 +7,8 @@ LIC_FILES_CHKSUM = "file://LICENSE;md5=4a31e6c424761191227143b86f58a1ef" DEPENDS = "openssl" DEPENDS_class-target = "nodejs-native" +PR = "r1" + SRC_URI = "git://github.com/joyent/node.git;protocol=https;branch=v0.10;tag=v0.10.28" S = "${WORKDIR}/git" @@ -20,8 +22,7 @@ ARCHFLAGS ?= "" # Node is way too cool to use proper autotools, so we install two wrappers to forcefully inject proper arch cflags to workaround gypi do_configure () { export LD="${CXX}" - - ./configure --prefix=${prefix} --without-snapshot ${ARCHFLAGS} + ./configure --prefix=${prefix} --without-snapshot --shared-openssl ${ARCHFLAGS} } do_compile () { @@ -50,6 +51,17 @@ do_install_append_class-target () { fi } +do_install_append_class-native() { + # /usr/bin/npm is symlink to /usr/lib/node_modules/npm/bin/npm-cli.js + # use sed on npm-cli.js because otherwise symlink is replaced with normal file and + # npm-cli.js continues to use old shebang + sed "1s^.*^#\!/usr/bin/env node^g" -i ${D}${libdir}/node_modules/npm/bin/npm-cli.js +} + +do_install_append_class-target() { + sed "1s^.*^#\!${bindir}/env node^g" -i ${D}${libdir}/node_modules/npm/bin/npm-cli.js +} + pkg_postinst_${PN} () { sed -e '/^PATH=/aNODE_PATH=\/usr\/lib\/node_modules\/' \ -e 's/\(^export\)\(.*\)/\1 NODE_PATH\2/' \ @@ -62,10 +74,12 @@ pkg_prerm_${PN} () { -i $D/etc/profile } -RDEPENDS_${PN} = "curl python-shell python-datetime python-subprocess python-crypt python-textutils \ - python-netclient python-ctypes python-misc python-compiler python-multiprocessing" - +RDEPENDS_${PN} = "curl" RDEPENDS_${PN}_class-native = "" -FILES_${PN} += "${libdir}/node/wafadmin ${libdir}/node_modules ${libdir}/dtrace" +PACKAGES += "${PN}-npm" +FILES_${PN}-npm = "${libdir}/node_modules ${bindir}/npm" +RDEPENDS_${PN}-npm = "python-shell python-datetime python-subprocess python-crypt python-textutils \ + python-netclient python-ctypes python-misc python-compiler python-multiprocessing" + BBCLASSEXTEND = "native" diff --git a/device-software/meta-edison-middleware/recipes-devtools/oobe/oobe_0.0.1.bb b/device-software/meta-edison-middleware/recipes-devtools/oobe/oobe_0.0.1.bb index 92b4ec2..ebf73d0 100644 --- a/device-software/meta-edison-middleware/recipes-devtools/oobe/oobe_0.0.1.bb +++ b/device-software/meta-edison-middleware/recipes-devtools/oobe/oobe_0.0.1.bb @@ -1,21 +1,48 @@ DESCRIPTION="The out-of-box configuration service" -LICENSE = "LGPLv2.1" +LICENSE = "MIT" S = "${EDISONREPO_TOP_DIR}/mw/oobe" LIC_FILES_CHKSUM = " \ - file://LICENSE;md5=1a6d268fd218675ffea8be556788b780 \ + file://LICENSE;md5=ea398a763463b76b18da15f013c0c531 \ " DEPENDS = "nodejs-native" do_compile() { + # changing the home directory to the working directory, the .npmrc will be created in this directory + export HOME=${WORKDIR} + + # does not build dev packages + npm config set dev false + + # access npm registry using http + npm set strict-ssl false + npm config set registry http://registry.npmjs.org/ + + # configure http proxy if neccessary + if [ -n "${http_proxy}" ]; then + npm config set proxy ${http_proxy} + fi + if [ -n "${HTTP_PROXY}" ]; then + npm config set proxy ${HTTP_PROXY} + fi + + # configure cache to be in working directory + npm set cache ${WORKDIR}/npm_cache + + # clear local cache prior to each compile + npm cache clear + + # compile and install node modules in source directory + npm --arch=${TARGET_ARCH} --verbose install } do_install() { install -d ${D}${libdir}/edison_config_tools install -d ${D}/var/lib/edison_config_tools cp -r ${S}/src/public ${D}${libdir}/edison_config_tools + cp -r ${S}/node_modules ${D}${libdir}/edison_config_tools install -m 0644 ${S}/src/server.js ${D}${libdir}/edison_config_tools/edison-config-server.js install -d ${D}${systemd_unitdir}/system/ install -m 0644 ${S}/src/edison_config.service ${D}${systemd_unitdir}/system/ diff --git a/device-software/meta-edison-middleware/recipes-devtools/upm/upm_0.1.8.bb b/device-software/meta-edison-middleware/recipes-devtools/upm/upm_0.1.8.bb new file mode 100644 index 0000000..b259d42 --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-devtools/upm/upm_0.1.8.bb @@ -0,0 +1,17 @@ +SUMMARY = "Sensor/Actuator repository for Mraa" +SECTION = "libs" +AUTHOR = "Brendan Le Foll, Tom Ingleby, Yevgeniy Kiveisha" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://COPYING;md5=e8db6501ed294e65418a933925d12058" + +DEPENDS = "nodejs swig-native mraa" + +SRC_URI = "git://github.com/intel-iot-devkit/upm.git;protocol=git" +SRCREV = "88eaced5a23c23d1cfe3badfe8deeedda582ae50" + +S = "${WORKDIR}/git" + +inherit distutils-base pkgconfig python-dir cmake + +FILES_${PN}-doc += "${datadir}/upm/examples/" \ No newline at end of file diff --git a/device-software/meta-edison-middleware/recipes-devtools/xdk-daemon/xdk-daemon_0.0.27.bb b/device-software/meta-edison-middleware/recipes-devtools/xdk-daemon/xdk-daemon_0.0.27.bb new file mode 100644 index 0000000..90eb588 --- /dev/null +++ b/device-software/meta-edison-middleware/recipes-devtools/xdk-daemon/xdk-daemon_0.0.27.bb @@ -0,0 +1,68 @@ +DESCRIPTION = "Provides communication to the Intel XDK" +LICENSE = "Proprietary" + +LIC_FILES_CHKSUM = "file://LICENSE;md5=8a05f85865f8c4b9ba29798e539f93b7" + +DEPENDS = "nodejs-native mdns" +RDEPENDS_${PN} = "libarchive-bin" + +PR = "r0" + +# URI should point to some external http:// server +SRC_URI = "file://xdk-daemon-${PV}.tar.bz2" + +# we don't care about debug for the few binary node modules +INHIBIT_PACKAGE_DEBUG_SPLIT = "1" + +do_compile () { + # changing the home directory to the working directory, the .npmrc will be created in this directory + export HOME=${WORKDIR} + + # does not build dev packages + npm config set dev false + + # access npm registry using http + npm set strict-ssl false + npm config set registry http://registry.npmjs.org/ + + # configure http proxy if neccessary + if [ -n "${http_proxy}" ]; then + npm config set proxy ${http_proxy} + fi + if [ -n "${HTTP_PROXY}" ]; then + npm config set proxy ${HTTP_PROXY} + fi + + # configure cache to be in working directory + npm set cache ${WORKDIR}/npm_cache + + # clear local cache prior to each compile + npm cache clear + + npm install --arch=${TARGET_ARCH} + cd current/ && npm install --arch=${TARGET_ARCH} + cd node-inspector-server && npm install --arch=${TARGET_ARCH} + + sed -i '/TM/d' ${S}/xdk-daemon +} + +do_install () { + install -d ${D}/opt/xdk-daemon/ + cp -a ${S}/* ${D}/opt/xdk-daemon/ + + install -d ${D}${systemd_unitdir}/system/ + install -m 0644 ${S}/xdk-daemon.service ${D}${systemd_unitdir}/system/ + + install -d ${D}${bindir} + ln -s /opt/xdk-daemon/current/xdk-whitelist ${D}${bindir}/xdk-whitelist +} + +inherit systemd + +SYSTEMD_SERVICE_${PN} = "xdk-daemon.service" + +FILES_${PN} = "/opt/xdk-daemon/ \ + ${systemd_unitdir}/system/xdk-daemon.service \ + ${bindir}/" + +PACKAGES = "${PN}" diff --git a/device-software/meta-edison/conf/machine/edison.conf b/device-software/meta-edison/conf/machine/edison.conf index 0dcd102..6bc5606 100644 --- a/device-software/meta-edison/conf/machine/edison.conf +++ b/device-software/meta-edison/conf/machine/edison.conf @@ -14,7 +14,7 @@ UBOOT_MACHINE = "edison_config" module_autoload_bcm_bt_lpm = "bcm_bt_lpm" module_autoload_bcm4334x = "bcm4334x" -module_conf_bcm4334x = "options bcm4334x firmware_path=/etc/firmware/fw_bcmdhd.bin nvram_path=/etc/firmware/bcmdhd.cal" +module_conf_bcm4334x = "options bcm4334x firmware_path=/etc/firmware/fw_bcmdhd.bin nvram_path=/etc/firmware/bcmdhd.cal op_mode=4" module_autoload_g_multi = "g_multi" # FIXME: file parameter should be based on partition UUID (from U-Boot) or fixed # with label (label seems to work, but driver is probed too early) diff --git a/device-software/meta-edison/recipes-bsp/u-boot/files/edison.env b/device-software/meta-edison/recipes-bsp/u-boot/files/edison.env new file mode 100644 index 0000000..bd5a551 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/files/edison.env @@ -0,0 +1,56 @@ +# Edison Environment File +# Main part + +# Partition definition +partitions=uuid_disk=${uuid_disk};name=u-boot0,start=1MiB,size=2MiB,uuid=${uuid_uboot0};name=u-boot-env0,size=1MiB,uuid=${uuid_uboot_env0};name=u-boot1,size=2MiB,uuid=${uuid_uboot1};name=u-boot-env1,size=1MiB,uuid=${uuid_uboot_env1};name=factory,size=1MiB,uuid=${uuid_factory};name=panic,size=24MiB,uuid=${uuid_panic};name=boot,size=32MiB,uuid=${uuid_boot};name=rootfs,size=1536MiB,uuid=${uuid_rootfs};name=update,size=768MiB,uuid=${uuid_update};name=home,size=-,uuid=${uuid_home}; + +# Dfu Alternate setting definition +do_dfu_alt_info_mmc=setenv dfu_alt_info "ifwi${hardware_id} mmc 0 8192 mmcpart 1;ifwib${hardware_id} mmc 0 8192 mmcpart 2;u-boot0 part 0 1;u-boot-env0 part 0 2;u-boot1 part 0 3;u-boot-env1 part 0 4;boot part 0 7;rootfs part 0 8;update part 0 9;home part 0 10;vmlinuz fat 0 7;initrd fat 0 7" +dfu_alt_info_ram=kernel ram ${loadaddr} 0x800000 +do_dfu_alt_info_ifwi=setenv dfu_alt_info "ifwi${hardware_id} mmc 0 8192 mmcpart 1;ifwib${hardware_id} mmc 0 8192 mmcpart 2" +dfu_alt_info_reset=reset ram 0x0 0x0 + +# Kernel load configuration +bootargs_console=console=ttyMFD2 earlyprintk=ttyMFD2,keep +bootargs_debug=loglevel=4 +do_bootargs_rootfs=setenv bootargs_rootfs rootwait root=PARTUUID=${uuid_rootfs} rootfstype=ext4 +first_install_retry=0 +first_install_max_retries=3 +ota_update_retry=0 +ota_update_max_retries=3 +do_compute_target=if itest.b ${first_install_retry} -gt ${first_install_max_retries} || itest.b ${ota_update_retry} -gt ${ota_update_max_retries}; then echo "Switch to Rescue target"; setenv bootargs_target rescue; saveenv; fi +mmc-bootargs=run do_bootargs_rootfs; setenv bootargs ${bootargs_rootfs} ${bootargs_console} ${bootargs_debug} g_multi.ethernet_config=${bootargs_ethconfig} systemd.unit=${bootargs_target}.target hardware_id=${hardware_id} g_multi.iSerialNumber=${serial#} g_multi.dev_addr=${usb0addr} +loadaddr=0x100000 +load_kernel=fatload mmc 0:7 ${loadaddr} vmlinuz + +# Main functions +do_partition_done=0 +do_partition=if itest.b ${do_partition_done} -eq 1; then echo "Partitioning already done..."; else run do_force_partition ; fi +do_force_partition=echo "Partitioning using GPT"; gpt write mmc 0 ${partitions} ; mmc rescan; setenv do_partition_done 1 ; saveenv +do_flash_ifwi=run do_dfu_alt_info_ifwi ; dfu 0 mmc 0 +do_flash_os=if itest.b ${do_flash_os_done} -eq 1 ; then echo "Flashing already done..." ; else run do_force_flash_os; fi +do_force_flash_os=run do_dfu_alt_info_mmc ; sleep 1 ; setenv do_flash_os_done 1 ; saveenv ; dfu 0 mmc 0 +do_flashall=run do_partition;run do_flash_ifwi;run do_flash_os +do_dnx=setenv dfu_alt_info ${dfu_alt_info_ram};dfu 0 ram 0 ram;run bootcmd +init_dfu=run do_dfu_alt_info_mmc ; saveenv + +# Handle different boot mode +bootcmd=echo "Target:${target_name}"; run do_partition; run do_handle_bootargs_mode; + +do_handle_bootargs_mode=run do_preprocess_bootargs_mode; if itest.s $bootargs_mode == "ota" ; then run do_ota; fi; if itest.s $bootargs_mode == "boot" ; then run do_boot; fi; if itest.s $bootargs_mode == "flash"; then run do_flash; fi; run do_fallback; exit; +do_preprocess_bootargs_mode=if env exists bootargs_mode ; then ; else setenv bootargs_mode "boot" ;fi; + +do_fallback=echo "Unknown boot mode: $bootargs_mode"; env delete -f bootargs_mode; saveenv; echo "Resetting to default boot mode and reboot..."; reset; +do_boot=run boot_target_cmd; +do_flash=run do_force_flash_os; + +# OTA settings +ota_script_addr=0x100000 +do_ota_init=setenv ota_status 1 ; env delete -f bootargs_mode +do_load_ota_scr=if fatload mmc 0:9 $ota_script_addr ota_update.scr ; then setenv ota_status 0 ; else setenv ota_status 1 ; fi +do_source_ota_scr=if test $ota_status -eq 0 ; then if source $ota_script_addr ; then setenv ota_status 0 ; else setenv ota_status 2 ; fi ; fi + +# do_ota_clean can be overriden by ota script +do_ota_clean=saveenv ; reset + +do_ota=run do_ota_init ; run do_load_ota_scr ; run do_source_ota_scr ; run do_ota_clean diff --git a/device-software/meta-edison/recipes-bsp/u-boot/files/fw_env.config b/device-software/meta-edison/recipes-bsp/u-boot/files/fw_env.config new file mode 100644 index 0000000..392bb8e --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/files/fw_env.config @@ -0,0 +1,11 @@ +# Configuration file for fw_(printenv/setenv) utility. +# Up to two entries are valid, in this case the redundant +# environment sector is assumed present. +# Notice, that the "Number of sectors" is not required on NOR and SPI-dataflash. +# Futhermore, if the Flash sector size is ommitted, this value is assumed to +# be the same as the Environment size, which is valid for NOR and SPI-dataflash + +# MTD device name Device offset Env. size Flash sector size Number of sectors +# On Edison, the u-boot environments are located on partitions 2 and 4 and both have a size of 64kB +/dev/mmcblk0p2 0x0000 0x10000 +/dev/mmcblk0p4 0x0000 0x10000 diff --git a/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/blankcdc.env b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/blankcdc.env new file mode 100644 index 0000000..a04d786 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/blankcdc.env @@ -0,0 +1,10 @@ +# U-Boot blank environment with CDC ECM ethernet config for gadget multi +# used to erase all partitions and first boot setup +target_name=blank +bootdelay=1 +do_flash_os_done=1 +bootargs_target=first-install +bootargs_ethconfig=cdc +dfu_to_sec=3 +do_probe_dfu=run do_dfu_alt_info_mmc ; dfu 0 mmc 0 $dfu_to_sec +boot_target_cmd=run do_flash_os;run do_probe_dfu;run do_compute_target;run mmc-bootargs;run load_kernel;zboot ${loadaddr} diff --git a/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/blankrndis.env b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/blankrndis.env new file mode 100644 index 0000000..1fcf1ba --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/blankrndis.env @@ -0,0 +1,10 @@ +# U-Boot blank environment with RNDIS ethernet config for gadget multi +# used to erase all partitions and first boot setup +target_name=blank +bootdelay=1 +do_flash_os_done=1 +bootargs_target=first-install +bootargs_ethconfig=rndis +dfu_to_sec=3 +do_probe_dfu=run do_dfu_alt_info_mmc ; dfu 0 mmc 0 $dfu_to_sec +boot_target_cmd=run do_flash_os;run do_probe_dfu;run do_compute_target;run mmc-bootargs;run load_kernel;zboot ${loadaddr} diff --git a/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/defaultcdc.env b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/defaultcdc.env new file mode 100644 index 0000000..6a0edda --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/defaultcdc.env @@ -0,0 +1,10 @@ +# U-Boot default environment +# default end-user environment +target_name=default +bootdelay=1 +do_flash_os_done=1 +bootargs_target=multi-user +bootargs_ethconfig=cdc +dfu_to_sec=3 +do_probe_dfu=run do_dfu_alt_info_mmc ; dfu 0 mmc 0 $dfu_to_sec +boot_target_cmd=run do_flash_os;run do_probe_dfu;run do_compute_target;run mmc-bootargs;run load_kernel;zboot ${loadaddr} diff --git a/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/defaultrndis.env b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/defaultrndis.env new file mode 100644 index 0000000..84768c5 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/defaultrndis.env @@ -0,0 +1,10 @@ +# U-Boot default environment +# default end-user environment +target_name=default +bootdelay=1 +do_flash_os_done=1 +bootargs_target=multi-user +bootargs_ethconfig=rndis +dfu_to_sec=3 +do_probe_dfu=run do_dfu_alt_info_mmc ; dfu 0 mmc 0 $dfu_to_sec +boot_target_cmd=run do_flash_os;run do_probe_dfu;run do_compute_target;run mmc-bootargs;run load_kernel;zboot ${loadaddr} diff --git a/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/ifwi.env b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/ifwi.env new file mode 100644 index 0000000..e0a1286 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/ifwi.env @@ -0,0 +1,7 @@ +# U-Boot IFWI environment +# IFWI testing mode +# this env is stitched with xfstk binary , do only dfu +target_name=ifwi +bootdelay=1 +do_flash_os_done=0 +boot_target_cmd=run do_partition;run do_force_flash_os diff --git a/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/prod.env b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/prod.env new file mode 100644 index 0000000..7e68939 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/files/target_env/prod.env @@ -0,0 +1,6 @@ +# U-Boot production environment +# used in factory for flashing and calibrating +target_name=prod +bootdelay=3 +do_flash_os_done=0 +boot_target_cmd=run do_flash_ifwi;run do_force_flash_os diff --git a/device-software/meta-edison/recipes-bsp/u-boot/files/upstream_to_edison.patch b/device-software/meta-edison/recipes-bsp/u-boot/files/upstream_to_edison.patch new file mode 100644 index 0000000..a44e3d1 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/files/upstream_to_edison.patch @@ -0,0 +1,11157 @@ +From 084994e3140fb25fc9e0c96b48d03693bee7b28b Mon Sep 17 00:00:00 2001 +From: Jenkins +Date: Fri, 30 Jan 2015 14:23:54 +0100 +Subject: [PATCH] Squashed all commits from upstream to Edison + +Change-Id: I1966c64a6433cfe814361fe44e46a8313db9e653 +--- + Makefile | 1 + + arch/x86/config.mk | 4 +- + arch/x86/cpu/config.mk | 2 +- + arch/x86/cpu/start.S | 2 + + arch/x86/cpu/tangier/Makefile | 1 + + arch/x86/cpu/tangier/board_id.c | 33 + + arch/x86/cpu/tangier/car.S | 13 + + arch/x86/cpu/tangier/pci.c | 49 + + arch/x86/cpu/tangier/sdram.c | 139 ++ + arch/x86/cpu/tangier/tables.c | 26 + + arch/x86/cpu/tangier/tangier.c | 171 ++ + arch/x86/include/asm/apic.h | 91 + + arch/x86/include/asm/arch-tangier/clk.h | 3 + + arch/x86/include/asm/arch-tangier/intel-mid.h | 29 + + arch/x86/include/asm/arch-tangier/ipchecksum.h | 37 + + arch/x86/include/asm/arch-tangier/mmc.h | 11 + + arch/x86/include/asm/arch-tangier/sysinfo.h | 62 + + arch/x86/include/asm/arch-tangier/tables.h | 294 ++++ + arch/x86/include/asm/arch-tangier/timestamp.h | 59 + + arch/x86/include/asm/delay.h | 6 + + arch/x86/include/asm/io.h | 48 + + arch/x86/include/asm/mpspec.h | 74 + + arch/x86/include/asm/msr-index.h | 46 +- + arch/x86/include/asm/sfi.h | 119 ++ + arch/x86/lib/Makefile | 1 + + arch/x86/lib/sfi.c | 162 ++ + arch/x86/lib/tsc_timer.c | 6 +- + arch/x86/lib/zimage.c | 4 + + board/intel/edison/Makefile | 1 + + board/intel/edison/config.mk | 7 + + board/intel/edison/edison.c | 54 + + board/intel/edison/edison_start.S | 13 + + boards.cfg | 1 + + common/Makefile | 2 + + common/board_f.c | 20 +- + common/cmd_dfu.c | 46 +- + common/cmd_fastboot.c | 28 + + common/cmd_gpt.c | 2 +- + common/cmd_itest.c | 3 +- + common/cmd_part.c | 135 +- + disk/part_efi.c | 8 +- + drivers/dfu/dfu.c | 12 + + drivers/dfu/dfu_mmc.c | 48 +- + drivers/misc/Makefile | 1 + + drivers/misc/intel_scu_ipc.c | 150 ++ + drivers/mmc/Makefile | 1 + + drivers/mmc/tangier_sdhci.c | 38 + + drivers/serial/Makefile | 1 + + drivers/serial/serial.c | 1 + + drivers/serial/serial_tng.c | 252 +++ + drivers/usb/dwc3/Kconfig | 26 + + drivers/usb/dwc3/Makefile | 8 + + drivers/usb/dwc3/core.h | 814 +++++++++ + drivers/usb/dwc3/debug.h | 49 + + drivers/usb/dwc3/debugfs.c | 521 ++++++ + drivers/usb/dwc3/dwc3-omap.c | 418 +++++ + drivers/usb/dwc3/dwc3-pci.c | 187 ++ + drivers/usb/dwc3/dwc3_core.c | 513 ++++++ + drivers/usb/dwc3/dwc3_ep0.c | 851 +++++++++ + drivers/usb/dwc3/dwc3_gadget.c | 2184 ++++++++++++++++++++++++ + drivers/usb/dwc3/dwc3_host.c | 102 ++ + drivers/usb/dwc3/dwc3_misc.c | 20 + + drivers/usb/dwc3/gadget.h | 186 ++ + drivers/usb/dwc3/io.h | 54 + + drivers/usb/dwc3/misc.h | 269 +++ + drivers/usb/gadget/Makefile | 1 + + drivers/usb/gadget/f_dfu.c | 1 + + drivers/usb/gadget/f_fastboot.c | 559 ++++++ + drivers/usb/gadget/g_fastboot.h | 20 + + drivers/usb/gadget/u_fastboot.c | 308 ++++ + examples/standalone/Makefile | 4 + + fs/fat/fat.c | 37 +- + include/android_image.h | 102 ++ + include/configs/coreboot.h | 1 + + include/configs/edison.h | 268 +++ + include/dfu.h | 7 + + include/intel_scu_ipc.h | 69 + + include/linux/usb/gadget.h | 15 +- + include/usb/fastboot.h | 100 ++ + pft-config.xml | 28 + + 80 files changed, 9997 insertions(+), 42 deletions(-) + create mode 100644 arch/x86/cpu/tangier/Makefile + create mode 100644 arch/x86/cpu/tangier/board_id.c + create mode 100644 arch/x86/cpu/tangier/car.S + create mode 100644 arch/x86/cpu/tangier/pci.c + create mode 100644 arch/x86/cpu/tangier/sdram.c + create mode 100644 arch/x86/cpu/tangier/tables.c + create mode 100644 arch/x86/cpu/tangier/tangier.c + create mode 100644 arch/x86/include/asm/apic.h + create mode 100644 arch/x86/include/asm/arch-tangier/clk.h + create mode 100644 arch/x86/include/asm/arch-tangier/intel-mid.h + create mode 100644 arch/x86/include/asm/arch-tangier/ipchecksum.h + create mode 100644 arch/x86/include/asm/arch-tangier/mmc.h + create mode 100644 arch/x86/include/asm/arch-tangier/sysinfo.h + create mode 100644 arch/x86/include/asm/arch-tangier/tables.h + create mode 100644 arch/x86/include/asm/arch-tangier/timestamp.h + create mode 100644 arch/x86/include/asm/delay.h + create mode 100644 arch/x86/include/asm/mpspec.h + create mode 100644 arch/x86/include/asm/sfi.h + create mode 100644 arch/x86/lib/sfi.c + create mode 100644 board/intel/edison/Makefile + create mode 100644 board/intel/edison/config.mk + create mode 100644 board/intel/edison/edison.c + create mode 100644 board/intel/edison/edison.h + create mode 100644 board/intel/edison/edison_start.S + create mode 100644 common/cmd_fastboot.c + create mode 100644 drivers/misc/intel_scu_ipc.c + create mode 100644 drivers/mmc/tangier_sdhci.c + create mode 100644 drivers/serial/serial_tng.c + create mode 100644 drivers/usb/dwc3/Kconfig + create mode 100644 drivers/usb/dwc3/Makefile + create mode 100644 drivers/usb/dwc3/core.h + create mode 100644 drivers/usb/dwc3/debug.h + create mode 100644 drivers/usb/dwc3/debugfs.c + create mode 100644 drivers/usb/dwc3/dwc3-omap.c + create mode 100644 drivers/usb/dwc3/dwc3-pci.c + create mode 100644 drivers/usb/dwc3/dwc3_core.c + create mode 100644 drivers/usb/dwc3/dwc3_ep0.c + create mode 100644 drivers/usb/dwc3/dwc3_gadget.c + create mode 100644 drivers/usb/dwc3/dwc3_host.c + create mode 100644 drivers/usb/dwc3/dwc3_misc.c + create mode 100644 drivers/usb/dwc3/gadget.h + create mode 100644 drivers/usb/dwc3/io.h + create mode 100644 drivers/usb/dwc3/misc.h + create mode 100644 drivers/usb/gadget/f_fastboot.c + create mode 100644 drivers/usb/gadget/g_fastboot.h + create mode 100644 drivers/usb/gadget/u_fastboot.c + create mode 100644 include/android_image.h + create mode 100644 include/configs/edison.h + create mode 100644 include/intel_scu_ipc.h + create mode 100644 include/usb/fastboot.h + create mode 100644 pft-config.xml + +diff --git a/Makefile b/Makefile +index c91c10e..3846d2c 100644 +--- a/Makefile ++++ b/Makefile +@@ -612,6 +612,7 @@ libs-y += drivers/usb/gadget/ + libs-y += drivers/usb/host/ + libs-y += drivers/usb/musb/ + libs-y += drivers/usb/musb-new/ ++libs-y += drivers/usb/dwc3/ + libs-y += drivers/usb/phy/ + libs-y += drivers/usb/ulpi/ + libs-y += common/ +diff --git a/arch/x86/config.mk b/arch/x86/config.mk +index 38cb7c9..9048a50 100644 +--- a/arch/x86/config.mk ++++ b/arch/x86/config.mk +@@ -15,7 +15,8 @@ PF_CPPFLAGS_X86 := $(call cc-option, -fno-toplevel-reorder, \ + $(call cc-option, -mpreferred-stack-boundary=2) + PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_X86) + PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm +-PLATFORM_CPPFLAGS += -DREALMODE_BASE=0x7c0 ++#PLATFORM_CPPFLAGS += -DREALMODE_BASE=0x7c0 ++PLATFORM_CPPFLAGS += -m32 + + # Support generic board on x86 + __HAVE_ARCH_GENERIC_BOARD := y +@@ -23,6 +24,7 @@ __HAVE_ARCH_GENERIC_BOARD := y + PLATFORM_RELFLAGS += -ffunction-sections -fvisibility=hidden + + PLATFORM_LDFLAGS += --emit-relocs -Bsymbolic -Bsymbolic-functions ++PLATFORM_LDFLAGS += -m elf_i386 + + LDFLAGS_FINAL += --gc-sections -pie + LDFLAGS_FINAL += --wrap=__divdi3 --wrap=__udivdi3 +diff --git a/arch/x86/cpu/config.mk b/arch/x86/cpu/config.mk +index c1568cac..42a4425 100644 +--- a/arch/x86/cpu/config.mk ++++ b/arch/x86/cpu/config.mk +@@ -5,7 +5,7 @@ + # SPDX-License-Identifier: GPL-2.0+ + # + +-CROSS_COMPILE ?= i386-linux- ++#CROSS_COMPILE ?= i386-linux- + + PLATFORM_CPPFLAGS += -DCONFIG_X86 -D__I386__ -march=i386 -Werror + +diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S +index 329bb3a..e4d1c53 100644 +--- a/arch/x86/cpu/start.S ++++ b/arch/x86/cpu/start.S +@@ -50,6 +50,7 @@ _start: + movw $GD_FLG_COLD_BOOT, %bx + 1: + ++#ifndef CONFIG_INHERIT_GDT + /* Load the segement registes to match the gdt loaded in start16.S */ + movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax + movw %ax, %fs +@@ -57,6 +58,7 @@ _start: + movw %ax, %gs + movw %ax, %es + movw %ax, %ss ++#endif + + /* Clear the interrupt vectors */ + lidt blank_idt_ptr +diff --git a/arch/x86/cpu/tangier/Makefile b/arch/x86/cpu/tangier/Makefile +new file mode 100644 +index 0000000..2ef428b +--- /dev/null ++++ b/arch/x86/cpu/tangier/Makefile +@@ -0,0 +1 @@ ++obj-y += car.o tangier.o pci.o sdram.o tables.o +diff --git a/arch/x86/cpu/tangier/board_id.c b/arch/x86/cpu/tangier/board_id.c +new file mode 100644 +index 0000000..b13b051 +--- /dev/null ++++ b/arch/x86/cpu/tangier/board_id.c +@@ -0,0 +1,33 @@ ++#include ++#include ++#include ++ ++int _get_board_id(void) ++{ ++ u8 i = 0; ++ u8 data = -1; ++ int value = 0; ++ ++ for (i = 0x79; i <= 0x7c; i++) { ++ intel_scu_ipc_ioread8(i, &data); ++ value |= (data & 0x1) << (0x7c - i); ++ data = -1; ++ } ++ ++ printf("[SCU_IPC_DEBUG] board ID: %x\n", value); ++ ++ return value; ++} ++ ++int get_board_id(void) ++{ ++ static int clt_board_id = CLT_BOARD_NOT_IDENTIFIED; ++ ++ if (clt_board_id != CLT_BOARD_NOT_IDENTIFIED) ++ return clt_board_id; ++ ++ clt_board_id = _get_board_id(); ++ ++ return clt_board_id; ++} ++ +diff --git a/arch/x86/cpu/tangier/car.S b/arch/x86/cpu/tangier/car.S +new file mode 100644 +index 0000000..6982106 +--- /dev/null ++++ b/arch/x86/cpu/tangier/car.S +@@ -0,0 +1,13 @@ ++/* ++ * Copyright (c) 2011 The Chromium OS Authors. ++ * (C) Copyright 2010-2011 ++ * Graeme Russ, ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++.section .text ++ ++.globl car_init ++car_init: ++ jmp car_init_ret +diff --git a/arch/x86/cpu/tangier/pci.c b/arch/x86/cpu/tangier/pci.c +new file mode 100644 +index 0000000..af5ff2c +--- /dev/null ++++ b/arch/x86/cpu/tangier/pci.c +@@ -0,0 +1,49 @@ ++/* ++ * Copyright (c) 2011 The Chromium OS Authors. ++ * (C) Copyright 2008,2009 ++ * Graeme Russ, ++ * ++ * (C) Copyright 2002 ++ * Daniel Engström, Omicron Ceti AB, ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++ ++static struct pci_controller tangier_hose; ++ ++static void config_pci_bridge(struct pci_controller *hose, pci_dev_t dev, ++ struct pci_config_table *table) ++{ ++ u8 secondary; ++ hose->read_byte(hose, dev, PCI_SECONDARY_BUS, &secondary); ++ hose->last_busno = max(hose->last_busno, secondary); ++ pci_hose_scan_bus(hose, secondary); ++} ++ ++static struct pci_config_table pci_tangier_config_table[] = { ++ /* vendor, device, class, bus, dev, func */ ++ { PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_BRIDGE_PCI, ++ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, &config_pci_bridge }, ++ {} ++}; ++ ++void pci_init_board(void) ++{ ++ tangier_hose.config_table = pci_tangier_config_table; ++ tangier_hose.first_busno = 0; ++ tangier_hose.last_busno = 0; ++ ++ pci_set_region(tangier_hose.regions + 0, 0x0, 0x0, 0xffffffff, ++ PCI_REGION_MEM); ++ tangier_hose.region_count = 1; ++ ++ pci_setup_type1(&tangier_hose); ++ ++ pci_register_hose(&tangier_hose); ++ ++ pci_hose_scan(&tangier_hose); ++} +diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c +new file mode 100644 +index 0000000..f18b45e +--- /dev/null ++++ b/arch/x86/cpu/tangier/sdram.c +@@ -0,0 +1,139 @@ ++/* ++ * Copyright (c) 2011 The Chromium OS Authors. ++ * (C) Copyright 2010,2011 ++ * Graeme Russ, ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#ifdef CONFIG_SFI ++#include ++#endif ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++unsigned install_e820_map(unsigned max_entries, struct e820entry *entries) ++{ ++#ifdef CONFIG_SFI ++ return sfi_setup_e820(max_entries, entries); ++#else ++ return 0; ++#endif ++} ++ ++/* ++ * This function looks for the highest region of memory lower than 4GB which ++ * has enough space for U-Boot where U-Boot is aligned on a page boundary. It ++ * overrides the default implementation found elsewhere which simply picks the ++ * end of ram, wherever that may be. The location of the stack, the relocation ++ * address, and how far U-Boot is moved by relocation are set in the global ++ * data structure. ++ */ ++ulong board_get_usable_ram_top(ulong total_size) ++{ ++ uintptr_t dest_addr = 0x000000003F4FFFFF; ++/* ++ * int i; ++ * ++ * for (i = 0; i < lib_sysinfo.n_memranges; i++) { ++ * struct memrange *memrange = &lib_sysinfo.memrange[i]; ++ * [> Force U-Boot to relocate to a page aligned address. <] ++ * uint64_t start = roundup(memrange->base, 1 << 12); ++ * uint64_t end = memrange->base + memrange->size; ++ * ++ * [> Ignore non-memory regions. <] ++ * if (memrange->type != CB_MEM_RAM) ++ * continue; ++ * ++ * [> Filter memory over 4GB. <] ++ * if (end > 0xffffffffULL) ++ * end = 0x100000000ULL; ++ * [> Skip this region if it's too small. <] ++ * if (end - start < total_size) ++ * continue; ++ * ++ * [> Use this address if it's the largest so far. <] ++ * if (end > dest_addr) ++ * dest_addr = end; ++ * } ++ * ++ * [> If no suitable area was found, return an error. <] ++ * if (!dest_addr) ++ * panic("No available memory found for relocation"); ++ */ ++ ++ return (ulong)dest_addr; ++} ++ ++int dram_init_f(void) ++{ ++/* ++ * int i; ++ * phys_size_t ram_size = 0; ++ * ++ * for (i = 0; i < lib_sysinfo.n_memranges; i++) { ++ * struct memrange *memrange = &lib_sysinfo.memrange[i]; ++ * unsigned long long end = memrange->base + memrange->size; ++ * ++ * if (memrange->type == CB_MEM_RAM && end > ram_size) ++ * ram_size = end; ++ * } ++ * gd->ram_size = ram_size; ++ * if (ram_size == 0) ++ * return -1; ++ */ ++#ifdef CONFIG_SFI ++ gd->ram_size = sfi_get_ram_size(); ++#endif ++ return 0; ++} ++ ++int dram_init_banksize(void) ++{ ++/* ++ * int i, j; ++ * ++ * if (CONFIG_NR_DRAM_BANKS) { ++ * for (i = 0, j = 0; i < lib_sysinfo.n_memranges; i++) { ++ * struct memrange *memrange = &lib_sysinfo.memrange[i]; ++ * ++ * if (memrange->type == CB_MEM_RAM) { ++ * gd->bd->bi_dram[j].start = memrange->base; ++ * gd->bd->bi_dram[j].size = memrange->size; ++ * j++; ++ * if (j >= CONFIG_NR_DRAM_BANKS) ++ * break; ++ * } ++ * } ++ * } ++ */ ++/* ++ *0: 0000000000000000-0000000000097FFF ( 0K - 608K) ram ++ *3: 0000000000100000-0000000003FFFFFF ( 1M - 64M) ram ++ *5: 0000000006000000-000000003F4FFFFF ( 96M - 1013M) ram ++ */ ++ gd->bd->bi_dram[0].start = 0x0; ++ gd->bd->bi_dram[0].size = 0x97FFF; ++ ++ gd->bd->bi_dram[1].start = 0x100000; ++ gd->bd->bi_dram[1].size = 0x3FFFFFF - gd->bd->bi_dram[1].start; ++ ++ gd->bd->bi_dram[2].start = 0x6000000; ++ gd->bd->bi_dram[2].size = 0x3F4FFFFF - gd->bd->bi_dram[2].start; ++ ++ return 0; ++} ++ ++int dram_init(void) ++{ ++ return dram_init_banksize(); ++} +diff --git a/arch/x86/cpu/tangier/tables.c b/arch/x86/cpu/tangier/tables.c +new file mode 100644 +index 0000000..0568877 +--- /dev/null ++++ b/arch/x86/cpu/tangier/tables.c +@@ -0,0 +1,26 @@ ++/* ++ * This file is part of the libpayload project. ++ * ++ * Copyright (C) 2008 Advanced Micro Devices, Inc. ++ * Copyright (C) 2009 coresystems GmbH ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++#include ++#include ++#include ++#include ++ ++/* ++ * This needs to be in the .data section so that it's copied over during ++ * relocation. By default it's put in the .bss section which is simply filled ++ * with zeroes when transitioning from "ROM", which is really RAM, to other ++ * RAM. ++ */ ++struct sysinfo_t lib_sysinfo __attribute__ ((section(".data"))); ++ ++int get_coreboot_info(struct sysinfo_t *info) ++{ ++ return 0; ++} +diff --git a/arch/x86/cpu/tangier/tangier.c b/arch/x86/cpu/tangier/tangier.c +new file mode 100644 +index 0000000..0fbe401 +--- /dev/null ++++ b/arch/x86/cpu/tangier/tangier.c +@@ -0,0 +1,171 @@ ++/* ++ * Copyright (c) 2011 The Chromium OS Authors. ++ * (C) Copyright 2008 ++ * Graeme Russ, graeme.russ@gmail.com. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++/* ++ * Miscellaneous platform dependent initializations ++ */ ++int cpu_init_f(void) ++{ ++ timer_set_base(1); ++ return 0; ++} ++ ++int board_early_init_f(void) ++{ ++ return 0; ++} ++ ++int board_early_init_r(void) ++{ ++ return 0; ++} ++ ++int board_late_init(void) ++{ ++ if (!getenv("serial#")) { ++ ++ struct mmc *mmc = find_mmc_device(0); ++ unsigned char emmc_ssn[16]; ++ char ssn[33]; ++ char usb_gadget_addr[18]; ++ ++ if (mmc) { ++ int i; ++ ++ md5((unsigned char *)mmc->cid, sizeof(mmc->cid), emmc_ssn); ++ ++ for (i = 0; i < 16; i++) ++ snprintf(&(ssn[2*i]), 2, "%02x", emmc_ssn[i]); ++ ++ snprintf(&(usb_gadget_addr[0]), sizeof(usb_gadget_addr), ++ "02:00:86:%02x:%02x:%02x", emmc_ssn[13], emmc_ssn[14], ++ emmc_ssn[15]); ++ setenv("usb0addr", usb_gadget_addr); ++ setenv("serial#", ssn); ++ saveenv(); ++ } ++ } ++ ++ if (!getenv("hardware_id")) { ++ union ipc_ifwi_version v; ++ int ret; ++ char hardware_id[4]; ++ ++ ret = intel_scu_ipc_command(IPCMSG_GET_FW_REVISION, 1, ++ NULL, 0, (u32 *) &(v.raw[0]), 4); ++ if (ret < 0) { ++ printf("Can't retrieve hardware revision\n"); ++ } ++ ++ snprintf(hardware_id, sizeof(hardware_id), "%02X", v.fw.hardware_id); ++ setenv("hardware_id", hardware_id); ++ saveenv(); ++ } ++ ++ ++ return 0; ++} ++ ++void show_boot_progress(int val) ++{ ++ outb(val, 0x80); ++} ++ ++int last_stage_init(void) ++{ ++ /* ++ *if (gd->flags & GD_FLG_COLD_BOOT) ++ * timestamp_add_to_bootstage(); ++ */ ++ ++ return 0; ++} ++ ++int board_final_cleanup(void) ++{ ++ ++ return 0; ++} ++ ++void panic_puts(const char *str) ++{ ++} ++ ++int board_mmc_init(bd_t * bis) ++{ ++ int index = 0; ++ unsigned int base = CONFIG_SYS_EMMC_PORT_BASE + (0x40000 * index); ++ ++ return tangier_sdhci_init(base, index, 4); ++} ++ ++/* ovveride get_tbclk_mhz code see tsc_timer */ ++/* Get the speed of the TSC timer in MHz */ ++unsigned __attribute__((no_instrument_function)) long get_tbclk_mhz(void) ++{ ++ u32 ratio , bus_freq; ++ u64 platform_info = native_read_msr(MSR_PLATFORM_INFO); ++ u64 msr_fsb_freq = native_read_msr(MSR_FSB_FREQ); ++ ++ /* compute and correct ratio if necessary */ ++ ratio = ((platform_info >> 8) & 0xff); ++ if(!ratio) ++ { ++ ratio = 4; ++ debug("Read a zero ratio, force tsc ratio to 4 ...\n"); ++ } ++ ++ /* compute fsb */ ++ bus_freq = (u32) (msr_fsb_freq & 0x7); ++ /* lookup real bus freq in kHz according to its index */ ++ switch(bus_freq) ++ { ++ case 2: ++ bus_freq = FSB_FREQ_133SKU; ++ break; ++ case 3: ++ bus_freq = FSB_FREQ_167SKU; ++ break; ++ case 4: ++ bus_freq = FSB_FREQ_83SKU; ++ break; ++ case 5: ++ bus_freq = FSB_FREQ_400SKU; ++ break; ++ case 6: ++ bus_freq = FSB_FREQ_267SKU; ++ break; ++ case 7: ++ bus_freq = FSB_FREQ_333SKU; ++ break; ++ default: /* handle also 0 and 1 */ ++ bus_freq = FSB_FREQ_100SKU; ++ break; ++ } ++ // return Freq in Mhz ++ return ((bus_freq * ratio)/1000); ++} ++ ++void reset_cpu(ulong addr) ++{ ++ intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 0); ++} +diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h +new file mode 100644 +index 0000000..7b63f48 +--- /dev/null ++++ b/arch/x86/include/asm/apic.h +@@ -0,0 +1,91 @@ ++#ifndef _APIC_H_ ++#define _APIC_H_ ++ ++#include ++ ++#define IO_APIC_DEFAULT_PHYS_BASE 0xfec00000 ++#define APIC_DEFAULT_PHYS_BASE 0xfee00000 ++ ++#define ALL (0xff << 24) ++#define NONE (0) ++#define DISABLED (1 << 16) ++#define ENABLED (0 << 16) ++#define TRIGGER_EDGE (0 << 15) ++#define TRIGGER_LEVEL (1 << 15) ++#define POLARITY_HIGH (0 << 13) ++#define POLARITY_LOW (1 << 13) ++#define PHYSICAL_DEST (0 << 11) ++#define LOGICAL_DEST (1 << 11) ++#define ExtINT (7 << 8) ++#define NMI (4 << 8) ++#define SMI (2 << 8) ++#define INT (1 << 8) ++ ++#define SET_APIC_LOGICAL_ID(x) ((x) << 24) ++ ++#define APIC_LVR 0x30 ++#define APIC_INTEGRATED(x) ((x) & 0xF0u) ++#define GET_APIC_VERSION(x) ((x) & 0xFFu) ++#define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu) ++#define APIC_TASKPRI 0x80 ++#define APIC_EOI 0xB0 ++#define APIC_LDR 0xD0 ++#define APIC_DFR 0xE0 ++#define APIC_SPIV 0xF0 ++ ++#define APIC_TPRI_MASK 0xFFu ++#define APIC_LDR_MASK (0xFFu << 24) ++#define APIC_DFR_VALUE 0xFFFFFFFFul ++#define APIC_VECTOR_MASK 0x000FF ++#define APIC_SPIV_APIC_ENABLED (1 << 8) ++#define APIC_SPIV_FOCUS_DISABLED (1 << 9) ++ ++#define LOCAL_TIMER_VECTOR 0xef ++#define ERROR_APIC_VECTOR 0xfe ++#define SPURIOUS_APIC_VECTOR 0xff ++ ++#define APIC_ISR 0x100 ++#define APIC_ESR 0x280 ++#define APIC_LVTCMCI 0x2f0 ++#define APIC_DM_NMI 0x00400 ++#define APIC_LVTT 0x320 ++#define APIC_LVTTHMR 0x330 ++#define APIC_LVTPC 0x340 ++#define APIC_LVT0 0x350 ++#define APIC_LVT_TIMER_PERIODIC (1 << 17) ++#define SET_APIC_TIMER_BASE(x) (((x) << 18)) ++#define APIC_TIMER_BASE_DIV 0x2 ++#define APIC_LVT1 0x360 ++#define APIC_LVTERR 0x370 ++#define APIC_TMICT 0x380 ++#ifdef CONFIG_X86_MRFLD ++#define APIC_TMICT_INIT_CNT 0x144b50 ++#else ++#define APIC_TMICT_INIT_CNT 0xf3c00 ++#endif ++#define APIC_TMCCT 0x390 ++#define APIC_TDCR 0x3E0 ++#define APIC_TDR_DIV_TMBASE (1 << 2) ++#define APIC_TDR_DIV_1 0xB ++#define APIC_TDR_DIV_2 0x0 ++#define APIC_TDR_DIV_4 0x1 ++#define APIC_TDR_DIV_8 0x2 ++#define APIC_TDR_DIV_16 0x3 ++#define APIC_TDR_DIV_32 0x8 ++#define APIC_TDR_DIV_64 0x9 ++#define APIC_TDR_DIV_128 0xA ++#define APIC_LVT_MASKED (1 << 16) ++#define APIC_DM_EXTINT 0x00700 ++ ++#define LAPIC_ID 0x020 ++ ++extern unsigned int lapic_timer_frequency; ++ ++extern void apic_init(void); ++extern void apic_ack_irq(void); ++extern void apic_timer_setup(unsigned int clocks, int oneshot, int irqen); ++extern void apic_spurious_isr(void); ++extern void apic_mask_irq(void); ++extern void apic_unmask_irq(void); ++ ++#endif /* _APIC_H_ */ +diff --git a/arch/x86/include/asm/arch-tangier/clk.h b/arch/x86/include/asm/arch-tangier/clk.h +new file mode 100644 +index 0000000..ab887aa +--- /dev/null ++++ b/arch/x86/include/asm/arch-tangier/clk.h +@@ -0,0 +1,3 @@ ++#ifndef _CLK_H ++#define _CLK_H ++#endif +diff --git a/arch/x86/include/asm/arch-tangier/intel-mid.h b/arch/x86/include/asm/arch-tangier/intel-mid.h +new file mode 100644 +index 0000000..de4857c +--- /dev/null ++++ b/arch/x86/include/asm/arch-tangier/intel-mid.h +@@ -0,0 +1,29 @@ ++#ifndef _ASM_X86_INTEL_MID_H ++#define _ASM_X86_INTEL_MID_H ++ ++/* ++ * Penwell uses spread spectrum clock, so the freq number is not exactly ++ * the same as reported by MSR based on SDM. ++ * CLVP A0 has 100MHz FSB and CLVP B0 has 133MHz FSB. ++ */ ++#define FSB_FREQ_83SKU 83200 ++#define FSB_FREQ_100SKU 99840 ++#define FSB_FREQ_133SKU 133000 ++ ++#define FSB_FREQ_167SKU 167000 ++#define FSB_FREQ_200SKU 200000 ++#define FSB_FREQ_267SKU 267000 ++#define FSB_FREQ_333SKU 333000 ++#define FSB_FREQ_400SKU 400000 ++ ++/* Bus Select SoC Fuse value */ ++#define BSEL_SOC_FUSE_MASK 0x7 ++#define BSEL_SOC_FUSE_001 0x1 /* FSB 133MHz */ ++#define BSEL_SOC_FUSE_101 0x5 /* FSB 100MHz */ ++#define BSEL_SOC_FUSE_111 0x7 /* FSB 83MHz */ ++ ++extern unsigned int loops_per_jiffy; ++ ++extern unsigned long calibrate_tsc(void); ++ ++#endif /* _ASM_X86_INTEL_MID_H */ +diff --git a/arch/x86/include/asm/arch-tangier/ipchecksum.h b/arch/x86/include/asm/arch-tangier/ipchecksum.h +new file mode 100644 +index 0000000..1d73b4d +--- /dev/null ++++ b/arch/x86/include/asm/arch-tangier/ipchecksum.h +@@ -0,0 +1,37 @@ ++/* ++ * This file is part of the libpayload project. ++ * ++ * It has originally been taken from the FreeBSD project. ++ * ++ * Copyright (c) 2001 Charles Mott ++ * Copyright (c) 2008 coresystems GmbH ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE ++ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL ++ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS ++ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ++ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++ * SUCH DAMAGE. ++ */ ++ ++#ifndef _COREBOOT_IPCHECKSUM_H ++#define _COREBOOT_IPCHECKSUM_H ++ ++unsigned short ipchksum(const void *vptr, unsigned long nbytes); ++ ++#endif +diff --git a/arch/x86/include/asm/arch-tangier/mmc.h b/arch/x86/include/asm/arch-tangier/mmc.h +new file mode 100644 +index 0000000..2200a7f +--- /dev/null ++++ b/arch/x86/include/asm/arch-tangier/mmc.h +@@ -0,0 +1,11 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++int tangier_mmc_init(struct mmc *mmc); ++int tangier_sdhci_init(u32 regbase, int index, int bus_width); +diff --git a/arch/x86/include/asm/arch-tangier/sysinfo.h b/arch/x86/include/asm/arch-tangier/sysinfo.h +new file mode 100644 +index 0000000..8e4a61d +--- /dev/null ++++ b/arch/x86/include/asm/arch-tangier/sysinfo.h +@@ -0,0 +1,62 @@ ++/* ++ * This file is part of the libpayload project. ++ * ++ * Copyright (C) 2008 Advanced Micro Devices, Inc. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++#ifndef _COREBOOT_SYSINFO_H ++#define _COREBOOT_SYSINFO_H ++ ++#include ++#include ++#include ++#include ++ ++/* Allow a maximum of 16 memory range definitions. */ ++#define SYSINFO_MAX_MEM_RANGES 16 ++/* Allow a maximum of 8 GPIOs */ ++#define SYSINFO_MAX_GPIOS 8 ++ ++struct sysinfo_t { ++ int n_memranges; ++ struct memrange { ++ unsigned long long base; ++ unsigned long long size; ++ unsigned int type; ++ } memrange[SYSINFO_MAX_MEM_RANGES]; ++ ++ u32 cmos_range_start; ++ u32 cmos_range_end; ++ u32 cmos_checksum_location; ++ u32 vbnv_start; ++ u32 vbnv_size; ++ ++ char *version; ++ char *extra_version; ++ char *build; ++ char *compile_time; ++ char *compile_by; ++ char *compile_host; ++ char *compile_domain; ++ char *compiler; ++ char *linker; ++ char *assembler; ++ ++ struct cb_framebuffer *framebuffer; ++ ++ int num_gpios; ++ struct cb_gpio gpios[SYSINFO_MAX_GPIOS]; ++ ++ void *vdat_addr; ++ u32 vdat_size; ++ void *tstamp_table; ++ void *cbmem_cons; ++ ++ struct cb_serial *serial; ++}; ++ ++extern struct sysinfo_t lib_sysinfo; ++ ++#endif +diff --git a/arch/x86/include/asm/arch-tangier/tables.h b/arch/x86/include/asm/arch-tangier/tables.h +new file mode 100644 +index 0000000..0d02fe0 +--- /dev/null ++++ b/arch/x86/include/asm/arch-tangier/tables.h +@@ -0,0 +1,294 @@ ++/* ++ * This file is part of the libpayload project. ++ * ++ * Copyright (C) 2008 Advanced Micro Devices, Inc. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++#ifndef _COREBOOT_TABLES_H ++#define _COREBOOT_TABLES_H ++ ++#include ++ ++struct cbuint64 { ++ u32 lo; ++ u32 hi; ++}; ++ ++struct cb_header { ++ u8 signature[4]; ++ u32 header_bytes; ++ u32 header_checksum; ++ u32 table_bytes; ++ u32 table_checksum; ++ u32 table_entries; ++}; ++ ++struct cb_record { ++ u32 tag; ++ u32 size; ++}; ++ ++#define CB_TAG_UNUSED 0x0000 ++#define CB_TAG_MEMORY 0x0001 ++ ++struct cb_memory_range { ++ struct cbuint64 start; ++ struct cbuint64 size; ++ u32 type; ++}; ++ ++#define CB_MEM_RAM 1 ++#define CB_MEM_RESERVED 2 ++#define CB_MEM_ACPI 3 ++#define CB_MEM_NVS 4 ++#define CB_MEM_UNUSABLE 5 ++#define CB_MEM_VENDOR_RSVD 6 ++#define CB_MEM_TABLE 16 ++ ++struct cb_memory { ++ u32 tag; ++ u32 size; ++ struct cb_memory_range map[0]; ++}; ++ ++#define CB_TAG_HWRPB 0x0002 ++ ++struct cb_hwrpb { ++ u32 tag; ++ u32 size; ++ u64 hwrpb; ++}; ++ ++#define CB_TAG_MAINBOARD 0x0003 ++ ++struct cb_mainboard { ++ u32 tag; ++ u32 size; ++ u8 vendor_idx; ++ u8 part_number_idx; ++ u8 strings[0]; ++}; ++ ++#define CB_TAG_VERSION 0x0004 ++#define CB_TAG_EXTRA_VERSION 0x0005 ++#define CB_TAG_BUILD 0x0006 ++#define CB_TAG_COMPILE_TIME 0x0007 ++#define CB_TAG_COMPILE_BY 0x0008 ++#define CB_TAG_COMPILE_HOST 0x0009 ++#define CB_TAG_COMPILE_DOMAIN 0x000a ++#define CB_TAG_COMPILER 0x000b ++#define CB_TAG_LINKER 0x000c ++#define CB_TAG_ASSEMBLER 0x000d ++ ++struct cb_string { ++ u32 tag; ++ u32 size; ++ u8 string[0]; ++}; ++ ++#define CB_TAG_SERIAL 0x000f ++ ++struct cb_serial { ++ u32 tag; ++ u32 size; ++#define CB_SERIAL_TYPE_IO_MAPPED 1 ++#define CB_SERIAL_TYPE_MEMORY_MAPPED 2 ++ u32 type; ++ u32 baseaddr; ++ u32 baud; ++}; ++ ++#define CB_TAG_CONSOLE 0x00010 ++ ++struct cb_console { ++ u32 tag; ++ u32 size; ++ u16 type; ++}; ++ ++#define CB_TAG_CONSOLE_SERIAL8250 0 ++#define CB_TAG_CONSOLE_VGA 1 /* OBSOLETE */ ++#define CB_TAG_CONSOLE_BTEXT 2 /* OBSOLETE */ ++#define CB_TAG_CONSOLE_LOGBUF 3 ++#define CB_TAG_CONSOLE_SROM 4 /* OBSOLETE */ ++#define CB_TAG_CONSOLE_EHCI 5 ++ ++#define CB_TAG_FORWARD 0x00011 ++ ++struct cb_forward { ++ u32 tag; ++ u32 size; ++ u64 forward; ++}; ++ ++#define CB_TAG_FRAMEBUFFER 0x0012 ++struct cb_framebuffer { ++ u32 tag; ++ u32 size; ++ ++ u64 physical_address; ++ u32 x_resolution; ++ u32 y_resolution; ++ u32 bytes_per_line; ++ u8 bits_per_pixel; ++ u8 red_mask_pos; ++ u8 red_mask_size; ++ u8 green_mask_pos; ++ u8 green_mask_size; ++ u8 blue_mask_pos; ++ u8 blue_mask_size; ++ u8 reserved_mask_pos; ++ u8 reserved_mask_size; ++}; ++ ++#define CB_TAG_GPIO 0x0013 ++#define GPIO_MAX_NAME_LENGTH 16 ++struct cb_gpio { ++ u32 port; ++ u32 polarity; ++ u32 value; ++ u8 name[GPIO_MAX_NAME_LENGTH]; ++}; ++ ++struct cb_gpios { ++ u32 tag; ++ u32 size; ++ ++ u32 count; ++ struct cb_gpio gpios[0]; ++}; ++ ++#define CB_TAG_FDT 0x0014 ++struct cb_fdt { ++ uint32_t tag; ++ uint32_t size; /* size of the entire entry */ ++ /* the actual FDT gets placed here */ ++}; ++ ++#define CB_TAG_VDAT 0x0015 ++struct cb_vdat { ++ uint32_t tag; ++ uint32_t size; /* size of the entire entry */ ++ void *vdat_addr; ++ uint32_t vdat_size; ++}; ++ ++#define CB_TAG_TIMESTAMPS 0x0016 ++#define CB_TAG_CBMEM_CONSOLE 0x0017 ++#define CB_TAG_MRC_CACHE 0x0018 ++struct cb_cbmem_tab { ++ uint32_t tag; ++ uint32_t size; ++ void *cbmem_tab; ++}; ++ ++#define CB_TAG_VBNV 0x0019 ++struct cb_vbnv { ++ uint32_t tag; ++ uint32_t size; ++ uint32_t vbnv_start; ++ uint32_t vbnv_size; ++}; ++ ++#define CB_TAG_CMOS_OPTION_TABLE 0x00c8 ++struct cb_cmos_option_table { ++ u32 tag; ++ u32 size; ++ u32 header_length; ++}; ++ ++#define CB_TAG_OPTION 0x00c9 ++#define CMOS_MAX_NAME_LENGTH 32 ++struct cb_cmos_entries { ++ u32 tag; ++ u32 size; ++ u32 bit; ++ u32 length; ++ u32 config; ++ u32 config_id; ++ u8 name[CMOS_MAX_NAME_LENGTH]; ++}; ++ ++ ++#define CB_TAG_OPTION_ENUM 0x00ca ++#define CMOS_MAX_TEXT_LENGTH 32 ++struct cb_cmos_enums { ++ u32 tag; ++ u32 size; ++ u32 config_id; ++ u32 value; ++ u8 text[CMOS_MAX_TEXT_LENGTH]; ++}; ++ ++#define CB_TAG_OPTION_DEFAULTS 0x00cb ++#define CMOS_IMAGE_BUFFER_SIZE 128 ++struct cb_cmos_defaults { ++ u32 tag; ++ u32 size; ++ u32 name_length; ++ u8 name[CMOS_MAX_NAME_LENGTH]; ++ u8 default_set[CMOS_IMAGE_BUFFER_SIZE]; ++}; ++ ++#define CB_TAG_OPTION_CHECKSUM 0x00cc ++#define CHECKSUM_NONE 0 ++#define CHECKSUM_PCBIOS 1 ++struct cb_cmos_checksum { ++ u32 tag; ++ u32 size; ++ u32 range_start; ++ u32 range_end; ++ u32 location; ++ u32 type; ++}; ++ ++/* Helpful macros */ ++ ++#define MEM_RANGE_COUNT(_rec) \ ++ (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0])) ++ ++#define MEM_RANGE_PTR(_rec, _idx) \ ++ (((u8 *) (_rec)) + sizeof(*(_rec)) \ ++ + (sizeof((_rec)->map[0]) * (_idx))) ++ ++#define MB_VENDOR_STRING(_mb) \ ++ (((unsigned char *) ((_mb)->strings)) + (_mb)->vendor_idx) ++ ++#define MB_PART_STRING(_mb) \ ++ (((unsigned char *) ((_mb)->strings)) + (_mb)->part_number_idx) ++ ++#define UNPACK_CB64(_in) \ ++ ((((u64) _in.hi) << 32) | _in.lo) ++ ++struct sysinfo_t; ++ ++int get_coreboot_info(struct sysinfo_t *info); ++ ++#define CBMEM_TOC_RESERVED 512 ++#define MAX_CBMEM_ENTRIES 16 ++#define CBMEM_MAGIC 0x434f5245 ++ ++struct cbmem_entry { ++ u32 magic; ++ u32 id; ++ u64 base; ++ u64 size; ++} __packed; ++ ++#define CBMEM_ID_FREESPACE 0x46524545 ++#define CBMEM_ID_GDT 0x4c474454 ++#define CBMEM_ID_ACPI 0x41435049 ++#define CBMEM_ID_CBTABLE 0x43425442 ++#define CBMEM_ID_PIRQ 0x49525154 ++#define CBMEM_ID_MPTABLE 0x534d5054 ++#define CBMEM_ID_RESUME 0x5245534d ++#define CBMEM_ID_RESUME_SCRATCH 0x52455343 ++#define CBMEM_ID_SMBIOS 0x534d4254 ++#define CBMEM_ID_TIMESTAMP 0x54494d45 ++#define CBMEM_ID_MRCDATA 0x4d524344 ++#define CBMEM_ID_CONSOLE 0x434f4e53 ++#define CBMEM_ID_NONE 0x00000000 ++ ++#endif +diff --git a/arch/x86/include/asm/arch-tangier/timestamp.h b/arch/x86/include/asm/arch-tangier/timestamp.h +new file mode 100644 +index 0000000..fcfc1d5 +--- /dev/null ++++ b/arch/x86/include/asm/arch-tangier/timestamp.h +@@ -0,0 +1,59 @@ ++/* ++ * This file is part of the coreboot project. ++ * ++ * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA ++ */ ++ ++#ifndef __COREBOOT_TIMESTAMP_H__ ++#define __COREBOOT_TIMESTAMP_H__ ++ ++enum timestamp_id { ++ /* coreboot specific timestamp IDs */ ++ TS_START_ROMSTAGE = 1, ++ TS_BEFORE_INITRAM = 2, ++ TS_AFTER_INITRAM = 3, ++ TS_END_ROMSTAGE = 4, ++ TS_START_COPYRAM = 8, ++ TS_END_COPYRAM = 9, ++ TS_START_RAMSTAGE = 10, ++ TS_DEVICE_ENUMERATE = 30, ++ TS_DEVICE_CONFIGURE = 40, ++ TS_DEVICE_ENABLE = 50, ++ TS_DEVICE_INITIALIZE = 60, ++ TS_DEVICE_DONE = 70, ++ TS_CBMEM_POST = 75, ++ TS_WRITE_TABLES = 80, ++ TS_LOAD_PAYLOAD = 90, ++ TS_ACPI_WAKE_JUMP = 98, ++ TS_SELFBOOT_JUMP = 99, ++ ++ /* U-Boot entry IDs start at 1000 */ ++ TS_U_BOOT_INITTED = 1000, /* This is where u-boot starts */ ++ TS_U_BOOT_START_KERNEL = 1100, /* Right before jumping to kernel. */ ++}; ++ ++void timestamp_init(void); ++void timestamp_add(enum timestamp_id id, uint64_t ts_time); ++void timestamp_add_now(enum timestamp_id id); ++ ++/** ++ * timestamp_add_to_bootstage - Add important coreboot timestamps to bootstage ++ * ++ * @return 0 if ok, -1 if no timestamps were found ++ */ ++int timestamp_add_to_bootstage(void); ++ ++#endif +diff --git a/arch/x86/include/asm/delay.h b/arch/x86/include/asm/delay.h +new file mode 100644 +index 0000000..18682f2 +--- /dev/null ++++ b/arch/x86/include/asm/delay.h +@@ -0,0 +1,6 @@ ++#ifndef _ASM_X86_DELAY_H ++#define _ASM_X86_DELAY_H ++ ++extern void use_tsc_delay(void); ++ ++#endif /* _ASM_X86_DELAY_H */ +diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h +index 86bac90..9530cf7 100644 +--- a/arch/x86/include/asm/io.h ++++ b/arch/x86/include/asm/io.h +@@ -69,6 +69,54 @@ + #define memcpy_fromio(a,b,c) memcpy((a),(b),(c)) + #define memcpy_toio(a,b,c) memcpy((a),(b),(c)) + ++#define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v), a) ++#define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) ++ ++#define out_le32(a,v) out_arch(l,le32,a,v) ++#define out_le16(a,v) out_arch(w,le16,a,v) ++ ++#define in_le32(a) in_arch(l,le32,a) ++#define in_le16(a) in_arch(w,le16,a) ++ ++#define out_be32(a,v) out_arch(l,be32,a,v) ++#define out_be16(a,v) out_arch(w,be16,a,v) ++ ++#define in_be32(a) in_arch(l,be32,a) ++#define in_be16(a) in_arch(w,be16,a) ++ ++#define out_8(a,v) __raw_writeb(v, a) ++#define in_8(a) __raw_readb(a) ++ ++#define clrbits(type, addr, clear) \ ++ out_##type((addr), in_##type(addr) & ~(clear)) ++ ++#define setbits(type, addr, set) \ ++ out_##type((addr), in_##type(addr) | (set)) ++ ++#define clrsetbits(type, addr, clear, set) \ ++ out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) ++ ++#define clrbits_be32(addr, clear) clrbits(be32, addr, clear) ++#define setbits_be32(addr, set) setbits(be32, addr, set) ++#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) ++ ++#define clrbits_le32(addr, clear) clrbits(le32, addr, clear) ++#define setbits_le32(addr, set) setbits(le32, addr, set) ++#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) ++ ++#define clrbits_be16(addr, clear) clrbits(be16, addr, clear) ++#define setbits_be16(addr, set) setbits(be16, addr, set) ++#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) ++ ++#define clrbits_le16(addr, clear) clrbits(le16, addr, clear) ++#define setbits_le16(addr, set) setbits(le16, addr, set) ++#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) ++ ++#define clrbits_8(addr, clear) clrbits(8, addr, clear) ++#define setbits_8(addr, set) setbits(8, addr, set) ++#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) ++ ++ + /* + * ISA space is 'always mapped' on a typical x86 system, no need to + * explicitly ioremap() it. The fact that the ISA IO space is mapped +diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h +new file mode 100644 +index 0000000..7609db4 +--- /dev/null ++++ b/arch/x86/include/asm/mpspec.h +@@ -0,0 +1,74 @@ ++#ifndef _ASM_X86_MPSPEC_H ++#define _ASM_X86_MPSPEC_H ++ ++/* from apicdef.h */ ++# define MAX_IO_APICS 64 ++# define MAX_LOCAL_APIC 256 ++ ++#define SFI_MTMR_MAX_NUM 8 ++ ++#define MP_PROCESSOR 0 ++#define MP_BUS 1 ++#define MP_IOAPIC 2 ++#define MP_INTSRC 3 ++#define MP_LINTSRC 4 ++ ++#define BITS_PER_BYTE 8 ++ ++#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) ++ ++#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC) ++ ++#define MAX_MP_BUSSES 260 ++ ++struct physid_mask { ++ unsigned long mask[PHYSID_ARRAY_SIZE]; ++}; ++ ++typedef struct physid_mask physid_mask_t; ++ ++#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } ++#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } ++ ++#define physids_empty(map) \ ++ bitmap_empty((map).mask, MAX_LOCAL_APIC) ++ ++enum mp_irq_source_types { ++ mp_INT = 0, ++ mp_NMI = 1, ++ mp_SMI = 2, ++ mp_ExtINT = 3 ++}; ++ ++#define MP_APIC_ALL 0xFF ++ ++enum mp_bustype { ++ MP_BUS_ISA = 1, ++ MP_BUS_EISA, ++ MP_BUS_PCI, ++ MP_BUS_MCA, ++}; ++ ++#define MPC_APIC_USABLE 0x01 ++ ++struct mpc_ioapic { ++ unsigned char type; ++ unsigned char apicid; ++ unsigned char apicver; ++ unsigned char flags; ++ unsigned int apicaddr; ++}; ++ ++struct mpc_intsrc { ++ unsigned char type; ++ unsigned char irqtype; ++ unsigned short irqflag; ++ unsigned char srcbus; ++ unsigned char srcbusirq; ++ unsigned char dstapic; ++ unsigned char dstirq; ++}; ++ ++#define MAX_IRQ_SOURCES 256 ++ ++#endif +diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h +index 0a36e17..a03b6da 100644 +--- a/arch/x86/include/asm/msr-index.h ++++ b/arch/x86/include/asm/msr-index.h +@@ -1,12 +1,3 @@ +-/* +- * Taken from the linux kernel file of the same name +- * +- * (C) Copyright 2012 +- * Graeme Russ, +- * +- * SPDX-License-Identifier: GPL-2.0+ +- */ +- + #ifndef _ASM_X86_MSR_INDEX_H + #define _ASM_X86_MSR_INDEX_H + +@@ -44,6 +35,7 @@ + #define MSR_IA32_PERFCTR0 0x000000c1 + #define MSR_IA32_PERFCTR1 0x000000c2 + #define MSR_FSB_FREQ 0x000000cd ++#define MSR_PLATFORM_INFO 0x000000ce + + #define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 + #define NHM_C3_AUTO_DEMOTE (1UL << 25) +@@ -65,6 +57,13 @@ + #define MSR_OFFCORE_RSP_0 0x000001a6 + #define MSR_OFFCORE_RSP_1 0x000001a7 + ++#define MSR_LBR_SELECT 0x000001c8 ++#define MSR_LBR_TOS 0x000001c9 ++#define MSR_LBR_NHM_FROM 0x00000680 ++#define MSR_LBR_NHM_TO 0x000006c0 ++#define MSR_LBR_CORE_FROM 0x00000040 ++#define MSR_LBR_CORE_TO 0x00000060 ++ + #define MSR_IA32_PEBS_ENABLE 0x000003f1 + #define MSR_IA32_DS_AREA 0x00000600 + #define MSR_IA32_PERF_CAPABILITIES 0x00000345 +@@ -91,8 +90,8 @@ + #define MSR_IA32_LASTINTTOIP 0x000001de + + /* DEBUGCTLMSR bits (others vary by model): */ +-#define DEBUGCTLMSR_LBR (1UL << 0) +-#define DEBUGCTLMSR_BTF (1UL << 1) ++#define DEBUGCTLMSR_LBR (1UL << 0) /* last branch recording */ ++#define DEBUGCTLMSR_BTF (1UL << 1) /* single-step on branches */ + #define DEBUGCTLMSR_TR (1UL << 6) + #define DEBUGCTLMSR_BTS (1UL << 7) + #define DEBUGCTLMSR_BTINT (1UL << 8) +@@ -127,6 +126,7 @@ + complete list. */ + + #define MSR_AMD64_PATCH_LEVEL 0x0000008b ++#define MSR_AMD64_TSC_RATIO 0xc0000104 + #define MSR_AMD64_NB_CFG 0xc001001f + #define MSR_AMD64_PATCH_LOADER 0xc0010020 + #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 +@@ -237,12 +237,19 @@ + #define MSR_IA32_APICBASE_ENABLE (1<<11) + #define MSR_IA32_APICBASE_BASE (0xfffff<<12) + ++#define MSR_IA32_TSCDEADLINE 0x000006e0 ++ + #define MSR_IA32_UCODE_WRITE 0x00000079 + #define MSR_IA32_UCODE_REV 0x0000008b + + #define MSR_IA32_PERF_STATUS 0x00000198 + #define MSR_IA32_PERF_CTL 0x00000199 + ++#define MSR_IA32_POWER_MISC 0x00000120 ++ ++#define ENABLE_ULFM_AUTOCM (1 << 2) ++#define ENABLE_INDP_AUTOCM (1 << 3) ++ + #define MSR_IA32_MPERF 0x000000e7 + #define MSR_IA32_APERF 0x000000e8 + +@@ -267,6 +274,9 @@ + #define MSR_IA32_TEMPERATURE_TARGET 0x000001a2 + + #define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0 ++#define ENERGY_PERF_BIAS_PERFORMANCE 0 ++#define ENERGY_PERF_BIAS_NORMAL 6 ++#define ENERGY_PERF_BIAS_POWERSAVE 15 + + #define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1 + +@@ -319,6 +329,8 @@ + #define MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE (1ULL << 37) + #define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38) + #define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39) ++#define MSR_IA32_TSC_DEADLINE 0x000006E0 ++ + + /* P4/Xeon+ specific */ + #define MSR_IA32_MCG_EAX 0x00000180 +@@ -446,6 +458,18 @@ + #define MSR_IA32_VMX_VMCS_ENUM 0x0000048a + #define MSR_IA32_VMX_PROCBASED_CTLS2 0x0000048b + #define MSR_IA32_VMX_EPT_VPID_CAP 0x0000048c ++#define MSR_IA32_VMX_TRUE_PINBASED_CTLS 0x0000048d ++#define MSR_IA32_VMX_TRUE_PROCBASED_CTLS 0x0000048e ++#define MSR_IA32_VMX_TRUE_EXIT_CTLS 0x0000048f ++#define MSR_IA32_VMX_TRUE_ENTRY_CTLS 0x00000490 ++ ++/* VMX_BASIC bits and bitmasks */ ++#define VMX_BASIC_VMCS_SIZE_SHIFT 32 ++#define VMX_BASIC_64 0x0001000000000000LLU ++#define VMX_BASIC_MEM_TYPE_SHIFT 50 ++#define VMX_BASIC_MEM_TYPE_MASK 0x003c000000000000LLU ++#define VMX_BASIC_MEM_TYPE_WB 6LLU ++#define VMX_BASIC_INOUT 0x0040000000000000LLU + + /* AMD-V MSRs */ + +diff --git a/arch/x86/include/asm/sfi.h b/arch/x86/include/asm/sfi.h +new file mode 100644 +index 0000000..3d18f6e +--- /dev/null ++++ b/arch/x86/include/asm/sfi.h +@@ -0,0 +1,119 @@ ++/* Copyright (c) 2012 Intel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++ ++#ifndef _SFI_H ++#define _SFI_H ++ ++#include ++#include ++ ++/* Memory type definitions */ ++enum sfi_mem_type { ++ SFI_MEM_RESERVED, ++ SFI_LOADER_CODE, ++ SFI_LOADER_DATA, ++ SFI_BOOT_SERVICE_CODE, ++ SFI_BOOT_SERVICE_DATA, ++ SFI_RUNTIME_SERVICE_CODE, ++ SFI_RUNTIME_SERVICE_DATA, ++ SFI_MEM_CONV, ++ SFI_MEM_UNUSABLE, ++ SFI_ACPI_RECLAIM, ++ SFI_ACPI_NVS, ++ SFI_MEM_MMIO, ++ SFI_MEM_IOPORT, ++ SFI_PAL_CODE, ++ SFI_MEM_TYPEMAX, ++}; ++ ++#define SFI_SYST_MAGIC 0x54535953 ++#define SFI_MMAP_MAGIC 0x50414d4d ++ ++struct sfi_mem_entry { ++ enum sfi_mem_type type; ++ u64 phy_start; ++ u64 vir_start; ++ u64 pages; ++ u64 attrib; ++} __attribute__ ((packed)); ++ ++struct sfi_apic_table_entry { ++ u64 phys_addr; /* phy base addr for APIC reg */ ++} __attribute__ ((packed)); ++ ++struct sfi_timer_table_entry { ++ u64 phys_addr; /* phy base addr for the timer */ ++ u32 freq_hz; /* in HZ */ ++ u32 irq; ++} __attribute__ ((packed)); ++ ++struct sfi_table_header { ++ char signature[4]; ++ u32 length; ++ u8 revision; ++ u8 checksum; ++ char oem_id[6]; ++ char oem_table_id[8]; ++} __attribute__ ((packed)); ++ ++struct sfi_quad_word { ++ u32 low; ++ u32 high; ++}; ++ ++struct sfi_table { ++ struct sfi_table_header header; ++ union { ++ u64 pentry[1]; ++ struct sfi_quad_word entry[1]; ++ }; ++} __attribute__ ((packed)); ++ ++#define SFI_TBL_HEADER_LEN 24 ++ ++#define SFI_GET_NUM_ENTRIES(ptable, entry_type) \ ++ ((ptable->header.length - sizeof(struct sfi_table_header)) / \ ++ (sizeof(entry_type))) ++ ++#define SFI_GET_ENTRY_NUM(ptable, entry) \ ++ ((ptable->header.length - SFI_TBL_HEADER_LEN) / \ ++ (sizeof(struct entry))) ++ ++#define SFI_BASE_ADDR 0x000E0000 ++#define SFI_LENGTH 0x00020000 ++ ++extern int sfi_mtimer_num; ++ ++void sfi_parse_mtmr(void); ++struct sfi_timer_table_entry *sfi_get_mtmr(int hint); ++void fill_memranges_from_e820(struct sysinfo_t *info); ++ ++#ifdef CONFIG_X86_IO_APIC ++int sfi_parse_ioapic(void); ++#endif /* CONFIG_X86_IO_APIC */ ++ ++#ifdef CONFIG_DETECT_RAM_SIZE_WORKAROUND ++unsigned long long sfi_get_max_usable_ram(struct sysinfo_t *info); ++#endif ++ ++#ifdef CONFIG_SFI ++extern phys_size_t sfi_get_ram_size(void); ++extern unsigned sfi_setup_e820(unsigned max_entries, struct e820entry *entries); ++#endif ++ ++#endif /* _SFI_H */ +diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile +index f7303ab..85274ab 100644 +--- a/arch/x86/lib/Makefile ++++ b/arch/x86/lib/Makefile +@@ -19,6 +19,7 @@ obj-y += string.o + obj-$(CONFIG_SYS_X86_TSC_TIMER) += tsc_timer.o + obj-$(CONFIG_VIDEO_VGA) += video.o + obj-$(CONFIG_CMD_ZBOOT) += zimage.o ++obj-$(CONFIG_SFI) += sfi.o + + LIBGCC := $(notdir $(NORMAL_LIBGCC)) + extra-y := $(LIBGCC) +diff --git a/arch/x86/lib/sfi.c b/arch/x86/lib/sfi.c +new file mode 100644 +index 0000000..675ad88 +--- /dev/null ++++ b/arch/x86/lib/sfi.c +@@ -0,0 +1,162 @@ ++#include ++#include ++#include ++ ++#define SFI_BASE_ADDR 0x000E0000 ++#define SFI_LENGTH 0x00020000 ++#define SFI_TABLE_LENGTH 16 ++ ++static int sfi_table_check(struct sfi_table_header *sbh) ++{ ++ char chksum = 0; ++ char *pos = (char *)sbh; ++ int i; ++ ++ if (sbh->length < SFI_TABLE_LENGTH) ++ return -1; ++ ++ if (sbh->length > SFI_LENGTH) ++ return -1; ++ ++ for (i = 0; i < sbh->length; i++) ++ chksum += *pos++; ++ ++ if (chksum) ++ error("sfi: Invalid checksum\n"); ++ ++ /* checksum is ok if zero */ ++ return chksum; ++} ++ ++static unsigned long sfi_search_mmap(void) ++{ ++ u32 i = 0; ++ u32 *pos = (u32 *) SFI_BASE_ADDR; ++ u32 *end = (u32 *) (SFI_BASE_ADDR + SFI_LENGTH); ++ struct sfi_table_header *sbh; ++ struct sfi_table *sb; ++ u32 sys_entry_cnt = 0; ++ ++ /* Find SYST table */ ++ for (; pos < end; pos += 4) { ++ if (*pos == SFI_SYST_MAGIC) { ++ if (!sfi_table_check((struct sfi_table_header *)pos)) ++ break; ++ } ++ } ++ ++ if (pos >= end) { ++ error("failed to locate SFI SYST table\n"); ++ return 0; ++ } ++ ++ /* map table pointers */ ++ sb = (struct sfi_table *)pos; ++ sbh = (struct sfi_table_header *)sb; ++ ++ sys_entry_cnt = (sbh->length - sizeof(struct sfi_table_header)) >> 3; ++ ++ /* Search through each SYST entry for MMAP table */ ++ for (i = 0; i < sys_entry_cnt; i++) { ++ sbh = (struct sfi_table_header *)sb->entry[i].low; ++ if (*(u32 *) sbh->signature == SFI_MMAP_MAGIC) { ++ if (!sfi_table_check((struct sfi_table_header *)sbh)) ++ return (unsigned long)sbh; ++ } ++ } ++ ++ return 0; ++} ++ ++unsigned sfi_setup_e820(unsigned max_entries, struct e820entry *entries) ++{ ++ struct sfi_table *sb; ++ struct sfi_mem_entry *mentry; ++ unsigned long long start, end, size; ++ int i, num, type, total; ++ ++ total = 0; ++ ++ /* search for sfi mmap table */ ++ sb = (struct sfi_table *)sfi_search_mmap(); ++ if (!sb) { ++ error("failed to locate SFI MMAP table\n"); ++ return 0; ++ } ++ debug("will use sfi mmap table for e820 table\n"); ++ num = SFI_GET_ENTRY_NUM(sb, sfi_mem_entry); ++ mentry = (struct sfi_mem_entry *)sb->pentry; ++ ++ for (i = 0; i < num; i++) { ++ start = mentry->phy_start; ++ size = mentry->pages << 12; ++ end = start + size; ++ ++ if (start > end) ++ continue; ++ ++ /* translate SFI mmap type to E820 map type */ ++ switch (mentry->type) { ++ case SFI_MEM_CONV: ++ type = E820_RAM; ++ break; ++ case SFI_MEM_UNUSABLE: ++ case SFI_RUNTIME_SERVICE_DATA: ++ mentry++; ++ continue; ++ default: ++ type = E820_RESERVED; ++ } ++ ++ if (total == E820MAX) ++ break; ++ entries[total].addr = start; ++ entries[total].size = size; ++ entries[total++].type = type; ++ ++ mentry++; ++ } ++ ++ return total; ++} ++ ++phys_size_t sfi_get_ram_size(void) ++{ ++ struct sfi_table *sb; ++ struct sfi_mem_entry *mentry; ++ unsigned long long start, end, size; ++ int i, num; ++ phys_size_t ram = 0; ++ ++ /* search for sfi mmap table */ ++ sb = (struct sfi_table *)sfi_search_mmap(); ++ if (!sb) { ++ error("failed to locate SFI MMAP table\n"); ++ return 0; ++ } ++ debug("will use sfi mmap table for e820 table\n"); ++ num = SFI_GET_ENTRY_NUM(sb, sfi_mem_entry); ++ mentry = (struct sfi_mem_entry *)sb->pentry; ++ ++ for (i = 0; i < num; i++, mentry++) { ++ if (mentry->type != SFI_MEM_CONV) ++ continue; ++ ++ start = mentry->phy_start; ++ size = mentry->pages << 12; ++ end = start + size; ++ ++ if (start > end) ++ continue; ++ ++ if (ram < end) ++ ram = end; ++ } ++ ++ /* round up to 512mb */ ++ ram = (ram + (512 * 1024 * 1024 - 1)) & ~(512 * 1024 * 1024 - 1); ++ ++ debug("ram size %llu\n", ram); ++ ++ return ram; ++} +diff --git a/arch/x86/lib/tsc_timer.c b/arch/x86/lib/tsc_timer.c +index 8b38702..bd751ed 100644 +--- a/arch/x86/lib/tsc_timer.c ++++ b/arch/x86/lib/tsc_timer.c +@@ -34,13 +34,13 @@ u64 __attribute__((no_instrument_function)) get_ticks(void) + return now_tick - gd->arch.tsc_base; + } + +-#define PLATFORM_INFO_MSR 0xce ++ + + /* Get the speed of the TSC timer in MHz */ +-unsigned __attribute__((no_instrument_function)) long get_tbclk_mhz(void) ++unsigned __weak __attribute__((no_instrument_function)) long get_tbclk_mhz(void) + { + u32 ratio; +- u64 platform_info = native_read_msr(PLATFORM_INFO_MSR); ++ u64 platform_info = native_read_msr(MSR_PLATFORM_INFO); + + /* 100MHz times Max Non Turbo ratio */ + ratio = (platform_info >> 8) & 0xff; +diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c +index 1dab3cc..e1387bb 100644 +--- a/arch/x86/lib/zimage.c ++++ b/arch/x86/lib/zimage.c +@@ -252,6 +252,10 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, + hdr->setup_move_size = 0x9100; + } + ++#ifdef CONFIG_INTEL_MID ++ hdr->hardware_subarch = X86_SUBARCH_MRST; ++#endif ++ + /* build command line at COMMAND_LINE_OFFSET */ + build_command_line(cmd_line, auto_boot); + return 0; +diff --git a/board/intel/edison/Makefile b/board/intel/edison/Makefile +new file mode 100644 +index 0000000..a29f512 +--- /dev/null ++++ b/board/intel/edison/Makefile +@@ -0,0 +1 @@ ++obj-y += edison_start.o edison.o +diff --git a/board/intel/edison/config.mk b/board/intel/edison/config.mk +new file mode 100644 +index 0000000..0c05dd0 +--- /dev/null ++++ b/board/intel/edison/config.mk +@@ -0,0 +1,7 @@ ++# ++# Copyright (c) 2011 The Chromium OS Authors. All rights reserved. ++# ++# SPDX-License-Identifier: GPL-2.0 BSD-3-Clause ++# ++ ++HOSTCFLAGS_autoconf.mk.dep = -Wno-variadic-macros +diff --git a/board/intel/edison/edison.c b/board/intel/edison/edison.c +new file mode 100644 +index 0000000..8d8a6e6 +--- /dev/null ++++ b/board/intel/edison/edison.c +@@ -0,0 +1,54 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#ifndef CONFIG_WATCHDOG_HEARTBEAT ++#define WATCHDOG_HEARTBEAT 30 ++#else ++#define WATCHDOG_HEARTBEAT CONFIG_WATCHDOG_HEARTBEAT ++#endif ++ ++enum { ++ SCU_WATCHDOG_START = 0, ++ SCU_WATCHDOG_STOP, ++ SCU_WATCHDOG_KEEPALIVE, ++ SCU_WATCHDOG_SET_ACTION_ON_TIMEOUT ++}; ++ ++#define IPC_CMD(cmd, sub) (sub << 12 | cmd) ++ ++int board_usb_init(int index, enum usb_init_type init) ++{ ++ return usb_gadget_init_udc(); ++} ++ ++void watchdog_reset(void) ++{ ++ ulong now = timer_get_us(); ++ ++ /* do not flood SCU */ ++ if (unlikely((now - gd->arch.tsc_prev) > (WATCHDOG_HEARTBEAT * 1000000))) ++ { ++ gd->arch.tsc_prev = now; ++ intel_scu_ipc_send_command(IPC_CMD(IPCMSG_WATCHDOG_TIMER, ++ SCU_WATCHDOG_KEEPALIVE)); ++ } ++} ++ ++int watchdog_disable(void) ++{ ++ return (intel_scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, ++ SCU_WATCHDOG_STOP)); ++} ++ ++int watchdog_init(void) ++{ ++ return (intel_scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, ++ SCU_WATCHDOG_START)); ++} +diff --git a/board/intel/edison/edison.h b/board/intel/edison/edison.h +new file mode 100644 +index 0000000..e69de29 +diff --git a/board/intel/edison/edison_start.S b/board/intel/edison/edison_start.S +new file mode 100644 +index 0000000..932fe6c +--- /dev/null ++++ b/board/intel/edison/edison_start.S +@@ -0,0 +1,13 @@ ++/* ++ * Copyright (c) 2011 The Chromium OS Authors. ++ * (C) Copyright 2008 ++ * Graeme Russ, graeme.russ@gmail.com. ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++/* board early intialization */ ++.globl early_board_init ++early_board_init: ++ /* No 32-bit board specific initialisation */ ++ jmp early_board_init_ret +diff --git a/boards.cfg b/boards.cfg +index b4203f1..bf4c268 100644 +--- a/boards.cfg ++++ b/boards.cfg +@@ -1191,6 +1191,7 @@ Active sparc leon3 - gaisler - + Active sparc leon3 - gaisler - gr_xc3s_1500 - - + Active sparc leon3 - gaisler - grsim - - + Active x86 x86 coreboot chromebook-x86 coreboot coreboot-x86 coreboot:SYS_TEXT_BASE=0x01110000 - ++Active x86 sivermont tangier intel edison edison edison:SYS_USB_OTG_BASE=0xf9100000,SYS_EMMC_PORT_BASE=0xff3fc000,SYS_TEXT_BASE=0x1101000 - + # The following were moved to "Orphan" in March, 2014 + Orphan blackfin blackfin - - - cm-bf527 - Bluetechnix Tinyboards + Orphan blackfin blackfin - - - cm-bf533 - Bluetechnix Tinyboards +diff --git a/common/Makefile b/common/Makefile +index cecd81a..3c65100 100644 +--- a/common/Makefile ++++ b/common/Makefile +@@ -175,6 +175,8 @@ obj-$(CONFIG_CMD_SPL) += cmd_spl.o + obj-$(CONFIG_CMD_ZIP) += cmd_zip.o + obj-$(CONFIG_CMD_ZFS) += cmd_zfs.o + ++COBJS-$(CONFIG_CMD_FASTBOOT) += cmd_fastboot.o ++ + # others + obj-$(CONFIG_BOOTSTAGE) += bootstage.o + obj-$(CONFIG_CONSOLE_MUX) += iomux.o +diff --git a/common/board_f.c b/common/board_f.c +index f285bad..52b715c 100644 +--- a/common/board_f.c ++++ b/common/board_f.c +@@ -280,7 +280,7 @@ __weak int arch_cpu_init(void) + return 0; + } + +-#ifdef CONFIG_OF_HOSTFILE ++#if defined(CONFIG_USE_FDT) && defined(CONFIG_OF_HOSTFILE) + + static int read_fdt_from_file(void) + { +@@ -335,6 +335,7 @@ static int setup_ram_buf(void) + } + #endif + ++#ifdef CONFIG_USE_FDT + static int setup_fdt(void) + { + #ifdef CONFIG_OF_EMBED +@@ -354,6 +355,7 @@ static int setup_fdt(void) + (uintptr_t)gd->fdt_blob); + return 0; + } ++#endif + + /* Get the top of usable RAM */ + __weak ulong board_get_usable_ram_top(ulong total_size) +@@ -549,6 +551,7 @@ static int reserve_global_data(void) + return 0; + } + ++#ifdef CONFIG_USE_FDT + static int reserve_fdt(void) + { + /* +@@ -567,6 +570,7 @@ static int reserve_fdt(void) + + return 0; + } ++#endif + + static int reserve_stacks(void) + { +@@ -724,6 +728,7 @@ static int setup_dram_config(void) + return 0; + } + ++#ifdef CONFIG_USE_FDT + static int reloc_fdt(void) + { + if (gd->new_fdt) { +@@ -733,6 +738,7 @@ static int reloc_fdt(void) + + return 0; + } ++#endif + + static int setup_reloc(void) + { +@@ -789,7 +795,9 @@ static init_fnc_t init_sequence_f[] = { + setup_ram_buf, + #endif + setup_mon_len, ++#ifdef CONFIG_USE_FDT + setup_fdt, ++#endif + trace_early_init, + #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) + /* TODO: can this go into arch_cpu_init()? */ +@@ -798,12 +806,12 @@ static init_fnc_t init_sequence_f[] = { + arch_cpu_init, /* basic arch cpu dependent setup */ + #ifdef CONFIG_X86 + cpu_init_f, /* TODO(sjg@chromium.org): remove */ +-# ifdef CONFIG_OF_CONTROL ++#if defined(CONFIG_USE_FDT) && defined(CONFIG_OF_CONTROL) + find_fdt, /* TODO(sjg@chromium.org): remove */ + # endif + #endif + mark_bootstage, +-#ifdef CONFIG_OF_CONTROL ++#if defined(CONFIG_USE_FDT) && defined(CONFIG_OF_CONTROL) + fdtdec_check_fdt, + #endif + #if defined(CONFIG_BOARD_EARLY_INIT_F) +@@ -847,7 +855,7 @@ static init_fnc_t init_sequence_f[] = { + #ifdef CONFIG_SANDBOX + sandbox_early_getopt_check, + #endif +-#ifdef CONFIG_OF_CONTROL ++#if defined(CONFIG_USE_FDT) && defined(CONFIG_OF_CONTROL) + fdtdec_prepare_fdt, + #endif + display_options, /* say that we are here */ +@@ -945,7 +953,9 @@ static init_fnc_t init_sequence_f[] = { + #endif + setup_machine, + reserve_global_data, ++#ifdef CONFIG_USE_FDT + reserve_fdt, ++#endif + reserve_stacks, + setup_dram_config, + show_dram_config, +@@ -960,7 +970,9 @@ static init_fnc_t init_sequence_f[] = { + setup_board_extra, + #endif + INIT_FUNC_WATCHDOG_RESET ++#ifdef CONFIG_USE_FDT + reloc_fdt, ++#endif + setup_reloc, + #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) + jump_to_copy, +diff --git a/common/cmd_dfu.c b/common/cmd_dfu.c +index 5547678..ac7db5e 100644 +--- a/common/cmd_dfu.c ++++ b/common/cmd_dfu.c +@@ -21,7 +21,9 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) + char *usb_controller = argv[1]; + char *interface = argv[2]; + char *devstring = argv[3]; +- ++#ifdef CONFIG_DFU_TIMEOUT ++ ulong dfu_timeout = 0 * 1000; ++#endif + char *s = "dfu"; + int ret, i = 0; + +@@ -34,11 +36,20 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) + dfu_show_entities(); + goto done; + } ++#ifdef CONFIG_DFU_TIMEOUT ++ if (argc > 4) ++ dfu_timeout = simple_strtoul(argv[4], NULL, 0) * 1000 ; ++#endif + + int controller_index = simple_strtoul(usb_controller, NULL, 0); + board_usb_init(controller_index, USB_INIT_DEVICE); +- + g_dnl_register(s); ++ ++#ifdef CONFIG_DFU_TIMEOUT ++ ulong time_activity_start = get_timer(0); ++ ulong time_inactivity_start = time_activity_start + dfu_timeout; ++ ulong next_print_time = 0; ++#endif + while (1) { + if (dfu_reset()) + /* +@@ -48,10 +59,32 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) + */ + if (++i == 10) + goto exit; +- ++#ifdef CONFIG_DFU_TIMEOUT ++ if (dfu_enum_done() && (time_inactivity_start != time_activity_start)) ++ { ++ time_inactivity_start = time_activity_start; ++ debug("\nDFU connection established\n"); ++ } ++#endif + if (ctrlc()) + goto exit; ++#ifdef CONFIG_DFU_TIMEOUT ++ if (time_activity_start != time_inactivity_start) ++ { ++ ulong cur_time = get_timer(time_activity_start); + ++ if ( cur_time > dfu_timeout ) ++ { ++ debug("\nInactivity Timeout, Abort Dfu\n"); ++ goto exit; ++ } ++ if ( next_print_time == 0 || (get_timer(next_print_time)> 800)) ++ { ++ debug("\rAborting in %lu sec", (dfu_timeout - cur_time)/1000); ++ next_print_time = get_timer(0); ++ } ++ } ++#endif + usb_gadget_handle_interrupts(); + } + exit: +@@ -67,9 +100,16 @@ done: + + U_BOOT_CMD(dfu, CONFIG_SYS_MAXARGS, 1, do_dfu, + "Device Firmware Upgrade", ++#ifdef CONFIG_DFU_TIMEOUT ++ " [list|timeout]\n" ++#else + " [list]\n" ++#endif + " - device firmware upgrade via \n" + " on device , attached to interface\n" + " \n" + " [list] - list available alt settings\n" ++#ifdef CONFIG_DFU_TIMEOUT ++ " [timeout] - specify inactivity timeout in sec, doesn't work whit list" ++#endif + ); +diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c +new file mode 100644 +index 0000000..9a656dd +--- /dev/null ++++ b/common/cmd_fastboot.c +@@ -0,0 +1,28 @@ ++#include ++#include ++#include ++ ++static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) ++{ ++ int ret = 1; ++ ++ if (!fastboot_init()) { ++ printf("Fastboot entered...\n"); ++ ++ ret = 0; ++ ++ while (1) { ++ if (fastboot_poll()) ++ break; ++ } ++ } ++ ++ fastboot_shutdown(); ++ return ret; ++} ++ ++U_BOOT_CMD( ++ fastboot, 1, 1, do_fastboot, ++ "fastboot- use USB Fastboot protocol\n", ++ "" ++); +diff --git a/common/cmd_gpt.c b/common/cmd_gpt.c +index e38422d..c8317b4 100644 +--- a/common/cmd_gpt.c ++++ b/common/cmd_gpt.c +@@ -54,7 +54,7 @@ static int extract_env(const char *str, char **env) + if (e == NULL) { + #ifdef CONFIG_RANDOM_UUID + debug("%s unset. ", str); +- gen_rand_uuid_str(uuid_str, UUID_STR_FORMAT_STD); ++ gen_rand_uuid_str(uuid_str, UUID_STR_FORMAT_GUID); + setenv(s, uuid_str); + + e = getenv(s); +diff --git a/common/cmd_itest.c b/common/cmd_itest.c +index ae2527b..a965b15 100644 +--- a/common/cmd_itest.c ++++ b/common/cmd_itest.c +@@ -63,7 +63,8 @@ static long evalexp(char *s, int w) + l = simple_strtoul(s, NULL, 16); + } + +- return (l & ((1 << (w * 8)) - 1)); ++ /* avoid overflow on mask calculus */ ++ return ((sizeof(long) <= w )? l : (l & ((1 << (w * 8)) - 1))); + } + + static char * evalstr(char *s) +diff --git a/common/cmd_part.c b/common/cmd_part.c +index 1424854..79c0297 100644 +--- a/common/cmd_part.c ++++ b/common/cmd_part.c +@@ -21,11 +21,127 @@ + #include + #include + #include ++#include + + #ifndef CONFIG_PARTITION_UUIDS + #error CONFIG_PARTITION_UUIDS must be enabled for CONFIG_CMD_PART to be enabled + #endif + ++int do_part_info(int argc, char * const argv[]) ++{ ++ int part; ++ block_dev_desc_t *dev_desc; ++ disk_partition_t info; ++ char buf_convert[20]; ++ if (argc < 2) ++ return CMD_RET_USAGE; ++ if (argc > 5) ++ return CMD_RET_USAGE; ++ ++ part = get_device_and_partition(argv[0], argv[1], &dev_desc, &info, 0); ++ if (part < 0) ++ return 1; ++ ++ snprintf(buf_convert, sizeof(buf_convert), LBAF, info.start); ++ if (argc > 2) ++ setenv(argv[2], buf_convert); ++ else ++ printf("Partition start :0x%s\n", buf_convert); ++ ++ snprintf(buf_convert, sizeof(buf_convert), LBAF, info.size); ++ if (argc > 3) ++ setenv(argv[3], buf_convert); ++ else ++ printf("Partition size :0x%s\n", buf_convert); ++ ++ snprintf(buf_convert, sizeof(buf_convert), "%lx", info.blksz); ++ if (argc > 4) ++ setenv(argv[4], buf_convert); ++ else ++ printf("Block size :0x%s bytes\n", buf_convert); ++ return 0; ++} ++ ++#define MAX_SEARCH_PARTITIONS 128 ++int do_part_find(int argc, char * const argv[]) ++{ ++ int part, dev, i, ret=1; ++ block_dev_desc_t *dev_desc; ++ disk_partition_t info; ++ size_t mnb_of; ++ const char *value_str; ++ char *dup_str = NULL; ++ const char *criteria_str; ++ char buf_str[4]; ++ ++ if (argc < 3) ++ return CMD_RET_USAGE; ++ if (argc > 4) ++ return CMD_RET_USAGE; ++ ++ dev = get_device(argv[0], argv[1], &dev_desc); ++ if (dev < 0) ++ return 1; ++ ++ /* check and split criteria:value */ ++ value_str = strchr(argv[2],':'); ++ if (!value_str) ++ return CMD_RET_USAGE; ++ ++ dup_str = strdup(argv[2]); ++ if(!dup_str) ++ return 1; ++ ++ if ( (value_str - argv[2]) > strlen(dup_str) ) ++ return 1; ++ ++ dup_str[value_str - argv[2]] = 0; ++ criteria_str = dup_str; ++ value_str++; ++ ++ if(!strcmp(criteria_str, "uuid")) ++ mnb_of = offsetof(disk_partition_t, uuid); ++ else if(!strcmp(criteria_str, "label")) ++ mnb_of = offsetof(disk_partition_t, name); ++ else { ++ printf("Bad criteria: %s\n", criteria_str); ++ ret = CMD_RET_USAGE; ++ goto end_of_part_find; ++ } ++ ++ part=-1; ++ for (i = 1; i <= MAX_SEARCH_PARTITIONS; i++) { ++ ret = get_partition_info(dev_desc, i, &info); ++ if (ret) ++ continue; ++ ++ if(!strcmp(((char*)&info + mnb_of), value_str)) { ++ part = i; ++ ret = 0; ++ break; ++ } ++ } ++ ++ if ( part == -1) { ++ printf("No partition found\n"); ++ ret = 1; ++ goto end_of_part_find; ++ } ++ ++ snprintf(buf_str, sizeof(buf_str), "%d", part); ++ if ( argc > 3) ++ setenv(argv[3],buf_str); ++ else ++ printf("Partition %s correspond to %s == %s\n", ++ buf_str, criteria_str, value_str); ++ ++end_of_part_find: ++ if( dup_str ) ++ free (dup_str); ++ ++ return ret; ++} ++ + int do_part_uuid(int argc, char * const argv[]) + { + int part; +@@ -75,17 +191,30 @@ int do_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) + return do_part_uuid(argc - 2, argv + 2); + else if (!strcmp(argv[1], "list")) + return do_part_list(argc - 2, argv + 2); +- ++ else if (!strcmp(argv[1], "info")) ++ return do_part_info(argc - 2, argv + 2); ++ else if (!strcmp(argv[1], "find")) ++ return do_part_find(argc - 2, argv + 2); + return CMD_RET_USAGE; + } + + U_BOOT_CMD( +- part, 5, 1, do_part, ++ part, 7, 1, do_part, + "disk partition related commands", ++ "find :\n" ++ " - print first partition number corresponding to criteria:valuei\n" ++ " - criteria could be label or uuid\n" ++ "part find : \n" ++ " - set environment variable to first partition number corresponding to criteria:valuei\n" ++ " - criteria could be label or uuid\n" + "uuid :\n" + " - print partition UUID\n" + "part uuid : \n" + " - set environment variable to partition UUID\n" + "part list \n" +- " - print a device's partition table" ++ " - print a device's partition table\n" ++ "part info : \n" ++ " - set environment variable varname-start to partition start in blocks\n" ++ " - set environment variable varname-size to partition size in blocks\n" ++ " - set environment variable varname-blcksize to partition block size in bytes\n" + ); +diff --git a/disk/part_efi.c b/disk/part_efi.c +index 216a292..4b32049 100644 +--- a/disk/part_efi.c ++++ b/disk/part_efi.c +@@ -201,10 +201,12 @@ static int set_protective_mbr(block_dev_desc_t *dev_desc) + ALLOC_CACHE_ALIGN_BUFFER(legacy_mbr, p_mbr, 1); + memset(p_mbr, 0, sizeof(*p_mbr)); + +- if (p_mbr == NULL) { +- printf("%s: calloc failed!\n", __func__); ++ /* Read MBR to backup boot_code if it exists */ ++ if (dev_desc->block_read(dev_desc->dev, 0, 1, p_mbr) != 1) { ++ error("** Can't read from device %d **\n", dev_desc->dev); + return -1; + } ++ + /* Append signature */ + p_mbr->signature = MSDOS_MBR_SIGNATURE; + p_mbr->partition_record[0].sys_ind = EFI_PMBR_OSTYPE_EFI_GPT; +@@ -324,7 +326,7 @@ int gpt_fill_pte(gpt_header *gpt_h, gpt_entry *gpt_e, + str_uuid = partitions[i].uuid; + bin_uuid = gpt_e[i].unique_partition_guid.b; + +- if (uuid_str_to_bin(str_uuid, bin_uuid, UUID_STR_FORMAT_STD)) { ++ if (uuid_str_to_bin(str_uuid, bin_uuid, UUID_STR_FORMAT_GUID)) { + printf("Partition no. %d: invalid guid: %s\n", + i, str_uuid); + return -1; +diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c +index 8a09aaf..fa4bfc3 100644 +--- a/drivers/dfu/dfu.c ++++ b/drivers/dfu/dfu.c +@@ -17,6 +17,7 @@ + #include + + static bool dfu_reset_request; ++static bool dfu_enum_request; + static LIST_HEAD(dfu_list); + static int dfu_alt_num; + static int alt_num_cnt; +@@ -31,6 +32,16 @@ void dfu_trigger_reset() + dfu_reset_request = true; + } + ++bool dfu_enum_done(void) ++{ ++ return dfu_enum_request; ++} ++ ++void dfu_trigger_enum_done() ++{ ++ dfu_enum_request = true; ++} ++ + static int dfu_find_alt_num(const char *s) + { + int i = 0; +@@ -61,6 +72,7 @@ int dfu_init_env_entities(char *interface, int dev) + return ret; + } + ++ dfu_enum_request = false; + free(env_bkp); + return 0; + } +diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c +index 651cfff..a7224b6 100644 +--- a/drivers/dfu/dfu_mmc.c ++++ b/drivers/dfu/dfu_mmc.c +@@ -18,11 +18,29 @@ static unsigned char __aligned(CONFIG_SYS_CACHELINE_SIZE) + dfu_file_buf[CONFIG_SYS_DFU_MAX_FILE_SIZE]; + static long dfu_file_buf_len; + ++static int mmc_access_part(struct dfu_entity *dfu, struct mmc *mmc, int part) ++{ ++ int ret; ++ ++ if (part == mmc->part_num) ++ return 0; ++ ++ ret = mmc_switch_part(dfu->dev_num, part); ++ if (ret) { ++ error("Cannot switch to partition %d\n", part); ++ return ret; ++ } ++ mmc->part_num = part; ++ ++ return 0; ++} ++ + static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, + u64 offset, void *buf, long *len) + { + struct mmc *mmc = find_mmc_device(dfu->dev_num); + u32 blk_start, blk_count, n = 0; ++ int ret, part_num_bkp = 0; + + /* + * We must ensure that we work in lba_blk_size chunks, so ALIGN +@@ -39,6 +57,13 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, + return -EINVAL; + } + ++ if (dfu->data.mmc.partition_access != DFU_NOT_SUPPORTED) { ++ part_num_bkp = mmc->part_num; ++ ret = mmc_access_part(dfu, mmc, dfu->data.mmc.partition_access); ++ if (ret) ++ return ret; ++ } ++ + debug("%s: %s dev: %d start: %d cnt: %d buf: 0x%p\n", __func__, + op == DFU_OP_READ ? "MMC READ" : "MMC WRITE", dfu->dev_num, + blk_start, blk_count, buf); +@@ -57,9 +82,17 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, + + if (n != blk_count) { + error("MMC operation failed"); ++ if (dfu->data.mmc.partition_access != DFU_NOT_SUPPORTED) ++ mmc_access_part(dfu, mmc, part_num_bkp); + return -EIO; + } + ++ if (dfu->data.mmc.partition_access != DFU_NOT_SUPPORTED) { ++ ret = mmc_access_part(dfu, mmc, part_num_bkp); ++ if (ret) ++ return ret; ++ } ++ + return 0; + } + +@@ -193,12 +226,22 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s) + char *st; + + dfu->dev_type = DFU_DEV_MMC; ++ dfu->data.mmc.partition_access = DFU_NOT_SUPPORTED; ++ + st = strsep(&s, " "); + if (!strcmp(st, "mmc")) { + dfu->layout = DFU_RAW_ADDR; + dfu->data.mmc.lba_start = simple_strtoul(s, &s, 16); +- dfu->data.mmc.lba_size = simple_strtoul(++s, &s, 16); ++ s++; ++ dfu->data.mmc.lba_size = simple_strtoul(s, &s, 16); + dfu->data.mmc.lba_blk_size = get_mmc_blk_size(dfu->dev_num); ++ if (*s) { ++ s++; ++ st = strsep(&s, " "); ++ if (!strcmp(st, "mmcpart")) ++ dfu->data.mmc.partition_access = ++ simple_strtoul(s, &s, 0); ++ } + } else if (!strcmp(st, "fat")) { + dfu->layout = DFU_FS_FAT; + } else if (!strcmp(st, "ext4")) { +@@ -236,7 +279,8 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *s) + + if (dfu->layout == DFU_FS_EXT4 || dfu->layout == DFU_FS_FAT) { + dfu->data.mmc.dev = simple_strtoul(s, &s, 10); +- dfu->data.mmc.part = simple_strtoul(++s, &s, 10); ++ s++; ++ dfu->data.mmc.part = simple_strtoul(s, &s, 10); + } + + dfu->read_medium = dfu_read_medium_mmc; +diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile +index 2f2e48f..889fe05 100644 +--- a/drivers/misc/Makefile ++++ b/drivers/misc/Makefile +@@ -23,3 +23,4 @@ obj-$(CONFIG_PDSP188x) += pdsp188x.o + obj-$(CONFIG_STATUS_LED) += status_led.o + obj-$(CONFIG_TWL4030_LED) += twl4030_led.o + obj-$(CONFIG_FSL_IFC) += fsl_ifc.o ++obj-$(CONFIG_INTEL_SCU) += intel_scu_ipc.o +diff --git a/drivers/misc/intel_scu_ipc.c b/drivers/misc/intel_scu_ipc.c +new file mode 100644 +index 0000000..5843fc8 +--- /dev/null ++++ b/drivers/misc/intel_scu_ipc.c +@@ -0,0 +1,150 @@ ++#include ++#include ++#include ++#include ++ ++#define IPC_STATUS_ADDR 0x04 ++#define IPC_SPTR_ADDR 0x08 ++#define IPC_DPTR_ADDR 0x0C ++#define IPC_READ_BUFFER 0x90 ++#define IPC_WRITE_BUFFER 0x80 ++#define IPC_IOC 0x100 ++ ++/* ++ * Command Register (Write Only): ++ * A write to this register results in an interrupt to the SCU core processor ++ * Format: ++ * |rfu2(8) | size(8) | command id(4) | rfu1(3) | ioc(1) | command(8)| ++ */ ++void intel_scu_ipc_send_command(u32 cmd) ++{ ++ writel(cmd | IPC_IOC, CONFIG_SCU_IPC_BASE); ++} ++ ++/* ++ * IPC Write Buffer (Write Only): ++ * 16-byte buffer for sending data associated with IPC command to ++ * SCU. Size of the data is specified in the IPC_COMMAND_REG register ++ */ ++void ipc_data_writel(u32 data, u32 offset) ++{ /* Write ipc data */ ++ writel(data, CONFIG_SCU_IPC_BASE + IPC_WRITE_BUFFER + offset); ++} ++ ++/* ++ * Status Register (Read Only): ++ * Driver will read this register to get the ready/busy status of the IPC ++ * block and error status of the IPC command that was just processed by SCU ++ * Format: ++ * |rfu3(8)|error code(8)|initiator id(8)|cmd id(4)|rfu1(2)|error(1)|busy(1)| ++ */ ++ ++u32 ipc_read_status(void) ++{ ++ return readl(CONFIG_SCU_IPC_BASE + IPC_STATUS_ADDR); ++} ++ ++u8 ipc_data_readb(u32 offset) ++{ /* Read ipc byte data */ ++ return readb(CONFIG_SCU_IPC_BASE + IPC_READ_BUFFER + offset); ++} ++ ++u32 ipc_data_readl(u32 offset) ++{ /* Read ipc u32 data */ ++ return readl(CONFIG_SCU_IPC_BASE + IPC_READ_BUFFER + offset); ++} ++ ++int intel_scu_ipc_check_status(void) ++{ ++ int ret = 0; ++ int status = 0; ++ int loop_count = 3000000; ++ ++ while ((ipc_read_status() & 1) && --loop_count) ++ udelay(1); ++ if (loop_count == 0) ++ ret = -ETIMEDOUT; ++ ++ status = ipc_read_status(); ++ ++ if (status & 0x2) { ++ printf("%s() status=0x%08x\n", __func__, status); ++ return -EIO; ++ } ++ status++; ++ return ret; ++} ++ ++/** ++ * intel_scu_ipc_simple_command - send a simple command ++ * @cmd: command ++ * @sub: sub type ++ * ++ * Issue a simple command to the SCU. Do not use this interface if ++ * you must then access data as any data values may be overwritten ++ * by another SCU access by the time this function returns. ++ * ++ * This function may sleep. Locking for SCU accesses is handled for ++ * the caller. ++ */ ++int intel_scu_ipc_simple_command(int cmd, int sub) ++{ ++ int err = 0; ++ ++ intel_scu_ipc_send_command(sub << 12 | cmd); ++ err = intel_scu_ipc_check_status(); ++ return err; ++} ++ ++int intel_scu_ipc_raw_cmd(u32 cmd, u32 sub, u8 * in, u8 inlen, u32 * out, ++ u32 outlen, u32 dptr, u32 sptr) ++{ ++ int i, err; ++ u32 wbuf[4]; ++ ++ if (inlen > 16) ++ return -EINVAL; ++ ++ memcpy(wbuf, in, inlen); ++ ++ writel(dptr, CONFIG_SCU_IPC_BASE + IPC_DPTR_ADDR); ++ writel(sptr, CONFIG_SCU_IPC_BASE + IPC_SPTR_ADDR); ++ ++ /** ++ * SRAM controller don't support 8bit write, it only supports ++ * 32bit write, so we have to write into the WBUF in 32bit, ++ * and SCU FW will use the inlen to determine the actual input ++ * data length in the WBUF. ++ */ ++ for (i = 0; i < ((inlen + 3) / 4); i++) ++ ipc_data_writel(wbuf[i], 4 * i); ++ ++ /** ++ * Watchdog IPC command is an exception here using double word ++ * as the unit of input data size because of some historical ++ * reasons and SCU FW is doing so. ++ */ ++ if ((cmd & 0xFF) == IPCMSG_WATCHDOG_TIMER) ++ inlen = (inlen + 3) / 4; ++ ++ intel_scu_ipc_send_command((inlen << 16) | (sub << 12) | cmd); ++ err = intel_scu_ipc_check_status(); ++ ++ for (i = 0; i < outlen; i++) ++ *out++ = ipc_data_readl(4 * i); ++ ++ return err; ++} ++ ++int intel_scu_ipc_command(u32 cmd, u32 sub, u8 * in, u8 inlen, ++ u32 * out, u32 outlen) ++{ ++ int ret; ++ ret = intel_scu_ipc_raw_cmd(cmd, sub, in, inlen, out, outlen, 0, 0); ++ return ret; ++} ++ ++int init_scu_ipc(void) ++{ ++ return 0; ++} +diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile +index 931922b..c88b42b 100644 +--- a/drivers/mmc/Makefile ++++ b/drivers/mmc/Makefile +@@ -30,6 +30,7 @@ obj-$(CONFIG_DWMMC) += dw_mmc.o + obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o + obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o + obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o ++obj-$(CONFIG_TANGIER_SDHCI) += tangier_sdhci.o + ifdef CONFIG_SPL_BUILD + obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o + else +diff --git a/drivers/mmc/tangier_sdhci.c b/drivers/mmc/tangier_sdhci.c +new file mode 100644 +index 0000000..3337651 +--- /dev/null ++++ b/drivers/mmc/tangier_sdhci.c +@@ -0,0 +1,38 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++int tangier_sdhci_init(u32 regbase, int index, int bus_width) ++{ ++ struct sdhci_host *host = NULL; ++ ++ host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host)); ++ if (!host) { ++ printf("sdhci__host malloc fail!\n"); ++ return 1; ++ } ++ ++ memset(host, 0x00, sizeof(struct sdhci_host)); ++ ++ host->name = "tangier_sdhci"; ++ host->ioaddr = (void *)regbase; ++ ++ host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE | ++ SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR | ++ SDHCI_QUIRK_WAIT_SEND_CMD; ++ host->voltages = MMC_VDD_165_195; //MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; ++ host->version = sdhci_readw(host, SDHCI_HOST_VERSION); ++ ++ host->index = index; ++ ++ host->host_caps = MMC_MODE_HC; ++ ++ add_sdhci(host, 200000000, 400000); ++ ++ return 0; ++} +diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile +index 571c18f..1bdf0f5 100644 +--- a/drivers/serial/Makefile ++++ b/drivers/serial/Makefile +@@ -6,6 +6,7 @@ + # + + obj-y += serial.o ++obj-y += serial_tng.o + + obj-$(CONFIG_ALTERA_UART) += altera_uart.o + obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o +diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c +index df05bde..9e493dc 100644 +--- a/drivers/serial/serial.c ++++ b/drivers/serial/serial.c +@@ -159,6 +159,7 @@ serial_initfunc(sa1100_serial_initialize); + serial_initfunc(sh_serial_initialize); + serial_initfunc(arm_dcc_initialize); + serial_initfunc(mxs_auart_initialize); ++serial_initfunc(tng_serial_initialize); + serial_initfunc(arc_serial_initialize); + + /** +diff --git a/drivers/serial/serial_tng.c b/drivers/serial/serial_tng.c +new file mode 100644 +index 0000000..d6d6753 +--- /dev/null ++++ b/drivers/serial/serial_tng.c +@@ -0,0 +1,252 @@ ++/* ++ * (C) Copyright 2002 ++ * Gary Jennejohn, DENX Software Engineering, ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ */ ++ ++#include ++#include ++ ++#include ++ ++#define cpu_relax() asm volatile("rep; nop") ++ ++#define UART_GLOBAL 0xff010000 ++ ++#define UART_OFFSET 0x80 ++ ++#define SERIAL_BASE_ADDR (UART_GLOBAL + (UART_OFFSET * (dev_index + 1))) ++ ++#define XMTRDY 0x20 ++#define LSR_DR (0x01) ++ ++#define DLAB 0x80 ++ ++#define TXR 0 /* Transmit register (WRITE) */ ++#define RXR 0 /* Receive register (READ) */ ++#define IER 1 /* Interrupt Enable */ ++#define IIR 2 /* Interrupt ID */ ++#define FCR 2 /* FIFO control */ ++#define LCR 3 /* Line control */ ++#define MCR 4 /* Modem control */ ++#define LSR 5 /* Line Status */ ++#define MSR 6 /* Modem Status */ ++#define DLL 0 /* Divisor Latch Low */ ++#define DLH 1 /* Divisor latch High */ ++#define MUL 0x34 /* DDS Multiplier */ ++#define DIV 0x38 /* DDS Divisor */ ++ ++/* Multi serial device functions */ ++#define DECLARE_TNG_SERIAL_FUNCTIONS(port) \ ++ int tng_serial##port##_init(void) \ ++ { \ ++ return serial_init_dev(port); \ ++ } \ ++ int tng_serial##port##_shutdown(void) \ ++ { \ ++ return serial_shutdown_dev(port); \ ++ } \ ++ void tng_serial##port##_setbrg(void) \ ++ { \ ++ serial_setbrg_dev(port); \ ++ } \ ++ int tng_serial##port##_getc(void) \ ++ { \ ++ return serial_getc_dev(port); \ ++ } \ ++ int tng_serial##port##_tstc(void) \ ++ { \ ++ return serial_tstc_dev(port); \ ++ } \ ++ void tng_serial##port##_putc(const char c) \ ++ { \ ++ serial_putc_dev(port, c); \ ++ } \ ++ void tng_serial##port##_puts(const char *s) \ ++ { \ ++ serial_puts_dev(port, s); \ ++ } ++ ++#define INIT_TNG_SERIAL_STRUCTURE(port, __name) { \ ++ .name = __name, \ ++ .start = tng_serial##port##_init, \ ++ .stop = tng_serial##port##_shutdown, \ ++ .setbrg = tng_serial##port##_setbrg, \ ++ .getc = tng_serial##port##_getc, \ ++ .tstc = tng_serial##port##_tstc, \ ++ .putc = tng_serial##port##_putc, \ ++ .puts = tng_serial##port##_puts, \ ++} ++ ++#ifdef CONFIG_HWFLOW ++static int hwflow; ++#endif ++ ++void _serial_setbrg(const int dev_index) ++{ ++ return; ++} ++ ++static inline void serial_setbrg_dev(unsigned int dev_index) ++{ ++ _serial_setbrg(dev_index); ++} ++ ++/* ++ * Initialise the serial port. ++ */ ++static int serial_init_dev(const int dev_index) ++{ ++ unsigned char c; ++ unsigned divisor = 16; ++ ++ c = readb(SERIAL_BASE_ADDR + LCR); ++ writeb(c | DLAB, SERIAL_BASE_ADDR + LCR); ++ writeb(divisor & 0xff, SERIAL_BASE_ADDR + DLL); ++ writeb((divisor >> 8) & 0xff, SERIAL_BASE_ADDR + DLH); ++ writeb(c & ~DLAB, SERIAL_BASE_ADDR + LCR); ++ writeb(0x2, SERIAL_BASE_ADDR + IER); /* TIE enable */ ++ writeb(0x3, SERIAL_BASE_ADDR + LCR); /* 8n1 */ ++ writeb(0, SERIAL_BASE_ADDR + FCR); /* no fifo */ ++ writeb(0x3, SERIAL_BASE_ADDR + MCR); /* DTR + RTS */ ++ writeb(7, SERIAL_BASE_ADDR + FCR); ++ writel(0x2ee0, SERIAL_BASE_ADDR + MUL); ++ writel(0x3d09, SERIAL_BASE_ADDR + DIV); ++ ++ return 0; ++} ++ ++/* ++ * Shutdown the serial port. ++ */ ++static int serial_shutdown_dev(const int dev_index) ++{ ++ unsigned char c; ++ ++ writeb(0x0, SERIAL_BASE_ADDR + IER); /* TIE disable */ ++ c = readb(SERIAL_BASE_ADDR + MCR); ++ writeb(c & ~0x08, SERIAL_BASE_ADDR + MCR); /* DTR + RTS */ ++ c = readb(SERIAL_BASE_ADDR + LCR); ++ writeb(c & ~0x40, SERIAL_BASE_ADDR + LCR); ++ writeb(0x7, SERIAL_BASE_ADDR + FCR); ++ writeb(0x0, SERIAL_BASE_ADDR + FCR); /* no fifo */ ++ ++ return 0; ++} ++ ++/* ++ * Read a single byte from the serial port. ++ */ ++int _serial_getc(const int dev_index) ++{ ++ while ((readb(SERIAL_BASE_ADDR + LSR) & LSR_DR) == 0) { ++ if (gd->have_console) ++ break; ++ } ++ ++ return readb(SERIAL_BASE_ADDR + RXR) & 0xff; ++} ++ ++static inline int serial_getc_dev(unsigned int dev_index) ++{ ++ return _serial_getc(dev_index); ++} ++ ++/* ++ * Output a single byte to the serial port. ++ */ ++void _serial_putc(const char c, const int dev_index) ++{ ++ while ((readb(SERIAL_BASE_ADDR + LSR) & XMTRDY) == 0) ++ cpu_relax(); ++ ++ writeb(c, SERIAL_BASE_ADDR + TXR); ++ ++ /* If \n, also do \r */ ++ if (c == '\n') ++ serial_putc('\r'); ++} ++ ++static inline void serial_putc_dev(unsigned int dev_index, const char c) ++{ ++ _serial_putc(c, dev_index); ++} ++ ++/* ++ * Test whether a character is in the RX buffer ++ */ ++int _serial_tstc(const int dev_index) ++{ ++ return (readb(SERIAL_BASE_ADDR + LSR) & LSR_DR) != 0; ++} ++ ++static inline int serial_tstc_dev(unsigned int dev_index) ++{ ++ return _serial_tstc(dev_index); ++} ++ ++void _serial_puts(const char *s, const int dev_index) ++{ ++ while (*s) { ++ _serial_putc(*s++, dev_index); ++ } ++ return; ++} ++ ++static inline void serial_puts_dev(int dev_index, const char *s) ++{ ++ return _serial_puts(s, dev_index); ++} ++ ++DECLARE_TNG_SERIAL_FUNCTIONS(0); ++struct serial_device tng_serial0_device = ++INIT_TNG_SERIAL_STRUCTURE(0, "tng_serial0"); ++DECLARE_TNG_SERIAL_FUNCTIONS(1); ++struct serial_device tng_serial1_device = ++INIT_TNG_SERIAL_STRUCTURE(1, "tng_serial1"); ++DECLARE_TNG_SERIAL_FUNCTIONS(2); ++struct serial_device tng_serial2_device = ++INIT_TNG_SERIAL_STRUCTURE(2, "tng_serial2"); ++ ++__weak struct serial_device *default_serial_console(void) ++{ ++#if defined(CONFIG_SYS_TNG_SERIAL0) ++ return &tng_serial0_device; ++#elif defined(CONFIG_SYS_TNG_SERIAL1) ++ return &tng_serial1_device; ++#elif defined(CONFIG_SYS_TNG_SERIAL2) ++ return &tng_serial2_device; ++#else ++#error "CONFIG_SERIAL? missing." ++#endif ++} ++ ++void tng_serial_initialize(void) ++{ ++#if defined(CONFIG_SYS_TNG_SERIAL0) ++ serial_init_dev(0); ++ serial_register(&tng_serial0_device); ++#endif ++#if defined(CONFIG_SYS_TNG_SERIAL1) ++ serial_init_dev(1); ++ serial_register(&tng_serial1_device); ++#endif ++#if defined(CONFIG_SYS_TNG_SERIAL2) ++ serial_init_dev(2); ++ serial_register(&tng_serial2_device); ++#endif ++} +diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig +new file mode 100644 +index 0000000..2c05ec9 +--- /dev/null ++++ b/drivers/usb/dwc3/Kconfig +@@ -0,0 +1,26 @@ ++config USB_DWC3 ++ tristate "DesignWare USB3 DRD Core Support" ++ depends on (USB || USB_GADGET) ++ select USB_OTG_UTILS ++ select USB_XHCI_PLATFORM ++ help ++ Say Y or M here if your system has a Dual Role SuperSpeed ++ USB controller based on the DesignWare USB3 IP Core. ++ ++ If you choose to build this driver is a dynamically linked ++ module, the module will be called dwc3.ko. ++ ++if USB_DWC3 ++ ++config USB_DWC3_DEBUG ++ bool "Enable Debugging Messages" ++ help ++ Say Y here to enable debugging messages on DWC3 Driver. ++ ++config USB_DWC3_VERBOSE ++ bool "Enable Verbose Debugging Messages" ++ depends on USB_DWC3_DEBUG ++ help ++ Say Y here to enable verbose debugging messages on DWC3 Driver. ++ ++endif +diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile +new file mode 100644 +index 0000000..1b5d353 +--- /dev/null ++++ b/drivers/usb/dwc3/Makefile +@@ -0,0 +1,8 @@ ++obj-$(CONFIG_USB_DWC3) += dwc3_core.o dwc3_ep0.o dwc3_misc.o ++obj-$(CONFIG_USB_DWC3_GADGET) += dwc3_gadget.o ++obj-$(CONFIG_USB_DWC3_HOST) += dwc3_host.o ++ ++ccflags-y := $(call cc-option,-Wno-unused-variable) \ ++ $(call cc-option,-Wno-unused-but-set-variable) \ ++ $(call cc-option,-Wno-unused-label) ++ +diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h +new file mode 100644 +index 0000000..46f0c2f +--- /dev/null ++++ b/drivers/usb/dwc3/core.h +@@ -0,0 +1,814 @@ ++/** ++ * core.h - DesignWare USB3 DRD Core Header ++ * ++ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * Sebastian Andrzej Siewior ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef __DRIVERS_USB_DWC3_CORE_H ++#define __DRIVERS_USB_DWC3_CORE_H ++ ++#include ++#include ++#include ++#include "misc.h" ++ ++/* Global constants */ ++#define DWC3_ENDPOINTS_NUM 32 ++ ++#define DWC3_EVENT_BUFFERS_SIZE PAGE_SIZE ++#define DWC3_EVENT_TYPE_MASK 0xfe ++ ++#define DWC3_EVENT_TYPE_DEV 0 ++#define DWC3_EVENT_TYPE_CARKIT 3 ++#define DWC3_EVENT_TYPE_I2C 4 ++ ++#define DWC3_DEVICE_EVENT_DISCONNECT 0 ++#define DWC3_DEVICE_EVENT_RESET 1 ++#define DWC3_DEVICE_EVENT_CONNECT_DONE 2 ++#define DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE 3 ++#define DWC3_DEVICE_EVENT_WAKEUP 4 ++#define DWC3_DEVICE_EVENT_EOPF 6 ++#define DWC3_DEVICE_EVENT_SOF 7 ++#define DWC3_DEVICE_EVENT_ERRATIC_ERROR 9 ++#define DWC3_DEVICE_EVENT_CMD_CMPL 10 ++#define DWC3_DEVICE_EVENT_OVERFLOW 11 ++ ++#define DWC3_GEVNTCOUNT_MASK 0xfffc ++#define DWC3_GSNPSID_MASK 0xffff0000 ++#define DWC3_GSNPSREV_MASK 0xffff ++ ++/* Global Registers */ ++#define DWC3_GSBUSCFG0 0xc100 ++#define DWC3_GSBUSCFG1 0xc104 ++#define DWC3_GTXTHRCFG 0xc108 ++#define DWC3_GRXTHRCFG 0xc10c ++#define DWC3_GCTL 0xc110 ++#define DWC3_GEVTEN 0xc114 ++#define DWC3_GSTS 0xc118 ++#define DWC3_GSNPSID 0xc120 ++#define DWC3_GGPIO 0xc124 ++#define DWC3_GUID 0xc128 ++#define DWC3_GUCTL 0xc12c ++#define DWC3_GBUSERRADDR0 0xc130 ++#define DWC3_GBUSERRADDR1 0xc134 ++#define DWC3_GPRTBIMAP0 0xc138 ++#define DWC3_GPRTBIMAP1 0xc13c ++#define DWC3_GHWPARAMS0 0xc140 ++#define DWC3_GHWPARAMS1 0xc144 ++#define DWC3_GHWPARAMS2 0xc148 ++#define DWC3_GHWPARAMS3 0xc14c ++#define DWC3_GHWPARAMS4 0xc150 ++#define DWC3_GHWPARAMS5 0xc154 ++#define DWC3_GHWPARAMS6 0xc158 ++#define DWC3_GHWPARAMS7 0xc15c ++#define DWC3_GDBGFIFOSPACE 0xc160 ++#define DWC3_GDBGLTSSM 0xc164 ++#define DWC3_GPRTBIMAP_HS0 0xc180 ++#define DWC3_GPRTBIMAP_HS1 0xc184 ++#define DWC3_GPRTBIMAP_FS0 0xc188 ++#define DWC3_GPRTBIMAP_FS1 0xc18c ++ ++#define DWC3_GUSB2PHYCFG(n) (0xc200 + (n * 0x04)) ++#define DWC3_GUSB2I2CCTL(n) (0xc240 + (n * 0x04)) ++ ++#define DWC3_GUSB2PHYACC(n) (0xc280 + (n * 0x04)) ++ ++#define DWC3_GUSB3PIPECTL(n) (0xc2c0 + (n * 0x04)) ++ ++#define DWC3_GTXFIFOSIZ(n) (0xc300 + (n * 0x04)) ++#define DWC3_GRXFIFOSIZ(n) (0xc380 + (n * 0x04)) ++ ++#define DWC3_GEVNTADRLO(n) (0xc400 + (n * 0x10)) ++#define DWC3_GEVNTADRHI(n) (0xc404 + (n * 0x10)) ++#define DWC3_GEVNTSIZ(n) (0xc408 + (n * 0x10)) ++#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10)) ++ ++#define DWC3_GHWPARAMS8 0xc600 ++ ++/* Device Registers */ ++#define DWC3_DCFG 0xc700 ++#define DWC3_DCTL 0xc704 ++#define DWC3_DEVTEN 0xc708 ++#define DWC3_DSTS 0xc70c ++#define DWC3_DGCMDPAR 0xc710 ++#define DWC3_DGCMD 0xc714 ++#define DWC3_DALEPENA 0xc720 ++#define DWC3_DEPCMDPAR2(n) (0xc800 + (n * 0x10)) ++#define DWC3_DEPCMDPAR1(n) (0xc804 + (n * 0x10)) ++#define DWC3_DEPCMDPAR0(n) (0xc808 + (n * 0x10)) ++#define DWC3_DEPCMD(n) (0xc80c + (n * 0x10)) ++ ++/* OTG Registers */ ++#define DWC3_OCFG 0xcc00 ++#define DWC3_OCTL 0xcc04 ++#define DWC3_OEVTEN 0xcc08 ++#define DWC3_OSTS 0xcc0C ++ ++/* Bit fields */ ++ ++/* Global Configuration Register */ ++#define DWC3_GCTL_PWRDNSCALE(n) (n << 19) ++#define DWC3_GCTL_U2RSTECN (1 << 16) ++#define DWC3_GCTL_RAMCLKSEL(x) ((x & DWC3_GCTL_CLK_MASK) << 6) ++#define DWC3_GCTL_CLK_BUS (0) ++#define DWC3_GCTL_CLK_PIPE (1) ++#define DWC3_GCTL_CLK_PIPEHALF (2) ++#define DWC3_GCTL_CLK_MASK (3) ++ ++#define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12) ++#define DWC3_GCTL_PRTCAPDIR(n) (n << 12) ++#define DWC3_GCTL_PRTCAP_HOST 1 ++#define DWC3_GCTL_PRTCAP_DEVICE 2 ++#define DWC3_GCTL_PRTCAP_OTG 3 ++ ++#define DWC3_GCTL_CORESOFTRESET (1 << 11) ++#define DWC3_GCTL_SCALEDOWN(n) (n << 4) ++#define DWC3_GCTL_DISSCRAMBLE (1 << 3) ++#define DWC3_GCTL_DSBLCLKGTNG (1 << 0) ++ ++/* Global USB2 PHY Configuration Register */ ++#define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) ++#define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) ++ ++/* Global USB3 PIPE Control Register */ ++#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31) ++#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17) ++ ++/* Global HWPARAMS1 Register */ ++#define DWC3_GHWPARAMS1_EN_PWROPT(n) ((n & (3 << 24)) >> 24) ++#define DWC3_GHWPARAMS1_EN_PWROPT_NO 0 ++#define DWC3_GHWPARAMS1_EN_PWROPT_CLK 1 ++ ++/* Device Configuration Register */ ++#define DWC3_DCFG_DEVADDR(addr) ((addr) << 3) ++#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f) ++ ++#define DWC3_DCFG_SPEED_MASK (7 << 0) ++#define DWC3_DCFG_SUPERSPEED (4 << 0) ++#define DWC3_DCFG_HIGHSPEED (0 << 0) ++#define DWC3_DCFG_FULLSPEED2 (1 << 0) ++#define DWC3_DCFG_LOWSPEED (2 << 0) ++#define DWC3_DCFG_FULLSPEED1 (3 << 0) ++ ++/* Device Control Register */ ++#define DWC3_DCTL_RUN_STOP (1 << 31) ++#define DWC3_DCTL_CSFTRST (1 << 30) ++#define DWC3_DCTL_LSFTRST (1 << 29) ++ ++#define DWC3_DCTL_HIRD_THRES_MASK (0x1f << 24) ++#define DWC3_DCTL_HIRD_THRES(n) (((n) & DWC3_DCTL_HIRD_THRES_MASK) >> 24) ++ ++#define DWC3_DCTL_APPL1RES (1 << 23) ++ ++#define DWC3_DCTL_INITU2ENA (1 << 12) ++#define DWC3_DCTL_ACCEPTU2ENA (1 << 11) ++#define DWC3_DCTL_INITU1ENA (1 << 10) ++#define DWC3_DCTL_ACCEPTU1ENA (1 << 9) ++#define DWC3_DCTL_TSTCTRL_MASK (0xf << 1) ++ ++#define DWC3_DCTL_ULSTCHNGREQ_MASK (0x0f << 5) ++#define DWC3_DCTL_ULSTCHNGREQ(n) (((n) << 5) & DWC3_DCTL_ULSTCHNGREQ_MASK) ++ ++#define DWC3_DCTL_ULSTCHNG_NO_ACTION (DWC3_DCTL_ULSTCHNGREQ(0)) ++#define DWC3_DCTL_ULSTCHNG_SS_DISABLED (DWC3_DCTL_ULSTCHNGREQ(4)) ++#define DWC3_DCTL_ULSTCHNG_RX_DETECT (DWC3_DCTL_ULSTCHNGREQ(5)) ++#define DWC3_DCTL_ULSTCHNG_SS_INACTIVE (DWC3_DCTL_ULSTCHNGREQ(6)) ++#define DWC3_DCTL_ULSTCHNG_RECOVERY (DWC3_DCTL_ULSTCHNGREQ(8)) ++#define DWC3_DCTL_ULSTCHNG_COMPLIANCE (DWC3_DCTL_ULSTCHNGREQ(10)) ++#define DWC3_DCTL_ULSTCHNG_LOOPBACK (DWC3_DCTL_ULSTCHNGREQ(11)) ++ ++/* Device Event Enable Register */ ++#define DWC3_DEVTEN_VNDRDEVTSTRCVEDEN (1 << 12) ++#define DWC3_DEVTEN_EVNTOVERFLOWEN (1 << 11) ++#define DWC3_DEVTEN_CMDCMPLTEN (1 << 10) ++#define DWC3_DEVTEN_ERRTICERREN (1 << 9) ++#define DWC3_DEVTEN_SOFEN (1 << 7) ++#define DWC3_DEVTEN_EOPFEN (1 << 6) ++#define DWC3_DEVTEN_WKUPEVTEN (1 << 4) ++#define DWC3_DEVTEN_ULSTCNGEN (1 << 3) ++#define DWC3_DEVTEN_CONNECTDONEEN (1 << 2) ++#define DWC3_DEVTEN_USBRSTEN (1 << 1) ++#define DWC3_DEVTEN_DISCONNEVTEN (1 << 0) ++ ++/* Device Status Register */ ++#define DWC3_DSTS_PWRUPREQ (1 << 24) ++#define DWC3_DSTS_COREIDLE (1 << 23) ++#define DWC3_DSTS_DEVCTRLHLT (1 << 22) ++ ++#define DWC3_DSTS_USBLNKST_MASK (0x0f << 18) ++#define DWC3_DSTS_USBLNKST(n) (((n) & DWC3_DSTS_USBLNKST_MASK) >> 18) ++ ++#define DWC3_DSTS_RXFIFOEMPTY (1 << 17) ++ ++#define DWC3_DSTS_SOFFN_MASK (0x3ff << 3) ++#define DWC3_DSTS_SOFFN(n) (((n) & DWC3_DSTS_SOFFN_MASK) >> 3) ++ ++#define DWC3_DSTS_CONNECTSPD (7 << 0) ++ ++#define DWC3_DSTS_SUPERSPEED (4 << 0) ++#define DWC3_DSTS_HIGHSPEED (0 << 0) ++#define DWC3_DSTS_FULLSPEED2 (1 << 0) ++#define DWC3_DSTS_LOWSPEED (2 << 0) ++#define DWC3_DSTS_FULLSPEED1 (3 << 0) ++ ++/* Device Generic Command Register */ ++#define DWC3_DGCMD_SET_LMP 0x01 ++#define DWC3_DGCMD_SET_PERIODIC_PAR 0x02 ++#define DWC3_DGCMD_XMIT_FUNCTION 0x03 ++#define DWC3_DGCMD_SELECTED_FIFO_FLUSH 0x09 ++#define DWC3_DGCMD_ALL_FIFO_FLUSH 0x0a ++#define DWC3_DGCMD_SET_ENDPOINT_NRDY 0x0c ++#define DWC3_DGCMD_RUN_SOC_BUS_LOOPBACK 0x10 ++ ++/* Device Endpoint Command Register */ ++#define DWC3_DEPCMD_PARAM_SHIFT 16 ++#define DWC3_DEPCMD_PARAM(x) (x << DWC3_DEPCMD_PARAM_SHIFT) ++#define DWC3_DEPCMD_GET_RSC_IDX(x) ((x >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f) ++#define DWC3_DEPCMD_STATUS_MASK (0x0f << 12) ++#define DWC3_DEPCMD_STATUS(x) ((x & DWC3_DEPCMD_STATUS_MASK) >> 12) ++#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11) ++#define DWC3_DEPCMD_CMDACT (1 << 10) ++#define DWC3_DEPCMD_CMDIOC (1 << 8) ++ ++#define DWC3_DEPCMD_DEPSTARTCFG (0x09 << 0) ++#define DWC3_DEPCMD_ENDTRANSFER (0x08 << 0) ++#define DWC3_DEPCMD_UPDATETRANSFER (0x07 << 0) ++#define DWC3_DEPCMD_STARTTRANSFER (0x06 << 0) ++#define DWC3_DEPCMD_CLEARSTALL (0x05 << 0) ++#define DWC3_DEPCMD_SETSTALL (0x04 << 0) ++#define DWC3_DEPCMD_GETSEQNUMBER (0x03 << 0) ++#define DWC3_DEPCMD_SETTRANSFRESOURCE (0x02 << 0) ++#define DWC3_DEPCMD_SETEPCONFIG (0x01 << 0) ++ ++/* The EP number goes 0..31 so ep0 is always out and ep1 is always in */ ++#define DWC3_DALEPENA_EP(n) (1 << n) ++ ++#define DWC3_DEPCMD_TYPE_CONTROL 0 ++#define DWC3_DEPCMD_TYPE_ISOC 1 ++#define DWC3_DEPCMD_TYPE_BULK 2 ++#define DWC3_DEPCMD_TYPE_INTR 3 ++ ++/* Structures */ ++ ++struct dwc3_trb_hw; ++ ++/** ++ * struct dwc3_event_buffer - Software event buffer representation ++ * @list: a list of event buffers ++ * @buf: _THE_ buffer ++ * @length: size of this buffer ++ * @dma: dma_addr_t ++ * @dwc: pointer to DWC controller ++ */ ++struct dwc3_event_buffer { ++ void *buf; ++ unsigned length; ++ unsigned int lpos; ++ ++ dma_addr_t dma; ++ ++ struct dwc3 *dwc; ++}; ++ ++#define DWC3_EP_FLAG_STALLED (1 << 0) ++#define DWC3_EP_FLAG_WEDGED (1 << 1) ++ ++#define DWC3_EP_DIRECTION_TX true ++#define DWC3_EP_DIRECTION_RX false ++ ++#define DWC3_TRB_NUM 32 ++#define DWC3_TRB_MASK (DWC3_TRB_NUM - 1) ++ ++/** ++ * struct dwc3_ep - device side endpoint representation ++ * @endpoint: usb endpoint ++ * @request_list: list of requests for this endpoint ++ * @req_queued: list of requests on this ep which have TRBs setup ++ * @trb_pool: array of transaction buffers ++ * @trb_pool_dma: dma address of @trb_pool ++ * @free_slot: next slot which is going to be used ++ * @busy_slot: first slot which is owned by HW ++ * @desc: usb_endpoint_descriptor pointer ++ * @dwc: pointer to DWC controller ++ * @flags: endpoint flags (wedged, stalled, ...) ++ * @current_trb: index of current used trb ++ * @number: endpoint number (1 - 15) ++ * @type: set to bmAttributes & USB_ENDPOINT_XFERTYPE_MASK ++ * @res_trans_idx: Resource transfer index ++ * @interval: the intervall on which the ISOC transfer is started ++ * @name: a human readable name e.g. ep1out-bulk ++ * @direction: true for TX, false for RX ++ * @stream_capable: true when streams are enabled ++ */ ++struct dwc3_ep { ++ struct usb_ep endpoint; ++ struct list_head request_list; ++ struct list_head req_queued; ++ ++ struct dwc3_trb_hw *trb_pool; ++ dma_addr_t trb_pool_dma; ++ u32 free_slot; ++ u32 busy_slot; ++ const struct usb_endpoint_descriptor *desc; ++ const struct usb_ss_ep_comp_descriptor *comp_desc; ++ struct dwc3 *dwc; ++ ++ unsigned flags; ++#define DWC3_EP_ENABLED (1 << 0) ++#define DWC3_EP_STALL (1 << 1) ++#define DWC3_EP_WEDGE (1 << 2) ++#define DWC3_EP_BUSY (1 << 4) ++#define DWC3_EP_PENDING_REQUEST (1 << 5) ++ ++ /* This last one is specific to EP0 */ ++#define DWC3_EP0_DIR_IN (1 << 31) ++ ++ unsigned current_trb; ++ ++ u8 number; ++ u8 type; ++ u8 res_trans_idx; ++ u32 interval; ++ ++ char name[20]; ++ ++ unsigned direction:1; ++ unsigned stream_capable:1; ++}; ++ ++enum dwc3_phy { ++ DWC3_PHY_UNKNOWN = 0, ++ DWC3_PHY_USB3, ++ DWC3_PHY_USB2, ++}; ++ ++enum dwc3_ep0_next { ++ DWC3_EP0_UNKNOWN = 0, ++ DWC3_EP0_COMPLETE, ++ DWC3_EP0_NRDY_SETUP, ++ DWC3_EP0_NRDY_DATA, ++ DWC3_EP0_NRDY_STATUS, ++}; ++ ++enum dwc3_ep0_state { ++ EP0_UNCONNECTED = 0, ++ EP0_SETUP_PHASE, ++ EP0_DATA_PHASE, ++ EP0_STATUS_PHASE, ++}; ++ ++enum dwc3_link_state { ++ /* In SuperSpeed */ ++ DWC3_LINK_STATE_U0 = 0x00, /* in HS, means ON */ ++ DWC3_LINK_STATE_U1 = 0x01, ++ DWC3_LINK_STATE_U2 = 0x02, /* in HS, means SLEEP */ ++ DWC3_LINK_STATE_U3 = 0x03, /* in HS, means SUSPEND */ ++ DWC3_LINK_STATE_SS_DIS = 0x04, ++ DWC3_LINK_STATE_RX_DET = 0x05, /* in HS, means Early Suspend */ ++ DWC3_LINK_STATE_SS_INACT = 0x06, ++ DWC3_LINK_STATE_POLL = 0x07, ++ DWC3_LINK_STATE_RECOV = 0x08, ++ DWC3_LINK_STATE_HRESET = 0x09, ++ DWC3_LINK_STATE_CMPLY = 0x0a, ++ DWC3_LINK_STATE_LPBK = 0x0b, ++ DWC3_LINK_STATE_MASK = 0x0f, ++}; ++ ++enum dwc3_device_state { ++ DWC3_DEFAULT_STATE, ++ DWC3_ADDRESS_STATE, ++ DWC3_CONFIGURED_STATE, ++}; ++ ++/** ++ * struct dwc3_trb - transfer request block ++ * @bpl: lower 32bit of the buffer ++ * @bph: higher 32bit of the buffer ++ * @length: buffer size (up to 16mb - 1) ++ * @pcm1: packet count m1 ++ * @trbsts: trb status ++ * 0 = ok ++ * 1 = missed isoc ++ * 2 = setup pending ++ * @hwo: hardware owner of descriptor ++ * @lst: last trb ++ * @chn: chain buffers ++ * @csp: continue on short packets (only supported on isoc eps) ++ * @trbctl: trb control ++ * 1 = normal ++ * 2 = control-setup ++ * 3 = control-status-2 ++ * 4 = control-status-3 ++ * 5 = control-data (first trb of data stage) ++ * 6 = isochronous-first (first trb of service interval) ++ * 7 = isochronous ++ * 8 = link trb ++ * others = reserved ++ * @isp_imi: interrupt on short packet / interrupt on missed isoc ++ * @ioc: interrupt on complete ++ * @sid_sofn: Stream ID / SOF Number ++ */ ++struct dwc3_trb { ++ u64 bplh; ++ ++ union { ++ struct { ++ u32 length:24; ++ u32 pcm1:2; ++ u32 reserved27_26:2; ++ u32 trbsts:4; ++#define DWC3_TRB_STS_OKAY 0 ++#define DWC3_TRB_STS_MISSED_ISOC 1 ++#define DWC3_TRB_STS_SETUP_PENDING 2 ++ }; ++ u32 len_pcm; ++ }; ++ ++ union { ++ struct { ++ u32 hwo:1; ++ u32 lst:1; ++ u32 chn:1; ++ u32 csp:1; ++ u32 trbctl:6; ++ u32 isp_imi:1; ++ u32 ioc:1; ++ u32 reserved13_12:2; ++ u32 sid_sofn:16; ++ u32 reserved31_30:2; ++ }; ++ u32 control; ++ }; ++} __packed; ++ ++/** ++ * struct dwc3_trb_hw - transfer request block (hw format) ++ * @bpl: DW0-3 ++ * @bph: DW4-7 ++ * @size: DW8-B ++ * @trl: DWC-F ++ */ ++struct dwc3_trb_hw { ++ __le32 bpl; ++ __le32 bph; ++ __le32 size; ++ __le32 ctrl; ++} __packed; ++ ++static inline void dwc3_trb_to_hw(struct dwc3_trb *nat, struct dwc3_trb_hw *hw) ++{ ++ hw->bpl = cpu_to_le32(lower_32_bits(nat->bplh)); ++ hw->bph = cpu_to_le32(upper_32_bits(nat->bplh)); ++ hw->size = cpu_to_le32p(&nat->len_pcm); ++ /* HWO is written last */ ++ hw->ctrl = cpu_to_le32p(&nat->control); ++} ++ ++static inline void dwc3_trb_to_nat(struct dwc3_trb_hw *hw, struct dwc3_trb *nat) ++{ ++ u64 bplh; ++ ++ bplh = le32_to_cpup(&hw->bpl); ++ bplh |= (u64) le32_to_cpup(&hw->bph) << 32; ++ nat->bplh = bplh; ++ ++ nat->len_pcm = le32_to_cpup(&hw->size); ++ nat->control = le32_to_cpup(&hw->ctrl); ++} ++ ++/** ++ * dwc3_hwparams - copy of HWPARAMS registers ++ * @hwparams0 - GHWPARAMS0 ++ * @hwparams1 - GHWPARAMS1 ++ * @hwparams2 - GHWPARAMS2 ++ * @hwparams3 - GHWPARAMS3 ++ * @hwparams4 - GHWPARAMS4 ++ * @hwparams5 - GHWPARAMS5 ++ * @hwparams6 - GHWPARAMS6 ++ * @hwparams7 - GHWPARAMS7 ++ * @hwparams8 - GHWPARAMS8 ++ */ ++struct dwc3_hwparams { ++ u32 hwparams0; ++ u32 hwparams1; ++ u32 hwparams2; ++ u32 hwparams3; ++ u32 hwparams4; ++ u32 hwparams5; ++ u32 hwparams6; ++ u32 hwparams7; ++ u32 hwparams8; ++}; ++ ++/* HWPARAMS0 */ ++#define DWC3_MODE(n) ((n) & 0x7) ++ ++#define DWC3_MODE_DEVICE 0 ++#define DWC3_MODE_HOST 1 ++#define DWC3_MODE_DRD 2 ++#define DWC3_MODE_HUB 3 ++ ++/* HWPARAMS1 */ ++#define DWC3_NUM_INT(n) (((n) & (0x3f << 15)) >> 15) ++ ++struct dwc3_request { ++ struct usb_request request; ++ struct list_head list; ++ struct dwc3_ep *dep; ++ ++ u8 epnum; ++ struct dwc3_trb_hw *trb; ++ dma_addr_t trb_dma; ++ ++ unsigned direction:1; ++ unsigned mapped:1; ++ unsigned queued:1; ++}; ++ ++/** ++ * struct dwc3 - representation of our controller ++ * @ctrl_req: usb control request which is used for ep0 ++ * @ep0_trb: trb which is used for the ctrl_req ++ * @ep0_bounce: bounce buffer for ep0 ++ * @setup_buf: used while precessing STD USB requests ++ * @ctrl_req_addr: dma address of ctrl_req ++ * @ep0_trb: dma address of ep0_trb ++ * @ep0_usb_req: dummy req used while handling STD USB requests ++ * @setup_buf_addr: dma address of setup_buf ++ * @ep0_bounce_addr: dma address of ep0_bounce ++ * @lock: for synchronizing ++ * @dev: pointer to our struct device ++ * @xhci: pointer to our xHCI child ++ * @event_buffer_list: a list of event buffers ++ * @gadget: device side representation of the peripheral controller ++ * @gadget_driver: pointer to the gadget driver ++ * @regs: base address for our registers ++ * @regs_size: address space size ++ * @irq: IRQ number ++ * @num_event_buffers: calculated number of event buffers ++ * @u1u2: only used on revisions <1.83a for workaround ++ * @maximum_speed: maximum speed requested (mainly for testing purposes) ++ * @revision: revision register contents ++ * @mode: mode of operation ++ * @is_selfpowered: true when we are selfpowered ++ * @three_stage_setup: set if we perform a three phase setup ++ * @ep0_bounced: true when we used bounce buffer ++ * @ep0_expect_in: true when we expect a DATA IN transfer ++ * @start_config_issued: true when StartConfig command has been issued ++ * @setup_packet_pending: true when there's a Setup Packet in FIFO. Workaround ++ * @ep0_next_event: hold the next expected event ++ * @ep0state: state of endpoint zero ++ * @link_state: link state ++ * @speed: device speed (super, high, full, low) ++ * @mem: points to start of memory which is used for this struct. ++ * @hwparams: copy of hwparams registers ++ * @root: debugfs root folder pointer ++ */ ++struct dwc3 { ++ struct usb_ctrlrequest *ctrl_req; ++ struct dwc3_trb_hw *ep0_trb; ++ void *ep0_bounce; ++ u8 *setup_buf; ++ dma_addr_t ctrl_req_addr; ++ dma_addr_t ep0_trb_addr; ++ dma_addr_t setup_buf_addr; ++ dma_addr_t ep0_bounce_addr; ++ struct dwc3_request ep0_usb_req; ++ /* device lock */ ++ spinlock_t lock; ++ struct device *dev; ++ ++ struct platform_device *xhci; ++ struct resource *res; ++ ++ struct dwc3_event_buffer **ev_buffs; ++ struct dwc3_ep *eps[DWC3_ENDPOINTS_NUM]; ++ ++ struct usb_gadget gadget; ++ struct usb_gadget_driver *gadget_driver; ++ ++ void __iomem *regs; ++ size_t regs_size; ++ ++ int irq; ++ ++ u32 num_event_buffers; ++ u32 u1u2; ++ u32 maximum_speed; ++ u32 revision; ++ u32 mode; ++ ++#define DWC3_REVISION_173A 0x5533173a ++#define DWC3_REVISION_175A 0x5533175a ++#define DWC3_REVISION_180A 0x5533180a ++#define DWC3_REVISION_183A 0x5533183a ++#define DWC3_REVISION_185A 0x5533185a ++#define DWC3_REVISION_188A 0x5533188a ++#define DWC3_REVISION_190A 0x5533190a ++ ++ unsigned is_selfpowered:1; ++ unsigned three_stage_setup:1; ++ unsigned ep0_bounced:1; ++ unsigned ep0_expect_in:1; ++ unsigned start_config_issued:1; ++ unsigned setup_packet_pending:1; ++ unsigned delayed_status:1; ++ ++ enum dwc3_ep0_next ep0_next_event; ++ enum dwc3_ep0_state ep0state; ++ enum dwc3_link_state link_state; ++ enum dwc3_device_state dev_state; ++ ++ u8 speed; ++ void *mem; ++ ++ struct dwc3_hwparams hwparams; ++ struct dentry *root; ++}; ++ ++/* -------------------------------------------------------------------------- */ ++ ++#define DWC3_TRBSTS_OK 0 ++#define DWC3_TRBSTS_MISSED_ISOC 1 ++#define DWC3_TRBSTS_SETUP_PENDING 2 ++ ++#define DWC3_TRBCTL_NORMAL 1 ++#define DWC3_TRBCTL_CONTROL_SETUP 2 ++#define DWC3_TRBCTL_CONTROL_STATUS2 3 ++#define DWC3_TRBCTL_CONTROL_STATUS3 4 ++#define DWC3_TRBCTL_CONTROL_DATA 5 ++#define DWC3_TRBCTL_ISOCHRONOUS_FIRST 6 ++#define DWC3_TRBCTL_ISOCHRONOUS 7 ++#define DWC3_TRBCTL_LINK_TRB 8 ++ ++/* -------------------------------------------------------------------------- */ ++ ++struct dwc3_event_type { ++ u32 is_devspec:1; ++ u32 type:6; ++ u32 reserved8_31:25; ++} __packed; ++ ++#define DWC3_DEPEVT_XFERCOMPLETE 0x01 ++#define DWC3_DEPEVT_XFERINPROGRESS 0x02 ++#define DWC3_DEPEVT_XFERNOTREADY 0x03 ++#define DWC3_DEPEVT_RXTXFIFOEVT 0x04 ++#define DWC3_DEPEVT_STREAMEVT 0x06 ++#define DWC3_DEPEVT_EPCMDCMPLT 0x07 ++ ++/** ++ * struct dwc3_event_depvt - Device Endpoint Events ++ * @one_bit: indicates this is an endpoint event (not used) ++ * @endpoint_number: number of the endpoint ++ * @endpoint_event: The event we have: ++ * 0x00 - Reserved ++ * 0x01 - XferComplete ++ * 0x02 - XferInProgress ++ * 0x03 - XferNotReady ++ * 0x04 - RxTxFifoEvt (IN->Underrun, OUT->Overrun) ++ * 0x05 - Reserved ++ * 0x06 - StreamEvt ++ * 0x07 - EPCmdCmplt ++ * @reserved11_10: Reserved, don't use. ++ * @status: Indicates the status of the event. Refer to databook for ++ * more information. ++ * @parameters: Parameters of the current event. Refer to databook for ++ * more information. ++ */ ++struct dwc3_event_depevt { ++ u32 one_bit:1; ++ u32 endpoint_number:5; ++ u32 endpoint_event:4; ++ u32 reserved11_10:2; ++ u32 status:4; ++#define DEPEVT_STATUS_BUSERR (1 << 0) ++#define DEPEVT_STATUS_SHORT (1 << 1) ++#define DEPEVT_STATUS_IOC (1 << 2) ++#define DEPEVT_STATUS_LST (1 << 3) ++ ++/* Stream event only */ ++#define DEPEVT_STREAMEVT_FOUND 1 ++#define DEPEVT_STREAMEVT_NOTFOUND 2 ++ ++/* Control-only Status */ ++#define DEPEVT_STATUS_CONTROL_SETUP 0 ++#define DEPEVT_STATUS_CONTROL_DATA 1 ++#define DEPEVT_STATUS_CONTROL_STATUS 2 ++ ++ u32 parameters:16; ++} __packed; ++ ++/** ++ * struct dwc3_event_devt - Device Events ++ * @one_bit: indicates this is a non-endpoint event (not used) ++ * @device_event: indicates it's a device event. Should read as 0x00 ++ * @type: indicates the type of device event. ++ * 0 - DisconnEvt ++ * 1 - USBRst ++ * 2 - ConnectDone ++ * 3 - ULStChng ++ * 4 - WkUpEvt ++ * 5 - Reserved ++ * 6 - EOPF ++ * 7 - SOF ++ * 8 - Reserved ++ * 9 - ErrticErr ++ * 10 - CmdCmplt ++ * 11 - EvntOverflow ++ * 12 - VndrDevTstRcved ++ * @reserved15_12: Reserved, not used ++ * @event_info: Information about this event ++ * @reserved31_24: Reserved, not used ++ */ ++struct dwc3_event_devt { ++ u32 one_bit:1; ++ u32 device_event:7; ++ u32 type:4; ++ u32 reserved15_12:4; ++ u32 event_info:8; ++ u32 reserved31_24:8; ++} __packed; ++ ++/** ++ * struct dwc3_event_gevt - Other Core Events ++ * @one_bit: indicates this is a non-endpoint event (not used) ++ * @device_event: indicates it's (0x03) Carkit or (0x04) I2C event. ++ * @phy_port_number: self-explanatory ++ * @reserved31_12: Reserved, not used. ++ */ ++struct dwc3_event_gevt { ++ u32 one_bit:1; ++ u32 device_event:7; ++ u32 phy_port_number:4; ++ u32 reserved31_12:20; ++} __packed; ++ ++/** ++ * union dwc3_event - representation of Event Buffer contents ++ * @raw: raw 32-bit event ++ * @type: the type of the event ++ * @depevt: Device Endpoint Event ++ * @devt: Device Event ++ * @gevt: Global Event ++ */ ++union dwc3_event { ++ u32 raw; ++ struct dwc3_event_type type; ++ struct dwc3_event_depevt depevt; ++ struct dwc3_event_devt devt; ++ struct dwc3_event_gevt gevt; ++}; ++ ++/* ++ * DWC3 Features to be used as Driver Data ++ */ ++ ++#define DWC3_HAS_PERIPHERAL BIT(0) ++#define DWC3_HAS_XHCI BIT(1) ++#define DWC3_HAS_OTG BIT(3) ++ ++/* prototypes */ ++void dwc3_set_mode(struct dwc3 *dwc, u32 mode); ++ ++int dwc3_host_init(struct dwc3 *dwc); ++static inline void dwc3_host_exit(struct dwc3 *dwc) {} ++ ++int dwc3_gadget_init(struct dwc3 *dwc); ++void dwc3_gadget_exit(struct dwc3 *dwc); ++ ++extern int dwc3_get_device_id(void); ++extern void dwc3_put_device_id(int id); ++ ++#endif /* __DRIVERS_USB_DWC3_CORE_H */ +diff --git a/drivers/usb/dwc3/debug.h b/drivers/usb/dwc3/debug.h +new file mode 100644 +index 0000000..52d0227 +--- /dev/null ++++ b/drivers/usb/dwc3/debug.h +@@ -0,0 +1,49 @@ ++/** ++ * debug.h - DesignWare USB3 DRD Controller Debug Header ++ * ++ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * Sebastian Andrzej Siewior ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include "core.h" ++ ++#ifdef CONFIG_DEBUG_FS ++extern int dwc3_debugfs_init(struct dwc3 *); ++extern void dwc3_debugfs_exit(struct dwc3 *); ++#else ++static inline int dwc3_debugfs_init(struct dwc3 *d) ++{ return 0; } ++static inline void dwc3_debugfs_exit(struct dwc3 *d) ++{ } ++#endif +diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c +new file mode 100644 +index 0000000..97b2c40 +--- /dev/null ++++ b/drivers/usb/dwc3/debugfs.c +@@ -0,0 +1,521 @@ ++/** ++ * debugfs.c - DesignWare USB3 DRD Controller DebugFS file ++ * ++ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * Sebastian Andrzej Siewior ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++#ifdef CONFIG_DWC3_off ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "core.h" ++#include "gadget.h" ++#include "io.h" ++#include "debug.h" ++ ++struct dwc3_register { ++ const char *name; ++ u32 offset; ++}; ++ ++#define dump_register(nm) \ ++{ \ ++ .name = __stringify(nm), \ ++ .offset = DWC3_ ##nm, \ ++} ++ ++static const struct dwc3_register dwc3_regs[] = { ++ dump_register(GSBUSCFG0), ++ dump_register(GSBUSCFG1), ++ dump_register(GTXTHRCFG), ++ dump_register(GRXTHRCFG), ++ dump_register(GCTL), ++ dump_register(GEVTEN), ++ dump_register(GSTS), ++ dump_register(GSNPSID), ++ dump_register(GGPIO), ++ dump_register(GUID), ++ dump_register(GUCTL), ++ dump_register(GBUSERRADDR0), ++ dump_register(GBUSERRADDR1), ++ dump_register(GPRTBIMAP0), ++ dump_register(GPRTBIMAP1), ++ dump_register(GHWPARAMS0), ++ dump_register(GHWPARAMS1), ++ dump_register(GHWPARAMS2), ++ dump_register(GHWPARAMS3), ++ dump_register(GHWPARAMS4), ++ dump_register(GHWPARAMS5), ++ dump_register(GHWPARAMS6), ++ dump_register(GHWPARAMS7), ++ dump_register(GDBGFIFOSPACE), ++ dump_register(GDBGLTSSM), ++ dump_register(GPRTBIMAP_HS0), ++ dump_register(GPRTBIMAP_HS1), ++ dump_register(GPRTBIMAP_FS0), ++ dump_register(GPRTBIMAP_FS1), ++ ++ dump_register(GUSB2PHYCFG(0)), ++ dump_register(GUSB2PHYCFG(1)), ++ dump_register(GUSB2PHYCFG(2)), ++ dump_register(GUSB2PHYCFG(3)), ++ dump_register(GUSB2PHYCFG(4)), ++ dump_register(GUSB2PHYCFG(5)), ++ dump_register(GUSB2PHYCFG(6)), ++ dump_register(GUSB2PHYCFG(7)), ++ dump_register(GUSB2PHYCFG(8)), ++ dump_register(GUSB2PHYCFG(9)), ++ dump_register(GUSB2PHYCFG(10)), ++ dump_register(GUSB2PHYCFG(11)), ++ dump_register(GUSB2PHYCFG(12)), ++ dump_register(GUSB2PHYCFG(13)), ++ dump_register(GUSB2PHYCFG(14)), ++ dump_register(GUSB2PHYCFG(15)), ++ ++ dump_register(GUSB2I2CCTL(0)), ++ dump_register(GUSB2I2CCTL(1)), ++ dump_register(GUSB2I2CCTL(2)), ++ dump_register(GUSB2I2CCTL(3)), ++ dump_register(GUSB2I2CCTL(4)), ++ dump_register(GUSB2I2CCTL(5)), ++ dump_register(GUSB2I2CCTL(6)), ++ dump_register(GUSB2I2CCTL(7)), ++ dump_register(GUSB2I2CCTL(8)), ++ dump_register(GUSB2I2CCTL(9)), ++ dump_register(GUSB2I2CCTL(10)), ++ dump_register(GUSB2I2CCTL(11)), ++ dump_register(GUSB2I2CCTL(12)), ++ dump_register(GUSB2I2CCTL(13)), ++ dump_register(GUSB2I2CCTL(14)), ++ dump_register(GUSB2I2CCTL(15)), ++ ++ dump_register(GUSB2PHYACC(0)), ++ dump_register(GUSB2PHYACC(1)), ++ dump_register(GUSB2PHYACC(2)), ++ dump_register(GUSB2PHYACC(3)), ++ dump_register(GUSB2PHYACC(4)), ++ dump_register(GUSB2PHYACC(5)), ++ dump_register(GUSB2PHYACC(6)), ++ dump_register(GUSB2PHYACC(7)), ++ dump_register(GUSB2PHYACC(8)), ++ dump_register(GUSB2PHYACC(9)), ++ dump_register(GUSB2PHYACC(10)), ++ dump_register(GUSB2PHYACC(11)), ++ dump_register(GUSB2PHYACC(12)), ++ dump_register(GUSB2PHYACC(13)), ++ dump_register(GUSB2PHYACC(14)), ++ dump_register(GUSB2PHYACC(15)), ++ ++ dump_register(GUSB3PIPECTL(0)), ++ dump_register(GUSB3PIPECTL(1)), ++ dump_register(GUSB3PIPECTL(2)), ++ dump_register(GUSB3PIPECTL(3)), ++ dump_register(GUSB3PIPECTL(4)), ++ dump_register(GUSB3PIPECTL(5)), ++ dump_register(GUSB3PIPECTL(6)), ++ dump_register(GUSB3PIPECTL(7)), ++ dump_register(GUSB3PIPECTL(8)), ++ dump_register(GUSB3PIPECTL(9)), ++ dump_register(GUSB3PIPECTL(10)), ++ dump_register(GUSB3PIPECTL(11)), ++ dump_register(GUSB3PIPECTL(12)), ++ dump_register(GUSB3PIPECTL(13)), ++ dump_register(GUSB3PIPECTL(14)), ++ dump_register(GUSB3PIPECTL(15)), ++ ++ dump_register(GTXFIFOSIZ(0)), ++ dump_register(GTXFIFOSIZ(1)), ++ dump_register(GTXFIFOSIZ(2)), ++ dump_register(GTXFIFOSIZ(3)), ++ dump_register(GTXFIFOSIZ(4)), ++ dump_register(GTXFIFOSIZ(5)), ++ dump_register(GTXFIFOSIZ(6)), ++ dump_register(GTXFIFOSIZ(7)), ++ dump_register(GTXFIFOSIZ(8)), ++ dump_register(GTXFIFOSIZ(9)), ++ dump_register(GTXFIFOSIZ(10)), ++ dump_register(GTXFIFOSIZ(11)), ++ dump_register(GTXFIFOSIZ(12)), ++ dump_register(GTXFIFOSIZ(13)), ++ dump_register(GTXFIFOSIZ(14)), ++ dump_register(GTXFIFOSIZ(15)), ++ dump_register(GTXFIFOSIZ(16)), ++ dump_register(GTXFIFOSIZ(17)), ++ dump_register(GTXFIFOSIZ(18)), ++ dump_register(GTXFIFOSIZ(19)), ++ dump_register(GTXFIFOSIZ(20)), ++ dump_register(GTXFIFOSIZ(21)), ++ dump_register(GTXFIFOSIZ(22)), ++ dump_register(GTXFIFOSIZ(23)), ++ dump_register(GTXFIFOSIZ(24)), ++ dump_register(GTXFIFOSIZ(25)), ++ dump_register(GTXFIFOSIZ(26)), ++ dump_register(GTXFIFOSIZ(27)), ++ dump_register(GTXFIFOSIZ(28)), ++ dump_register(GTXFIFOSIZ(29)), ++ dump_register(GTXFIFOSIZ(30)), ++ dump_register(GTXFIFOSIZ(31)), ++ ++ dump_register(GRXFIFOSIZ(0)), ++ dump_register(GRXFIFOSIZ(1)), ++ dump_register(GRXFIFOSIZ(2)), ++ dump_register(GRXFIFOSIZ(3)), ++ dump_register(GRXFIFOSIZ(4)), ++ dump_register(GRXFIFOSIZ(5)), ++ dump_register(GRXFIFOSIZ(6)), ++ dump_register(GRXFIFOSIZ(7)), ++ dump_register(GRXFIFOSIZ(8)), ++ dump_register(GRXFIFOSIZ(9)), ++ dump_register(GRXFIFOSIZ(10)), ++ dump_register(GRXFIFOSIZ(11)), ++ dump_register(GRXFIFOSIZ(12)), ++ dump_register(GRXFIFOSIZ(13)), ++ dump_register(GRXFIFOSIZ(14)), ++ dump_register(GRXFIFOSIZ(15)), ++ dump_register(GRXFIFOSIZ(16)), ++ dump_register(GRXFIFOSIZ(17)), ++ dump_register(GRXFIFOSIZ(18)), ++ dump_register(GRXFIFOSIZ(19)), ++ dump_register(GRXFIFOSIZ(20)), ++ dump_register(GRXFIFOSIZ(21)), ++ dump_register(GRXFIFOSIZ(22)), ++ dump_register(GRXFIFOSIZ(23)), ++ dump_register(GRXFIFOSIZ(24)), ++ dump_register(GRXFIFOSIZ(25)), ++ dump_register(GRXFIFOSIZ(26)), ++ dump_register(GRXFIFOSIZ(27)), ++ dump_register(GRXFIFOSIZ(28)), ++ dump_register(GRXFIFOSIZ(29)), ++ dump_register(GRXFIFOSIZ(30)), ++ dump_register(GRXFIFOSIZ(31)), ++ ++ dump_register(GEVNTADRLO(0)), ++ dump_register(GEVNTADRHI(0)), ++ dump_register(GEVNTSIZ(0)), ++ dump_register(GEVNTCOUNT(0)), ++ ++ dump_register(GHWPARAMS8), ++ dump_register(DCFG), ++ dump_register(DCTL), ++ dump_register(DEVTEN), ++ dump_register(DSTS), ++ dump_register(DGCMDPAR), ++ dump_register(DGCMD), ++ dump_register(DALEPENA), ++ ++ dump_register(DEPCMDPAR2(0)), ++ dump_register(DEPCMDPAR2(1)), ++ dump_register(DEPCMDPAR2(2)), ++ dump_register(DEPCMDPAR2(3)), ++ dump_register(DEPCMDPAR2(4)), ++ dump_register(DEPCMDPAR2(5)), ++ dump_register(DEPCMDPAR2(6)), ++ dump_register(DEPCMDPAR2(7)), ++ dump_register(DEPCMDPAR2(8)), ++ dump_register(DEPCMDPAR2(9)), ++ dump_register(DEPCMDPAR2(10)), ++ dump_register(DEPCMDPAR2(11)), ++ dump_register(DEPCMDPAR2(12)), ++ dump_register(DEPCMDPAR2(13)), ++ dump_register(DEPCMDPAR2(14)), ++ dump_register(DEPCMDPAR2(15)), ++ dump_register(DEPCMDPAR2(16)), ++ dump_register(DEPCMDPAR2(17)), ++ dump_register(DEPCMDPAR2(18)), ++ dump_register(DEPCMDPAR2(19)), ++ dump_register(DEPCMDPAR2(20)), ++ dump_register(DEPCMDPAR2(21)), ++ dump_register(DEPCMDPAR2(22)), ++ dump_register(DEPCMDPAR2(23)), ++ dump_register(DEPCMDPAR2(24)), ++ dump_register(DEPCMDPAR2(25)), ++ dump_register(DEPCMDPAR2(26)), ++ dump_register(DEPCMDPAR2(27)), ++ dump_register(DEPCMDPAR2(28)), ++ dump_register(DEPCMDPAR2(29)), ++ dump_register(DEPCMDPAR2(30)), ++ dump_register(DEPCMDPAR2(31)), ++ ++ dump_register(DEPCMDPAR1(0)), ++ dump_register(DEPCMDPAR1(1)), ++ dump_register(DEPCMDPAR1(2)), ++ dump_register(DEPCMDPAR1(3)), ++ dump_register(DEPCMDPAR1(4)), ++ dump_register(DEPCMDPAR1(5)), ++ dump_register(DEPCMDPAR1(6)), ++ dump_register(DEPCMDPAR1(7)), ++ dump_register(DEPCMDPAR1(8)), ++ dump_register(DEPCMDPAR1(9)), ++ dump_register(DEPCMDPAR1(10)), ++ dump_register(DEPCMDPAR1(11)), ++ dump_register(DEPCMDPAR1(12)), ++ dump_register(DEPCMDPAR1(13)), ++ dump_register(DEPCMDPAR1(14)), ++ dump_register(DEPCMDPAR1(15)), ++ dump_register(DEPCMDPAR1(16)), ++ dump_register(DEPCMDPAR1(17)), ++ dump_register(DEPCMDPAR1(18)), ++ dump_register(DEPCMDPAR1(19)), ++ dump_register(DEPCMDPAR1(20)), ++ dump_register(DEPCMDPAR1(21)), ++ dump_register(DEPCMDPAR1(22)), ++ dump_register(DEPCMDPAR1(23)), ++ dump_register(DEPCMDPAR1(24)), ++ dump_register(DEPCMDPAR1(25)), ++ dump_register(DEPCMDPAR1(26)), ++ dump_register(DEPCMDPAR1(27)), ++ dump_register(DEPCMDPAR1(28)), ++ dump_register(DEPCMDPAR1(29)), ++ dump_register(DEPCMDPAR1(30)), ++ dump_register(DEPCMDPAR1(31)), ++ ++ dump_register(DEPCMDPAR0(0)), ++ dump_register(DEPCMDPAR0(1)), ++ dump_register(DEPCMDPAR0(2)), ++ dump_register(DEPCMDPAR0(3)), ++ dump_register(DEPCMDPAR0(4)), ++ dump_register(DEPCMDPAR0(5)), ++ dump_register(DEPCMDPAR0(6)), ++ dump_register(DEPCMDPAR0(7)), ++ dump_register(DEPCMDPAR0(8)), ++ dump_register(DEPCMDPAR0(9)), ++ dump_register(DEPCMDPAR0(10)), ++ dump_register(DEPCMDPAR0(11)), ++ dump_register(DEPCMDPAR0(12)), ++ dump_register(DEPCMDPAR0(13)), ++ dump_register(DEPCMDPAR0(14)), ++ dump_register(DEPCMDPAR0(15)), ++ dump_register(DEPCMDPAR0(16)), ++ dump_register(DEPCMDPAR0(17)), ++ dump_register(DEPCMDPAR0(18)), ++ dump_register(DEPCMDPAR0(19)), ++ dump_register(DEPCMDPAR0(20)), ++ dump_register(DEPCMDPAR0(21)), ++ dump_register(DEPCMDPAR0(22)), ++ dump_register(DEPCMDPAR0(23)), ++ dump_register(DEPCMDPAR0(24)), ++ dump_register(DEPCMDPAR0(25)), ++ dump_register(DEPCMDPAR0(26)), ++ dump_register(DEPCMDPAR0(27)), ++ dump_register(DEPCMDPAR0(28)), ++ dump_register(DEPCMDPAR0(29)), ++ dump_register(DEPCMDPAR0(30)), ++ dump_register(DEPCMDPAR0(31)), ++ ++ dump_register(DEPCMD(0)), ++ dump_register(DEPCMD(1)), ++ dump_register(DEPCMD(2)), ++ dump_register(DEPCMD(3)), ++ dump_register(DEPCMD(4)), ++ dump_register(DEPCMD(5)), ++ dump_register(DEPCMD(6)), ++ dump_register(DEPCMD(7)), ++ dump_register(DEPCMD(8)), ++ dump_register(DEPCMD(9)), ++ dump_register(DEPCMD(10)), ++ dump_register(DEPCMD(11)), ++ dump_register(DEPCMD(12)), ++ dump_register(DEPCMD(13)), ++ dump_register(DEPCMD(14)), ++ dump_register(DEPCMD(15)), ++ dump_register(DEPCMD(16)), ++ dump_register(DEPCMD(17)), ++ dump_register(DEPCMD(18)), ++ dump_register(DEPCMD(19)), ++ dump_register(DEPCMD(20)), ++ dump_register(DEPCMD(21)), ++ dump_register(DEPCMD(22)), ++ dump_register(DEPCMD(23)), ++ dump_register(DEPCMD(24)), ++ dump_register(DEPCMD(25)), ++ dump_register(DEPCMD(26)), ++ dump_register(DEPCMD(27)), ++ dump_register(DEPCMD(28)), ++ dump_register(DEPCMD(29)), ++ dump_register(DEPCMD(30)), ++ dump_register(DEPCMD(31)), ++ ++ dump_register(OCFG), ++ dump_register(OCTL), ++ dump_register(OEVTEN), ++ dump_register(OSTS), ++}; ++ ++static int dwc3_regdump_show(struct seq_file *s, void *unused) ++{ ++ struct dwc3 *dwc = s->private; ++ int i; ++ ++ seq_printf(s, "DesignWare USB3 Core Register Dump\n"); ++ ++ for (i = 0; i < ARRAY_SIZE(dwc3_regs); i++) { ++ seq_printf(s, "%-20s : %08x\n", dwc3_regs[i].name, ++ dwc3_readl(dwc->regs, dwc3_regs[i].offset)); ++ } ++ ++ return 0; ++} ++ ++static int dwc3_regdump_open(struct inode *inode, struct file *file) ++{ ++ return single_open(file, dwc3_regdump_show, inode->i_private); ++} ++ ++static const struct file_operations dwc3_regdump_fops = { ++ .open = dwc3_regdump_open, ++ .read = seq_read, ++ .release = single_release, ++}; ++ ++static int dwc3_mode_show(struct seq_file *s, void *unused) ++{ ++ struct dwc3 *dwc = s->private; ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ reg = dwc3_readl(dwc->regs, DWC3_GCTL); ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ switch (DWC3_GCTL_PRTCAP(reg)) { ++ case DWC3_GCTL_PRTCAP_HOST: ++ seq_printf(s, "host\n"); ++ break; ++ case DWC3_GCTL_PRTCAP_DEVICE: ++ seq_printf(s, "device\n"); ++ break; ++ case DWC3_GCTL_PRTCAP_OTG: ++ seq_printf(s, "OTG\n"); ++ break; ++ default: ++ seq_printf(s, "UNKNOWN %08x\n", DWC3_GCTL_PRTCAP(reg)); ++ } ++ ++ return 0; ++} ++ ++static int dwc3_mode_open(struct inode *inode, struct file *file) ++{ ++ return single_open(file, dwc3_mode_show, inode->i_private); ++} ++ ++static ssize_t dwc3_mode_write(struct file *file, ++ const char __user *ubuf, size_t count, loff_t *ppos) ++{ ++ struct seq_file *s = file->private_data; ++ struct dwc3 *dwc = s->private; ++ unsigned long flags; ++ u32 mode = 0; ++ char buf[32]; ++ ++ if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) ++ return -EFAULT; ++ ++ if (!strncmp(buf, "host", 4)) ++ mode |= DWC3_GCTL_PRTCAP_HOST; ++ ++ if (!strncmp(buf, "device", 6)) ++ mode |= DWC3_GCTL_PRTCAP_DEVICE; ++ ++ if (!strncmp(buf, "otg", 3)) ++ mode |= DWC3_GCTL_PRTCAP_OTG; ++ ++ if (mode) { ++ spin_lock_irqsave(&dwc->lock, flags); ++ dwc3_set_mode(dwc, mode); ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ } ++ return count; ++} ++ ++static const struct file_operations dwc3_mode_fops = { ++ .open = dwc3_mode_open, ++ .write = dwc3_mode_write, ++ .read = seq_read, ++ .llseek = seq_lseek, ++ .release = single_release, ++}; ++ ++int __devinit dwc3_debugfs_init(struct dwc3 *dwc) ++{ ++ struct dentry *root; ++ struct dentry *file; ++ int ret; ++ ++ root = debugfs_create_dir(dev_name(dwc->dev), NULL); ++ if (IS_ERR(root)) { ++ ret = PTR_ERR(root); ++ goto err0; ++ } ++ ++ dwc->root = root; ++ ++ file = debugfs_create_file("regdump", S_IRUGO, root, dwc, ++ &dwc3_regdump_fops); ++ if (IS_ERR(file)) { ++ ret = PTR_ERR(file); ++ goto err1; ++ } ++ ++ file = debugfs_create_file("mode", S_IRUGO | S_IWUSR, root, ++ dwc, &dwc3_mode_fops); ++ if (IS_ERR(file)) { ++ ret = PTR_ERR(file); ++ goto err1; ++ } ++ ++ return 0; ++ ++err1: ++ debugfs_remove_recursive(root); ++ ++err0: ++ return ret; ++} ++ ++void __devexit dwc3_debugfs_exit(struct dwc3 *dwc) ++{ ++ debugfs_remove_recursive(dwc->root); ++ dwc->root = NULL; ++} ++#endif +diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c +new file mode 100644 +index 0000000..11307c2 +--- /dev/null ++++ b/drivers/usb/dwc3/dwc3-omap.c +@@ -0,0 +1,418 @@ ++/** ++ * dwc3-omap.c - OMAP Specific Glue layer ++ * ++ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * Sebastian Andrzej Siewior ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++#ifdef CONFIG_DWC3_off ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "core.h" ++#include "io.h" ++ ++/* ++ * All these registers belong to OMAP's Wrapper around the ++ * DesignWare USB3 Core. ++ */ ++ ++#define USBOTGSS_REVISION 0x0000 ++#define USBOTGSS_SYSCONFIG 0x0010 ++#define USBOTGSS_IRQ_EOI 0x0020 ++#define USBOTGSS_IRQSTATUS_RAW_0 0x0024 ++#define USBOTGSS_IRQSTATUS_0 0x0028 ++#define USBOTGSS_IRQENABLE_SET_0 0x002c ++#define USBOTGSS_IRQENABLE_CLR_0 0x0030 ++#define USBOTGSS_IRQSTATUS_RAW_1 0x0034 ++#define USBOTGSS_IRQSTATUS_1 0x0038 ++#define USBOTGSS_IRQENABLE_SET_1 0x003c ++#define USBOTGSS_IRQENABLE_CLR_1 0x0040 ++#define USBOTGSS_UTMI_OTG_CTRL 0x0080 ++#define USBOTGSS_UTMI_OTG_STATUS 0x0084 ++#define USBOTGSS_MMRAM_OFFSET 0x0100 ++#define USBOTGSS_FLADJ 0x0104 ++#define USBOTGSS_DEBUG_CFG 0x0108 ++#define USBOTGSS_DEBUG_DATA 0x010c ++ ++/* SYSCONFIG REGISTER */ ++#define USBOTGSS_SYSCONFIG_DMADISABLE (1 << 16) ++#define USBOTGSS_SYSCONFIG_STANDBYMODE(x) ((x) << 4) ++ ++#define USBOTGSS_STANDBYMODE_FORCE_STANDBY 0 ++#define USBOTGSS_STANDBYMODE_NO_STANDBY 1 ++#define USBOTGSS_STANDBYMODE_SMART_STANDBY 2 ++#define USBOTGSS_STANDBYMODE_SMART_WAKEUP 3 ++ ++#define USBOTGSS_STANDBYMODE_MASK (0x03 << 4) ++ ++#define USBOTGSS_SYSCONFIG_IDLEMODE(x) ((x) << 2) ++ ++#define USBOTGSS_IDLEMODE_FORCE_IDLE 0 ++#define USBOTGSS_IDLEMODE_NO_IDLE 1 ++#define USBOTGSS_IDLEMODE_SMART_IDLE 2 ++#define USBOTGSS_IDLEMODE_SMART_WAKEUP 3 ++ ++#define USBOTGSS_IDLEMODE_MASK (0x03 << 2) ++ ++/* IRQ_EOI REGISTER */ ++#define USBOTGSS_IRQ_EOI_LINE_NUMBER (1 << 0) ++ ++/* IRQS0 BITS */ ++#define USBOTGSS_IRQO_COREIRQ_ST (1 << 0) ++ ++/* IRQ1 BITS */ ++#define USBOTGSS_IRQ1_DMADISABLECLR (1 << 17) ++#define USBOTGSS_IRQ1_OEVT (1 << 16) ++#define USBOTGSS_IRQ1_DRVVBUS_RISE (1 << 13) ++#define USBOTGSS_IRQ1_CHRGVBUS_RISE (1 << 12) ++#define USBOTGSS_IRQ1_DISCHRGVBUS_RISE (1 << 11) ++#define USBOTGSS_IRQ1_IDPULLUP_RISE (1 << 8) ++#define USBOTGSS_IRQ1_DRVVBUS_FALL (1 << 5) ++#define USBOTGSS_IRQ1_CHRGVBUS_FALL (1 << 4) ++#define USBOTGSS_IRQ1_DISCHRGVBUS_FALL (1 << 3) ++#define USBOTGSS_IRQ1_IDPULLUP_FALL (1 << 0) ++ ++/* UTMI_OTG_CTRL REGISTER */ ++#define USBOTGSS_UTMI_OTG_CTRL_DRVVBUS (1 << 5) ++#define USBOTGSS_UTMI_OTG_CTRL_CHRGVBUS (1 << 4) ++#define USBOTGSS_UTMI_OTG_CTRL_DISCHRGVBUS (1 << 3) ++#define USBOTGSS_UTMI_OTG_CTRL_IDPULLUP (1 << 0) ++ ++/* UTMI_OTG_STATUS REGISTER */ ++#define USBOTGSS_UTMI_OTG_STATUS_SW_MODE (1 << 31) ++#define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT (1 << 9) ++#define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE (1 << 8) ++#define USBOTGSS_UTMI_OTG_STATUS_IDDIG (1 << 4) ++#define USBOTGSS_UTMI_OTG_STATUS_SESSEND (1 << 3) ++#define USBOTGSS_UTMI_OTG_STATUS_SESSVALID (1 << 2) ++#define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID (1 << 1) ++ ++struct dwc3_omap { ++ /* device lock */ ++ spinlock_t lock; ++ ++ struct platform_device *dwc3; ++ struct device *dev; ++ ++ int irq; ++ void __iomem *base; ++ ++ void *context; ++ u32 resource_size; ++ ++ u32 dma_status:1; ++}; ++ ++static irqreturn_t dwc3_omap_interrupt(int irq, void *_omap) ++{ ++ struct dwc3_omap *omap = _omap; ++ u32 reg; ++ ++ spin_lock(&omap->lock); ++ ++ reg = dwc3_readl(omap->base, USBOTGSS_IRQSTATUS_1); ++ ++ if (reg & USBOTGSS_IRQ1_DMADISABLECLR) { ++ dev_dbg(omap->dev, "DMA Disable was Cleared\n"); ++ omap->dma_status = false; ++ } ++ ++ if (reg & USBOTGSS_IRQ1_OEVT) ++ dev_dbg(omap->dev, "OTG Event\n"); ++ ++ if (reg & USBOTGSS_IRQ1_DRVVBUS_RISE) ++ dev_dbg(omap->dev, "DRVVBUS Rise\n"); ++ ++ if (reg & USBOTGSS_IRQ1_CHRGVBUS_RISE) ++ dev_dbg(omap->dev, "CHRGVBUS Rise\n"); ++ ++ if (reg & USBOTGSS_IRQ1_DISCHRGVBUS_RISE) ++ dev_dbg(omap->dev, "DISCHRGVBUS Rise\n"); ++ ++ if (reg & USBOTGSS_IRQ1_IDPULLUP_RISE) ++ dev_dbg(omap->dev, "IDPULLUP Rise\n"); ++ ++ if (reg & USBOTGSS_IRQ1_DRVVBUS_FALL) ++ dev_dbg(omap->dev, "DRVVBUS Fall\n"); ++ ++ if (reg & USBOTGSS_IRQ1_CHRGVBUS_FALL) ++ dev_dbg(omap->dev, "CHRGVBUS Fall\n"); ++ ++ if (reg & USBOTGSS_IRQ1_DISCHRGVBUS_FALL) ++ dev_dbg(omap->dev, "DISCHRGVBUS Fall\n"); ++ ++ if (reg & USBOTGSS_IRQ1_IDPULLUP_FALL) ++ dev_dbg(omap->dev, "IDPULLUP Fall\n"); ++ ++ dwc3_writel(omap->base, USBOTGSS_IRQSTATUS_1, reg); ++ ++ reg = dwc3_readl(omap->base, USBOTGSS_IRQSTATUS_0); ++ dwc3_writel(omap->base, USBOTGSS_IRQSTATUS_0, reg); ++ ++ spin_unlock(&omap->lock); ++ ++ return IRQ_HANDLED; ++} ++ ++static int __devinit dwc3_omap_probe(struct platform_device *pdev) ++{ ++ struct dwc3_omap_data *pdata = pdev->dev.platform_data; ++ struct platform_device *dwc3; ++ struct dwc3_omap *omap; ++ struct resource *res; ++ ++ int devid; ++ int ret = -ENOMEM; ++ int irq; ++ ++ u32 reg; ++ ++ void __iomem *base; ++ void *context; ++ ++ omap = kzalloc(sizeof(*omap), GFP_KERNEL); ++ if (!omap) { ++ dev_err(&pdev->dev, "not enough memory\n"); ++ goto err0; ++ } ++ ++ platform_set_drvdata(pdev, omap); ++ ++ irq = platform_get_irq(pdev, 1); ++ if (irq < 0) { ++ dev_err(&pdev->dev, "missing IRQ resource\n"); ++ ret = -EINVAL; ++ goto err1; ++ } ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!res) { ++ dev_err(&pdev->dev, "missing memory base resource\n"); ++ ret = -EINVAL; ++ goto err1; ++ } ++ ++ base = ioremap_nocache(res->start, resource_size(res)); ++ if (!base) { ++ dev_err(&pdev->dev, "ioremap failed\n"); ++ goto err1; ++ } ++ ++ devid = dwc3_get_device_id(); ++ if (devid < 0) ++ goto err2; ++ ++ dwc3 = platform_device_alloc("dwc3", devid); ++ if (!dwc3) { ++ dev_err(&pdev->dev, "couldn't allocate dwc3 device\n"); ++ goto err3; ++ } ++ ++ context = kzalloc(resource_size(res), GFP_KERNEL); ++ if (!context) { ++ dev_err(&pdev->dev, "couldn't allocate dwc3 context memory\n"); ++ goto err4; ++ } ++ ++ spin_lock_init(&omap->lock); ++ dma_set_coherent_mask(&dwc3->dev, pdev->dev.coherent_dma_mask); ++ ++ dwc3->dev.parent = &pdev->dev; ++ dwc3->dev.dma_mask = pdev->dev.dma_mask; ++ dwc3->dev.dma_parms = pdev->dev.dma_parms; ++ omap->resource_size = resource_size(res); ++ omap->context = context; ++ omap->dev = &pdev->dev; ++ omap->irq = irq; ++ omap->base = base; ++ omap->dwc3 = dwc3; ++ ++ reg = dwc3_readl(omap->base, USBOTGSS_UTMI_OTG_STATUS); ++ ++ if (!pdata) { ++ dev_dbg(&pdev->dev, "missing platform data\n"); ++ } else { ++ switch (pdata->utmi_mode) { ++ case DWC3_OMAP_UTMI_MODE_SW: ++ reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE; ++ break; ++ case DWC3_OMAP_UTMI_MODE_HW: ++ reg &= ~USBOTGSS_UTMI_OTG_STATUS_SW_MODE; ++ break; ++ default: ++ dev_dbg(&pdev->dev, "UNKNOWN utmi mode %d\n", ++ pdata->utmi_mode); ++ } ++ } ++ ++ dwc3_writel(omap->base, USBOTGSS_UTMI_OTG_STATUS, reg); ++ ++ /* check the DMA Status */ ++ reg = dwc3_readl(omap->base, USBOTGSS_SYSCONFIG); ++ omap->dma_status = !!(reg & USBOTGSS_SYSCONFIG_DMADISABLE); ++ ++ /* Set No-Idle and No-Standby */ ++ reg &= ~(USBOTGSS_STANDBYMODE_MASK ++ | USBOTGSS_IDLEMODE_MASK); ++ ++ reg |= (USBOTGSS_SYSCONFIG_STANDBYMODE(USBOTGSS_STANDBYMODE_NO_STANDBY) ++ | USBOTGSS_SYSCONFIG_IDLEMODE(USBOTGSS_IDLEMODE_NO_IDLE)); ++ ++ dwc3_writel(omap->base, USBOTGSS_SYSCONFIG, reg); ++ ++ ret = request_irq(omap->irq, dwc3_omap_interrupt, 0, ++ "dwc3-omap", omap); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to request IRQ #%d --> %d\n", ++ omap->irq, ret); ++ goto err5; ++ } ++ ++ /* enable all IRQs */ ++ reg = USBOTGSS_IRQO_COREIRQ_ST; ++ dwc3_writel(omap->base, USBOTGSS_IRQENABLE_SET_0, reg); ++ ++ reg = (USBOTGSS_IRQ1_OEVT | ++ USBOTGSS_IRQ1_DRVVBUS_RISE | ++ USBOTGSS_IRQ1_CHRGVBUS_RISE | ++ USBOTGSS_IRQ1_DISCHRGVBUS_RISE | ++ USBOTGSS_IRQ1_IDPULLUP_RISE | ++ USBOTGSS_IRQ1_DRVVBUS_FALL | ++ USBOTGSS_IRQ1_CHRGVBUS_FALL | ++ USBOTGSS_IRQ1_DISCHRGVBUS_FALL | ++ USBOTGSS_IRQ1_IDPULLUP_FALL); ++ ++ dwc3_writel(omap->base, USBOTGSS_IRQENABLE_SET_1, reg); ++ ++ ret = platform_device_add_resources(dwc3, pdev->resource, ++ pdev->num_resources); ++ if (ret) { ++ dev_err(&pdev->dev, "couldn't add resources to dwc3 device\n"); ++ goto err6; ++ } ++ ++ ret = platform_device_add(dwc3); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to register dwc3 device\n"); ++ goto err6; ++ } ++ ++ return 0; ++ ++err6: ++ free_irq(omap->irq, omap); ++ ++err5: ++ kfree(omap->context); ++ ++err4: ++ platform_device_put(dwc3); ++ ++err3: ++ dwc3_put_device_id(devid); ++ ++err2: ++ iounmap(base); ++ ++err1: ++ kfree(omap); ++ ++err0: ++ return ret; ++} ++ ++static int __devexit dwc3_omap_remove(struct platform_device *pdev) ++{ ++ struct dwc3_omap *omap = platform_get_drvdata(pdev); ++ ++ platform_device_unregister(omap->dwc3); ++ ++ dwc3_put_device_id(omap->dwc3->id); ++ free_irq(omap->irq, omap); ++ iounmap(omap->base); ++ ++ kfree(omap->context); ++ kfree(omap); ++ ++ return 0; ++} ++ ++static const struct of_device_id of_dwc3_match[] = { ++ { ++ "ti,omap5430-dwc3" ++ }, ++ { ++ "ti,omap5-dwc3" ++ }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, of_dwc3_match); ++ ++static struct platform_driver dwc3_omap_driver = { ++ .probe = dwc3_omap_probe, ++ .remove = __devexit_p(dwc3_omap_remove), ++ .driver = { ++ .name = "omap-dwc3", ++ .of_match_table = of_dwc3_match, ++ }, ++}; ++ ++MODULE_ALIAS("platform:omap-dwc3"); ++MODULE_AUTHOR("Felipe Balbi "); ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_DESCRIPTION("DesignWare USB3 OMAP Glue Layer"); ++ ++static int __init dwc3_omap_init(void) ++{ ++ return platform_driver_register(&dwc3_omap_driver); ++} ++module_init(dwc3_omap_init); ++ ++static void __exit dwc3_omap_exit(void) ++{ ++ platform_driver_unregister(&dwc3_omap_driver); ++} ++module_exit(dwc3_omap_exit); ++#endif +diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c +new file mode 100644 +index 0000000..dda702c +--- /dev/null ++++ b/drivers/usb/dwc3/dwc3-pci.c +@@ -0,0 +1,187 @@ ++/** ++ * dwc3-pci.c - PCI Specific glue layer ++ * ++ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * Sebastian Andrzej Siewior ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++#ifdef CONFIG_DWC3_off ++#include ++#include ++#include ++#include ++#include ++ ++#include "core.h" ++ ++/* FIXME define these in */ ++#define PCI_VENDOR_ID_SYNOPSYS 0x16c3 ++#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd ++ ++struct dwc3_pci { ++ struct device *dev; ++ struct platform_device *dwc3; ++}; ++ ++static int __devinit dwc3_pci_probe(struct pci_dev *pci, ++ const struct pci_device_id *id) ++{ ++ struct resource res[2]; ++ struct platform_device *dwc3; ++ struct dwc3_pci *glue; ++ int ret = -ENOMEM; ++ int devid; ++ ++ glue = kzalloc(sizeof(*glue), GFP_KERNEL); ++ if (!glue) { ++ dev_err(&pci->dev, "not enough memory\n"); ++ goto err0; ++ } ++ ++ glue->dev = &pci->dev; ++ ++ ret = pci_enable_device(pci); ++ if (ret) { ++ dev_err(&pci->dev, "failed to enable pci device\n"); ++ goto err1; ++ } ++ ++ pci_set_power_state(pci, PCI_D0); ++ pci_set_master(pci); ++ ++ devid = dwc3_get_device_id(); ++ if (devid < 0) ++ goto err2; ++ ++ dwc3 = platform_device_alloc("dwc3", devid); ++ if (!dwc3) { ++ dev_err(&pci->dev, "couldn't allocate dwc3 device\n"); ++ goto err3; ++ } ++ ++ memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res)); ++ ++ res[0].start = pci_resource_start(pci, 0); ++ res[0].end = pci_resource_end(pci, 0); ++ res[0].name = "dwc_usb3"; ++ res[0].flags = IORESOURCE_MEM; ++ ++ res[1].start = pci->irq; ++ res[1].name = "dwc_usb3"; ++ res[1].flags = IORESOURCE_IRQ; ++ ++ ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res)); ++ if (ret) { ++ dev_err(&pci->dev, "couldn't add resources to dwc3 device\n"); ++ goto err4; ++ } ++ ++ pci_set_drvdata(pci, glue); ++ ++ dma_set_coherent_mask(&dwc3->dev, pci->dev.coherent_dma_mask); ++ ++ dwc3->dev.dma_mask = pci->dev.dma_mask; ++ dwc3->dev.dma_parms = pci->dev.dma_parms; ++ dwc3->dev.parent = &pci->dev; ++ glue->dwc3 = dwc3; ++ ++ ret = platform_device_add(dwc3); ++ if (ret) { ++ dev_err(&pci->dev, "failed to register dwc3 device\n"); ++ goto err4; ++ } ++ ++ return 0; ++ ++err4: ++ pci_set_drvdata(pci, NULL); ++ platform_device_put(dwc3); ++ ++err3: ++ dwc3_put_device_id(devid); ++ ++err2: ++ pci_disable_device(pci); ++ ++err1: ++ kfree(pci); ++ ++err0: ++ return ret; ++} ++ ++static void __devexit dwc3_pci_remove(struct pci_dev *pci) ++{ ++ struct dwc3_pci *glue = pci_get_drvdata(pci); ++ ++ dwc3_put_device_id(glue->dwc3->id); ++ platform_device_unregister(glue->dwc3); ++ pci_set_drvdata(pci, NULL); ++ pci_disable_device(pci); ++ kfree(glue); ++} ++ ++static DEFINE_PCI_DEVICE_TABLE(dwc3_pci_id_table) = { ++ { ++ PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, ++ PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3), ++ }, ++ { } /* Terminating Entry */ ++}; ++MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); ++ ++static struct pci_driver dwc3_pci_driver = { ++ .name = "dwc3-pci", ++ .id_table = dwc3_pci_id_table, ++ .probe = dwc3_pci_probe, ++ .remove = __devexit_p(dwc3_pci_remove), ++}; ++ ++MODULE_AUTHOR("Felipe Balbi "); ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer"); ++ ++static int __init dwc3_pci_init(void) ++{ ++ return pci_register_driver(&dwc3_pci_driver); ++} ++module_init(dwc3_pci_init); ++ ++static void __exit dwc3_pci_exit(void) ++{ ++ pci_unregister_driver(&dwc3_pci_driver); ++} ++module_exit(dwc3_pci_exit); ++#endif +diff --git a/drivers/usb/dwc3/dwc3_core.c b/drivers/usb/dwc3/dwc3_core.c +new file mode 100644 +index 0000000..26b6ff7 +--- /dev/null ++++ b/drivers/usb/dwc3/dwc3_core.c +@@ -0,0 +1,513 @@ ++/** ++ * core.c - DesignWare USB3 DRD Controller Core file ++ * ++ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * Sebastian Andrzej Siewior ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++ ++#include "core.h" ++#include "gadget.h" ++#include "io.h" ++ ++#include "debug.h" ++ ++static char *maximum_speed = "super"; ++/* -------------------------------------------------------------------------- */ ++ ++#define DWC3_DEVS_POSSIBLE 32 ++ ++ ++int dwc3_get_device_id(void) ++{ ++ static int dwc3_devs; ++ ++ return dwc3_devs++; ++} ++ ++void dwc3_put_device_id(int id) ++{ ++} ++ ++void dwc3_set_mode(struct dwc3 *dwc, u32 mode) ++{ ++ u32 reg; ++ ++ reg = dwc3_readl(dwc->regs, DWC3_GCTL); ++ reg &= ~(DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG)); ++ reg |= DWC3_GCTL_PRTCAPDIR(mode); ++ dwc3_writel(dwc->regs, DWC3_GCTL, reg); ++} ++ ++/** ++ * dwc3_core_soft_reset - Issues core soft reset and PHY reset ++ * @dwc: pointer to our context structure ++ */ ++static void dwc3_core_soft_reset(struct dwc3 *dwc) ++{ ++ u32 reg; ++ ++ /* Before Resetting PHY, put Core in Reset */ ++ reg = dwc3_readl(dwc->regs, DWC3_GCTL); ++ reg |= DWC3_GCTL_CORESOFTRESET; ++ dwc3_writel(dwc->regs, DWC3_GCTL, reg); ++ ++ /* Assert USB3 PHY reset */ ++ reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); ++ reg |= DWC3_GUSB3PIPECTL_PHYSOFTRST; ++ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); ++ ++ /* Assert USB2 PHY reset */ ++ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); ++ reg |= DWC3_GUSB2PHYCFG_PHYSOFTRST; ++ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); ++ ++ mdelay(100); ++ ++ /* Clear USB3 PHY reset */ ++ reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); ++ reg &= ~DWC3_GUSB3PIPECTL_PHYSOFTRST; ++ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); ++ ++ /* Clear USB2 PHY reset */ ++ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); ++ reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST; ++ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); ++ ++ /* After PHYs are stable we can take Core out of reset state */ ++ reg = dwc3_readl(dwc->regs, DWC3_GCTL); ++ reg &= ~DWC3_GCTL_CORESOFTRESET; ++ dwc3_writel(dwc->regs, DWC3_GCTL, reg); ++} ++ ++/** ++ * dwc3_free_one_event_buffer - Frees one event buffer ++ * @dwc: Pointer to our controller context structure ++ * @evt: Pointer to event buffer to be freed ++ */ ++static void dwc3_free_one_event_buffer(struct dwc3 *dwc, ++ struct dwc3_event_buffer *evt) ++{ ++ dma_free_coherent(dwc->dev, evt->length, evt->buf, evt->dma); ++ kfree(evt); ++} ++ ++/** ++ * dwc3_alloc_one_event_buffer - Allocated one event buffer structure ++ * @dwc: Pointer to our controller context structure ++ * @length: size of the event buffer ++ * ++ * Returns a pointer to the allocated event buffer structure on succes ++ * otherwise ERR_PTR(errno). ++ */ ++static struct dwc3_event_buffer *__devinit ++dwc3_alloc_one_event_buffer(struct dwc3 *dwc, unsigned length) ++{ ++ struct dwc3_event_buffer *evt; ++ ++ evt = kzalloc(sizeof(*evt), GFP_KERNEL); ++ if (!evt) ++ return ERR_PTR(-ENOMEM); ++ ++ evt->dwc = dwc; ++ evt->length = length; ++ evt->buf = dma_alloc_coherent(dwc->dev, length, ++ &evt->dma, GFP_KERNEL); ++ if (!evt->buf) { ++ kfree(evt); ++ return ERR_PTR(-ENOMEM); ++ } ++ ++ return evt; ++} ++ ++/** ++ * dwc3_free_event_buffers - frees all allocated event buffers ++ * @dwc: Pointer to our controller context structure ++ */ ++static void dwc3_free_event_buffers(struct dwc3 *dwc) ++{ ++ struct dwc3_event_buffer *evt; ++ int i; ++ ++ for (i = 0; i < dwc->num_event_buffers; i++) { ++ evt = dwc->ev_buffs[i]; ++ if (evt) { ++ dwc3_free_one_event_buffer(dwc, evt); ++ dwc->ev_buffs[i] = NULL; ++ } ++ } ++} ++ ++/** ++ * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length ++ * @dwc: Pointer to out controller context structure ++ * @length: size of event buffer ++ * ++ * Returns 0 on success otherwise negative errno. In error the case, dwc ++ * may contain some buffers allocated but not all which were requested. ++ */ ++static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length) ++{ ++ int num; ++ int i; ++ ++ num = DWC3_NUM_INT(dwc->hwparams.hwparams1); ++ dwc->num_event_buffers = num; ++ ++ dwc->ev_buffs = kzalloc(sizeof(*dwc->ev_buffs) * num, GFP_KERNEL); ++ if (!dwc->ev_buffs) { ++ dev_err(dwc->dev, "can't allocate event buffers array\n"); ++ return -ENOMEM; ++ } ++ ++ for (i = 0; i < num; i++) { ++ struct dwc3_event_buffer *evt; ++ ++ evt = dwc3_alloc_one_event_buffer(dwc, length); ++ if (IS_ERR(evt)) { ++ dev_err(dwc->dev, "can't allocate event buffer\n"); ++ return PTR_ERR(evt); ++ } ++ dwc->ev_buffs[i] = evt; ++ } ++ ++ return 0; ++} ++ ++/** ++ * dwc3_event_buffers_setup - setup our allocated event buffers ++ * @dwc: Pointer to out controller context structure ++ * ++ * Returns 0 on success otherwise negative errno. ++ */ ++static int __devinit dwc3_event_buffers_setup(struct dwc3 *dwc) ++{ ++ struct dwc3_event_buffer *evt; ++ int n; ++ ++ for (n = 0; n < dwc->num_event_buffers; n++) { ++ evt = dwc->ev_buffs[n]; ++ dev_dbg(dwc->dev, "Event buf %p dma %08llx length %d\n", ++ evt->buf, (unsigned long long) evt->dma, ++ evt->length); ++ ++ dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), ++ lower_32_bits(evt->dma)); ++ dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), ++ upper_32_bits(evt->dma)); ++ dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n), ++ evt->length & 0xffff); ++ dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0); ++ } ++ ++ return 0; ++} ++ ++static void dwc3_event_buffers_cleanup(struct dwc3 *dwc) ++{ ++ struct dwc3_event_buffer *evt; ++ int n; ++ ++ for (n = 0; n < dwc->num_event_buffers; n++) { ++ evt = dwc->ev_buffs[n]; ++ dwc3_writel(dwc->regs, DWC3_GEVNTADRLO(n), 0); ++ dwc3_writel(dwc->regs, DWC3_GEVNTADRHI(n), 0); ++ dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(n), 0); ++ dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(n), 0); ++ } ++} ++ ++static void __devinit dwc3_cache_hwparams(struct dwc3 *dwc) ++{ ++ struct dwc3_hwparams *parms = &dwc->hwparams; ++ ++ parms->hwparams0 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS0); ++ parms->hwparams1 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS1); ++ parms->hwparams2 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS2); ++ parms->hwparams3 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS3); ++ parms->hwparams4 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS4); ++ parms->hwparams5 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS5); ++ parms->hwparams6 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6); ++ parms->hwparams7 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS7); ++ parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8); ++} ++ ++/** ++ * dwc3_core_init - Low-level initialization of DWC3 Core ++ * @dwc: Pointer to our controller context structure ++ * ++ * Returns 0 on success otherwise negative errno. ++ */ ++static int __devinit dwc3_core_init(struct dwc3 *dwc) ++{ ++ unsigned long timeout; ++ u32 reg; ++ int ret; ++ ++ reg = dwc3_readl(dwc->regs, DWC3_GSNPSID); ++ /* This should read as U3 followed by revision number */ ++ if ((reg & DWC3_GSNPSID_MASK) != 0x55330000) { ++ dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); ++ ret = -ENODEV; ++ goto err0; ++ } ++ dwc->revision = reg & DWC3_GSNPSREV_MASK; ++ ++ dwc3_core_soft_reset(dwc); ++ ++ /* issue device SoftReset too */ ++ timeout = 500; ++ dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST); ++ do { ++ reg = dwc3_readl(dwc->regs, DWC3_DCTL); ++ if (!(reg & DWC3_DCTL_CSFTRST)) ++ break; ++ ++ mdelay(1); ++ timeout--; ++ if (!timeout) { ++ dev_err(dwc->dev, "Reset Timed Out\n"); ++ ret = -ETIMEDOUT; ++ goto err0; ++ } ++ ++ cpu_relax(); ++ } while (true); ++ ++ dwc3_cache_hwparams(dwc); ++ ++ reg = dwc3_readl(dwc->regs, DWC3_GCTL); ++ reg &= ~DWC3_GCTL_SCALEDOWN(3); ++ reg &= ~DWC3_GCTL_DISSCRAMBLE; ++ ++ switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1)) { ++ case DWC3_GHWPARAMS1_EN_PWROPT_CLK: ++ reg &= ~DWC3_GCTL_DSBLCLKGTNG; ++ break; ++ default: ++ dev_dbg(dwc->dev, "No power optimization available\n"); ++ } ++ ++ /* ++ * WORKAROUND: DWC3 revisions <1.90a have a bug ++ * when The device fails to connect at SuperSpeed ++ * and falls back to high-speed mode which causes ++ * the device to enter in a Connect/Disconnect loop ++ */ ++ if (dwc->revision < DWC3_REVISION_190A) ++ reg |= DWC3_GCTL_U2RSTECN; ++ ++ dwc3_writel(dwc->regs, DWC3_GCTL, reg); ++ ++ ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); ++ if (ret) { ++ dev_err(dwc->dev, "failed to allocate event buffers\n"); ++ ret = -ENOMEM; ++ goto err1; ++ } ++ ++ ret = dwc3_event_buffers_setup(dwc); ++ if (ret) { ++ dev_err(dwc->dev, "failed to setup event buffers\n"); ++ goto err1; ++ } ++ ++ return 0; ++ ++err1: ++ dwc3_free_event_buffers(dwc); ++ ++err0: ++ return ret; ++} ++ ++static void dwc3_core_exit(struct dwc3 *dwc) ++{ ++ dwc3_event_buffers_cleanup(dwc); ++ dwc3_free_event_buffers(dwc); ++} ++ ++#define DWC3_ALIGN_MASK (16 - 1) ++ ++struct dwc3 *global_dwc3; ++ ++int __devinit dwc3_probe(struct platform_device *pdev) ++{ ++ struct dwc3 *dwc; ++ ++ int ret = -ENOMEM; ++ ++ void __iomem *regs; ++ void *mem; ++ ++ u8 mode; ++ ++ mem = kzalloc(sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); ++ if (!mem) { ++ dev_err(&pdev->dev, "not enough memory\n"); ++ goto err0; ++ } ++ dwc = PTR_ALIGN(mem, DWC3_ALIGN_MASK + 1); ++ dwc->mem = mem; ++ global_dwc3 = dwc; ++ ++ dwc->regs = CONFIG_USB_DWC3_UDC_REGS; ++ dwc->regs_size = DWC3_USB_REGS_SIZE; ++ dwc->dev = &pdev->dev; ++ dwc->irq = 0; ++ ++ if (!strncmp("super", maximum_speed, 5)) ++ dwc->maximum_speed = DWC3_DCFG_SUPERSPEED; ++ else if (!strncmp("high", maximum_speed, 4)) ++ dwc->maximum_speed = DWC3_DCFG_HIGHSPEED; ++ else if (!strncmp("full", maximum_speed, 4)) ++ dwc->maximum_speed = DWC3_DCFG_FULLSPEED1; ++ else if (!strncmp("low", maximum_speed, 3)) ++ dwc->maximum_speed = DWC3_DCFG_LOWSPEED; ++ else ++ dwc->maximum_speed = DWC3_DCFG_SUPERSPEED; ++ ++ pm_runtime_enable(&pdev->dev); ++ pm_runtime_get_sync(&pdev->dev); ++ pm_runtime_forbid(&pdev->dev); ++ ++ ret = dwc3_core_init(dwc); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to initialize core\n"); ++ goto err3; ++ } ++ ++ mode = DWC3_MODE_DEVICE /*DWC3_MODE(dwc->hwparams.hwparams0)*/; ++ ++ switch (mode) { ++ case DWC3_MODE_DEVICE: ++ dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE); ++ ret = dwc3_gadget_init(dwc); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to initialize gadget\n"); ++ goto err4; ++ } ++ break; ++ case DWC3_MODE_HOST: ++ dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST); ++ ret = dwc3_host_init(dwc); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to initialize host\n"); ++ goto err4; ++ } ++ break; ++ case DWC3_MODE_DRD: ++ dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG); ++ ret = dwc3_host_init(dwc); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to initialize host\n"); ++ goto err4; ++ } ++ ++ ret = dwc3_gadget_init(dwc); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to initialize gadget\n"); ++ goto err4; ++ } ++ break; ++ default: ++ dev_err(&pdev->dev, "Unsupported mode of operation %d\n", mode); ++ goto err4; ++ } ++ dwc->mode = mode; ++ ++ pm_runtime_allow(&pdev->dev); ++ ++ return 0; ++err4: ++ dwc3_core_exit(dwc); ++ ++err3: ++ iounmap(regs); ++ kfree(dwc->mem); ++err0: ++ return ret; ++} ++ ++int __devexit dwc3_remove(struct platform_device *pdev) ++{ ++ struct dwc3 *dwc = global_dwc3; ++ ++ dwc3_debugfs_exit(dwc); ++ ++ switch (dwc->mode) { ++ case DWC3_MODE_DEVICE: ++ dwc3_gadget_exit(dwc); ++ break; ++ case DWC3_MODE_HOST: ++ dwc3_host_exit(dwc); ++ break; ++ case DWC3_MODE_DRD: ++ dwc3_host_exit(dwc); ++ dwc3_gadget_exit(dwc); ++ break; ++ default: ++ /* do nothing */ ++ break; ++ } ++ ++ dwc3_core_exit(dwc); ++ iounmap(dwc->regs); ++ kfree(dwc->mem); ++ ++ return 0; ++} ++ ++int usb_gadget_init_udc(void) ++{ ++ return dwc3_probe(NULL); ++} ++void usb_gadget_exit_udc(void) ++{ ++ dwc3_remove(NULL); ++} ++ ++irqreturn_t dwc3_interrupt(int irq, void *_dwc); ++int usb_gadget_handle_interrupts(void) ++{ ++ dwc3_interrupt(0, global_dwc3); ++ WATCHDOG_RESET(); ++ return 0; ++} +diff --git a/drivers/usb/dwc3/dwc3_ep0.c b/drivers/usb/dwc3/dwc3_ep0.c +new file mode 100644 +index 0000000..2e0d466 +--- /dev/null ++++ b/drivers/usb/dwc3/dwc3_ep0.c +@@ -0,0 +1,851 @@ ++/** ++ * ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling ++ * ++ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * Sebastian Andrzej Siewior ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++ ++#include ++#include ++/* #include */ ++ ++#include "core.h" ++#include "gadget.h" ++#include "io.h" ++ ++static void dwc3_ep0_do_control_status(struct dwc3 *dwc, u32 epnum); ++ ++static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state) ++{ ++ switch (state) { ++ case EP0_UNCONNECTED: ++ return "Unconnected"; ++ case EP0_SETUP_PHASE: ++ return "Setup Phase"; ++ case EP0_DATA_PHASE: ++ return "Data Phase"; ++ case EP0_STATUS_PHASE: ++ return "Status Phase"; ++ default: ++ return "UNKNOWN"; ++ } ++} ++ ++static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma, ++ u32 len, u32 type) ++{ ++ struct dwc3_gadget_ep_cmd_params params; ++ struct dwc3_trb_hw *trb_hw; ++ struct dwc3_trb trb; ++ struct dwc3_ep *dep; ++ ++ int ret; ++ ++ dep = dwc->eps[epnum]; ++ if (dep->flags & DWC3_EP_BUSY) { ++ dev_vdbg(dwc->dev, "%s: still busy\n", dep->name); ++ return 0; ++ } ++ ++ trb_hw = dwc->ep0_trb; ++ memset(&trb, 0, sizeof(trb)); ++ ++ trb.trbctl = type; ++ trb.bplh = buf_dma; ++ trb.length = len; ++ ++ trb.hwo = 1; ++ trb.lst = 1; ++ trb.ioc = 1; ++ trb.isp_imi = 1; ++ ++ dwc3_trb_to_hw(&trb, trb_hw); ++ ++ memset(¶ms, 0, sizeof(params)); ++ params.param0 = upper_32_bits(dwc->ep0_trb_addr); ++ params.param1 = lower_32_bits(dwc->ep0_trb_addr); ++ ++ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, ++ DWC3_DEPCMD_STARTTRANSFER, ¶ms); ++ if (ret < 0) { ++ dev_dbg(dwc->dev, "failed to send STARTTRANSFER command\n"); ++ return ret; ++ } ++ ++ dep->flags |= DWC3_EP_BUSY; ++ dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc, ++ dep->number); ++ ++ dwc->ep0_next_event = DWC3_EP0_COMPLETE; ++ ++ return 0; ++} ++ ++static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep, ++ struct dwc3_request *req) ++{ ++ struct dwc3 *dwc = dep->dwc; ++ u32 type; ++ int ret = 0; ++ ++ req->request.actual = 0; ++ req->request.status = -EINPROGRESS; ++ req->epnum = dep->number; ++ ++ list_add_tail(&req->list, &dep->request_list); ++ ++ /* ++ * Gadget driver might not be quick enough to queue a request ++ * before we get a Transfer Not Ready event on this endpoint. ++ * ++ * In that case, we will set DWC3_EP_PENDING_REQUEST. When that ++ * flag is set, it's telling us that as soon as Gadget queues the ++ * required request, we should kick the transfer here because the ++ * IRQ we were waiting for is long gone. ++ */ ++ if (dep->flags & DWC3_EP_PENDING_REQUEST) { ++ unsigned direction; ++ ++ direction = !!(dep->flags & DWC3_EP0_DIR_IN); ++ ++ if (dwc->ep0state == EP0_STATUS_PHASE) { ++ type = dwc->three_stage_setup ++ ? DWC3_TRBCTL_CONTROL_STATUS3 ++ : DWC3_TRBCTL_CONTROL_STATUS2; ++ } else if (dwc->ep0state == EP0_DATA_PHASE) { ++ type = DWC3_TRBCTL_CONTROL_DATA; ++ } else { ++ /* should never happen */ ++ WARN_ON(1); ++ return 0; ++ } ++ ++ ret = dwc3_ep0_start_trans(dwc, direction, ++ req->request.dma, req->request.length, type); ++ dep->flags &= ~(DWC3_EP_PENDING_REQUEST | ++ DWC3_EP0_DIR_IN); ++ ++ } else if (dwc->delayed_status && (dwc->ep0state == EP0_STATUS_PHASE)) { ++ dwc->delayed_status = false; ++ dwc3_ep0_do_control_status(dwc, 1); ++ } ++ ++ return ret; ++} ++ ++int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request, ++ gfp_t gfp_flags) ++{ ++ struct dwc3_request *req = to_dwc3_request(request); ++ struct dwc3_ep *dep = to_dwc3_ep(ep); ++ struct dwc3 *dwc = dep->dwc; ++ ++ unsigned long flags; ++ ++ int ret; ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ if (!dep->desc) { ++ dev_dbg(dwc->dev, "trying to queue request %p to disabled %s\n", ++ request, dep->name); ++ ret = -ESHUTDOWN; ++ goto out; ++ } ++ ++ /* we share one TRB for ep0/1 */ ++ if (!list_empty(&dep->request_list)) { ++ ret = -EBUSY; ++ goto out; ++ } ++ ++ dev_vdbg(dwc->dev, "queueing request %p to %s length %d, state '%s'\n", ++ request, dep->name, request->length, ++ dwc3_ep0_state_string(dwc->ep0state)); ++ ++ ret = __dwc3_gadget_ep0_queue(dep, req); ++ ++out: ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return ret; ++} ++ ++static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc) ++{ ++ struct dwc3_ep *dep = dwc->eps[0]; ++ ++ /* stall is always issued on EP0 */ ++ __dwc3_gadget_ep_set_halt(dep, 1); ++ dep->flags = DWC3_EP_ENABLED; ++ dwc->delayed_status = false; ++ ++ if (!list_empty(&dep->request_list)) { ++ struct dwc3_request *req; ++ ++ req = next_request(&dep->request_list); ++ dwc3_gadget_giveback(dep, req, -ECONNRESET); ++ } ++ ++ dwc->ep0state = EP0_SETUP_PHASE; ++ dwc3_ep0_out_start(dwc); ++} ++ ++void dwc3_ep0_out_start(struct dwc3 *dwc) ++{ ++ int ret; ++ ++ ret = dwc3_ep0_start_trans(dwc, 0, dwc->ctrl_req_addr, 8, ++ DWC3_TRBCTL_CONTROL_SETUP); ++ WARN_ON(ret < 0); ++} ++ ++static struct dwc3_ep *dwc3_wIndex_to_dep(struct dwc3 *dwc, __le16 wIndex_le) ++{ ++ struct dwc3_ep *dep; ++ u32 windex = le16_to_cpu(wIndex_le); ++ u32 epnum; ++ ++ epnum = (windex & USB_ENDPOINT_NUMBER_MASK) << 1; ++ if ((windex & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) ++ epnum |= 1; ++ ++ dep = dwc->eps[epnum]; ++ if (dep->flags & DWC3_EP_ENABLED) ++ return dep; ++ ++ return NULL; ++} ++ ++static void dwc3_ep0_status_cmpl(struct usb_ep *ep, struct usb_request *req) ++{ ++} ++/* ++ * ch 9.4.5 ++ */ ++static int dwc3_ep0_handle_status(struct dwc3 *dwc, ++ struct usb_ctrlrequest *ctrl) ++{ ++ struct dwc3_ep *dep; ++ u32 recip; ++ u16 usb_status = 0; ++ __le16 *response_pkt; ++ ++ recip = ctrl->bRequestType & USB_RECIP_MASK; ++ switch (recip) { ++ case USB_RECIP_DEVICE: ++ /* ++ * We are self-powered. U1/U2/LTM will be set later ++ * once we handle this states. RemoteWakeup is 0 on SS ++ */ ++ usb_status |= dwc->is_selfpowered << USB_DEVICE_SELF_POWERED; ++ break; ++ ++ case USB_RECIP_INTERFACE: ++ /* ++ * Function Remote Wake Capable D0 ++ * Function Remote Wakeup D1 ++ */ ++ break; ++ ++ case USB_RECIP_ENDPOINT: ++ dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex); ++ if (!dep) ++ return -EINVAL; ++ ++ if (dep->flags & DWC3_EP_STALL) ++ usb_status = 1 << USB_ENDPOINT_HALT; ++ break; ++ default: ++ return -EINVAL; ++ }; ++ ++ response_pkt = (__le16 *) dwc->setup_buf; ++ *response_pkt = cpu_to_le16(usb_status); ++ ++ dep = dwc->eps[0]; ++ dwc->ep0_usb_req.dep = dep; ++ dwc->ep0_usb_req.request.length = sizeof(*response_pkt); ++ dwc->ep0_usb_req.request.dma = dwc->setup_buf_addr; ++ dwc->ep0_usb_req.request.complete = dwc3_ep0_status_cmpl; ++ ++ return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req); ++} ++ ++static int dwc3_ep0_handle_feature(struct dwc3 *dwc, ++ struct usb_ctrlrequest *ctrl, int set) ++{ ++ struct dwc3_ep *dep; ++ u32 recip; ++ u32 wValue; ++ u32 wIndex; ++ u32 reg; ++ int ret; ++ u32 mode; ++ ++ wValue = le16_to_cpu(ctrl->wValue); ++ wIndex = le16_to_cpu(ctrl->wIndex); ++ recip = ctrl->bRequestType & USB_RECIP_MASK; ++ switch (recip) { ++ case USB_RECIP_DEVICE: ++ ++ /* ++ * 9.4.1 says only only for SS, in AddressState only for ++ * default control pipe ++ */ ++ switch (wValue) { ++ case USB_DEVICE_U1_ENABLE: ++ case USB_DEVICE_U2_ENABLE: ++ case USB_DEVICE_LTM_ENABLE: ++ if (dwc->dev_state != DWC3_CONFIGURED_STATE) ++ return -EINVAL; ++ if (dwc->speed != DWC3_DSTS_SUPERSPEED) ++ return -EINVAL; ++ } ++ ++ /* XXX add U[12] & LTM */ ++ switch (wValue) { ++ case USB_DEVICE_REMOTE_WAKEUP: ++ break; ++ case USB_DEVICE_U1_ENABLE: ++ break; ++ case USB_DEVICE_U2_ENABLE: ++ break; ++ case USB_DEVICE_LTM_ENABLE: ++ break; ++ ++ case USB_DEVICE_TEST_MODE: ++ if ((wIndex & 0xff) != 0) ++ return -EINVAL; ++ if (!set) ++ return -EINVAL; ++ ++ mode = wIndex >> 8; ++ reg = dwc3_readl(dwc->regs, DWC3_DCTL); ++ reg &= ~DWC3_DCTL_TSTCTRL_MASK; ++ ++ switch (mode) { ++ case TEST_J: ++ case TEST_K: ++ case TEST_SE0_NAK: ++ case TEST_PACKET: ++ case TEST_FORCE_EN: ++ reg |= mode << 1; ++ break; ++ default: ++ return -EINVAL; ++ } ++ dwc3_writel(dwc->regs, DWC3_DCTL, reg); ++ break; ++ default: ++ return -EINVAL; ++ } ++ break; ++ ++ case USB_RECIP_INTERFACE: ++ switch (wValue) { ++ case USB_INTRF_FUNC_SUSPEND: ++ if (wIndex & USB_INTRF_FUNC_SUSPEND_LP) ++ /* XXX enable Low power suspend */ ++ ; ++ if (wIndex & USB_INTRF_FUNC_SUSPEND_RW) ++ /* XXX enable remote wakeup */ ++ ; ++ break; ++ default: ++ return -EINVAL; ++ } ++ break; ++ ++ case USB_RECIP_ENDPOINT: ++ switch (wValue) { ++ case USB_ENDPOINT_HALT: ++ dep = dwc3_wIndex_to_dep(dwc, wIndex); ++ if (!dep) ++ return -EINVAL; ++ ret = __dwc3_gadget_ep_set_halt(dep, set); ++ if (ret) ++ return -EINVAL; ++ break; ++ default: ++ return -EINVAL; ++ } ++ break; ++ ++ default: ++ return -EINVAL; ++ }; ++ ++ return 0; ++} ++ ++static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) ++{ ++ u32 addr; ++ u32 reg; ++ ++ addr = le16_to_cpu(ctrl->wValue); ++ if (addr > 127) { ++ dev_dbg(dwc->dev, "invalid device address %d\n", addr); ++ return -EINVAL; ++ } ++ ++ if (dwc->dev_state == DWC3_CONFIGURED_STATE) { ++ dev_dbg(dwc->dev, "trying to set address when configured\n"); ++ return -EINVAL; ++ } ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DCFG); ++ reg &= ~(DWC3_DCFG_DEVADDR_MASK); ++ reg |= DWC3_DCFG_DEVADDR(addr); ++ dwc3_writel(dwc->regs, DWC3_DCFG, reg); ++ ++ if (addr) ++ dwc->dev_state = DWC3_ADDRESS_STATE; ++ else ++ dwc->dev_state = DWC3_DEFAULT_STATE; ++ ++ return 0; ++} ++ ++static int dwc3_ep0_delegate_req(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) ++{ ++ int ret; ++ ++ spin_unlock(&dwc->lock); ++ ret = dwc->gadget_driver->setup(&dwc->gadget, ctrl); ++ spin_lock(&dwc->lock); ++ return ret; ++} ++ ++static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) ++{ ++ u32 cfg; ++ int ret; ++ ++ dwc->start_config_issued = false; ++ cfg = le16_to_cpu(ctrl->wValue); ++ ++ switch (dwc->dev_state) { ++ case DWC3_DEFAULT_STATE: ++ return -EINVAL; ++ break; ++ ++ case DWC3_ADDRESS_STATE: ++ ret = dwc3_ep0_delegate_req(dwc, ctrl); ++ /* if the cfg matches and the cfg is non zero */ ++ if (!ret && cfg) ++ dwc->dev_state = DWC3_CONFIGURED_STATE; ++ break; ++ ++ case DWC3_CONFIGURED_STATE: ++ ret = dwc3_ep0_delegate_req(dwc, ctrl); ++ if (!cfg) ++ dwc->dev_state = DWC3_ADDRESS_STATE; ++ break; ++ default: ++ ret = -EINVAL; ++ } ++ return ret; ++} ++ ++static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) ++{ ++ int ret; ++ ++ switch (ctrl->bRequest) { ++ case USB_REQ_GET_STATUS: ++ dev_vdbg(dwc->dev, "USB_REQ_GET_STATUS\n"); ++ ret = dwc3_ep0_handle_status(dwc, ctrl); ++ break; ++ case USB_REQ_CLEAR_FEATURE: ++ dev_vdbg(dwc->dev, "USB_REQ_CLEAR_FEATURE\n"); ++ ret = dwc3_ep0_handle_feature(dwc, ctrl, 0); ++ break; ++ case USB_REQ_SET_FEATURE: ++ dev_vdbg(dwc->dev, "USB_REQ_SET_FEATURE\n"); ++ ret = dwc3_ep0_handle_feature(dwc, ctrl, 1); ++ break; ++ case USB_REQ_SET_ADDRESS: ++ dev_vdbg(dwc->dev, "USB_REQ_SET_ADDRESS\n"); ++ ret = dwc3_ep0_set_address(dwc, ctrl); ++ break; ++ case USB_REQ_SET_CONFIGURATION: ++ dev_vdbg(dwc->dev, "USB_REQ_SET_CONFIGURATION\n"); ++ ret = dwc3_ep0_set_config(dwc, ctrl); ++ break; ++ default: ++ dev_vdbg(dwc->dev, "Forwarding to gadget driver\n"); ++ ret = dwc3_ep0_delegate_req(dwc, ctrl); ++ break; ++ }; ++ ++ return ret; ++} ++ ++static void dwc3_ep0_inspect_setup(struct dwc3 *dwc, ++ const struct dwc3_event_depevt *event) ++{ ++ struct usb_ctrlrequest *ctrl = dwc->ctrl_req; ++ int ret; ++ u32 len; ++ ++ if (!dwc->gadget_driver) ++ goto err; ++ ++ len = le16_to_cpu(ctrl->wLength); ++ if (!len) { ++ dwc->three_stage_setup = false; ++ dwc->ep0_expect_in = false; ++ dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS; ++ } else { ++ dwc->three_stage_setup = true; ++ dwc->ep0_expect_in = !!(ctrl->bRequestType & USB_DIR_IN); ++ dwc->ep0_next_event = DWC3_EP0_NRDY_DATA; ++ } ++ ++ if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) ++ ret = dwc3_ep0_std_request(dwc, ctrl); ++ else ++ ret = dwc3_ep0_delegate_req(dwc, ctrl); ++ ++ if (ret == USB_GADGET_DELAYED_STATUS) ++ dwc->delayed_status = true; ++ ++ if (ret >= 0) ++ return; ++ ++err: ++ dwc3_ep0_stall_and_restart(dwc); ++} ++ ++static void dwc3_ep0_complete_data(struct dwc3 *dwc, ++ const struct dwc3_event_depevt *event) ++{ ++ struct dwc3_request *r = NULL; ++ struct usb_request *ur; ++ struct dwc3_trb trb; ++ struct dwc3_ep *ep0; ++ u32 transferred; ++ u8 epnum; ++ ++ epnum = event->endpoint_number; ++ ep0 = dwc->eps[0]; ++ ++ dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS; ++ ++ r = next_request(&ep0->request_list); ++ ur = &r->request; ++ ++ dwc3_trb_to_nat(dwc->ep0_trb, &trb); ++ ++ if (dwc->ep0_bounced) { ++ ++ transferred = min_t(u32, ur->length, ++ ep0->endpoint.maxpacket - trb.length); ++ memcpy(ur->buf, dwc->ep0_bounce, transferred); ++ dwc->ep0_bounced = false; ++ } else { ++ transferred = ur->length - trb.length; ++ ur->actual += transferred; ++ } ++ ++ if ((epnum & 1) && ur->actual < ur->length) { ++ /* for some reason we did not get everything out */ ++ ++ dwc3_ep0_stall_and_restart(dwc); ++ } else { ++ /* ++ * handle the case where we have to send a zero packet. This ++ * seems to be case when req.length > maxpacket. Could it be? ++ */ ++ if (r) ++ dwc3_gadget_giveback(ep0, r, 0); ++ } ++} ++ ++static void dwc3_ep0_complete_req(struct dwc3 *dwc, ++ const struct dwc3_event_depevt *event) ++{ ++ struct dwc3_request *r; ++ struct dwc3_ep *dep; ++ ++ dep = dwc->eps[0]; ++ ++ if (!list_empty(&dep->request_list)) { ++ r = next_request(&dep->request_list); ++ ++ dwc3_gadget_giveback(dep, r, 0); ++ } ++ ++ dwc->ep0state = EP0_SETUP_PHASE; ++ dwc3_ep0_out_start(dwc); ++} ++ ++static void dwc3_ep0_xfer_complete(struct dwc3 *dwc, ++ const struct dwc3_event_depevt *event) ++{ ++ struct dwc3_ep *dep = dwc->eps[event->endpoint_number]; ++ ++ dep->flags &= ~DWC3_EP_BUSY; ++ dwc->setup_packet_pending = false; ++ ++ switch (dwc->ep0state) { ++ case EP0_SETUP_PHASE: ++ dev_vdbg(dwc->dev, "Inspecting Setup Bytes\n"); ++ dwc3_ep0_inspect_setup(dwc, event); ++ break; ++ ++ case EP0_DATA_PHASE: ++ dev_vdbg(dwc->dev, "Data Phase\n"); ++ dwc3_ep0_complete_data(dwc, event); ++ break; ++ ++ case EP0_STATUS_PHASE: ++ dev_vdbg(dwc->dev, "Status Phase\n"); ++ dwc3_ep0_complete_req(dwc, event); ++ break; ++ default: ++ WARN(true, "UNKNOWN ep0state %d\n", dwc->ep0state); ++ } ++} ++ ++static void dwc3_ep0_do_control_setup(struct dwc3 *dwc, ++ const struct dwc3_event_depevt *event) ++{ ++ dwc3_ep0_out_start(dwc); ++} ++ ++static void dwc3_ep0_do_control_data(struct dwc3 *dwc, ++ const struct dwc3_event_depevt *event) ++{ ++ struct dwc3_ep *dep; ++ struct dwc3_request *req; ++ int ret; ++ ++ dep = dwc->eps[0]; ++ ++ if (list_empty(&dep->request_list)) { ++ dev_vdbg(dwc->dev, "pending request for EP0 Data phase\n"); ++ dep->flags |= DWC3_EP_PENDING_REQUEST; ++ ++ if (event->endpoint_number) ++ dep->flags |= DWC3_EP0_DIR_IN; ++ return; ++ } ++ ++ req = next_request(&dep->request_list); ++ req->direction = !!event->endpoint_number; ++ ++ if (req->request.length == 0) { ++ ret = dwc3_ep0_start_trans(dwc, event->endpoint_number, ++ dwc->ctrl_req_addr, 0, ++ DWC3_TRBCTL_CONTROL_DATA); ++ } else if ((req->request.length % dep->endpoint.maxpacket) ++ && (event->endpoint_number == 0)) { ++ dwc3_map_buffer_to_dma(req); ++ ++ WARN_ON(req->request.length > dep->endpoint.maxpacket); ++ ++ dwc->ep0_bounced = true; ++ ++ /* ++ * REVISIT in case request length is bigger than EP0 ++ * wMaxPacketSize, we will need two chained TRBs to handle ++ * the transfer. ++ */ ++ ret = dwc3_ep0_start_trans(dwc, event->endpoint_number, ++ dwc->ep0_bounce_addr, dep->endpoint.maxpacket, ++ DWC3_TRBCTL_CONTROL_DATA); ++ } else { ++ dwc3_map_buffer_to_dma(req); ++ ++ ret = dwc3_ep0_start_trans(dwc, event->endpoint_number, ++ req->request.dma, req->request.length, ++ DWC3_TRBCTL_CONTROL_DATA); ++ } ++ ++ WARN_ON(ret < 0); ++} ++ ++static int dwc3_ep0_start_control_status(struct dwc3_ep *dep) ++{ ++ struct dwc3 *dwc = dep->dwc; ++ u32 type; ++ ++ type = dwc->three_stage_setup ? DWC3_TRBCTL_CONTROL_STATUS3 ++ : DWC3_TRBCTL_CONTROL_STATUS2; ++ ++ return dwc3_ep0_start_trans(dwc, dep->number, ++ dwc->ctrl_req_addr, 0, type); ++} ++ ++static void dwc3_ep0_do_control_status(struct dwc3 *dwc, u32 epnum) ++{ ++ struct dwc3_ep *dep = dwc->eps[epnum]; ++ ++ WARN_ON(dwc3_ep0_start_control_status(dep)); ++} ++ ++static void dwc3_ep0_xfernotready(struct dwc3 *dwc, ++ const struct dwc3_event_depevt *event) ++{ ++ dwc->setup_packet_pending = true; ++ ++ /* ++ * This part is very tricky: If we has just handled ++ * XferNotReady(Setup) and we're now expecting a ++ * XferComplete but, instead, we receive another ++ * XferNotReady(Setup), we should STALL and restart ++ * the state machine. ++ * ++ * In all other cases, we just continue waiting ++ * for the XferComplete event. ++ * ++ * We are a little bit unsafe here because we're ++ * not trying to ensure that last event was, indeed, ++ * XferNotReady(Setup). ++ * ++ * Still, we don't expect any condition where that ++ * should happen and, even if it does, it would be ++ * another error condition. ++ */ ++ if (dwc->ep0_next_event == DWC3_EP0_COMPLETE) { ++ switch (event->status) { ++ case DEPEVT_STATUS_CONTROL_SETUP: ++ dev_vdbg(dwc->dev, "Unexpected XferNotReady(Setup)\n"); ++ dwc3_ep0_stall_and_restart(dwc); ++ break; ++ case DEPEVT_STATUS_CONTROL_DATA: ++ /* FALLTHROUGH */ ++ case DEPEVT_STATUS_CONTROL_STATUS: ++ /* FALLTHROUGH */ ++ default: ++ dev_vdbg(dwc->dev, "waiting for XferComplete\n"); ++ } ++ ++ return; ++ } ++ ++ switch (event->status) { ++ case DEPEVT_STATUS_CONTROL_SETUP: ++ dev_vdbg(dwc->dev, "Control Setup\n"); ++ ++ dwc->ep0state = EP0_SETUP_PHASE; ++ ++ dwc3_ep0_do_control_setup(dwc, event); ++ break; ++ ++ case DEPEVT_STATUS_CONTROL_DATA: ++ dev_vdbg(dwc->dev, "Control Data\n"); ++ ++ dwc->ep0state = EP0_DATA_PHASE; ++ ++ if (dwc->ep0_next_event != DWC3_EP0_NRDY_DATA) { ++ dev_vdbg(dwc->dev, "Expected %d got %d\n", ++ dwc->ep0_next_event, ++ DWC3_EP0_NRDY_DATA); ++ ++ dwc3_ep0_stall_and_restart(dwc); ++ return; ++ } ++ ++ /* ++ * One of the possible error cases is when Host _does_ ++ * request for Data Phase, but it does so on the wrong ++ * direction. ++ * ++ * Here, we already know ep0_next_event is DATA (see above), ++ * so we only need to check for direction. ++ */ ++ if (dwc->ep0_expect_in != event->endpoint_number) { ++ dev_vdbg(dwc->dev, "Wrong direction for Data phase\n"); ++ dwc3_ep0_stall_and_restart(dwc); ++ return; ++ } ++ ++ dwc3_ep0_do_control_data(dwc, event); ++ break; ++ ++ case DEPEVT_STATUS_CONTROL_STATUS: ++ dev_vdbg(dwc->dev, "Control Status\n"); ++ ++ dwc->ep0state = EP0_STATUS_PHASE; ++ ++ if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) { ++ dev_vdbg(dwc->dev, "Expected %d got %d\n", ++ dwc->ep0_next_event, ++ DWC3_EP0_NRDY_STATUS); ++ ++ dwc3_ep0_stall_and_restart(dwc); ++ return; ++ } ++ ++ if (dwc->delayed_status) { ++ WARN_ON_ONCE(event->endpoint_number != 1); ++ dev_vdbg(dwc->dev, "Mass Storage delayed status\n"); ++ return; ++ } ++ ++ dwc3_ep0_do_control_status(dwc, event->endpoint_number); ++ } ++} ++ ++void dwc3_ep0_interrupt(struct dwc3 *dwc, ++ const struct dwc3_event_depevt *event) ++{ ++ u8 epnum = event->endpoint_number; ++ ++ dev_dbg(dwc->dev, "%s while ep%d%s in state '%s'\n", ++ dwc3_ep_event_string(event->endpoint_event), ++ epnum >> 1, (epnum & 1) ? "in" : "out", ++ dwc3_ep0_state_string(dwc->ep0state)); ++ ++ switch (event->endpoint_event) { ++ case DWC3_DEPEVT_XFERCOMPLETE: ++ dwc3_ep0_xfer_complete(dwc, event); ++ break; ++ ++ case DWC3_DEPEVT_XFERNOTREADY: ++ dwc3_ep0_xfernotready(dwc, event); ++ break; ++ ++ case DWC3_DEPEVT_XFERINPROGRESS: ++ case DWC3_DEPEVT_RXTXFIFOEVT: ++ case DWC3_DEPEVT_STREAMEVT: ++ case DWC3_DEPEVT_EPCMDCMPLT: ++ break; ++ } ++} +diff --git a/drivers/usb/dwc3/dwc3_gadget.c b/drivers/usb/dwc3/dwc3_gadget.c +new file mode 100644 +index 0000000..7c1a479 +--- /dev/null ++++ b/drivers/usb/dwc3/dwc3_gadget.c +@@ -0,0 +1,2184 @@ ++/** ++ * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link ++ * ++ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * Sebastian Andrzej Siewior ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++ ++#include ++#include ++ ++#include "core.h" ++#include "gadget.h" ++#include "io.h" ++ ++#define DMA_ADDR_INVALID (~(dma_addr_t)0) ++ ++void dwc3_map_buffer_to_dma(struct dwc3_request *req) ++{ ++ struct dwc3 *dwc = req->dep->dwc; ++ ++ if (req->request.length == 0) { ++ /* req->request.dma = dwc->setup_buf_addr; */ ++ return; ++ } ++ ++ if (req->request.dma == DMA_ADDR_INVALID) { ++ req->request.dma = dma_map_single(dwc->dev, req->request.buf, ++ req->request.length, req->direction ++ ? DMA_TO_DEVICE : DMA_FROM_DEVICE); ++ req->mapped = true; ++ } ++} ++ ++void dwc3_unmap_buffer_from_dma(struct dwc3_request *req) ++{ ++ struct dwc3 *dwc = req->dep->dwc; ++ ++ if (req->request.length == 0) { ++ req->request.dma = DMA_ADDR_INVALID; ++ return; ++ } ++ ++ if (req->mapped) { ++ dma_unmap_single(dwc->dev, req->request.dma, ++ req->request.length, req->direction ++ ? DMA_TO_DEVICE : DMA_FROM_DEVICE); ++ req->mapped = 0; ++ req->request.dma = DMA_ADDR_INVALID; ++ } ++} ++ ++void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, ++ int status) ++{ ++ struct dwc3 *dwc = dep->dwc; ++ ++ if (req->queued) { ++ dep->busy_slot++; ++ /* ++ * Skip LINK TRB. We can't use req->trb and check for ++ * DWC3_TRBCTL_LINK_TRB because it points the TRB we just ++ * completed (not the LINK TRB). ++ */ ++ if (((dep->busy_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) && ++ usb_endpoint_xfer_isoc(dep->desc)) ++ dep->busy_slot++; ++ } ++ list_del(&req->list); ++ ++ if (req->request.status == -EINPROGRESS) ++ req->request.status = status; ++ ++ dwc3_unmap_buffer_from_dma(req); ++ ++ dev_dbg(dwc->dev, "request %p from %s completed %d/%d ===> %d\n", ++ req, dep->name, req->request.actual, ++ req->request.length, status); ++ ++ spin_unlock(&dwc->lock); ++ req->request.complete(&req->dep->endpoint, &req->request); ++ spin_lock(&dwc->lock); ++} ++ ++static const char *dwc3_gadget_ep_cmd_string(u8 cmd) ++{ ++ switch (cmd) { ++ case DWC3_DEPCMD_DEPSTARTCFG: ++ return "Start New Configuration"; ++ case DWC3_DEPCMD_ENDTRANSFER: ++ return "End Transfer"; ++ case DWC3_DEPCMD_UPDATETRANSFER: ++ return "Update Transfer"; ++ case DWC3_DEPCMD_STARTTRANSFER: ++ return "Start Transfer"; ++ case DWC3_DEPCMD_CLEARSTALL: ++ return "Clear Stall"; ++ case DWC3_DEPCMD_SETSTALL: ++ return "Set Stall"; ++ case DWC3_DEPCMD_GETSEQNUMBER: ++ return "Get Data Sequence Number"; ++ case DWC3_DEPCMD_SETTRANSFRESOURCE: ++ return "Set Endpoint Transfer Resource"; ++ case DWC3_DEPCMD_SETEPCONFIG: ++ return "Set Endpoint Configuration"; ++ default: ++ return "UNKNOWN command"; ++ } ++} ++ ++int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep, ++ unsigned cmd, struct dwc3_gadget_ep_cmd_params *params) ++{ ++ struct dwc3_ep *dep = dwc->eps[ep]; ++ u32 timeout = 500; ++ u32 reg; ++ ++ dev_vdbg(dwc->dev, "%s: cmd '%s' params %08x %08x %08x\n", ++ dep->name, ++ dwc3_gadget_ep_cmd_string(cmd), params->param0, ++ params->param1, params->param2); ++ ++ dwc3_writel(dwc->regs, DWC3_DEPCMDPAR0(ep), params->param0); ++ dwc3_writel(dwc->regs, DWC3_DEPCMDPAR1(ep), params->param1); ++ dwc3_writel(dwc->regs, DWC3_DEPCMDPAR2(ep), params->param2); ++ ++ dwc3_writel(dwc->regs, DWC3_DEPCMD(ep), cmd | DWC3_DEPCMD_CMDACT); ++ do { ++ reg = dwc3_readl(dwc->regs, DWC3_DEPCMD(ep)); ++ if (!(reg & DWC3_DEPCMD_CMDACT)) { ++ dev_vdbg(dwc->dev, "Command Complete --> %d\n", ++ DWC3_DEPCMD_STATUS(reg)); ++ return 0; ++ } ++ ++ /* ++ * We can't sleep here, because it is also called from ++ * interrupt context. ++ */ ++ timeout--; ++ if (!timeout) ++ return -ETIMEDOUT; ++ ++ udelay(1); ++ } while (1); ++} ++ ++static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep, ++ struct dwc3_trb_hw *trb) ++{ ++ u32 offset = (char *) trb - (char *) dep->trb_pool; ++ ++ return dep->trb_pool_dma + offset; ++} ++ ++static int dwc3_alloc_trb_pool(struct dwc3_ep *dep) ++{ ++ struct dwc3 *dwc = dep->dwc; ++ ++ if (dep->trb_pool) ++ return 0; ++ ++ if (dep->number == 0 || dep->number == 1) ++ return 0; ++ ++ dep->trb_pool = dma_alloc_coherent(dwc->dev, ++ sizeof(struct dwc3_trb) * DWC3_TRB_NUM, ++ &dep->trb_pool_dma, GFP_KERNEL); ++ if (!dep->trb_pool) { ++ dev_err(dep->dwc->dev, "failed to allocate trb pool for %s\n", ++ dep->name); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++static void dwc3_free_trb_pool(struct dwc3_ep *dep) ++{ ++ struct dwc3 *dwc = dep->dwc; ++ ++ dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM, ++ dep->trb_pool, dep->trb_pool_dma); ++ ++ dep->trb_pool = NULL; ++ dep->trb_pool_dma = 0; ++} ++ ++static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep) ++{ ++ struct dwc3_gadget_ep_cmd_params params; ++ u32 cmd; ++ ++ memset(¶ms, 0x00, sizeof(params)); ++ ++ if (dep->number != 1) { ++ cmd = DWC3_DEPCMD_DEPSTARTCFG; ++ /* XferRscIdx == 0 for ep0 and 2 for the remaining */ ++ if (dep->number > 1) { ++ if (dwc->start_config_issued) ++ return 0; ++ dwc->start_config_issued = true; ++ cmd |= DWC3_DEPCMD_PARAM(2); ++ } ++ ++ return dwc3_send_gadget_ep_cmd(dwc, 0, cmd, ¶ms); ++ } ++ ++ return 0; ++} ++ ++static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep, ++ const struct usb_endpoint_descriptor *desc, ++ const struct usb_ss_ep_comp_descriptor *comp_desc) ++{ ++ struct dwc3_gadget_ep_cmd_params params; ++ ++ memset(¶ms, 0x00, sizeof(params)); ++ ++ params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc)) ++ | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc)) ++ | DWC3_DEPCFG_BURST_SIZE(dep->endpoint.maxburst); ++ ++ params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN ++ | DWC3_DEPCFG_XFER_NOT_READY_EN; ++ ++#if 0 ++ if (comp_desc && USB_SS_MAX_STREAMS(comp_desc->bmAttributes) ++ && usb_endpoint_xfer_bulk(desc)) { ++ params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE ++ | DWC3_DEPCFG_STREAM_EVENT_EN; ++ dep->stream_capable = true; ++ } ++#endif ++ ++ if (usb_endpoint_xfer_isoc(desc)) ++ params.param1 |= DWC3_DEPCFG_XFER_IN_PROGRESS_EN; ++ ++ /* ++ * We are doing 1:1 mapping for endpoints, meaning ++ * Physical Endpoints 2 maps to Logical Endpoint 2 and ++ * so on. We consider the direction bit as part of the physical ++ * endpoint number. So USB endpoint 0x81 is 0x03. ++ */ ++ params.param1 |= DWC3_DEPCFG_EP_NUMBER(dep->number); ++ ++ /* ++ * We must use the lower 16 TX FIFOs even though ++ * HW might have more ++ */ ++ if (dep->direction) ++ params.param0 |= DWC3_DEPCFG_FIFO_NUMBER(dep->number >> 1); ++ ++ if (desc->bInterval) { ++ params.param1 |= DWC3_DEPCFG_BINTERVAL_M1(desc->bInterval - 1); ++ dep->interval = 1 << (desc->bInterval - 1); ++ } ++ ++ return dwc3_send_gadget_ep_cmd(dwc, dep->number, ++ DWC3_DEPCMD_SETEPCONFIG, ¶ms); ++} ++ ++static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep) ++{ ++ struct dwc3_gadget_ep_cmd_params params; ++ ++ memset(¶ms, 0x00, sizeof(params)); ++ ++ params.param0 = DWC3_DEPXFERCFG_NUM_XFER_RES(1); ++ ++ return dwc3_send_gadget_ep_cmd(dwc, dep->number, ++ DWC3_DEPCMD_SETTRANSFRESOURCE, ¶ms); ++} ++ ++/** ++ * __dwc3_gadget_ep_enable - Initializes a HW endpoint ++ * @dep: endpoint to be initialized ++ * @desc: USB Endpoint Descriptor ++ * ++ * Caller should take care of locking ++ */ ++static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, ++ const struct usb_endpoint_descriptor *desc, ++ const struct usb_ss_ep_comp_descriptor *comp_desc) ++{ ++ struct dwc3 *dwc = dep->dwc; ++ u32 reg; ++ int ret = -ENOMEM; ++ ++ if (!(dep->flags & DWC3_EP_ENABLED)) { ++ ret = dwc3_gadget_start_config(dwc, dep); ++ if (ret) ++ return ret; ++ } ++ ++ ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc); ++ if (ret) ++ return ret; ++ ++ if (!(dep->flags & DWC3_EP_ENABLED)) { ++ struct dwc3_trb_hw *trb_st_hw; ++ struct dwc3_trb_hw *trb_link_hw; ++ struct dwc3_trb trb_link; ++ ++ ret = dwc3_gadget_set_xfer_resource(dwc, dep); ++ if (ret) ++ return ret; ++ ++ dep->desc = desc; ++ dep->comp_desc = comp_desc; ++ dep->type = usb_endpoint_type(desc); ++ dep->flags |= DWC3_EP_ENABLED; ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DALEPENA); ++ reg |= DWC3_DALEPENA_EP(dep->number); ++ dwc3_writel(dwc->regs, DWC3_DALEPENA, reg); ++ ++ if (!usb_endpoint_xfer_isoc(desc)) ++ return 0; ++ ++ memset(&trb_link, 0, sizeof(trb_link)); ++ ++ /* Link TRB for ISOC. The HWO but is never reset */ ++ trb_st_hw = &dep->trb_pool[0]; ++ ++ trb_link.bplh = dwc3_trb_dma_offset(dep, trb_st_hw); ++ trb_link.trbctl = DWC3_TRBCTL_LINK_TRB; ++ trb_link.hwo = true; ++ ++ trb_link_hw = &dep->trb_pool[DWC3_TRB_NUM - 1]; ++ dwc3_trb_to_hw(&trb_link, trb_link_hw); ++ } ++ ++ return 0; ++} ++ ++static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum); ++static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep) ++{ ++ struct dwc3_request *req; ++ ++ if (!list_empty(&dep->req_queued)) ++ dwc3_stop_active_transfer(dwc, dep->number); ++ ++ while (!list_empty(&dep->request_list)) { ++ req = next_request(&dep->request_list); ++ ++ dwc3_gadget_giveback(dep, req, -ESHUTDOWN); ++ } ++} ++ ++/** ++ * __dwc3_gadget_ep_disable - Disables a HW endpoint ++ * @dep: the endpoint to disable ++ * ++ * This function also removes requests which are currently processed ny the ++ * hardware and those which are not yet scheduled. ++ * Caller should take care of locking. ++ */ ++static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep) ++{ ++ struct dwc3 *dwc = dep->dwc; ++ u32 reg; ++ ++ dwc3_remove_requests(dwc, dep); ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DALEPENA); ++ reg &= ~DWC3_DALEPENA_EP(dep->number); ++ dwc3_writel(dwc->regs, DWC3_DALEPENA, reg); ++ ++ dep->stream_capable = false; ++ dep->desc = NULL; ++ dep->comp_desc = NULL; ++ dep->type = 0; ++ dep->flags = 0; ++ ++ return 0; ++} ++ ++/* -------------------------------------------------------------------------- */ ++ ++static int dwc3_gadget_ep0_enable(struct usb_ep *ep, ++ const struct usb_endpoint_descriptor *desc) ++{ ++ return -EINVAL; ++} ++ ++static int dwc3_gadget_ep0_disable(struct usb_ep *ep) ++{ ++ return -EINVAL; ++} ++ ++/* -------------------------------------------------------------------------- */ ++ ++static int dwc3_gadget_ep_enable(struct usb_ep *ep, ++ const struct usb_endpoint_descriptor *desc) ++{ ++ struct dwc3_ep *dep; ++ struct dwc3 *dwc; ++ unsigned long flags; ++ int ret; ++ ++ if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) { ++ pr_debug("dwc3: invalid parameters\n"); ++ return -EINVAL; ++ } ++ ++ if (!desc->wMaxPacketSize) { ++ pr_debug("dwc3: missing wMaxPacketSize\n"); ++ return -EINVAL; ++ } ++ ++ dep = to_dwc3_ep(ep); ++ dwc = dep->dwc; ++ ++ switch (usb_endpoint_type(desc)) { ++ case USB_ENDPOINT_XFER_CONTROL: ++ strncat(dep->name, "-control", sizeof(dep->name)); ++ break; ++ case USB_ENDPOINT_XFER_ISOC: ++ strncat(dep->name, "-isoc", sizeof(dep->name)); ++ break; ++ case USB_ENDPOINT_XFER_BULK: ++ strncat(dep->name, "-bulk", sizeof(dep->name)); ++ break; ++ case USB_ENDPOINT_XFER_INT: ++ strncat(dep->name, "-int", sizeof(dep->name)); ++ break; ++ default: ++ dev_err(dwc->dev, "invalid endpoint transfer type\n"); ++ } ++ ++ if (dep->flags & DWC3_EP_ENABLED) { ++ dev_WARN_ONCE(dwc->dev, true, "%s is already enabled\n", ++ dep->name); ++ return 0; ++ } ++ ++ dev_vdbg(dwc->dev, "Enabling %s\n", dep->name); ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ ret = __dwc3_gadget_ep_enable(dep, desc, NULL /*ep->comp_desc*/); ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return ret; ++} ++ ++static int dwc3_gadget_ep_disable(struct usb_ep *ep) ++{ ++ struct dwc3_ep *dep; ++ struct dwc3 *dwc; ++ unsigned long flags; ++ int ret; ++ ++ if (!ep) { ++ pr_debug("dwc3: invalid parameters\n"); ++ return -EINVAL; ++ } ++ ++ dep = to_dwc3_ep(ep); ++ dwc = dep->dwc; ++ ++ if (!(dep->flags & DWC3_EP_ENABLED)) { ++ dev_WARN_ONCE(dwc->dev, true, "%s is already disabled\n", ++ dep->name); ++ return 0; ++ } ++ ++ snprintf(dep->name, sizeof(dep->name), "ep%d%s", ++ dep->number >> 1, ++ (dep->number & 1) ? "in" : "out"); ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ ret = __dwc3_gadget_ep_disable(dep); ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return ret; ++} ++ ++static struct usb_request *dwc3_gadget_ep_alloc_request(struct usb_ep *ep, ++ gfp_t gfp_flags) ++{ ++ struct dwc3_request *req; ++ struct dwc3_ep *dep = to_dwc3_ep(ep); ++ ++ req = kzalloc(sizeof(*req), gfp_flags); ++ if (!req) { ++ dev_err(dwc->dev, "not enough memory\n"); ++ return NULL; ++ } ++ ++ req->epnum = dep->number; ++ req->dep = dep; ++ req->request.dma = DMA_ADDR_INVALID; ++ ++ return &req->request; ++} ++ ++static void dwc3_gadget_ep_free_request(struct usb_ep *ep, ++ struct usb_request *request) ++{ ++ struct dwc3_request *req = to_dwc3_request(request); ++ ++ kfree(req); ++} ++ ++/* ++ * dwc3_prepare_trbs - setup TRBs from requests ++ * @dep: endpoint for which requests are being prepared ++ * @starting: true if the endpoint is idle and no requests are queued. ++ * ++ * The functions goes through the requests list and setups TRBs for the ++ * transfers. The functions returns once there are not more TRBs available or ++ * it run out of requests. ++ */ ++static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep, ++ bool starting) ++{ ++ struct dwc3_request *req, *n, *ret = NULL; ++ struct dwc3_trb_hw *trb_hw; ++ struct dwc3_trb trb; ++ u32 trbs_left; ++ ++ BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM); ++ ++ /* the first request must not be queued */ ++ trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK; ++ /* ++ * if busy & slot are equal than it is either full or empty. If we are ++ * starting to proceed requests then we are empty. Otherwise we ar ++ * full and don't do anything ++ */ ++ if (!trbs_left) { ++ if (!starting) ++ return NULL; ++ trbs_left = DWC3_TRB_NUM; ++ /* ++ * In case we start from scratch, we queue the ISOC requests ++ * starting from slot 1. This is done because we use ring ++ * buffer and have no LST bit to stop us. Instead, we place ++ * IOC bit TRB_NUM/4. We try to avoid to having an interrupt ++ * after the first request so we start at slot 1 and have ++ * 7 requests proceed before we hit the first IOC. ++ * Other transfer types don't use the ring buffer and are ++ * processed from the first TRB until the last one. Since we ++ * don't wrap around we have to start at the beginning. ++ */ ++ if (usb_endpoint_xfer_isoc(dep->desc)) { ++ dep->busy_slot = 1; ++ dep->free_slot = 1; ++ } else { ++ dep->busy_slot = 0; ++ dep->free_slot = 0; ++ } ++ } ++ ++ /* The last TRB is a link TRB, not used for xfer */ ++ if ((trbs_left <= 1) && usb_endpoint_xfer_isoc(dep->desc)) ++ return NULL; ++ ++ list_for_each_entry_safe(req, n, &dep->request_list, list) { ++ unsigned int last_one = 0; ++ unsigned int cur_slot; ++ ++ trb_hw = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK]; ++ cur_slot = dep->free_slot; ++ dep->free_slot++; ++ ++ /* Skip the LINK-TRB on ISOC */ ++ if (((cur_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) && ++ usb_endpoint_xfer_isoc(dep->desc)) ++ continue; ++ ++ dwc3_gadget_move_request_queued(req); ++ memset(&trb, 0, sizeof(trb)); ++ trbs_left--; ++ ++ /* Is our TRB pool empty? */ ++ if (!trbs_left) ++ last_one = 1; ++ /* Is this the last request? */ ++ if (list_empty(&dep->request_list)) ++ last_one = 1; ++ ++ /* ++ * FIXME we shouldn't need to set LST bit always but we are ++ * facing some weird problem with the Hardware where it doesn't ++ * complete even though it has been previously started. ++ * ++ * While we're debugging the problem, as a workaround to ++ * multiple TRBs handling, use only one TRB at a time. ++ */ ++ last_one = 1; ++ ++ req->trb = trb_hw; ++ if (!ret) ++ ret = req; ++ ++ trb.bplh = req->request.dma; ++ ++ if (usb_endpoint_xfer_isoc(dep->desc)) { ++ trb.isp_imi = true; ++ trb.csp = true; ++ } else { ++ trb.lst = last_one; ++ } ++ ++ if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable) ++ trb.sid_sofn = req->request.stream_id; ++ ++ switch (usb_endpoint_type(dep->desc)) { ++ case USB_ENDPOINT_XFER_CONTROL: ++ trb.trbctl = DWC3_TRBCTL_CONTROL_SETUP; ++ break; ++ ++ case USB_ENDPOINT_XFER_ISOC: ++ trb.trbctl = DWC3_TRBCTL_ISOCHRONOUS_FIRST; ++ ++ /* IOC every DWC3_TRB_NUM / 4 so we can refill */ ++ if (!(cur_slot % (DWC3_TRB_NUM / 4))) ++ trb.ioc = last_one; ++ break; ++ ++ case USB_ENDPOINT_XFER_BULK: ++ case USB_ENDPOINT_XFER_INT: ++ trb.trbctl = DWC3_TRBCTL_NORMAL; ++ break; ++ default: ++ /* ++ * This is only possible with faulty memory because we ++ * checked it already :) ++ */ ++ BUG(); ++ } ++ ++ trb.length = req->request.length; ++ trb.hwo = true; ++ ++ dwc3_trb_to_hw(&trb, trb_hw); ++ req->trb_dma = dwc3_trb_dma_offset(dep, trb_hw); ++ ++ if (last_one) ++ break; ++ } ++ ++ return ret; ++} ++ ++static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param, ++ int start_new) ++{ ++ struct dwc3_gadget_ep_cmd_params params; ++ struct dwc3_request *req; ++ struct dwc3 *dwc = dep->dwc; ++ int ret; ++ u32 cmd; ++ ++ if (start_new && (dep->flags & DWC3_EP_BUSY)) { ++ dev_vdbg(dwc->dev, "%s: endpoint busy\n", dep->name); ++ return -EBUSY; ++ } ++ dep->flags &= ~DWC3_EP_PENDING_REQUEST; ++ ++ /* ++ * If we are getting here after a short-out-packet we don't enqueue any ++ * new requests as we try to set the IOC bit only on the last request. ++ */ ++ if (start_new) { ++ if (list_empty(&dep->req_queued)) ++ dwc3_prepare_trbs(dep, start_new); ++ ++ /* req points to the first request which will be sent */ ++ req = next_request(&dep->req_queued); ++ } else { ++ /* ++ * req points to the first request where HWO changed ++ * from 0 to 1 ++ */ ++ req = dwc3_prepare_trbs(dep, start_new); ++ } ++ if (!req) { ++ dep->flags |= DWC3_EP_PENDING_REQUEST; ++ return 0; ++ } ++ ++ memset(¶ms, 0, sizeof(params)); ++ params.param0 = upper_32_bits(req->trb_dma); ++ params.param1 = lower_32_bits(req->trb_dma); ++ ++ if (start_new) ++ cmd = DWC3_DEPCMD_STARTTRANSFER; ++ else ++ cmd = DWC3_DEPCMD_UPDATETRANSFER; ++ ++ cmd |= DWC3_DEPCMD_PARAM(cmd_param); ++ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, ¶ms); ++ if (ret < 0) { ++ dev_dbg(dwc->dev, "failed to send STARTTRANSFER command\n"); ++ ++ /* ++ * FIXME we need to iterate over the list of requests ++ * here and stop, unmap, free and del each of the linked ++ * requests instead of we do now. ++ */ ++ dwc3_unmap_buffer_from_dma(req); ++ list_del(&req->list); ++ return ret; ++ } ++ ++ dep->flags |= DWC3_EP_BUSY; ++ dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc, ++ dep->number); ++ return 0; ++} ++ ++static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req) ++{ ++ req->request.actual = 0; ++ req->request.status = -EINPROGRESS; ++ req->direction = dep->direction; ++ req->epnum = dep->number; ++ ++ /* ++ * We only add to our list of requests now and ++ * start consuming the list once we get XferNotReady ++ * IRQ. ++ * ++ * That way, we avoid doing anything that we don't need ++ * to do now and defer it until the point we receive a ++ * particular token from the Host side. ++ * ++ * This will also avoid Host cancelling URBs due to too ++ * many NACKs. ++ */ ++ dwc3_map_buffer_to_dma(req); ++ list_add_tail(&req->list, &dep->request_list); ++ ++ /* ++ * There is one special case: XferNotReady with ++ * empty list of requests. We need to kick the ++ * transfer here in that situation, otherwise ++ * we will be NAKing forever. ++ * ++ * If we get XferNotReady before gadget driver ++ * has a chance to queue a request, we will ACK ++ * the IRQ but won't be able to receive the data ++ * until the next request is queued. The following ++ * code is handling exactly that. ++ */ ++ if (dep->flags & DWC3_EP_PENDING_REQUEST) { ++ int ret; ++ int start_trans; ++ ++ start_trans = 1; ++ if (usb_endpoint_xfer_isoc(dep->desc) && ++ dep->flags & DWC3_EP_BUSY) ++ start_trans = 0; ++ ++ ret = __dwc3_gadget_kick_transfer(dep, 0, start_trans); ++ if (ret && ret != -EBUSY) { ++ struct dwc3 *dwc = dep->dwc; ++ ++ dev_dbg(dwc->dev, "%s: failed to kick transfers\n", ++ dep->name); ++ } ++ }; ++ ++ return 0; ++} ++ ++static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request, ++ gfp_t gfp_flags) ++{ ++ struct dwc3_request *req = to_dwc3_request(request); ++ struct dwc3_ep *dep = to_dwc3_ep(ep); ++ struct dwc3 *dwc = dep->dwc; ++ ++ unsigned long flags; ++ ++ int ret; ++ ++ if (!dep->desc) { ++ dev_dbg(dwc->dev, "trying to queue request %p to disabled %s\n", ++ request, ep->name); ++ return -ESHUTDOWN; ++ } ++ ++ dev_vdbg(dwc->dev, "queing request %p to %s length %d\n", ++ request, ep->name, request->length); ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ ret = __dwc3_gadget_ep_queue(dep, req); ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return ret; ++} ++ ++static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, ++ struct usb_request *request) ++{ ++ struct dwc3_request *req = to_dwc3_request(request); ++ struct dwc3_request *r = NULL; ++ ++ struct dwc3_ep *dep = to_dwc3_ep(ep); ++ struct dwc3 *dwc = dep->dwc; ++ ++ unsigned long flags; ++ int ret = 0; ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ ++ list_for_each_entry(r, &dep->request_list, list) { ++ if (r == req) ++ break; ++ } ++ ++ if (r != req) { ++ list_for_each_entry(r, &dep->req_queued, list) { ++ if (r == req) ++ break; ++ } ++ if (r == req) { ++ /* wait until it is processed */ ++ dwc3_stop_active_transfer(dwc, dep->number); ++ goto out0; ++ } ++ dev_err(dwc->dev, "request %p was not queued to %s\n", ++ request, ep->name); ++ ret = -EINVAL; ++ goto out0; ++ } ++ ++ /* giveback the request */ ++ dwc3_gadget_giveback(dep, req, -ECONNRESET); ++ ++out0: ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return ret; ++} ++ ++int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value) ++{ ++ struct dwc3_gadget_ep_cmd_params params; ++ struct dwc3 *dwc = dep->dwc; ++ int ret; ++ ++ memset(¶ms, 0x00, sizeof(params)); ++ ++ if (value) { ++ if (dep->number == 0 || dep->number == 1) { ++ /* ++ * Whenever EP0 is stalled, we will restart ++ * the state machine, thus moving back to ++ * Setup Phase ++ */ ++ dwc->ep0state = EP0_SETUP_PHASE; ++ } ++ ++ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, ++ DWC3_DEPCMD_SETSTALL, ¶ms); ++ if (ret) ++ dev_err(dwc->dev, "failed to %s STALL on %s\n", ++ value ? "set" : "clear", ++ dep->name); ++ else ++ dep->flags |= DWC3_EP_STALL; ++ } else { ++ if (dep->flags & DWC3_EP_WEDGE) ++ return 0; ++ ++ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, ++ DWC3_DEPCMD_CLEARSTALL, ¶ms); ++ if (ret) ++ dev_err(dwc->dev, "failed to %s STALL on %s\n", ++ value ? "set" : "clear", ++ dep->name); ++ else ++ dep->flags &= ~DWC3_EP_STALL; ++ } ++ ++ return ret; ++} ++ ++static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value) ++{ ++ struct dwc3_ep *dep = to_dwc3_ep(ep); ++ ++ unsigned long flags; ++ ++ int ret; ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ ++ if (usb_endpoint_xfer_isoc(dep->desc)) { ++ dev_err(dwc->dev, "%s is of Isochronous type\n", dep->name); ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ ret = __dwc3_gadget_ep_set_halt(dep, value); ++out: ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return ret; ++} ++ ++/* -------------------------------------------------------------------------- */ ++ ++static struct usb_endpoint_descriptor dwc3_gadget_ep0_desc = { ++ .bLength = USB_DT_ENDPOINT_SIZE, ++ .bDescriptorType = USB_DT_ENDPOINT, ++ .bmAttributes = USB_ENDPOINT_XFER_CONTROL, ++}; ++ ++static const struct usb_ep_ops dwc3_gadget_ep0_ops = { ++ .enable = dwc3_gadget_ep0_enable, ++ .disable = dwc3_gadget_ep0_disable, ++ .alloc_request = dwc3_gadget_ep_alloc_request, ++ .free_request = dwc3_gadget_ep_free_request, ++ .queue = dwc3_gadget_ep0_queue, ++ .dequeue = dwc3_gadget_ep_dequeue, ++ .set_halt = dwc3_gadget_ep_set_halt, ++}; ++ ++static const struct usb_ep_ops dwc3_gadget_ep_ops = { ++ .enable = dwc3_gadget_ep_enable, ++ .disable = dwc3_gadget_ep_disable, ++ .alloc_request = dwc3_gadget_ep_alloc_request, ++ .free_request = dwc3_gadget_ep_free_request, ++ .queue = dwc3_gadget_ep_queue, ++ .dequeue = dwc3_gadget_ep_dequeue, ++ .set_halt = dwc3_gadget_ep_set_halt, ++}; ++ ++/* -------------------------------------------------------------------------- */ ++ ++static int dwc3_gadget_get_frame(struct usb_gadget *g) ++{ ++ struct dwc3 *dwc = gadget_to_dwc(g); ++ u32 reg; ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DSTS); ++ return DWC3_DSTS_SOFFN(reg); ++} ++ ++static int dwc3_gadget_wakeup(struct usb_gadget *g) ++{ ++ struct dwc3 *dwc = gadget_to_dwc(g); ++ ++ unsigned long timeout; ++ unsigned long flags; ++ ++ u32 reg; ++ ++ int ret = 0; ++ ++ u8 link_state; ++ u8 speed; ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ ++ /* ++ * According to the Databook Remote wakeup request should ++ * be issued only when the device is in early suspend state. ++ * ++ * We can check that via USB Link State bits in DSTS register. ++ */ ++ reg = dwc3_readl(dwc->regs, DWC3_DSTS); ++ ++ speed = reg & DWC3_DSTS_CONNECTSPD; ++ if (speed == DWC3_DSTS_SUPERSPEED) { ++ dev_dbg(dwc->dev, "no wakeup on SuperSpeed\n"); ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ link_state = DWC3_DSTS_USBLNKST(reg); ++ ++ switch (link_state) { ++ case DWC3_LINK_STATE_RX_DET: /* in HS, means Early Suspend */ ++ case DWC3_LINK_STATE_U3: /* in HS, means SUSPEND */ ++ break; ++ default: ++ dev_dbg(dwc->dev, "can't wakeup from link state %d\n", ++ link_state); ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DCTL); ++ ++ /* ++ * Switch link state to Recovery. In HS/FS/LS this means ++ * RemoteWakeup Request ++ */ ++ reg |= DWC3_DCTL_ULSTCHNG_RECOVERY; ++ dwc3_writel(dwc->regs, DWC3_DCTL, reg); ++ ++ /* wait for at least 2000us */ ++ usleep_range(2000, 2500); ++ ++ /* write zeroes to Link Change Request */ ++ reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK; ++ dwc3_writel(dwc->regs, DWC3_DCTL, reg); ++ ++ /* pool until Link State change to ON */ ++ timeout = 100; ++ ++ while (timeout) { ++ reg = dwc3_readl(dwc->regs, DWC3_DSTS); ++ ++ /* in HS, means ON */ ++ if (DWC3_DSTS_USBLNKST(reg) == DWC3_LINK_STATE_U0) ++ break; ++ timeout--; ++ mdelay(1); ++ } ++ ++ if (DWC3_DSTS_USBLNKST(reg) != DWC3_LINK_STATE_U0) { ++ dev_err(dwc->dev, "failed to send remote wakeup\n"); ++ ret = -EINVAL; ++ } ++ ++out: ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return ret; ++} ++ ++static int dwc3_gadget_set_selfpowered(struct usb_gadget *g, ++ int is_selfpowered) ++{ ++ struct dwc3 *dwc = gadget_to_dwc(g); ++ ++ dwc->is_selfpowered = !!is_selfpowered; ++ ++ return 0; ++} ++ ++static void dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on) ++{ ++ u32 reg; ++ u32 timeout = 500; ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DCTL); ++ if (is_on) ++ reg |= DWC3_DCTL_RUN_STOP; ++ else ++ reg &= ~DWC3_DCTL_RUN_STOP; ++ ++ dwc3_writel(dwc->regs, DWC3_DCTL, reg); ++ ++ do { ++ reg = dwc3_readl(dwc->regs, DWC3_DSTS); ++ if (is_on) { ++ if (!(reg & DWC3_DSTS_DEVCTRLHLT)) ++ break; ++ } else { ++ if (reg & DWC3_DSTS_DEVCTRLHLT) ++ break; ++ } ++ timeout--; ++ if (!timeout) ++ break; ++ udelay(1); ++ } while (1); ++} ++ ++static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on) ++{ ++ struct dwc3 *dwc = gadget_to_dwc(g); ++ unsigned long flags; ++ ++ is_on = !!is_on; ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ dwc3_gadget_run_stop(dwc, is_on); ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return 0; ++} ++ ++static int dwc3_gadget_start(struct usb_gadget *g, ++ struct usb_gadget_driver *driver) ++{ ++ struct dwc3 *dwc = gadget_to_dwc(g); ++ struct dwc3_ep *dep; ++ unsigned long flags; ++ int ret = 0; ++ u32 reg; ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ ++ if (dwc->gadget_driver) { ++ dev_err(dwc->dev, "%s is already bound\n", ++ dwc->gadget.name); ++ ret = -EBUSY; ++ goto err0; ++ } ++ ++ dwc->gadget_driver = driver; ++ /* dwc->gadget.dev.driver = &driver->driver; */ ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DCFG); ++ reg &= ~(DWC3_DCFG_SPEED_MASK); ++ reg |= dwc->maximum_speed; ++ dwc3_writel(dwc->regs, DWC3_DCFG, reg); ++ ++ dwc->start_config_issued = false; ++ ++ /* Start with SuperSpeed Default */ ++ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); ++ ++ dep = dwc->eps[0]; ++ ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); ++ if (ret) { ++ dev_err(dwc->dev, "failed to enable %s\n", dep->name); ++ goto err0; ++ } ++ ++ dep = dwc->eps[1]; ++ ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); ++ if (ret) { ++ dev_err(dwc->dev, "failed to enable %s\n", dep->name); ++ goto err1; ++ } ++ ++ /* begin to receive SETUP packets */ ++ dwc->ep0state = EP0_SETUP_PHASE; ++ dwc3_ep0_out_start(dwc); ++ ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return 0; ++ ++err1: ++ __dwc3_gadget_ep_disable(dwc->eps[0]); ++ ++err0: ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return ret; ++} ++ ++#if 0 ++static int dwc3_gadget_stop(struct usb_gadget *g, ++ struct usb_gadget_driver *driver) ++{ ++ struct dwc3 *dwc = gadget_to_dwc(g); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ ++ __dwc3_gadget_ep_disable(dwc->eps[0]); ++ __dwc3_gadget_ep_disable(dwc->eps[1]); ++ ++ dwc->gadget_driver = NULL; ++ ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return 0; ++} ++#endif ++static const struct usb_gadget_ops dwc3_gadget_ops = { ++ .get_frame = dwc3_gadget_get_frame, ++ .wakeup = dwc3_gadget_wakeup, ++ .set_selfpowered = dwc3_gadget_set_selfpowered, ++ .pullup = dwc3_gadget_pullup, ++ ++ ++}; ++ ++int usb_gadget_probe_driver(struct usb_gadget_driver *driver, ++ int (*bind)(struct usb_gadget *)) ++{ ++ int ret; ++ ++ ret = bind(&global_dwc3->gadget); ++ if (ret) ++ return ret; ++ ret = dwc3_gadget_start(&global_dwc3->gadget, driver); ++ if (ret) ++ return ret; ++ ret = usb_gadget_connect(&global_dwc3->gadget); ++ if (ret) ++ return ret; ++ return 0; ++} ++ ++/* -------------------------------------------------------------------------- */ ++ ++static int __devinit dwc3_gadget_init_endpoints(struct dwc3 *dwc) ++{ ++ struct dwc3_ep *dep; ++ u8 epnum; ++ ++ INIT_LIST_HEAD(&dwc->gadget.ep_list); ++ ++ for (epnum = 0; epnum < DWC3_ENDPOINTS_NUM; epnum++) { ++ dep = kzalloc(sizeof(*dep), GFP_KERNEL); ++ if (!dep) { ++ dev_err(dwc->dev, "can't allocate endpoint %d\n", ++ epnum); ++ return -ENOMEM; ++ } ++ ++ dep->dwc = dwc; ++ dep->number = epnum; ++ dwc->eps[epnum] = dep; ++ ++ snprintf(dep->name, sizeof(dep->name), "ep%d%s", epnum >> 1, ++ (epnum & 1) ? "in" : "out"); ++ dep->endpoint.name = dep->name; ++ dep->direction = (epnum & 1); ++ ++ if (epnum == 0 || epnum == 1) { ++ dep->endpoint.maxpacket = 64; ++ dep->endpoint.ops = &dwc3_gadget_ep0_ops; ++ if (!epnum) ++ dwc->gadget.ep0 = &dep->endpoint; ++ } else { ++ int ret; ++ ++ dep->endpoint.maxpacket = 1024; ++ dep->endpoint.ops = &dwc3_gadget_ep_ops; ++ list_add_tail(&dep->endpoint.ep_list, ++ &dwc->gadget.ep_list); ++ ++ ret = dwc3_alloc_trb_pool(dep); ++ if (ret) ++ return ret; ++ } ++ ++ INIT_LIST_HEAD(&dep->request_list); ++ INIT_LIST_HEAD(&dep->req_queued); ++ } ++ ++ return 0; ++} ++ ++static void dwc3_gadget_free_endpoints(struct dwc3 *dwc) ++{ ++ struct dwc3_ep *dep; ++ u8 epnum; ++ ++ for (epnum = 0; epnum < DWC3_ENDPOINTS_NUM; epnum++) { ++ dep = dwc->eps[epnum]; ++ dwc3_free_trb_pool(dep); ++ ++ if (epnum != 0 && epnum != 1) ++ list_del(&dep->endpoint.ep_list); ++ ++ kfree(dep); ++ } ++} ++ ++static struct dwc3 *the_dwc; ++ ++/* -------------------------------------------------------------------------- */ ++static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep, ++ const struct dwc3_event_depevt *event, int status) ++{ ++ struct dwc3_request *req; ++ struct dwc3_trb trb; ++ unsigned int count; ++ unsigned int s_pkt = 0; ++ ++ do { ++ req = next_request(&dep->req_queued); ++ if (!req) { ++ WARN_ON_ONCE(1); ++ return 1; ++ } ++ ++ dwc3_trb_to_nat(req->trb, &trb); ++ ++ if (trb.hwo && status != -ESHUTDOWN) ++ /* ++ * We continue despite the error. There is not much we ++ * can do. If we don't clean in up we loop for ever. If ++ * we skip the TRB than it gets overwritten reused after ++ * a while since we use them in a ring buffer. a BUG() ++ * would help. Lets hope that if this occures, someone ++ * fixes the root cause instead of looking away :) ++ */ ++ dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n", ++ dep->name, req->trb); ++ count = trb.length; ++ ++ if (dep->direction) { ++ if (count) { ++ dev_err(dwc->dev, "incomplete IN transfer %s\n", ++ dep->name); ++ status = -ECONNRESET; ++ } ++ } else { ++ if (count && (event->status & DEPEVT_STATUS_SHORT)) ++ s_pkt = 1; ++ } ++ ++ /* ++ * We assume here we will always receive the entire data block ++ * which we should receive. Meaning, if we program RX to ++ * receive 4K but we receive only 2K, we assume that's all we ++ * should receive and we simply bounce the request back to the ++ * gadget driver for further processing. ++ */ ++ req->request.actual += req->request.length - count; ++ dwc3_gadget_giveback(dep, req, status); ++ if (s_pkt) ++ break; ++ if ((event->status & DEPEVT_STATUS_LST) && trb.lst) ++ break; ++ if ((event->status & DEPEVT_STATUS_IOC) && trb.ioc) ++ break; ++ } while (1); ++ ++ if ((event->status & DEPEVT_STATUS_IOC) && trb.ioc) ++ return 0; ++ return 1; ++} ++ ++static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc, ++ struct dwc3_ep *dep, const struct dwc3_event_depevt *event, ++ int start_new) ++{ ++ unsigned status = 0; ++ int clean_busy; ++ ++ if (event->status & DEPEVT_STATUS_BUSERR) ++ status = -ECONNRESET; ++ ++ clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status); ++ if (clean_busy) { ++ dep->flags &= ~DWC3_EP_BUSY; ++ dep->res_trans_idx = 0; ++ } ++ ++ /* ++ * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround. ++ * See dwc3_gadget_linksts_change_interrupt() for 1st half. ++ */ ++ if (dwc->revision < DWC3_REVISION_183A) { ++ u32 reg; ++ int i; ++ ++ for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) { ++ struct dwc3_ep *dep = dwc->eps[i]; ++ ++ if (!(dep->flags & DWC3_EP_ENABLED)) ++ continue; ++ ++ if (!list_empty(&dep->req_queued)) ++ return; ++ } ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DCTL); ++ reg |= dwc->u1u2; ++ dwc3_writel(dwc->regs, DWC3_DCTL, reg); ++ ++ dwc->u1u2 = 0; ++ } ++} ++ ++static void dwc3_gadget_start_isoc(struct dwc3 *dwc, ++ struct dwc3_ep *dep, const struct dwc3_event_depevt *event) ++{ ++ u32 uf; ++ ++ if (list_empty(&dep->request_list)) { ++ dev_vdbg(dwc->dev, "ISOC ep %s run out for requests.\n", ++ dep->name); ++ return; ++ } ++ ++ if (event->parameters) { ++ u32 mask; ++ ++ mask = ~(dep->interval - 1); ++ uf = event->parameters & mask; ++ /* 4 micro frames in the future */ ++ uf += dep->interval * 4; ++ } else { ++ uf = 0; ++ } ++ ++ __dwc3_gadget_kick_transfer(dep, uf, 1); ++} ++ ++static void dwc3_process_ep_cmd_complete(struct dwc3_ep *dep, ++ const struct dwc3_event_depevt *event) ++{ ++ struct dwc3 *dwc = dep->dwc; ++ struct dwc3_event_depevt mod_ev = *event; ++ ++ /* ++ * We were asked to remove one requests. It is possible that this ++ * request and a few other were started together and have the same ++ * transfer index. Since we stopped the complete endpoint we don't ++ * know how many requests were already completed (and not yet) ++ * reported and how could be done (later). We purge them all until ++ * the end of the list. ++ */ ++ mod_ev.status = DEPEVT_STATUS_LST; ++ dwc3_cleanup_done_reqs(dwc, dep, &mod_ev, -ESHUTDOWN); ++ dep->flags &= ~DWC3_EP_BUSY; ++ /* pending requets are ignored and are queued on XferNotReady */ ++} ++ ++static void dwc3_ep_cmd_compl(struct dwc3_ep *dep, ++ const struct dwc3_event_depevt *event) ++{ ++ u32 param = event->parameters; ++ u32 cmd_type = (param >> 8) & ((1 << 5) - 1); ++ ++ switch (cmd_type) { ++ case DWC3_DEPCMD_ENDTRANSFER: ++ dwc3_process_ep_cmd_complete(dep, event); ++ break; ++ case DWC3_DEPCMD_STARTTRANSFER: ++ dep->res_trans_idx = param & 0x7f; ++ break; ++ default: ++ break; ++ }; ++} ++ ++static void dwc3_endpoint_interrupt(struct dwc3 *dwc, ++ const struct dwc3_event_depevt *event) ++{ ++ struct dwc3_ep *dep; ++ u8 epnum = event->endpoint_number; ++ ++ dep = dwc->eps[epnum]; ++ ++ dev_vdbg(dwc->dev, "%s: %s\n", dep->name, ++ dwc3_ep_event_string(event->endpoint_event)); ++ ++ if (epnum == 0 || epnum == 1) { ++ dwc3_ep0_interrupt(dwc, event); ++ return; ++ } ++ ++ switch (event->endpoint_event) { ++ case DWC3_DEPEVT_XFERCOMPLETE: ++ if (usb_endpoint_xfer_isoc(dep->desc)) { ++ dev_dbg(dwc->dev, "%s is an Isochronous endpoint\n", ++ dep->name); ++ return; ++ } ++ ++ dwc3_endpoint_transfer_complete(dwc, dep, event, 1); ++ break; ++ case DWC3_DEPEVT_XFERINPROGRESS: ++ if (!usb_endpoint_xfer_isoc(dep->desc)) { ++ dev_dbg(dwc->dev, "%s is not an Isochronous endpoint\n", ++ dep->name); ++ return; ++ } ++ ++ dwc3_endpoint_transfer_complete(dwc, dep, event, 0); ++ break; ++ case DWC3_DEPEVT_XFERNOTREADY: ++ if (usb_endpoint_xfer_isoc(dep->desc)) { ++ dwc3_gadget_start_isoc(dwc, dep, event); ++ } else { ++ int ret; ++ ++ dev_vdbg(dwc->dev, "%s: reason %s\n", ++ dep->name, event->status ++ ? "Transfer Active" ++ : "Transfer Not Active"); ++ ++ ret = __dwc3_gadget_kick_transfer(dep, 0, 1); ++ if (!ret || ret == -EBUSY) ++ return; ++ dev_dbg(dwc->dev, "%s: failed to kick transfers %d.\n", ++ dep->name, ret); ++ } ++ ++ break; ++ case DWC3_DEPEVT_STREAMEVT: ++ if (!usb_endpoint_xfer_bulk(dep->desc)) { ++ dev_err(dwc->dev, "Stream event for non-Bulk %s\n", ++ dep->name); ++ return; ++ } ++ ++ switch (event->status) { ++ case DEPEVT_STREAMEVT_FOUND: ++ dev_vdbg(dwc->dev, "Stream %d found and started\n", ++ event->parameters); ++ ++ break; ++ case DEPEVT_STREAMEVT_NOTFOUND: ++ /* FALLTHROUGH */ ++ default: ++ dev_dbg(dwc->dev, "Couldn't find suitable stream\n"); ++ } ++ break; ++ case DWC3_DEPEVT_RXTXFIFOEVT: ++ dev_dbg(dwc->dev, "%s FIFO Overrun\n", dep->name); ++ break; ++ case DWC3_DEPEVT_EPCMDCMPLT: ++ dwc3_ep_cmd_compl(dep, event); ++ break; ++ } ++} ++ ++static void dwc3_disconnect_gadget(struct dwc3 *dwc) ++{ ++ if (dwc->gadget_driver && dwc->gadget_driver->disconnect) { ++ spin_unlock(&dwc->lock); ++ dwc->gadget_driver->disconnect(&dwc->gadget); ++ spin_lock(&dwc->lock); ++ } ++} ++ ++static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum) ++{ ++ struct dwc3_ep *dep; ++ struct dwc3_gadget_ep_cmd_params params; ++ u32 cmd; ++ int ret; ++ ++ dep = dwc->eps[epnum]; ++ ++ WARN_ON(!dep->res_trans_idx); ++ if (dep->res_trans_idx) { ++ cmd = DWC3_DEPCMD_ENDTRANSFER; ++ cmd |= DWC3_DEPCMD_HIPRI_FORCERM | DWC3_DEPCMD_CMDIOC; ++ cmd |= DWC3_DEPCMD_PARAM(dep->res_trans_idx); ++ memset(¶ms, 0, sizeof(params)); ++ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, ¶ms); ++ WARN_ON_ONCE(ret); ++ dep->res_trans_idx = 0; ++ } ++} ++ ++static void dwc3_stop_active_transfers(struct dwc3 *dwc) ++{ ++ u32 epnum; ++ ++ for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) { ++ struct dwc3_ep *dep; ++ ++ dep = dwc->eps[epnum]; ++ if (!(dep->flags & DWC3_EP_ENABLED)) ++ continue; ++ ++ dwc3_remove_requests(dwc, dep); ++ } ++} ++ ++static void dwc3_clear_stall_all_ep(struct dwc3 *dwc) ++{ ++ u32 epnum; ++ ++ for (epnum = 1; epnum < DWC3_ENDPOINTS_NUM; epnum++) { ++ struct dwc3_ep *dep; ++ struct dwc3_gadget_ep_cmd_params params; ++ int ret; ++ ++ dep = dwc->eps[epnum]; ++ ++ if (!(dep->flags & DWC3_EP_STALL)) ++ continue; ++ ++ dep->flags &= ~DWC3_EP_STALL; ++ ++ memset(¶ms, 0, sizeof(params)); ++ ret = dwc3_send_gadget_ep_cmd(dwc, dep->number, ++ DWC3_DEPCMD_CLEARSTALL, ¶ms); ++ WARN_ON_ONCE(ret); ++ } ++} ++ ++static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc) ++{ ++ dev_vdbg(dwc->dev, "%s\n", __func__); ++#if 0 ++ XXX ++ U1/U2 is powersave optimization. Skip it for now. Anyway we need to ++ enable it before we can disable it. ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DCTL); ++ reg &= ~DWC3_DCTL_INITU1ENA; ++ dwc3_writel(dwc->regs, DWC3_DCTL, reg); ++ ++ reg &= ~DWC3_DCTL_INITU2ENA; ++ dwc3_writel(dwc->regs, DWC3_DCTL, reg); ++#endif ++ ++ dwc3_stop_active_transfers(dwc); ++ dwc3_disconnect_gadget(dwc); ++ dwc->start_config_issued = false; ++ ++ dwc->gadget.speed = USB_SPEED_UNKNOWN; ++ dwc->setup_packet_pending = false; ++} ++ ++static void dwc3_gadget_usb3_phy_power(struct dwc3 *dwc, int on) ++{ ++ u32 reg; ++ ++ reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); ++ ++ if (on) ++ reg &= ~DWC3_GUSB3PIPECTL_SUSPHY; ++ else ++ reg |= DWC3_GUSB3PIPECTL_SUSPHY; ++ ++ dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); ++} ++ ++static void dwc3_gadget_usb2_phy_power(struct dwc3 *dwc, int on) ++{ ++ u32 reg; ++ ++ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); ++ ++ if (on) ++ reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; ++ else ++ reg |= DWC3_GUSB2PHYCFG_SUSPHY; ++ ++ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); ++} ++ ++static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc) ++{ ++ u32 reg; ++ ++ dev_vdbg(dwc->dev, "%s\n", __func__); ++ ++ /* ++ * WORKAROUND: DWC3 revisions <1.88a have an issue which ++ * would cause a missing Disconnect Event if there's a ++ * pending Setup Packet in the FIFO. ++ * ++ * There's no suggested workaround on the official Bug ++ * report, which states that "unless the driver/application ++ * is doing any special handling of a disconnect event, ++ * there is no functional issue". ++ * ++ * Unfortunately, it turns out that we _do_ some special ++ * handling of a disconnect event, namely complete all ++ * pending transfers, notify gadget driver of the ++ * disconnection, and so on. ++ * ++ * Our suggested workaround is to follow the Disconnect ++ * Event steps here, instead, based on a setup_packet_pending ++ * flag. Such flag gets set whenever we have a XferNotReady ++ * event on EP0 and gets cleared on XferComplete for the ++ * same endpoint. ++ * ++ * Refers to: ++ * ++ * STAR#9000466709: RTL: Device : Disconnect event not ++ * generated if setup packet pending in FIFO ++ */ ++ if (dwc->revision < DWC3_REVISION_188A) { ++ if (dwc->setup_packet_pending) ++ dwc3_gadget_disconnect_interrupt(dwc); ++ } ++ ++ /* Enable PHYs */ ++ dwc3_gadget_usb2_phy_power(dwc, true); ++ dwc3_gadget_usb3_phy_power(dwc, true); ++ ++ if (dwc->gadget.speed != USB_SPEED_UNKNOWN) ++ dwc3_disconnect_gadget(dwc); ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DCTL); ++ reg &= ~DWC3_DCTL_TSTCTRL_MASK; ++ dwc3_writel(dwc->regs, DWC3_DCTL, reg); ++ ++ dwc3_stop_active_transfers(dwc); ++ dwc3_clear_stall_all_ep(dwc); ++ dwc->start_config_issued = false; ++ ++ /* Reset device address to zero */ ++ reg = dwc3_readl(dwc->regs, DWC3_DCFG); ++ reg &= ~(DWC3_DCFG_DEVADDR_MASK); ++ dwc3_writel(dwc->regs, DWC3_DCFG, reg); ++} ++ ++static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed) ++{ ++ u32 reg; ++ u32 usb30_clock = DWC3_GCTL_CLK_BUS; ++ ++ /* ++ * We change the clock only at SS but I dunno why I would want to do ++ * this. Maybe it becomes part of the power saving plan. ++ */ ++ ++ if (speed != DWC3_DSTS_SUPERSPEED) ++ return; ++ ++ /* ++ * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed ++ * each time on Connect Done. ++ */ ++ if (!usb30_clock) ++ return; ++ ++ reg = dwc3_readl(dwc->regs, DWC3_GCTL); ++ reg |= DWC3_GCTL_RAMCLKSEL(usb30_clock); ++ dwc3_writel(dwc->regs, DWC3_GCTL, reg); ++} ++ ++static void dwc3_gadget_disable_phy(struct dwc3 *dwc, u8 speed) ++{ ++ switch (speed) { ++ case USB_SPEED_SUPER: ++ dwc3_gadget_usb2_phy_power(dwc, false); ++ break; ++ case USB_SPEED_HIGH: ++ case USB_SPEED_FULL: ++ case USB_SPEED_LOW: ++ dwc3_gadget_usb3_phy_power(dwc, false); ++ break; ++ } ++} ++ ++static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) ++{ ++ struct dwc3_gadget_ep_cmd_params params; ++ struct dwc3_ep *dep; ++ int ret; ++ u32 reg; ++ u8 speed; ++ ++ dev_vdbg(dwc->dev, "%s\n", __func__); ++ ++ memset(¶ms, 0x00, sizeof(params)); ++ ++ reg = dwc3_readl(dwc->regs, DWC3_DSTS); ++ speed = reg & DWC3_DSTS_CONNECTSPD; ++ dwc->speed = speed; ++ ++ dwc3_update_ram_clk_sel(dwc, speed); ++ ++ switch (speed) { ++ case DWC3_DCFG_SUPERSPEED: ++ /* ++ * WORKAROUND: DWC3 revisions <1.90a have an issue which ++ * would cause a missing USB3 Reset event. ++ * ++ * In such situations, we should force a USB3 Reset ++ * event by calling our dwc3_gadget_reset_interrupt() ++ * routine. ++ * ++ * Refers to: ++ * ++ * STAR#9000483510: RTL: SS : USB3 reset event may ++ * not be generated always when the link enters poll ++ */ ++ if (dwc->revision < DWC3_REVISION_190A) ++ dwc3_gadget_reset_interrupt(dwc); ++ ++ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); ++ dwc->gadget.ep0->maxpacket = 512; ++ dwc->gadget.speed = USB_SPEED_SUPER; ++ break; ++ case DWC3_DCFG_HIGHSPEED: ++ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64); ++ dwc->gadget.ep0->maxpacket = 64; ++ dwc->gadget.speed = USB_SPEED_HIGH; ++ break; ++ case DWC3_DCFG_FULLSPEED2: ++ case DWC3_DCFG_FULLSPEED1: ++ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64); ++ dwc->gadget.ep0->maxpacket = 64; ++ dwc->gadget.speed = USB_SPEED_FULL; ++ break; ++ case DWC3_DCFG_LOWSPEED: ++ dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(8); ++ dwc->gadget.ep0->maxpacket = 8; ++ dwc->gadget.speed = USB_SPEED_LOW; ++ break; ++ } ++ ++ /* Disable unneded PHY */ ++ dwc3_gadget_disable_phy(dwc, dwc->gadget.speed); ++ ++ dep = dwc->eps[0]; ++ ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); ++ if (ret) { ++ dev_err(dwc->dev, "failed to enable %s\n", dep->name); ++ return; ++ } ++ ++ dep = dwc->eps[1]; ++ ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); ++ if (ret) { ++ dev_err(dwc->dev, "failed to enable %s\n", dep->name); ++ return; ++ } ++ ++ /* ++ * Configure PHY via GUSB3PIPECTLn if required. ++ * ++ * Update GTXFIFOSIZn ++ * ++ * In both cases reset values should be sufficient. ++ */ ++} ++ ++static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc) ++{ ++ dev_vdbg(dwc->dev, "%s\n", __func__); ++ ++ /* ++ * TODO take core out of low power mode when that's ++ * implemented. ++ */ ++ ++ dwc->gadget_driver->resume(&dwc->gadget); ++} ++ ++static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc, ++ unsigned int evtinfo) ++{ ++ enum dwc3_link_state next = evtinfo & DWC3_LINK_STATE_MASK; ++ ++ /* ++ * WORKAROUND: DWC3 Revisions <1.83a have an issue which, depending ++ * on the link partner, the USB session might do multiple entry/exit ++ * of low power states before a transfer takes place. ++ * ++ * Due to this problem, we might experience lower throughput. The ++ * suggested workaround is to disable DCTL[12:9] bits if we're ++ * transitioning from U1/U2 to U0 and enable those bits again ++ * after a transfer completes and there are no pending transfers ++ * on any of the enabled endpoints. ++ * ++ * This is the first half of that workaround. ++ * ++ * Refers to: ++ * ++ * STAR#9000446952: RTL: Device SS : if U1/U2 ->U0 takes >128us ++ * core send LGO_Ux entering U0 ++ */ ++ if (dwc->revision < DWC3_REVISION_183A) { ++ if (next == DWC3_LINK_STATE_U0) { ++ u32 u1u2; ++ u32 reg; ++ ++ switch (dwc->link_state) { ++ case DWC3_LINK_STATE_U1: ++ case DWC3_LINK_STATE_U2: ++ reg = dwc3_readl(dwc->regs, DWC3_DCTL); ++ u1u2 = reg & (DWC3_DCTL_INITU2ENA ++ | DWC3_DCTL_ACCEPTU2ENA ++ | DWC3_DCTL_INITU1ENA ++ | DWC3_DCTL_ACCEPTU1ENA); ++ ++ if (!dwc->u1u2) ++ dwc->u1u2 = reg & u1u2; ++ ++ reg &= ~u1u2; ++ ++ dwc3_writel(dwc->regs, DWC3_DCTL, reg); ++ break; ++ default: ++ /* do nothing */ ++ break; ++ } ++ } ++ } ++ ++ dwc->link_state = next; ++ ++ dev_vdbg(dwc->dev, "%s link %d\n", __func__, dwc->link_state); ++} ++ ++static void dwc3_gadget_interrupt(struct dwc3 *dwc, ++ const struct dwc3_event_devt *event) ++{ ++ switch (event->type) { ++ case DWC3_DEVICE_EVENT_DISCONNECT: ++ dwc3_gadget_disconnect_interrupt(dwc); ++ break; ++ case DWC3_DEVICE_EVENT_RESET: ++ dwc3_gadget_reset_interrupt(dwc); ++ break; ++ case DWC3_DEVICE_EVENT_CONNECT_DONE: ++ dwc3_gadget_conndone_interrupt(dwc); ++ break; ++ case DWC3_DEVICE_EVENT_WAKEUP: ++ dwc3_gadget_wakeup_interrupt(dwc); ++ break; ++ case DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE: ++ dwc3_gadget_linksts_change_interrupt(dwc, event->event_info); ++ break; ++ case DWC3_DEVICE_EVENT_EOPF: ++ dev_vdbg(dwc->dev, "End of Periodic Frame\n"); ++ break; ++ case DWC3_DEVICE_EVENT_SOF: ++ dev_vdbg(dwc->dev, "Start of Periodic Frame\n"); ++ break; ++ case DWC3_DEVICE_EVENT_ERRATIC_ERROR: ++ dev_vdbg(dwc->dev, "Erratic Error\n"); ++ break; ++ case DWC3_DEVICE_EVENT_CMD_CMPL: ++ dev_vdbg(dwc->dev, "Command Complete\n"); ++ break; ++ case DWC3_DEVICE_EVENT_OVERFLOW: ++ dev_vdbg(dwc->dev, "Overflow\n"); ++ break; ++ default: ++ dev_dbg(dwc->dev, "UNKNOWN IRQ %d\n", event->type); ++ } ++} ++ ++static void dwc3_process_event_entry(struct dwc3 *dwc, ++ const union dwc3_event *event) ++{ ++ /* Endpoint IRQ, handle it and return early */ ++ if (event->type.is_devspec == 0) { ++ /* depevt */ ++ return dwc3_endpoint_interrupt(dwc, &event->depevt); ++ } ++ ++ switch (event->type.type) { ++ case DWC3_EVENT_TYPE_DEV: ++ dwc3_gadget_interrupt(dwc, &event->devt); ++ break; ++ /* REVISIT what to do with Carkit and I2C events ? */ ++ default: ++ dev_err(dwc->dev, "UNKNOWN IRQ type %d\n", event->raw); ++ } ++} ++ ++static irqreturn_t dwc3_process_event_buf(struct dwc3 *dwc, u32 buf) ++{ ++ struct dwc3_event_buffer *evt; ++ int left; ++ u32 count; ++ ++ count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(buf)); ++ count &= DWC3_GEVNTCOUNT_MASK; ++ if (!count) ++ return IRQ_NONE; ++ ++ evt = dwc->ev_buffs[buf]; ++ left = count; ++ ++ while (left > 0) { ++ union dwc3_event event; ++ ++ memcpy(&event.raw, (evt->buf + evt->lpos), sizeof(event.raw)); ++ dwc3_process_event_entry(dwc, &event); ++ /* ++ * XXX we wrap around correctly to the next entry as almost all ++ * entries are 4 bytes in size. There is one entry which has 12 ++ * bytes which is a regular entry followed by 8 bytes data. ATM ++ * I don't know how things are organized if were get next to the ++ * a boundary so I worry about that once we try to handle that. ++ */ ++ evt->lpos = (evt->lpos + 4) % DWC3_EVENT_BUFFERS_SIZE; ++ left -= 4; ++ ++ dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(buf), 4); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++irqreturn_t dwc3_interrupt(int irq, void *_dwc) ++{ ++ struct dwc3 *dwc = _dwc; ++ int i; ++ irqreturn_t ret = IRQ_NONE; ++ ++ spin_lock(&dwc->lock); ++ ++ for (i = 0; i < dwc->num_event_buffers; i++) { ++ irqreturn_t status; ++ ++ status = dwc3_process_event_buf(dwc, i); ++ if (status == IRQ_HANDLED) ++ ret = status; ++ } ++ ++ spin_unlock(&dwc->lock); ++ ++ return ret; ++} ++ ++/** ++ * dwc3_gadget_init - Initializes gadget related registers ++ * @dwc: Pointer to out controller context structure ++ * ++ * Returns 0 on success otherwise negative errno. ++ */ ++int __devinit dwc3_gadget_init(struct dwc3 *dwc) ++{ ++ u32 reg; ++ int ret; ++ ++ dwc->ctrl_req = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ctrl_req), ++ &dwc->ctrl_req_addr, GFP_KERNEL); ++ if (!dwc->ctrl_req) { ++ dev_err(dwc->dev, "failed to allocate ctrl request\n"); ++ ret = -ENOMEM; ++ goto err0; ++ } ++ ++ dwc->ep0_trb = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ep0_trb), ++ &dwc->ep0_trb_addr, GFP_KERNEL); ++ if (!dwc->ep0_trb) { ++ dev_err(dwc->dev, "failed to allocate ep0 trb\n"); ++ ret = -ENOMEM; ++ goto err1; ++ } ++ ++ dwc->setup_buf = dma_alloc_coherent(dwc->dev, ++ sizeof(*dwc->setup_buf) * 2, ++ &dwc->setup_buf_addr, GFP_KERNEL); ++ if (!dwc->setup_buf) { ++ dev_err(dwc->dev, "failed to allocate setup buffer\n"); ++ ret = -ENOMEM; ++ goto err2; ++ } ++ ++ dwc->ep0_bounce = dma_alloc_coherent(dwc->dev, ++ 512, &dwc->ep0_bounce_addr, GFP_KERNEL); ++ if (!dwc->ep0_bounce) { ++ dev_err(dwc->dev, "failed to allocate ep0 bounce buffer\n"); ++ ret = -ENOMEM; ++ goto err3; ++ } ++ ++ dev_set_name(&dwc->gadget.dev, "gadget"); ++ ++ dwc->gadget.ops = &dwc3_gadget_ops; ++ dwc->gadget.is_dualspeed = true; ++ dwc->gadget.speed = USB_SPEED_UNKNOWN; ++ ++ dwc->gadget.name = "dwc3-gadget"; ++ ++ the_dwc = dwc; ++ ++ /* ++ * REVISIT: Here we should clear all pending IRQs to be ++ * sure we're starting from a well known location. ++ */ ++ ++ ret = dwc3_gadget_init_endpoints(dwc); ++ if (ret) ++ goto err4; ++ ++ /* Enable all but Start and End of Frame IRQs */ ++ reg = (DWC3_DEVTEN_VNDRDEVTSTRCVEDEN | ++ DWC3_DEVTEN_EVNTOVERFLOWEN | ++ DWC3_DEVTEN_CMDCMPLTEN | ++ DWC3_DEVTEN_ERRTICERREN | ++ DWC3_DEVTEN_WKUPEVTEN | ++ DWC3_DEVTEN_ULSTCNGEN | ++ DWC3_DEVTEN_CONNECTDONEEN | ++ DWC3_DEVTEN_USBRSTEN | ++ DWC3_DEVTEN_DISCONNEVTEN); ++ dwc3_writel(dwc->regs, DWC3_DEVTEN, reg); ++ return 0; ++ ++ device_unregister(&dwc->gadget.dev); ++ dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00); ++ dwc3_gadget_free_endpoints(dwc); ++ ++err4: ++ dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce, ++ dwc->ep0_bounce_addr); ++ ++err3: ++ dma_free_coherent(dwc->dev, sizeof(*dwc->setup_buf) * 2, ++ dwc->setup_buf, dwc->setup_buf_addr); ++ ++err2: ++ dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb), ++ dwc->ep0_trb, dwc->ep0_trb_addr); ++ ++err1: ++ dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req), ++ dwc->ctrl_req, dwc->ctrl_req_addr); ++ ++err0: ++ return ret; ++} ++ ++void dwc3_gadget_exit(struct dwc3 *dwc) ++{ ++ dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00); ++ ++ dwc3_gadget_free_endpoints(dwc); ++ ++ dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce, ++ dwc->ep0_bounce_addr); ++ ++ dma_free_coherent(dwc->dev, sizeof(*dwc->setup_buf) * 2, ++ dwc->setup_buf, dwc->setup_buf_addr); ++ ++ dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb), ++ dwc->ep0_trb, dwc->ep0_trb_addr); ++ ++ dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req), ++ dwc->ctrl_req, dwc->ctrl_req_addr); ++ ++ device_unregister(&dwc->gadget.dev); ++ ++ the_dwc = NULL; ++} ++ ++/* -------------------------------------------------------------------------- */ ++ ++int usb_gadget_register_driver(struct usb_gadget_driver *driver) ++{ ++ return usb_gadget_probe_driver(driver, driver->bind); ++} ++ ++/** ++ * usb_gadget_unregister_driver - unregisters a gadget driver. ++ * @driver: the gadget driver to unregister ++ */ ++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) ++{ ++ struct dwc3 *dwc = the_dwc; ++ unsigned long flags; ++ ++ if (!driver || !driver->unbind) ++ return -EINVAL; ++ ++ if (!dwc) ++ return -ENODEV; ++ ++ if (dwc->gadget_driver != driver) ++ return -EINVAL; ++ ++ driver->disconnect(&dwc->gadget); ++ driver->unbind(&dwc->gadget); ++ ++ spin_lock_irqsave(&dwc->lock, flags); ++ ++ dwc->gadget_driver = NULL; ++ ++ spin_unlock_irqrestore(&dwc->lock, flags); ++ ++ return 0; ++} +diff --git a/drivers/usb/dwc3/dwc3_host.c b/drivers/usb/dwc3/dwc3_host.c +new file mode 100644 +index 0000000..7cfe211 +--- /dev/null ++++ b/drivers/usb/dwc3/dwc3_host.c +@@ -0,0 +1,102 @@ ++/** ++ * host.c - DesignWare USB3 DRD Controller Host Glue ++ * ++ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++ ++#include "core.h" ++ ++static struct resource generic_resources[] = { ++ { ++ .flags = IORESOURCE_IRQ, ++ }, ++ { ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++int dwc3_host_init(struct dwc3 *dwc) ++{ ++ struct platform_device *xhci; ++ int ret; ++ ++ xhci = platform_device_alloc("xhci", -1); ++ if (!xhci) { ++ dev_err(dwc->dev, "couldn't allocate xHCI device\n"); ++ ret = -ENOMEM; ++ goto err0; ++ } ++ ++ dma_set_coherent_mask(&xhci->dev, dwc->dev->coherent_dma_mask); ++ ++ xhci->dev.parent = dwc->dev; ++ xhci->dev.dma_mask = dwc->dev->dma_mask; ++ xhci->dev.dma_parms = dwc->dev->dma_parms; ++ ++ dwc->xhci = xhci; ++ ++ /* setup resources */ ++ generic_resources[0].start = dwc->irq; ++ ++ generic_resources[1].start = dwc->res->start; ++ generic_resources[1].end = dwc->res->start + 0x7fff; ++ ++ ret = platform_device_add_resources(xhci, generic_resources, ++ ARRAY_SIZE(generic_resources)); ++ if (ret) { ++ dev_err(dwc->dev, "couldn't add resources to xHCI device\n"); ++ goto err1; ++ } ++ ++ ret = platform_device_add(xhci); ++ if (ret) { ++ dev_err(dwc->dev, "failed to register xHCI device\n"); ++ goto err1; ++ } ++ ++ return 0; ++ ++err1: ++ platform_device_put(xhci); ++ ++err0: ++ return ret; ++} ++ ++void dwc3_host_exit(struct dwc3 *dwc) ++{ ++ platform_device_unregister(dwc->xhci); ++} +diff --git a/drivers/usb/dwc3/dwc3_misc.c b/drivers/usb/dwc3/dwc3_misc.c +new file mode 100644 +index 0000000..628e11e +--- /dev/null ++++ b/drivers/usb/dwc3/dwc3_misc.c +@@ -0,0 +1,20 @@ ++#include ++ ++#include ++#include ++ ++#include "misc.h" ++#if 0 ++int snprintf(char *buf, size_t size, const char *fmt, ...) ++{ ++ va_list args; ++ int i; ++ ++ va_start(args, fmt); ++ i = vsprintf(buf, fmt, args); ++ va_end(args); ++ if (i > size) ++ printf("*** Wrote too much bytes into the buffer ***\n"); ++ return i; ++} ++#endif +diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h +new file mode 100644 +index 0000000..d97f467 +--- /dev/null ++++ b/drivers/usb/dwc3/gadget.h +@@ -0,0 +1,186 @@ ++/** ++ * gadget.h - DesignWare USB3 DRD Gadget Header ++ * ++ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * Sebastian Andrzej Siewior ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef __DRIVERS_USB_DWC3_GADGET_H ++#define __DRIVERS_USB_DWC3_GADGET_H ++ ++#include ++#include ++#include "io.h" ++ ++struct dwc3; ++#define to_dwc3_ep(ep) (container_of(ep, struct dwc3_ep, endpoint)) ++#define gadget_to_dwc(g) (container_of(g, struct dwc3, gadget)) ++ ++/* DEPCFG parameter 1 */ ++#define DWC3_DEPCFG_INT_NUM(n) ((n) << 0) ++#define DWC3_DEPCFG_XFER_COMPLETE_EN (1 << 8) ++#define DWC3_DEPCFG_XFER_IN_PROGRESS_EN (1 << 9) ++#define DWC3_DEPCFG_XFER_NOT_READY_EN (1 << 10) ++#define DWC3_DEPCFG_FIFO_ERROR_EN (1 << 11) ++#define DWC3_DEPCFG_STREAM_EVENT_EN (1 << 13) ++#define DWC3_DEPCFG_BINTERVAL_M1(n) ((n) << 16) ++#define DWC3_DEPCFG_STREAM_CAPABLE (1 << 24) ++#define DWC3_DEPCFG_EP_NUMBER(n) ((n) << 25) ++#define DWC3_DEPCFG_BULK_BASED (1 << 30) ++#define DWC3_DEPCFG_FIFO_BASED (1 << 31) ++ ++/* DEPCFG parameter 0 */ ++#define DWC3_DEPCFG_EP_TYPE(n) ((n) << 1) ++#define DWC3_DEPCFG_MAX_PACKET_SIZE(n) ((n) << 3) ++#define DWC3_DEPCFG_FIFO_NUMBER(n) ((n) << 17) ++#define DWC3_DEPCFG_BURST_SIZE(n) ((n) << 22) ++#define DWC3_DEPCFG_DATA_SEQ_NUM(n) ((n) << 26) ++#define DWC3_DEPCFG_IGN_SEQ_NUM (1 << 31) ++ ++/* DEPXFERCFG parameter 0 */ ++#define DWC3_DEPXFERCFG_NUM_XFER_RES(n) ((n) & 0xffff) ++ ++struct dwc3_gadget_ep_cmd_params { ++ u32 param2; ++ u32 param1; ++ u32 param0; ++}; ++ ++/* -------------------------------------------------------------------------- */ ++ ++#define to_dwc3_request(r) (container_of(r, struct dwc3_request, request)) ++ ++static inline struct dwc3_request *next_request(struct list_head *list) ++{ ++ if (list_empty(list)) ++ return NULL; ++ ++ return list_first_entry(list, struct dwc3_request, list); ++} ++ ++static inline void dwc3_gadget_move_request_queued(struct dwc3_request *req) ++{ ++ struct dwc3_ep *dep = req->dep; ++ ++ req->queued = true; ++ list_move_tail(&req->list, &dep->req_queued); ++} ++ ++void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, ++ int status); ++ ++void dwc3_ep0_interrupt(struct dwc3 *dwc, ++ const struct dwc3_event_depevt *event); ++void dwc3_ep0_out_start(struct dwc3 *dwc); ++int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request, ++ gfp_t gfp_flags); ++int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value); ++int dwc3_send_gadget_ep_cmd(struct dwc3 *dwc, unsigned ep, ++ unsigned cmd, struct dwc3_gadget_ep_cmd_params *params); ++void dwc3_map_buffer_to_dma(struct dwc3_request *req); ++void dwc3_unmap_buffer_from_dma(struct dwc3_request *req); ++ ++/** ++ * dwc3_gadget_ep_get_transfer_index - Gets transfer index from HW ++ * @dwc: DesignWare USB3 Pointer ++ * @number: DWC endpoint number ++ * ++ * Caller should take care of locking ++ */ ++static inline u32 dwc3_gadget_ep_get_transfer_index(struct dwc3 *dwc, u8 number) ++{ ++ u32 res_id; ++ ++ res_id = dwc3_readl(dwc->regs, DWC3_DEPCMD(number)); ++ ++ return DWC3_DEPCMD_GET_RSC_IDX(res_id); ++} ++ ++/** ++ * dwc3_gadget_event_string - returns event name ++ * @event: the event code ++ */ ++static inline const char *dwc3_gadget_event_string(u8 event) ++{ ++ switch (event) { ++ case DWC3_DEVICE_EVENT_DISCONNECT: ++ return "Disconnect"; ++ case DWC3_DEVICE_EVENT_RESET: ++ return "Reset"; ++ case DWC3_DEVICE_EVENT_CONNECT_DONE: ++ return "Connection Done"; ++ case DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE: ++ return "Link Status Change"; ++ case DWC3_DEVICE_EVENT_WAKEUP: ++ return "WakeUp"; ++ case DWC3_DEVICE_EVENT_EOPF: ++ return "End-Of-Frame"; ++ case DWC3_DEVICE_EVENT_SOF: ++ return "Start-Of-Frame"; ++ case DWC3_DEVICE_EVENT_ERRATIC_ERROR: ++ return "Erratic Error"; ++ case DWC3_DEVICE_EVENT_CMD_CMPL: ++ return "Command Complete"; ++ case DWC3_DEVICE_EVENT_OVERFLOW: ++ return "Overflow"; ++ } ++ ++ return "UNKNOWN"; ++} ++ ++/** ++ * dwc3_ep_event_string - returns event name ++ * @event: then event code ++ */ ++static inline const char *dwc3_ep_event_string(u8 event) ++{ ++ switch (event) { ++ case DWC3_DEPEVT_XFERCOMPLETE: ++ return "Transfer Complete"; ++ case DWC3_DEPEVT_XFERINPROGRESS: ++ return "Transfer In-Progress"; ++ case DWC3_DEPEVT_XFERNOTREADY: ++ return "Transfer Not Ready"; ++ case DWC3_DEPEVT_RXTXFIFOEVT: ++ return "FIFO"; ++ case DWC3_DEPEVT_STREAMEVT: ++ return "Stream"; ++ case DWC3_DEPEVT_EPCMDCMPLT: ++ return "Endpoint Command Complete"; ++ } ++ ++ return "UNKNOWN"; ++} ++ ++#endif /* __DRIVERS_USB_DWC3_GADGET_H */ +diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h +new file mode 100644 +index 0000000..bc957db +--- /dev/null ++++ b/drivers/usb/dwc3/io.h +@@ -0,0 +1,54 @@ ++/** ++ * io.h - DesignWare USB3 DRD IO Header ++ * ++ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com ++ * ++ * Authors: Felipe Balbi , ++ * Sebastian Andrzej Siewior ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef __DRIVERS_USB_DWC3_IO_H ++#define __DRIVERS_USB_DWC3_IO_H ++ ++#include ++ ++static inline u32 dwc3_readl(void __iomem *base, u32 offset) ++{ ++ return readl(base + offset); ++} ++ ++static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value) ++{ ++ writel(value, base + offset); ++} ++ ++#endif /* __DRIVERS_USB_DWC3_IO_H */ +diff --git a/drivers/usb/dwc3/misc.h b/drivers/usb/dwc3/misc.h +new file mode 100644 +index 0000000..da9012c +--- /dev/null ++++ b/drivers/usb/dwc3/misc.h +@@ -0,0 +1,269 @@ ++#ifndef dwc3_misc_h ++#define dwc3_misc_h ++ ++#include ++#include ++#include ++#include ++ ++#define DWC3_USB_REGS_SIZE (CONFIG_USB_DWC3_UDC_REGS - \ ++ CONFIG_USB_DWC3_UDC_REGS_END + 1) ++#define DWC3_WRAPPER_REGS_SIZE (CONFIG_USB_DWC3_WRAP_REGS - \ ++ CONFIG_USB_DWC3_WRAP_REGS_END + 1) ++ ++#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) ++#define lower_32_bits(n) ((u32)(n)) ++ ++extern struct dwc3 *global_dwc3; ++ ++typedef int mutex_t; ++typedef int spinlock_t; ++/* ++enum { ++ false = 0, ++ true = 1 ++}; ++typedef unsigned int bool; ++*/ ++#define min_t(type, x, y) ({ \ ++ type __min1 = (x); \ ++ type __min2 = (y); \ ++ __min1 < __min2 ? __min1: __min2; }) ++ ++#define __init ++#define __devinit ++#define __devinitconst ++#define __devexit ++ ++static inline void *dma_alloc_coherent(void *dev, size_t size, ++ dma_addr_t *dma_handle, gfp_t gfp) ++{ ++ void *p; ++ ++ p = malloc(size); ++ *dma_handle = (unsigned long)p; ++ return p; ++} ++ ++ ++static inline void dma_free_coherent(struct device *dev, size_t size, ++ void *vaddr, dma_addr_t bus) ++{ ++ free(vaddr); ++} ++ ++static inline void kfree(void *p) ++{ ++ free(p); ++} ++ ++static inline void *kzalloc(unsigned int size, unsigned int flags) ++{ ++ void *p; ++ ++ p = malloc(size); ++ memset(p, 0, size); ++ return p; ++} ++ ++#define GFP_KERNEL 0 ++ ++#define MAX_ERRNO 4095 ++ ++#define IS_ERR_VALUE(x) unlikely((x) >= (unsigned long)-MAX_ERRNO) ++ ++static inline void *ERR_PTR(long error) ++{ ++ return (void *) error; ++} ++ ++static inline long PTR_ERR(const void *ptr) ++{ ++ return (long) ptr; ++} ++ ++static inline long IS_ERR(const void *ptr) ++{ ++ return IS_ERR_VALUE((unsigned long)ptr); ++} ++ ++#define dev_err(dev, format, ...) printf(format, ## __VA_ARGS__) ++#if 0 ++#define dev_dbg(dev, format, ...) printf(format, ## __VA_ARGS__) ++#define dev_vdbg(dev, format, ...) printf(format, ## __VA_ARGS__) ++#define pr_debug(format, ...) printf(format, ## __VA_ARGS__) ++#else ++static inline void dwc3_valength_dummy(void *p, char *fmt, ...) {} ++#define dev_dbg(dev, format, ...) dwc3_valength_dummy(dev, format, ## __VA_ARGS__) ++#define dev_vdbg(dev, format, ...) dwc3_valength_dummy(dev, format, ## __VA_ARGS__) ++#define pr_debug(format, ...) dwc3_valength_dummy(NULL, format, ## __VA_ARGS__) ++#endif ++ ++static inline void pm_runtime_enable(struct device *dev) {} ++static inline void pm_runtime_get_sync(struct device *dev) {} ++static inline void pm_runtime_forbid(struct device *dev) {} ++static inline void pm_runtime_allow(struct device *dev) {} ++ ++#define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a))) ++ ++#define PAGE_SHIFT 12 ++#define PAGE_SIZE (1UL << PAGE_SHIFT) ++#define PAGE_MASK (~(PAGE_SIZE-1)) ++ ++struct platform_device { ++ struct device dev; ++}; ++ ++static inline void __arch_iounmap(void *p) {} ++ ++#define cpu_relax() asm volatile("" ::: "memory") ++ ++enum dma_data_direction { ++ DMA_BIDIRECTIONAL = 0, ++ DMA_TO_DEVICE = 1, ++ DMA_FROM_DEVICE = 2, ++}; ++ ++static inline dma_addr_t dma_map_single(struct device *dev, void *ptr, ++ size_t size, ++ enum dma_data_direction dir) ++{ ++ return (unsigned long)ptr; ++} ++ ++static inline void dma_unmap_single(struct device *dev, dma_addr_t addr, ++ size_t size, ++ enum dma_data_direction dir) ++{ ++} ++ ++static inline void dma_sync_single_for_device(struct device *dev, ++ dma_addr_t addr, size_t size, ++ enum dma_data_direction dir) ++{ ++} ++static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, ++ size_t size, ++ enum dma_data_direction dir) ++{ ++} ++ ++static inline int device_register(struct device *dev) ++{ ++ return 0; ++} ++ ++static inline void device_unregister(struct device *dev) ++{ ++} ++ ++static inline int dev_set_name(struct device *dev, const char *fmt, ...) ++{ ++ return 0; ++} ++ ++#define spin_lock(x) ++#define spin_unlock(x) ++#define spin_lock_irqsave(x, y) y = 0; ++#define spin_unlock_irqrestore(x, y) ++#if 0 ++static inline void mdelay(unsigned int msec) ++{ ++ int i; ++ ++ /* XXX VirtIO currently hangs on udelay(10+) */ ++ for (i = 0; i < msec; i++) ++ udelay(5); ++} ++#endif ++static inline void msleep(unsigned int msec) ++{ ++ mdelay(msec); ++} ++ ++static inline void usleep_range(unsigned long min, unsigned long max) ++{ ++ udelay(min); ++} ++ ++#define container_of(ptr, type, member) ({ \ ++ const typeof( ((type *)0)->member ) *__mptr = (ptr); \ ++ (type *)( (char *)__mptr - offsetof(type,member) );}) ++ ++#define __WARN_printf(arg...) do { printf("WarnON() in %s: %s(%d)\n", __FILE__, __func__, __LINE__); printf(arg); } while (0) ++ ++#define WARN(condition, format...) ({ \ ++ int __ret_warn_on = !!(condition); \ ++ if (unlikely(__ret_warn_on)) \ ++ __WARN_printf(format); \ ++ unlikely(__ret_warn_on); \ ++ }) ++ ++#define WARN_ONCE(condition, format...) ({ \ ++ static bool __warned; \ ++ int __ret_warn_once = !!(condition); \ ++ \ ++ if (unlikely(__ret_warn_once)) \ ++ if (WARN(!__warned, format)) \ ++ __warned = true; \ ++ unlikely(__ret_warn_once); \ ++ }) ++ ++#define dev_WARN_ONCE(dev, condition, format, arg...) \ ++ WARN_ONCE(condition, format, ## arg) ++ ++#define WARN_ON(condition) ({ \ ++ int __ret_warn_on = !!(condition); \ ++ if (unlikely(__ret_warn_on)) \ ++ printf("WarnON() in %s: %s(%d)\n", __FILE__, __func__, __LINE__); \ ++ unlikely(__ret_warn_on); \ ++ }) ++ ++#define WARN_ON_ONCE(condition) ({ \ ++ static bool __warned; \ ++ int __ret_warn_once = !!(condition); \ ++ \ ++ if (unlikely(__ret_warn_once)) \ ++ if (WARN_ON(!__warned)) \ ++ __warned = true; \ ++ unlikely(__ret_warn_once); \ ++ }) ++ ++#define BUILD_BUG_ON_NOT_POWER_OF_2(n) \ ++ BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0)) ++#if 0 ++/* never do isoc */ ++static inline int usb_endpoint_xfer_isoc( ++ const struct usb_endpoint_descriptor *epd) ++{ ++ return 0; ++} ++static inline int usb_endpoint_type(const struct usb_endpoint_descriptor *epd) ++{ ++ return epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; ++} ++#endif ++ ++enum irqreturn { ++ IRQ_NONE, ++ IRQ_HANDLED, ++ IRQ_WAKE_THREAD, ++}; ++ ++typedef enum irqreturn irqreturn_t; ++ ++int usb_gadget_probe_driver(struct usb_gadget_driver *driver, ++ int (*bind)(struct usb_gadget *)); ++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver); ++ ++struct dwc3; ++int snprintf(char *buf, size_t size, const char *fmt, ...); ++int __devinit dwc3_probe(struct platform_device *pdev); ++int __devexit dwc3_remove(struct platform_device *pdev); ++ ++extern unsigned int dwc3_cable_connected; ++extern unsigned int dwc3_high_speed; ++ ++#define USB_GADGET_DELAYED_STATUS 0x7fff /* Impossibly large value */ ++ ++#endif +diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile +index 804a2bd..1ada7bb 100644 +--- a/drivers/usb/gadget/Makefile ++++ b/drivers/usb/gadget/Makefile +@@ -17,6 +17,7 @@ obj-$(CONFIG_THOR_FUNCTION) += f_thor.o + obj-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o + obj-$(CONFIG_DFU_FUNCTION) += f_dfu.o + obj-$(CONFIG_USB_GADGET_MASS_STORAGE) += f_mass_storage.o ++obj-$(CONFIG_USB_FASTBOOT) += f_fastboot.o u_fastboot.o + endif + ifdef CONFIG_USB_ETHER + obj-y += ether.o +diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c +index de75ff1..3b8b48b 100644 +--- a/drivers/usb/gadget/f_dfu.c ++++ b/drivers/usb/gadget/f_dfu.c +@@ -601,6 +601,7 @@ dfu_handle(struct usb_function *f, const struct usb_ctrlrequest *ctrl) + (w_value >> 8) == DFU_DT_FUNC) { + value = min(len, (u16) sizeof(dfu_func)); + memcpy(req->buf, &dfu_func, value); ++ dfu_trigger_enum_done(); + } + } else /* DFU specific request */ + value = dfu_state[f_dfu->dfu_state] (f_dfu, ctrl, gadget, req); +diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c +new file mode 100644 +index 0000000..7570440 +--- /dev/null ++++ b/drivers/usb/gadget/f_fastboot.c +@@ -0,0 +1,559 @@ ++/* ++ * (C) Copyright 2008 - 2009 ++ * Windriver, ++ * Tom Rix ++ * ++ * Copyright (c) 2011 Sebastian Andrzej Siewior ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "g_fastboot.h" ++ ++#define CONFIGURATION_NORMAL 1 ++#define BULK_ENDPOINT 1 ++#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_2_0 (0x0200) ++#define RX_ENDPOINT_MAXIMUM_PACKET_SIZE_1_1 (0x0040) ++#define TX_ENDPOINT_MAXIMUM_PACKET_SIZE (0x0040) ++ ++static struct usb_string def_usb_fb_strings[] = { ++ { FB_STR_PRODUCT_IDX, "Default Product" }, ++ { FB_STR_SERIAL_IDX, "1234567890" }, ++ { FB_STR_CONFIG_IDX, "Android Fastboot" }, ++ { FB_STR_INTERFACE_IDX, "Android Fastboot" }, ++ { FB_STR_MANUFACTURER_IDX, "Default Manufacturer" }, ++ { FB_STR_PROC_REV_IDX, "Default 1.0" }, ++ { FB_STR_PROC_TYPE_IDX, "Emulator" }, ++ { } ++}; ++ ++static struct usb_gadget_strings def_fb_strings = { ++ .language = 0x0409, /* en-us */ ++ .strings = def_usb_fb_strings, ++}; ++ ++static struct usb_gadget_strings *vendor_fb_strings; ++ ++static unsigned int gadget_is_connected; ++ ++static u8 ep0_buffer[512]; ++static u8 ep_out_buffer[EP_BUFFER_SIZE]; ++static u8 ep_in_buffer[EP_BUFFER_SIZE]; ++static int current_config; ++ ++/* e1 */ ++static struct usb_endpoint_descriptor fs_ep_in = { ++ .bLength = USB_DT_ENDPOINT_SIZE, ++ .bDescriptorType = USB_DT_ENDPOINT, ++ .bEndpointAddress = USB_DIR_IN, /* IN */ ++ .bmAttributes = USB_ENDPOINT_XFER_BULK, ++ .wMaxPacketSize = TX_ENDPOINT_MAXIMUM_PACKET_SIZE, ++ .bInterval = 0x00, ++}; ++ ++/* e2 */ ++static struct usb_endpoint_descriptor fs_ep_out = { ++ .bLength = USB_DT_ENDPOINT_SIZE, ++ .bDescriptorType = USB_DT_ENDPOINT, ++ .bEndpointAddress = USB_DIR_OUT, /* OUT */ ++ .bmAttributes = USB_ENDPOINT_XFER_BULK, ++ .wMaxPacketSize = RX_ENDPOINT_MAXIMUM_PACKET_SIZE_1_1, ++ .bInterval = 0x00, ++}; ++ ++static struct usb_endpoint_descriptor hs_ep_out = { ++ .bLength = USB_DT_ENDPOINT_SIZE, ++ .bDescriptorType = USB_DT_ENDPOINT, ++ .bEndpointAddress = USB_DIR_OUT, /* OUT */ ++ .bmAttributes = USB_ENDPOINT_XFER_BULK, ++ .wMaxPacketSize = RX_ENDPOINT_MAXIMUM_PACKET_SIZE_2_0, ++ .bInterval = 0x00, ++}; ++ ++const char *fb_find_usb_string(unsigned int id) ++{ ++ struct usb_string *s; ++ ++ for (s = vendor_fb_strings->strings; s && s->s; s++) { ++ if (s->id == id) ++ break; ++ } ++ if (!s || !s->s) { ++ for (s = def_fb_strings.strings; s && s->s; s++) { ++ if (s->id == id) ++ break; ++ } ++ } ++ if (!s) ++ return NULL; ++ return s->s; ++} ++ ++static struct usb_gadget *g; ++static struct usb_request *ep0_req; ++ ++struct usb_ep *ep_in; ++struct usb_request *req_in; ++ ++struct usb_ep *ep_out; ++struct usb_request *req_out; ++ ++static void fastboot_ep0_complete(struct usb_ep *ep, struct usb_request *req) ++{ ++ int status = req->status; ++ ++ if (!status) ++ return; ++ printf("ep0 status %d\n", status); ++} ++ ++static int fastboot_bind(struct usb_gadget *gadget) ++{ ++ ++ g = gadget; ++ ep0_req = usb_ep_alloc_request(g->ep0, 0); ++ if (!ep0_req) ++ goto err; ++ ep0_req->buf = ep0_buffer; ++ ep0_req->complete = fastboot_ep0_complete; ++ ++ ep_in = usb_ep_autoconfig(gadget, &fs_ep_in); ++ if (!ep_in) ++ goto err; ++ ep_in->driver_data = ep_in; ++ ++ ep_out = usb_ep_autoconfig(gadget, &fs_ep_out); ++ if (!ep_out) ++ goto err; ++ ep_out->driver_data = ep_out; ++ ++ hs_ep_out.bEndpointAddress = fs_ep_out.bEndpointAddress; ++ return 0; ++err: ++ return -1; ++} ++ ++static void fastboot_unbind(struct usb_gadget *gadget) ++{ ++ usb_ep_free_request(g->ep0, ep0_req); ++ ep_in->driver_data = NULL; ++ ep_out->driver_data = NULL; ++} ++ ++/* This is the TI USB vendor id a product ID from TI's internal tree */ ++#define DEVICE_VENDOR_ID 0x0451 ++#define DEVICE_PRODUCT_ID 0xd022 ++#define DEVICE_BCD 0x0100 ++ ++struct usb_device_descriptor fb_descriptor = { ++ .bLength = sizeof(fb_descriptor), ++ .bDescriptorType = USB_DT_DEVICE, ++ .bcdUSB = 0x200, ++ .bMaxPacketSize0 = 0x40, ++ .idVendor = DEVICE_VENDOR_ID, ++ .idProduct = DEVICE_PRODUCT_ID, ++ .bcdDevice = DEVICE_BCD, ++ .iManufacturer = FB_STR_MANUFACTURER_IDX, ++ .iProduct = FB_STR_PRODUCT_IDX, ++ .iSerialNumber = FB_STR_SERIAL_IDX, ++ .bNumConfigurations = 1, ++}; ++ ++#define TOT_CFG_DESC_LEN (USB_DT_CONFIG_SIZE + USB_DT_INTERFACE_SIZE + \ ++ USB_DT_ENDPOINT_SIZE + USB_DT_ENDPOINT_SIZE) ++ ++static struct usb_config_descriptor config_desc = { ++ .bLength = USB_DT_CONFIG_SIZE, ++ .bDescriptorType = USB_DT_CONFIG, ++ .wTotalLength = cpu_to_le16(TOT_CFG_DESC_LEN), ++ .bNumInterfaces = 1, ++ .bConfigurationValue = CONFIGURATION_NORMAL, ++ .iConfiguration = FB_STR_CONFIG_IDX, ++ .bmAttributes = 0xc0, ++ .bMaxPower = 0x32, ++}; ++ ++static struct usb_interface_descriptor interface_desc = { ++ .bLength = USB_DT_INTERFACE_SIZE, ++ .bDescriptorType = USB_DT_INTERFACE, ++ .bInterfaceNumber = 0x00, ++ .bAlternateSetting = 0x00, ++ .bNumEndpoints = 0x02, ++ .bInterfaceClass = FASTBOOT_INTERFACE_CLASS, ++ .bInterfaceSubClass = FASTBOOT_INTERFACE_SUB_CLASS, ++ .bInterfaceProtocol = FASTBOOT_INTERFACE_PROTOCOL, ++ .iInterface = FB_STR_INTERFACE_IDX, ++}; ++ ++static struct usb_qualifier_descriptor qual_desc = { ++ .bLength = sizeof(qual_desc), ++ .bDescriptorType = USB_DT_DEVICE_QUALIFIER, ++ .bcdUSB = 0x200, ++ .bMaxPacketSize0 = 0x40, ++ .bNumConfigurations = 1, ++}; ++ ++static int fastboot_setup_get_descr(struct usb_gadget *gadget, ++ const struct usb_ctrlrequest *ctrl) ++{ ++ u16 w_value = le16_to_cpu(ctrl->wValue); ++ u16 w_length = le16_to_cpu(ctrl->wLength); ++ u16 val; ++ int ret; ++ u32 bytes_remaining; ++ u32 bytes_total; ++ u32 this_inc; ++ ++ val = w_value >> 8; ++ ++ switch (val) { ++ case USB_DT_DEVICE: ++ ++ memcpy(ep0_buffer, &fb_descriptor, sizeof(fb_descriptor)); ++ ep0_req->length = min(w_length, sizeof(fb_descriptor)); ++ ret = usb_ep_queue(gadget->ep0, ep0_req, 0); ++ break; ++ ++ case USB_DT_CONFIG: ++ ++ bytes_remaining = min(w_length, sizeof(ep0_buffer)); ++ bytes_total = 0; ++ ++ /* config */ ++ this_inc = min(bytes_remaining, USB_DT_CONFIG_SIZE); ++ bytes_remaining -= this_inc; ++ memcpy(ep0_buffer + bytes_total, &config_desc, this_inc); ++ bytes_total += this_inc; ++ ++ /* interface */ ++ this_inc = min(bytes_remaining, USB_DT_INTERFACE_SIZE); ++ bytes_remaining -= this_inc; ++ memcpy(ep0_buffer + bytes_total, &interface_desc, this_inc); ++ bytes_total += this_inc; ++ ++ /* ep in */ ++ this_inc = min(bytes_remaining, USB_DT_ENDPOINT_SIZE); ++ bytes_remaining -= this_inc; ++ memcpy(ep0_buffer + bytes_total, &fs_ep_in, this_inc); ++ bytes_total += this_inc; ++ ++ /* ep out */ ++ this_inc = min(bytes_remaining, USB_DT_ENDPOINT_SIZE); ++ ++ if (gadget->speed == USB_SPEED_HIGH) ++ memcpy(ep0_buffer + bytes_total, &hs_ep_out, ++ this_inc); ++ else ++ memcpy(ep0_buffer + bytes_total, &fs_ep_out, ++ this_inc); ++ bytes_total += this_inc; ++ ++ ep0_req->length = bytes_total; ++ ret = usb_ep_queue(gadget->ep0, ep0_req, 0); ++ break; ++ ++ case USB_DT_STRING: ++ ++ ret = usb_gadget_get_string(vendor_fb_strings, ++ w_value & 0xff, ep0_buffer); ++ if (ret < 0) ++ ret = usb_gadget_get_string(&def_fb_strings, ++ w_value & 0xff, ep0_buffer); ++ if (ret < 0) ++ break; ++ ++ ep0_req->length = ret; ++ ret = usb_ep_queue(gadget->ep0, ep0_req, 0); ++ break; ++ ++ case USB_DT_DEVICE_QUALIFIER: ++ ++ memcpy(ep0_buffer, &qual_desc, sizeof(qual_desc)); ++ ep0_req->length = min(w_length, sizeof(qual_desc)); ++ ret = usb_ep_queue(gadget->ep0, ep0_req, 0); ++ break; ++ default: ++ ret = -EINVAL; ++ } ++ return ret; ++} ++ ++static int fastboot_setup_get_conf(struct usb_gadget *gadget, ++ const struct usb_ctrlrequest *ctrl) ++{ ++ u16 w_length = le16_to_cpu(ctrl->wLength); ++ ++ if (w_length == 0) ++ return -1; ++ ++ ep0_buffer[0] = current_config; ++ ep0_req->length = 1; ++ return usb_ep_queue(gadget->ep0, ep0_req, 0); ++} ++ ++static void fastboot_complete_in(struct usb_ep *ep, struct usb_request *req) ++{ ++ int status = req->status; ++ ++ if (status) ++ printf("status: %d ep_in trans: %d\n", ++ status, ++ req->actual); ++} ++ ++static int fastboot_disable_ep(struct usb_gadget *gadget) ++{ ++ if (req_out) { ++ usb_ep_free_request(ep_out, req_out); ++ req_out = NULL; ++ } ++ if (req_in) { ++ usb_ep_free_request(ep_in, req_in); ++ req_in = NULL; ++ } ++ usb_ep_disable(ep_out); ++ usb_ep_disable(ep_in); ++ ++ return 0; ++} ++ ++static int fastboot_enable_ep(struct usb_gadget *gadget) ++{ ++ int ret; ++ ++ /* make sure we don't enable the ep twice */ ++ if (gadget->speed == USB_SPEED_HIGH) ++ ret = usb_ep_enable(ep_out, &hs_ep_out); ++ else ++ ret = usb_ep_enable(ep_out, &fs_ep_out); ++ if (ret) { ++ printf("failed to enable out ep\n"); ++ goto err; ++ } ++ ++ req_out = usb_ep_alloc_request(ep_out, 0); ++ if (!req_out) { ++ printf("failed to alloc out req\n"); ++ goto err; ++ } ++ ++ ret = usb_ep_enable(ep_in, &fs_ep_in); ++ if (ret) { ++ printf("failed to enable in ep\n"); ++ goto err; ++ } ++ req_in = usb_ep_alloc_request(ep_in, 0); ++ if (!req_in) { ++ printf("failed alloc req in\n"); ++ goto err; ++ } ++ ++ req_out->complete = rx_handler_command; ++ req_out->buf = ep_out_buffer; ++ req_out->length = sizeof(ep_out_buffer); ++ ++ req_in->buf = ep_in_buffer; ++ req_in->length = sizeof(ep_in_buffer); ++ ++ ret = usb_ep_queue(ep_out, req_out, 0); ++ if (ret) ++ goto err; ++ ++ return 0; ++err: ++ fastboot_disable_ep(gadget); ++ return -1; ++} ++ ++static int fastboot_set_interface(struct usb_gadget *gadget, u32 enable) ++{ ++ if (enable && req_out) ++ return 0; ++ if (!enable && !req_out) ++ return 0; ++ ++ if (enable) ++ return fastboot_enable_ep(gadget); ++ else ++ return fastboot_disable_ep(gadget); ++} ++ ++static int fastboot_setup_out_req(struct usb_gadget *gadget, ++ const struct usb_ctrlrequest *req) ++{ ++ switch (req->bRequestType & USB_RECIP_MASK) { ++ case USB_RECIP_DEVICE: ++ switch (req->bRequest) { ++ case USB_REQ_SET_CONFIGURATION: ++ ++ ep0_req->length = 0; ++ if (req->wValue == CONFIGURATION_NORMAL) { ++ current_config = CONFIGURATION_NORMAL; ++ fastboot_set_interface(gadget, 1); ++ return usb_ep_queue(gadget->ep0, ++ ep0_req, 0); ++ } ++ if (req->wValue == 0) { ++ current_config = 0; ++ fastboot_set_interface(gadget, 0); ++ return usb_ep_queue(gadget->ep0, ++ ep0_req, 0); ++ } ++ return -1; ++ break; ++ default: ++ return -1; ++ }; ++ ++ case USB_RECIP_INTERFACE: ++ switch (req->bRequest) { ++ case USB_REQ_SET_INTERFACE: ++ ++ ep0_req->length = 0; ++ if (!fastboot_set_interface(gadget, 1)) ++ return usb_ep_queue(gadget->ep0, ++ ep0_req, 0); ++ return -1; ++ break; ++ default: ++ return -1; ++ } ++ ++ case USB_RECIP_ENDPOINT: ++ switch (req->bRequest) { ++ case USB_REQ_CLEAR_FEATURE: ++ ++ return usb_ep_queue(gadget->ep0, ep0_req, 0); ++ break; ++ default: ++ return -1; ++ } ++ } ++ return -1; ++} ++ ++static int fastboot_setup(struct usb_gadget *gadget, ++ const struct usb_ctrlrequest *req) ++{ ++ if ((req->bRequestType & USB_TYPE_MASK) != USB_TYPE_STANDARD) ++ return -1; ++ ++ if ((req->bRequestType & USB_DIR_IN) == 0) ++ /* host-to-device */ ++ return fastboot_setup_out_req(gadget, req); ++ ++ /* device-to-host */ ++ if ((req->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { ++ switch (req->bRequest) { ++ case USB_REQ_GET_DESCRIPTOR: ++ return fastboot_setup_get_descr(gadget, req); ++ break; ++ ++ case USB_REQ_GET_CONFIGURATION: ++ return fastboot_setup_get_conf(gadget, req); ++ break; ++ default: ++ return -1; ++ } ++ } ++ return -1; ++} ++ ++static void fastboot_disconnect(struct usb_gadget *gadget) ++{ ++ fastboot_disable_ep(gadget); ++ gadget_is_connected = 0; ++} ++ ++struct usb_gadget_driver fast_gadget = { ++ .bind = fastboot_bind, ++ .unbind = fastboot_unbind, ++ .setup = fastboot_setup, ++ .disconnect = fastboot_disconnect, ++}; ++ ++static int udc_is_probbed; ++ ++int fastboot_init(void) ++{ ++ int ret; ++ ++ ret = fastboot_board_init(&fb_cfg, &vendor_fb_strings); ++ if (ret) ++ return ret; ++ if (!vendor_fb_strings) ++ return -EINVAL; ++ ++ ret = usb_gadget_init_udc(); ++ if (ret) { ++ printf("gadget probe failed\n"); ++ return 1; ++ } ++ udc_is_probbed = 1; ++ ++ ret = usb_gadget_register_driver(&fast_gadget); ++ if (ret) { ++ printf("Add gadget failed\n"); ++ goto err; ++ } ++ ++ gadget_is_connected = 1; ++ usb_gadget_handle_interrupts(); ++ return 0; ++ ++err: ++ fastboot_shutdown(); ++ return 1; ++} ++ ++int fastboot_poll(void) ++{ ++ usb_gadget_handle_interrupts(); ++ ++ if (gadget_is_connected) ++ return 0; ++ else ++ return 1; ++} ++ ++void fastboot_shutdown(void) ++{ ++ if (!udc_is_probbed) ++ return; ++ udc_is_probbed = 0; ++ usb_gadget_exit_udc(); ++} ++ ++int fastboot_tx_write(const char *buffer, unsigned int buffer_size) ++{ ++ int ret; ++ ++ if (req_in->complete == NULL) ++ req_in->complete = fastboot_complete_in; ++ ++ memcpy(req_in->buf, buffer, buffer_size); ++ req_in->length = buffer_size; ++ ret = usb_ep_queue(ep_in, req_in, 0); ++ if (ret) ++ printf("Error %d on queue\n", ret); ++ return 0; ++} +diff --git a/drivers/usb/gadget/g_fastboot.h b/drivers/usb/gadget/g_fastboot.h +new file mode 100644 +index 0000000..ff2621c +--- /dev/null ++++ b/drivers/usb/gadget/g_fastboot.h +@@ -0,0 +1,20 @@ ++#ifndef _G_FASTBOOT_H_ ++#define _G_FASTBOOT_H_ ++ ++#define EP_BUFFER_SIZE 4096 ++#define FASTBOOT_INTERFACE_CLASS 0xff ++#define FASTBOOT_INTERFACE_SUB_CLASS 0x42 ++#define FASTBOOT_INTERFACE_PROTOCOL 0x03 ++#define FASTBOOT_VERSION "0.4" ++ ++extern struct fastboot_config fb_cfg; ++extern struct usb_ep *ep_in; ++extern struct usb_request *req_in; ++extern struct usb_ep *ep_out; ++extern struct usb_request *req_out; ++ ++void rx_handler_command(struct usb_ep *ep, struct usb_request *req); ++int fastboot_tx_write(const char *buffer, unsigned int buffer_size); ++const char *fb_find_usb_string(unsigned int id); ++ ++#endif +diff --git a/drivers/usb/gadget/u_fastboot.c b/drivers/usb/gadget/u_fastboot.c +new file mode 100644 +index 0000000..00762aa +--- /dev/null ++++ b/drivers/usb/gadget/u_fastboot.c +@@ -0,0 +1,308 @@ ++/* ++ * (C) Copyright 2008 - 2009 ++ * Windriver, ++ * Tom Rix ++ * ++ * Copyright (c) 2011 Sebastian Andrzej Siewior ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * Part of the rx_handler were copied from the Android project. ++ * Specifically rx command parsing in the usb_rx_data_complete ++ * function of the file bootable/bootloader/legacy/usbloader/usbloader.c ++ * ++ * The logical naming of flash comes from the Android project ++ * Thse structures and functions that look like fastboot_flash_* ++ * They come from bootable/bootloader/legacy/libboot/flash.c ++ * ++ * This is their Copyright: ++ * ++ * Copyright (C) 2008 The Android Open Source Project ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in ++ * the documentation and/or other materials provided with the ++ * distribution. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ++ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ++ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, ++ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS ++ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED ++ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, ++ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ++ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++ * SUCH DAMAGE. ++ */ ++#include ++#include ++#include ++#include ++#include "g_fastboot.h" ++ ++/* The 64 defined bytes plus \0 */ ++#define RESPONSE_LEN (64 + 1) ++ ++struct fastboot_config fb_cfg; ++ ++static unsigned int download_size; ++static unsigned int download_bytes; ++ ++static int fastboot_tx_write_str(const char *buffer) ++{ ++ return fastboot_tx_write(buffer, strlen(buffer)); ++} ++ ++static void compl_do_reset(struct usb_ep *ep, struct usb_request *req) ++{ ++ do_reset(NULL, 0, 0, NULL); ++} ++ ++static void cb_reboot(struct usb_ep *ep, struct usb_request *req) ++{ ++ req_in->complete = compl_do_reset; ++ fastboot_tx_write_str("OKAY"); ++} ++ ++static int strcmp_l1(const char *s1, const char *s2) ++{ ++ return strncmp(s1, s2, strlen(s1)); ++} ++ ++static void cb_getvar(struct usb_ep *ep, struct usb_request *req) ++{ ++ char *cmd = req->buf; ++ char response[RESPONSE_LEN]; ++ const char *s; ++ ++ strcpy(response, "OKAY"); ++ strsep(&cmd, ":"); ++ if (!cmd) { ++ fastboot_tx_write_str("FAILmissing var"); ++ return; ++ } ++ ++ if (!strcmp_l1("version", cmd)) { ++ strncat(response, FASTBOOT_VERSION, sizeof(response)); ++ ++ } else if (!strcmp_l1("downloadsize", cmd)) { ++ char str_num[12]; ++ ++ sprintf(str_num, "%08x", fb_cfg.transfer_buffer_size); ++ strncat(response, str_num, sizeof(response)); ++ ++ } else if (!strcmp_l1("product", cmd)) { ++ ++ s = fb_find_usb_string(FB_STR_PRODUCT_IDX); ++ if (s) ++ strncat(response, s, sizeof(response)); ++ else ++ strcpy(response, "FAILValue not set"); ++ ++ } else if (!strcmp_l1("serialno", cmd)) { ++ ++ s = fb_find_usb_string(FB_STR_SERIAL_IDX); ++ if (s) ++ strncat(response, s, sizeof(response)); ++ else ++ strcpy(response, "FAILValue not set"); ++ ++ } else if (!strcmp_l1("cpurev", cmd)) { ++ ++ s = fb_find_usb_string(FB_STR_PROC_REV_IDX); ++ if (s) ++ strncat(response, s, sizeof(response)); ++ else ++ strcpy(response, "FAILValue not set"); ++ } else if (!strcmp_l1("secure", cmd)) { ++ ++ s = fb_find_usb_string(FB_STR_PROC_TYPE_IDX); ++ if (s) ++ strncat(response, s, sizeof(response)); ++ else ++ strcpy(response, "FAILValue not set"); ++ } else { ++ strcpy(response, "FAILVariable not implemented"); ++ } ++ fastboot_tx_write_str(response); ++} ++ ++static unsigned int rx_bytes_expected(void) ++{ ++ int rx_remain = download_size - download_bytes; ++ if (rx_remain < 0) ++ return 0; ++ if (rx_remain > EP_BUFFER_SIZE) ++ return EP_BUFFER_SIZE; ++ return rx_remain; ++} ++ ++#define BYTES_PER_DOT 32768 ++static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) ++{ ++ char response[RESPONSE_LEN]; ++ unsigned int transfer_size = download_size - download_bytes; ++ const unsigned char *buffer = req->buf; ++ unsigned int buffer_size = req->actual; ++ ++ if (req->status != 0) { ++ printf("Bad status: %d\n", req->status); ++ return; ++ } ++ ++ if (buffer_size < transfer_size) ++ transfer_size = buffer_size; ++ ++ memcpy(fb_cfg.transfer_buffer + download_bytes, ++ buffer, transfer_size); ++ ++ download_bytes += transfer_size; ++ ++ /* Check if transfer is done */ ++ if (download_bytes >= download_size) { ++ /* ++ * Reset global transfer variable, keep download_bytes because ++ * it will be used in the next possible flashing command ++ */ ++ download_size = 0; ++ req->complete = rx_handler_command; ++ req->length = EP_BUFFER_SIZE; ++ ++ sprintf(response, "OKAY"); ++ fastboot_tx_write_str(response); ++ ++ printf("\ndownloading of %d bytes finished\n", ++ download_bytes); ++ } else ++ req->length = rx_bytes_expected(); ++ ++ if (download_bytes && !(download_bytes % BYTES_PER_DOT)) { ++ printf("."); ++ if (!(download_bytes % (74 * BYTES_PER_DOT))) ++ printf("\n"); ++ ++ } ++ req->actual = 0; ++ usb_ep_queue(ep, req, 0); ++} ++ ++static void cb_download(struct usb_ep *ep, struct usb_request *req) ++{ ++ char *cmd = req->buf; ++ char response[RESPONSE_LEN]; ++ ++ strsep(&cmd, ":"); ++ download_size = simple_strtoul(cmd, NULL, 16); ++ download_bytes = 0; ++ ++ printf("Starting download of %d bytes\n", ++ download_size); ++ ++ if (0 == download_size) { ++ sprintf(response, "FAILdata invalid size"); ++ } else if (download_size > ++ fb_cfg.transfer_buffer_size) { ++ download_size = 0; ++ sprintf(response, "FAILdata too large"); ++ } else { ++ sprintf(response, "DATA%08x", download_size); ++ req->complete = rx_handler_dl_image; ++ req->length = rx_bytes_expected(); ++ } ++ fastboot_tx_write_str(response); ++} ++ ++static char boot_addr_start[32]; ++static char *bootm_args[] = { "bootm", boot_addr_start, NULL }; ++ ++static void do_bootm_on_complete(struct usb_ep *ep, struct usb_request *req) ++{ ++ req->complete = NULL; ++ fastboot_shutdown(); ++ printf("Booting kernel..\n"); ++ ++ do_bootm(NULL, 0, 2, bootm_args); ++ ++ /* This only happens if image is somehow faulty so we start over */ ++ do_reset(NULL, 0, 0, NULL); ++} ++ ++static void cb_boot(struct usb_ep *ep, struct usb_request *req) ++{ ++ sprintf(boot_addr_start, "0x%p", fb_cfg.transfer_buffer); ++ ++ req_in->complete = do_bootm_on_complete; ++ fastboot_tx_write_str("OKAY"); ++ return; ++} ++ ++struct cmd_dispatch_info { ++ char *cmd; ++ void (*cb)(struct usb_ep *ep, struct usb_request *req); ++}; ++ ++static struct cmd_dispatch_info cmd_dispatch_info[] = { ++ { ++ .cmd = "reboot", ++ .cb = cb_reboot, ++ }, { ++ .cmd = "getvar:", ++ .cb = cb_getvar, ++ }, { ++ .cmd = "download:", ++ .cb = cb_download, ++ }, { ++ .cmd = "boot", ++ .cb = cb_boot, ++ }, ++}; ++ ++void rx_handler_command(struct usb_ep *ep, struct usb_request *req) ++{ ++ char response[RESPONSE_LEN]; ++ char *cmdbuf = req->buf; ++ void (*func_cb)(struct usb_ep *ep, struct usb_request *req) = NULL; ++ int i; ++ ++ sprintf(response, "FAIL"); ++ ++ for (i = 0; i < ARRAY_SIZE(cmd_dispatch_info); i++) { ++ if (!strcmp_l1(cmd_dispatch_info[i].cmd, cmdbuf)) { ++ func_cb = cmd_dispatch_info[i].cb; ++ break; ++ } ++ } ++ ++ if (!func_cb) ++ fastboot_tx_write_str("FAILunknown command"); ++ else ++ func_cb(ep, req); ++ ++ if (req->status == 0) { ++ *cmdbuf = '\0'; ++ req->actual = 0; ++ usb_ep_queue(ep, req, 0); ++ } ++} +diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile +index 9ab5446..e0f6f52 100644 +--- a/examples/standalone/Makefile ++++ b/examples/standalone/Makefile +@@ -40,6 +40,10 @@ ELF := $(addprefix $(obj)/,$(ELF)) + + gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`) + ++ifeq ($(ARCH) , x86) ++gcclibdir := $(shell dirname $(NORMAL_LIBGCC)) ++endif ++ + # For PowerPC there's no need to compile standalone applications as a + # relocatable executable. The relocation data is not needed, and + # also causes the entry point of the standalone application to be +diff --git a/fs/fat/fat.c b/fs/fat/fat.c +index 54f42ea..23e99d3 100644 +--- a/fs/fat/fat.c ++++ b/fs/fat/fat.c +@@ -42,6 +42,7 @@ static disk_partition_t cur_part_info; + #define DOS_BOOT_MAGIC_OFFSET 0x1fe + #define DOS_FS_TYPE_OFFSET 0x36 + #define DOS_FS32_TYPE_OFFSET 0x52 ++#define DOS_PART_TBL_OFFSET 0x1be + + static int disk_read(__u32 block, __u32 nr_blocks, void *buf) + { +@@ -76,7 +77,37 @@ int fat_set_blk_dev(block_dev_desc_t *dev_desc, disk_partition_t *info) + return 0; + if (!memcmp(buffer + DOS_FS32_TYPE_OFFSET, "FAT32", 5)) + return 0; +- ++#ifdef CONFIG_FAT_MBR_SCAN ++ /* Test if it could be an MBR, and update start block to the ++ * first available primary partition ++ */ ++ unsigned char *part_desc = (buffer + DOS_PART_TBL_OFFSET); ++ int i = 0; ++ for (i = 0; i < 4; i++, part_desc+=16) { ++ /* Check part type to be a primary FAT partition*/ ++ if ((*(part_desc+4) == 0x1) || (*(part_desc+4) == 0x4) || ++ (*(part_desc+4) == 0x6) || (*(part_desc+4) == 0xb) || ++ (*(part_desc+4) == 0xc) || (*(part_desc+4) == 0xe) ){ ++ int lba_start = (*(part_desc + 8 + 3) << 24) + ++ (*(part_desc + 8 + 2) << 16) + ++ (*(part_desc + 8 + 1) << 8) + ++ *(part_desc + 8 + 0); ++ int lba_size = (*(part_desc + 12 + 3) << 24) + ++ (*(part_desc + 12 + 2) << 16) + ++ (*(part_desc + 12 + 1) << 8) + ++ *(part_desc + 12 + 0); ++ debug("Found partition in MBR lba start:%d lba size:%d\n", ++ lba_start, lba_size); ++ debug("Old partition info lba start:"LBAFU" size:"LBAFU"\n", ++ cur_part_info.start, cur_part_info.size); ++ cur_part_info.start += lba_start; ++ cur_part_info.size = lba_size; ++ debug("New partition info lba start:"LBAFU" size:"LBAFU"\n", ++ cur_part_info.start, cur_part_info.size); ++ return 0; ++ } ++ } ++#endif + cur_dev = NULL; + return -1; + } +@@ -185,7 +216,7 @@ static __u32 get_fatent(fsdata *mydata, __u32 entry) + } + + debug("FAT%d: entry: 0x%04x = %d, offset: 0x%04x = %d\n", +- mydata->fatsize, entry, entry, offset, offset); ++ mydata->fatsize, entry, entry, offset, offset); + + /* Read a new block of FAT entries into the cache. */ + if (bufnum != mydata->fatbufnum) { +@@ -246,7 +277,7 @@ static __u32 get_fatent(fsdata *mydata, __u32 entry) + break; + } + debug("FAT%d: ret: %08x, offset: %04x\n", +- mydata->fatsize, ret, offset); ++ mydata->fatsize, ret, offset); + + return ret; + } +diff --git a/include/android_image.h b/include/android_image.h +new file mode 100644 +index 0000000..5af32c5 +--- /dev/null ++++ b/include/android_image.h +@@ -0,0 +1,102 @@ ++/* ++ * This is from the Android Project, ++ * bootloader/legacy/include/boot/bootimg.h ++ * ++ * Copyright (C) 2008 The Android Open Source Project ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in ++ * the documentation and/or other materials provided with the ++ * distribution. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ++ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ++ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, ++ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS ++ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED ++ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, ++ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ++ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++ * SUCH DAMAGE. ++ */ ++ ++#ifndef _ANDROID_IMAGE_H_ ++#define _ANDROID_IMAGE_H_ ++ ++#define ANDR_BOOT_MAGIC "ANDROID!" ++#define ANDR_BOOT_MAGIC_SIZE 8 ++#define ANDR_BOOT_NAME_SIZE 16 ++#define ANDR_BOOT_ARGS_SIZE 512 ++ ++struct andr_img_hdr { ++ u8 magic[ANDR_BOOT_MAGIC_SIZE]; ++ ++ u32 kernel_size; /* size in bytes */ ++ u32 kernel_addr; /* physical load addr */ ++ ++ u32 ramdisk_size; /* size in bytes */ ++ u32 ramdisk_addr; /* physical load addr */ ++ ++ u32 second_size; /* size in bytes */ ++ u32 second_addr; /* physical load addr */ ++ ++ u32 tags_addr; /* physical addr for kernel tags */ ++ u32 page_size; /* flash page size we assume */ ++ u32 unused[2]; /* future expansion: should be 0 */ ++ ++ char name[ANDR_BOOT_NAME_SIZE]; /* asciiz product name */ ++ ++ char cmdline[ANDR_BOOT_ARGS_SIZE]; ++ ++ u32 id[8]; /* timestamp / checksum / sha1 / etc */ ++}; ++ ++#ifdef CONFIG_ANDROID_BOOT_IMAGE ++u32 android_img_get_end(struct andr_img_hdr *hdr); ++u32 android_img_get_kload(struct andr_img_hdr *hdr); ++int android_image_get_kernel(struct andr_img_hdr *hdr, int verify); ++#else ++static inline u32 android_img_get_end(struct andr_img_hdr *hdr) { return 0; } ++static inline u32 android_img_get_kload(struct andr_img_hdr *hdr) { return 0; } ++static inline int android_image_get_kernel(struct andr_img_hdr *hdr, int verify) ++{ ++ return -1; ++} ++#endif ++ ++/* ++ * +-----------------+ ++ * | boot header | 1 page ++ * +-----------------+ ++ * | kernel | n pages ++ * +-----------------+ ++ * | ramdisk | m pages ++ * +-----------------+ ++ * | second stage | o pages ++ * +-----------------+ ++ * ++ * n = (kernel_size + page_size - 1) / page_size ++ * m = (ramdisk_size + page_size - 1) / page_size ++ * o = (second_size + page_size - 1) / page_size ++ * ++ * 0. all entities are page_size aligned in flash ++ * 1. kernel and ramdisk are required (size != 0) ++ * 2. second is optional (second_size == 0 -> no second) ++ * 3. load each element (kernel, ramdisk, second) at ++ * the specified physical address (kernel_addr, etc) ++ * 4. prepare tags at tag_addr. kernel_args[] is ++ * appended to the kernel commandline in the tags. ++ * 5. r0 = 0, r1 = MACHINE_TYPE, r2 = tags_addr ++ * 6. if second_size != 0: jump to second_addr ++ * else: jump to kernel_addr ++ */ ++#endif +diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h +index d1d732f..b5b1f7f 100644 +--- a/include/configs/coreboot.h ++++ b/include/configs/coreboot.h +@@ -27,6 +27,7 @@ + #define CONFIG_SYS_EARLY_PCI_INIT + + #define CONFIG_LMB ++#define CONFIG_USE_FDT + #define CONFIG_OF_LIBFDT + #define CONFIG_OF_CONTROL + #define CONFIG_OF_SEPARATE +diff --git a/include/configs/edison.h b/include/configs/edison.h +new file mode 100644 +index 0000000..fe0759f +--- /dev/null ++++ b/include/configs/edison.h +@@ -0,0 +1,268 @@ ++#ifndef _EDISON_H ++#define _EDISON_H ++ ++#define CONFIG_WATCHDOG ++#define CONFIG_WATCHDOG_HEARTBEAT 30 ++#define CONFIG_SFI ++#define CONFIG_BOARD_LATE_INIT ++ ++/*----------------------------------------------------------------------- ++ * Misc ++ */ ++ ++#define CONFIG_CMD_ITEST ++#define CONFIG_CMD_ASKENV ++#define CONFIG_CMD_BDI ++#define CONFIG_CMD_BSP ++#define CONFIG_CMD_BOOTD ++#define CONFIG_CMD_CACHE ++#define CONFIG_CMD_CONSOLE ++/* ++ *#define CONFIG_CMD_DATE ++ */ ++#define CONFIG_CMD_DIAG ++#define CONFIG_CMD_ECHO ++#define CONFIG_CMD_EDITENV ++#define CONFIG_CMD_ELF ++#define CONFIG_CMD_ENV_CALLBACK ++#define CONFIG_CMD_ENV_FLAGS ++#define CONFIG_CMD_ENV_EXISTS ++/* ++ *#define CONFIG_CMD_GETTIME ++ */ ++#define CONFIG_CMD_GREPENV ++#define CONFIG_CMD_HASH ++#define CONFIG_CMD_INI ++/* ++ *#define CONFIG_CMD_KGDB ++ */ ++/* ++ *#define CONFIG_CMD_MD5SUM ++ */ ++#define CONFIG_CMD_MEMINFO ++#define CONFIG_CMD_MEMORY ++#define CONFIG_CMD_PORTIO ++#define CONFIG_CMD_READ ++#define CONFIG_CMD_REGINFO ++/* ++ *#define CONFIG_CMD_I2C ++ *#define CONFIG_SYS_I2C_SPEED 50000 ++ */ ++/* ++ *#define CONFIG_CMD_SHA1SUM ++ */ ++#define CONFIG_CMD_SOURCE ++/* ++ *#define CONFIG_CMD_SPI ++ */ ++#define CONFIG_CMD_TIMER ++ ++/* ++ *#define CONFIG_CMD_TRACE ++ */ ++/* ++ *#define CONFIG_CMD_DATE ++ */ ++#define CONFIG_CMD_ECHO ++/* ++ *#define CONFIG_CMD_GPIO ++ */ ++#define CONFIG_CMD_LOADB ++#define CONFIG_CMD_LOADS ++#define CONFIG_CMD_IRQ ++#define CONFIG_CMD_MEMORY ++#define CONFIG_CMD_MISC ++#define CONFIG_CMD_PCI ++#define CONFIG_CMD_SOURCE ++/* ++ *#define CONFIG_CMD_TIME ++ *#define CONFIG_CMD_GETTIME ++ */ ++/* ++ *#define CONFIG_CMD_USB ++ */ ++/* ++ *#define EARLY_TRACE ++ *#define FTRACE ++ */ ++ ++ ++/*----------------------------------------------------------------------- ++ * Boot ++ */ ++ ++#define CONFIG_ZBOOT_32 ++#define CONFIG_CMD_ZBOOT ++#define CONFIG_AUTOBOOT ++#define CONFIG_BOOTCOMMAND "run bootcmd" ++#define CONFIG_BOOTDELAY 3 ++ ++/*----------------------------------------------------------------------- ++ * DEBUG ++ */ ++ ++/* ++ *#define DEBUG ++ */ ++ ++/* ++ *#define CONFIG_PRE_CONSOLE_BUFFER ++ *#define CONFIG_PRE_CON_BUF_SZ (1024*1024*2) ++ *#define CONFIG_PRE_CON_BUF_ADDR 0x29200000 ++ */ ++ ++/*----------------------------------------------------------------------- ++ * Serial ++ */ ++ ++#define CONFIG_SERIAL ++#define CONFIG_SYS_TNG_SERIAL ++#define CONFIG_SYS_TNG_SERIAL2 ++#define CONFIG_BAUDRATE 115200 ++ ++/* ++* MMC ++ */ ++#define CONFIG_MD5 ++#define CONFIG_GENERIC_MMC ++#define CONFIG_MMC ++#define CONFIG_SDHCI ++#define CONFIG_TANGIER_SDHCI ++#define CONFIG_CMD_MMC ++#define CONFIG_MMC_SDMA ++/*#define CONFIG_MMC_TRACE*/ ++ ++/************************************************************ ++ * DISK Partition support ++ ************************************************************/ ++#define CONFIG_EFI_PARTITION ++#define CONFIG_DOS_PARTITION ++#define CONFIG_MAC_PARTITION ++ ++#define CONFIG_FS_FAT ++#define CONFIG_CMD_FAT ++#define CONFIG_FAT_MBR_SCAN ++#define CONFIG_FAT_WRITE ++ ++#define CONFIG_CMD_GPT ++#define CONFIG_CMD_PART ++#define CONFIG_CMD_EXT4 ++#define CONFIG_CMD_EXT4_WRITE ++#define CONFIG_PARTITION_UUIDS ++#define CONFIG_RANDOM_UUID ++#define CONFIG_CMD_FS_GENERIC ++ /* ++ * Miscellaneous configurable options ++ */ ++#define CONFIG_SYS_LONGHELP ++#define CONFIG_SYS_PROMPT "boot > " ++#define CONFIG_SYS_CBSIZE 2048 ++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ ++ sizeof(CONFIG_SYS_PROMPT) + \ ++ 16) ++#define CONFIG_SYS_MAXARGS 128 ++#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE ++#define CONFIG_AUTO_COMPLETE ++#define CONFIG_SYS_HUSH_PARSER ++ ++#define CONFIG_SHA1 ++#define CONFIG_CMD_SHA1SUM ++/*----------------------------------------------------------------------- ++ * Board Features ++ */ ++ ++#define CONFIG_SYS_NO_FLASH ++#define CONFIG_INHERIT_GDT ++ ++/*----------------------------------------------------------------------- ++ * Memory ++ */ ++ ++#define CONFIG_SYS_LOAD_ADDR 0x100000 ++#define CONFIG_PHYSMEM ++ ++#define CONFIG_SYS_CACHELINE_SIZE 64 ++ ++#define CONFIG_NR_DRAM_BANKS 3 ++ ++#define CONFIG_SYS_STACK_SIZE (32 * 1024) ++ ++#define CONFIG_SYS_CAR_ADDR 0x19200000 ++#define CONFIG_SYS_CAR_SIZE (16 * 1024) ++ ++#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE ++#define CONFIG_SYS_MONITOR_LEN (256 * 1024) ++ ++#define CONFIG_SYS_MALLOC_LEN ( 128 * 1024 * 1024) ++ ++#define CONFIG_SYS_HEAP_SIZE (128*1024*1024) ++#define CONFIG_SYS_HEAP_MINI_SIZE (5*1024*1024) ++ ++#define CONFIG_SYS_MEMTEST_START 0x00100000 ++#define CONFIG_SYS_MEMTEST_END 0x01000000 ++ ++/*----------------------------------------------------------------------- ++ * CPU Features ++ */ ++ ++#define CONFIG_SYS_X86_TSC_TIMER ++#define CONFIG_SYS_NUM_IRQS 16 ++#define CONFIG_PCI ++#define CONFIG_SYS_PCAT_INTERRUPTS ++ ++#define CONFIG_CMD_GETTIME ++#define CONFIG_INTEL_MID ++ ++/*----------------------------------------------------------------------- ++ * Environment ++ */ ++#define CONFIG_ENV_IS_IN_MMC ++#define CONFIG_SYS_MMC_ENV_DEV 0 ++#define CONFIG_SYS_MMC_ENV_PART 0 ++#define CONFIG_ENV_SIZE (64*1024) ++#define CONFIG_ENV_OFFSET (3 * 1024 * 1024) ++#define CONFIG_ENV_OFFSET_REDUND (6 * 1024 * 1024) ++#define CONFIG_CMD_SAVEENV ++#define CONFIG_CMD_RUN ++#define CONFIG_SUPPORT_EMMC_BOOT ++#define CONFIG_CMD_SETEXPR ++ ++/*----------------------------------------------------------------------- ++ * USB ++ */ ++#define iounmap(x) ++#define CONFIG_USB_DWC3 ++#define CONFIG_USB_DWC3_UDC_REGS (void *) 0xf9100000 ++#define CONFIG_USB_DWC3_UDC_REGS_END (void *) 0xf9100400 ++ ++ ++#define CONFIG_USB_DWC3_GADGET ++#define CONFIG_USB_DEVICE ++#define CONFIG_USB_GADGET ++#define CONFIG_USB_GADGET_VBUS_DRAW 2 ++#define CONFIG_USB_GADGET_DUALSPEED ++ ++#define CONFIG_USBDOWNLOAD_GADGET ++#define CONFIG_G_DNL_MANUFACTURER "Intel" ++#define CONFIG_G_DNL_VENDOR_NUM 0x8087 ++#define CONFIG_G_DNL_PRODUCT_NUM 0x0a99 ++ ++#define CONFIG_DFU_FUNCTION ++#define CONFIG_CMD_DFU ++#define CONFIG_DFU_TIMEOUT ++#define CONFIG_DFU_MMC ++#define CONFIG_DFU_RAM ++ ++/*----------------------------------------------------------------------- ++ * SCU ++ */ ++ ++#define CONFIG_INTEL_SCU ++#define CONFIG_SCU_BASE_ADDR 0xff000000 ++#define CONFIG_SCU_IPC_BASE 0xff009000 ++#define CONFIG_SCU_I2C_BASE 0xff00d000 ++#define CONFIG_CPU_CHIP 4 ++#define CONFIG_X86_MRFLD ++ ++ ++#endif +diff --git a/include/dfu.h b/include/dfu.h +index 6c71ecb..d3fdf97 100644 +--- a/include/dfu.h ++++ b/include/dfu.h +@@ -37,12 +37,17 @@ enum dfu_op { + DFU_OP_WRITE, + }; + ++#define DFU_NOT_SUPPORTED -1 ++ + struct mmc_internal_data { + /* RAW programming */ + unsigned int lba_start; + unsigned int lba_size; + unsigned int lba_blk_size; + ++ /* Partition access */ ++ int partition_access; ++ + /* FAT/EXT */ + unsigned int dev; + unsigned int part; +@@ -132,8 +137,10 @@ const char *dfu_get_layout(enum dfu_layout l); + struct dfu_entity *dfu_get_entity(int alt); + char *dfu_extract_token(char** e, int *n); + void dfu_trigger_reset(void); ++void dfu_trigger_enum_done(void); + int dfu_get_alt(char *name); + bool dfu_reset(void); ++bool dfu_enum_done(void); + int dfu_init_env_entities(char *interface, int dev); + unsigned char *dfu_get_buf(void); + unsigned char *dfu_free_buf(void); +diff --git a/include/intel_scu_ipc.h b/include/intel_scu_ipc.h +new file mode 100644 +index 0000000..a9cf406 +--- /dev/null ++++ b/include/intel_scu_ipc.h +@@ -0,0 +1,69 @@ ++#ifndef _INTEL_SCU_IPC_H_ ++#define _INTEL_SCU_IPC_H_ ++ ++/* IPC defines the following message types */ ++#define IPCMSG_WARM_RESET 0xF0 ++#define IPCMSG_COLD_RESET 0xF1 ++#define IPCMSG_SOFT_RESET 0xF2 ++#define IPCMSG_COLD_BOOT 0xF3 ++#define IPCMSG_GET_FW_REVISION 0xF4 ++#define IPCMSG_WATCHDOG_TIMER 0xF8 /* Set Kernel Watchdog Threshold */ ++ ++#define IPC_ERR_NONE 0 ++#define IPC_ERR_CMD_NOT_SUPPORTED 1 ++#define IPC_ERR_CMD_NOT_SERVICED 2 ++#define IPC_ERR_UNABLE_TO_SERVICE 3 ++#define IPC_ERR_CMD_INVALID 4 ++#define IPC_ERR_CMD_FAILED 5 ++#define IPC_ERR_EMSECURITY 6 ++ ++/* Command id associated with message IPCMSG_VRTC */ ++#define IPC_CMD_VRTC_SETTIME 1 /* Set time */ ++#define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */ ++#define IPC_CMD_VRTC_SYNC_RTC 3 /* Sync MSIC/PMIC RTC to VRTC */ ++ ++union ipc_ifwi_version { ++ u8 raw[16]; ++ struct { ++ u16 ifwi_minor; ++ u8 ifwi_major; ++ u8 hardware_id; ++ u32 reserved[3]; ++ } fw __attribute__((packed)); ++} __attribute__((packed)); ++ ++/* Issue commands to the SCU with or without data */ ++void intel_scu_ipc_send_command(u32 cmd); ++int intel_scu_ipc_check_status(void); ++int intel_scu_ipc_simple_command(int cmd, int sub); ++void intel_scu_ipc_lock(void); ++void intel_scu_ipc_unlock(void); ++int intel_scu_ipc_command(u32 cmd, u32 sub, u8 * in, u8 inlen, ++ u32 * out, u32 outlen); ++int intel_scu_ipc_raw_cmd(u32 cmd, u32 sub, u8 * in, u8 inlen, ++ u32 * out, u32 outlen, u32 dptr, u32 sptr); ++ ++ ++void ipc_data_writel(u32 data, u32 offset); /* Write ipc data */ ++u32 ipc_read_status(void); ++u8 ipc_data_readb(u32 offset); /* Read ipc byte data */ ++u32 ipc_data_readl(u32 offset); /* Read ipc u32 data */ ++int intel_scu_ipc_command(u32 cmd, u32 sub, u8 * in, u8 inlen, u32 * out, ++ u32 outlen); ++int init_scu_ipc(void); ++ ++enum intel_mid_cpu_type { ++ INTEL_CPU_CHIP_NOTMID = 0, ++ INTEL_MID_CPU_CHIP_LINCROFT, ++ INTEL_MID_CPU_CHIP_PENWELL, ++ INTEL_MID_CPU_CHIP_CLOVERVIEW, ++ INTEL_MID_CPU_CHIP_TANGIER, ++}; ++ ++static inline enum intel_mid_cpu_type intel_mid_identify_cpu(void) ++{ ++ return INTEL_MID_CPU_CHIP_TANGIER; ++} ++ ++ ++#endif //_INTEL_SCU_IPC_H_ +diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h +index a8a5763..118a736 100644 +--- a/include/linux/usb/gadget.h ++++ b/include/linux/usb/gadget.h +@@ -20,6 +20,7 @@ + + #include + #include ++#include + + struct usb_ep; + +@@ -95,6 +96,7 @@ struct usb_request { + + int status; + unsigned actual; ++ unsigned stream_id; + }; + + /*-------------------------------------------------------------------------*/ +@@ -145,6 +147,8 @@ struct usb_ep { + const struct usb_ep_ops *ops; + struct list_head ep_list; + unsigned maxpacket:16; ++ unsigned max_streams:16; ++ unsigned maxburst:16; + }; + + /*-------------------------------------------------------------------------*/ +@@ -412,7 +416,6 @@ struct usb_gadget_ops { + + struct device { + void *driver_data; /* data private to the driver */ +- void *device_data; /* data private to the device */ + }; + + /** +@@ -483,11 +486,6 @@ static inline void *get_gadget_data(struct usb_gadget *gadget) + return gadget->dev.driver_data; + } + +-static inline struct usb_gadget *dev_to_usb_gadget(struct device *dev) +-{ +- return container_of(dev, struct usb_gadget, dev); +-} +- + /* iterates the non-control endpoints; 'tmp' is a struct usb_ep pointer */ + #define gadget_for_each_ep(tmp, gadget) \ + list_for_each_entry(tmp, &(gadget)->ep_list, ep_list) +@@ -861,4 +859,9 @@ extern void usb_ep_autoconfig_reset(struct usb_gadget *); + + extern int usb_gadget_handle_interrupts(void); + ++extern int usb_gadget_init_udc(void); ++extern void usb_gadget_exit_udc(void); ++extern int usb_gadget_probe_driver(struct usb_gadget_driver *driver, ++ int (*bind)(struct usb_gadget *)); ++ + #endif /* __LINUX_USB_GADGET_H */ +diff --git a/include/usb/fastboot.h b/include/usb/fastboot.h +new file mode 100644 +index 0000000..e55149a +--- /dev/null ++++ b/include/usb/fastboot.h +@@ -0,0 +1,100 @@ ++/* ++ * (C) Copyright 2008 - 2009 ++ * Windriver, ++ * Tom Rix ++ * ++ * Copyright (c) 2011 Sebastian Andrzej Siewior ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ * The logical naming of flash comes from the Android project ++ * Thse structures and functions that look like fastboot_flash_* ++ * They come from bootloader/legacy/include/boot/flash.h ++ * ++ * The boot_img_hdr structure and associated magic numbers also ++ * come from the Android project. They are from ++ * bootloader/legacy/include/boot/bootimg.h ++ * ++ * Here are their copyrights ++ * ++ * Copyright (C) 2008 The Android Open Source Project ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in ++ * the documentation and/or other materials provided with the ++ * distribution. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ++ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ++ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, ++ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS ++ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED ++ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, ++ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ++ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF ++ * SUCH DAMAGE. ++ * ++ */ ++ ++#ifndef FASTBOOT_H ++#define FASTBOOT_H ++ ++#include ++#include ++#include ++#include ++#include ++ ++struct fastboot_config { ++ ++ /* ++ * Transfer buffer for storing data sent by the client. It should be ++ * able to hold a kernel image and flash partitions. Care should be ++ * take so it does not overrun bootloader memory ++ */ ++ unsigned char *transfer_buffer; ++ ++ /* Size of the buffer mentioned above */ ++ unsigned int transfer_buffer_size; ++}; ++ ++#define FB_STR_PRODUCT_IDX 1 ++#define FB_STR_SERIAL_IDX 2 ++#define FB_STR_CONFIG_IDX 3 ++#define FB_STR_INTERFACE_IDX 4 ++#define FB_STR_MANUFACTURER_IDX 5 ++#define FB_STR_PROC_REV_IDX 6 ++#define FB_STR_PROC_TYPE_IDX 7 ++ ++#if (CONFIG_CMD_FASTBOOT) ++ ++int fastboot_init(void); ++void fastboot_shutdown(void); ++int fastboot_poll(void); ++ ++int fastboot_board_init(struct fastboot_config *interface, ++ struct usb_gadget_strings **str); ++#endif ++#endif +diff --git a/pft-config.xml b/pft-config.xml +new file mode 100644 +index 0000000..885875f +--- /dev/null ++++ b/pft-config.xml +@@ -0,0 +1,28 @@ ++ ++ ++ system ++ saltbay ++ ++ 0x80000007 ++ ++ ++ ++ ifwi_saltbay_pr2.bin ++ 0003.008d ++ ++ ++ dnx_fwr_saltbay_pr2.bin ++ 0003.008d ++ ++ ++ dnx_osr_saltbay_pr2.bin ++ 0003.008d ++ ++ ++ ++ ++ u-boot.bin.osip ++ main-weekly-1115 ++ ++ ++ +-- +1.7.9.5 + diff --git a/device-software/meta-edison/recipes-bsp/u-boot/u-boot-fw-utils_2014.04.bb b/device-software/meta-edison/recipes-bsp/u-boot/u-boot-fw-utils_2014.04.bb new file mode 100644 index 0000000..0c2353c --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/u-boot-fw-utils_2014.04.bb @@ -0,0 +1,28 @@ +DESCRIPTION = "U-boot bootloader fw_printenv/setenv utils" +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://Licenses/README;md5=025bf9f768cbcb1a165dbe1a110babfb" +SECTION = "bootloader" + +require u-boot-internal.inc + +FILESEXTRAPATHS_prepend := "${THISDIR}/files:" +SRC_URI += "file://fw_env.config" + +EXTRA_OEMAKE = 'CROSS_COMPILE=${TARGET_PREFIX} CC="${TARGET_PREFIX}gcc ${TOOLCHAIN_OPTIONS}"' + +do_compile () { + oe_runmake ${UBOOT_MACHINE} + oe_runmake env +} + +do_install () { + install -d ${D}${sbindir} + install -m 755 ${S}/tools/env/fw_printenv_unstripped ${D}${sbindir}/fw_printenv + # This is not a typo, this tool checks the args[0] to change its behavior a-la-busybox + install -m 755 ${S}/tools/env/fw_printenv_unstripped ${D}${sbindir}/fw_setenv +} + +FILES_${PN} = "${sbindir}/*" +FILES_${PN} += "${sysconfdir}/fw_env.config" + +DEPENDS = "u-boot" diff --git a/device-software/meta-edison/recipes-bsp/u-boot/u-boot-internal.inc b/device-software/meta-edison/recipes-bsp/u-boot/u-boot-internal.inc new file mode 100644 index 0000000..35698d7 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/u-boot-internal.inc @@ -0,0 +1,10 @@ +PV = "2014.04-1" +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +SRC_URI = "git://git.denx.de/u-boot.git;branch=master" +SRC_URI += "file://upstream_to_edison.patch" +SRC_URI += "file://${MACHINE}.env" +SRC_URI += "file://target_env/*.env" +SRCREV = "dda0dbfc69f3d560c87f5be85f127ed862ea6721" diff --git a/device-software/meta-edison/recipes-bsp/u-boot/u-boot-osip.inc b/device-software/meta-edison/recipes-bsp/u-boot/u-boot-osip.inc new file mode 100644 index 0000000..d05d440 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/u-boot-osip.inc @@ -0,0 +1,208 @@ +OSIP_STARTING_LBA = "2048" +OSIP_DESTINATION_POINTER = "17825792" +OSIP_HANDOFF_POINTER = "17829888" + +# env is U-Boot primary environment where internal U-Boot variables are stored +# this default generated binary environment, is embedded in a raw OSIP image +# use by XFSTK tools to do the initial boot +ENV_IMAGE = "${S}/env.bin" +BASE_IMAGE = "${S}/u-boot.bin" +UBOOT_OSIP_SUFFIX = "img" +UBOOT_TMP_IMG = "${S}/u-boot.${UBOOT_OSIP_SUFFIX}.no-osip" +UBOOT_IMG = "${S}/u-boot.${UBOOT_OSIP_SUFFIX}" +UBOOT_OSIP_IMAGE = "u-boot-${MACHINE}-${PV}-${PR}.${UBOOT_OSIP_SUFFIX}" +UBOOT_OSIP_BINARY = "u-boot.${UBOOT_OSIP_SUFFIX}" +UBOOT_OSIP_SYMLINK = "u-boot-${MACHINE}.${UBOOT_OSIP_SUFFIX}" + + +do_uboot_padding() { + # U-Boot.bin map + # 0x000000 - 0x001000 | padding with 0 + # 0x001000 - 0x200000 | u-boot0 + dd if=/dev/zero of=u-boot.padding bs=4096 count=1 + cat u-boot.padding ${BASE_IMAGE} | dd of=u-boot.bin.padded + + # Align u-boot.bin to 4K for dfu + filesize=$(stat -c %s u-boot.bin.padded) + alignment=$(echo "4096 - (${filesize} % 4096)" | bc) + if [ ${alignment} -ne 0 ]; + then + dd if=/dev/zero of=u-boot.bin.padded bs=1 count=${alignment} conv=notrunc seek=${filesize} + fi + + cp u-boot.bin.padded ${BASE_IMAGE} +} + +do_uboot_uboot_env_mkimage() { + + # U-Boot.img map + # 0x000000 - 0x001000 | padding with 0 + # 0x001000 - 0x200000 | u-boot0 + # 0x200000 - 0x300000 | primary environment + # 0x300000 - 0x500000 | reserved + # 0x500000 - 0x600000 | secondary environment + + # U-Boot.img on eMMC in LBA (LBA size: 512 bytes) + # | description | OSII | GPT label + # 0x000000 - 0x000001 | MBR + OSIP | - | - + # 0x000001 - 0x000022 | GPT | - | - + # 0x000022 - 0x000800 | padding with 0 (alignment) | - | - + # 0x000800 - 0x001800 | u-boot0 | 1 | u-boot0 + # 0x001800 - 0x002600 | primary environment | - | u-boot-env0 + # 0x002600 - 0x003600 | u-boot1 | 2 | u-boot1 + # 0x003600 - 0x004400 | secondary environment | - | u-boot-env1 + + + # Fill U-Boot.img with 0 + dd if=/dev/zero of=${UBOOT_TMP_IMG} bs=6M count=1 + # copy u-boot.bin in u-boot.img (u-boot0) + dd if=${BASE_IMAGE} of=${UBOOT_TMP_IMG} bs=1M conv=notrunc + # copy (offset 2M) u-boot_env0.bin in u-boot.img (u-boot0) + dd if=${ENV_IMAGE} of=${UBOOT_TMP_IMG} bs=1M conv=notrunc seek=2 + # copy (offset 5M) u-boot_env1.bin in u-boot.img (u-boot0) + dd if=${ENV_IMAGE} of=${UBOOT_TMP_IMG} bs=1M conv=notrunc seek=5 +} + +python do_osip_mkimage() { + # + # Stitch an image to create an OSIP image (OS Image Profile). + # This script currently supports only one OSII (OS Image Identifier) + # If more is necessary, it will need to be adjusted. + # + # This is the C struct for one OSII (size = 24 bytes) + # struct OSII { //os image identifier + # uint16_t os_rev_minor; + # uint16_t os_rev_major; + # uint32_t logical_start_block; //units defined by get_block_size() if + # //reading/writing to/from nand, units of + # //512 bytes if cracking a stitched image + # uint32_t ddr_load_address; + # uint32_t entry_point; + # uint32_t size_of_os_image; //units defined by get_page_size() if + # //reading/writing to/from nand, units of + # //512 bytes if cracking a stitched image + # uint8_t attribute; + # uint8_t reserved[3]; + # }; + + # This is what a full OSIP header contains + # Its size is 512 bytes + # Offset Size (bytes) Description + # 0x000 4 OSIP Signature "$OS$" + # 0x004 1 Reserved + # 0x005 1 Header minor revision + # 0x006 1 Header major revision + # 0x007 1 Header checksum + # 0x008 1 Number of pointers + # 0x009 1 Number of images + # 0x00a 2 Header size + # 0x00c 20 Reserved + # 0x020 24 1st bootable image descriptor (OSII) + # 0x038 24 2nd bootable image descriptor (OSII) + # ... ... ... + # 0x170 24 15th bootable image descriptor (OSII) + # 0x188 48 Not used + # 0x1B8 4 Disk signature + # 0x1BC 2 Null (0x0000) + # 0x1BE 16 1st primary partition descriptor + # 0x1CE 16 2nd primary partition descriptor + # 0x1DE 16 3rd primary partition descriptor + # 0x1EE 16 4th primary partition descriptor + # 0x1FE 1 0x55 + # 0x1FF 1 0xaa + + import os + import sys + import argparse + import struct + + # As only a small portion of the OSIP header needs to be changed + # we simply store a full binary copy and we'll change just the + # necessary values in it + OSIP_HEADER_HEX_DATA = \ + '244f532400000121010138000000000000000000000000000000000000' \ + '00000000000000220000000000100100101001380100000f000000ffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff' \ + 'ffffffffff00000000000000000000ee0000000100000000e0a3030000' \ + '0000000000000000000000000000000000000000000000000000000000' \ + '000000000000000000000000000000000055aa' + + def main(): + input_file = "${UBOOT_TMP_IMG}" + output_file = "${UBOOT_IMG}" + handoff_pointer = ${OSIP_HANDOFF_POINTER} + destination_pointer = ${OSIP_DESTINATION_POINTER} + starting_lba = ${OSIP_STARTING_LBA} + + in_file_data = open(input_file, 'rb').read() + + out_file = open(output_file, 'wb') + + # Write OSIP header data + osip_header_data = bytearray(OSIP_HEADER_HEX_DATA.decode('hex')) + + # Override some values + + # Overrides starting LBA of imge in eMMC + starting_lba_packed = struct.pack("I", starting_lba) + osip_header_data[0x24:0x27+1]=starting_lba_packed + + # Overrides destination pointer to image in DDR + destination_pointer_packed = struct.pack("I", destination_pointer) + osip_header_data[0x28:0x2B+1]=destination_pointer_packed + + # Overrides pointer to handoff entry point in image + handoff_pointer_packed = struct.pack("I", handoff_pointer) + osip_header_data[0x2C:0x2F+1]=handoff_pointer_packed + + # The file needs to be padded to be multiple of 512 bytes + + # Overrides passed image size (in unit of 512 bytes blocks) + padding_len_packed_block = struct.pack("I", ( (6*1024*1024) / 512)) + osip_header_data[0x30:0x33+1]=padding_len_packed_block + + # Compute XOR checksum + osip_header_size = 1*0x18+0x20 # 24 bytes per OSII + 32 bytes header + osip_header_data[0x07]=0 + crc = osip_header_data[0] + for i in range(1, osip_header_size): + crc ^= osip_header_data[i] + osip_header_data[0x07]=crc + + out_file.write(osip_header_data) + + # Write image content + out_file.write(in_file_data) + + out_file.close() + + return 0 + + main() +} + +do_deploy_append() { + install -d ${DEPLOYDIR} + install ${UBOOT_IMG} ${DEPLOYDIR}/${UBOOT_OSIP_IMAGE} + + cd ${DEPLOYDIR} + rm -f ${UBOOT_IMG} ${UBOOT_OSIP_SYMLINK} + ln -sf ${UBOOT_OSIP_IMAGE} ${UBOOT_OSIP_SYMLINK} + ln -sf ${UBOOT_OSIP_IMAGE} ${UBOOT_OSIP_BINARY} +} + +addtask uboot_padding before do_environment_mkimage before do_deploy after do_compile +addtask uboot_uboot_env_mkimage before do_osip_mkimage after do_environment_mkimage +addtask osip_mkimage before do_deploy after do_uboot_uboot_env_mkimage diff --git a/device-software/meta-edison/recipes-bsp/u-boot/u-boot-target-env.inc b/device-software/meta-edison/recipes-bsp/u-boot/u-boot-target-env.inc new file mode 100644 index 0000000..6dee3d1 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/u-boot-target-env.inc @@ -0,0 +1,93 @@ +# Handle severals environments generation for u-boot +# and link the default one for Ifwi to u-boot-osip recipe + +#Env binary size +ENV_SIZE = "0x10000" + +#Env base Name +ENV_BASE_NAME = "${MACHINE}" +# Env base file correspond to common part of all environment +ENV_BASE_FILE = "${WORKDIR}/${ENV_BASE_NAME}.env" + +# Env directory is where target variant files are stored +ENV_DIR = "${WORKDIR}/target_env" +# Env composed is directory where target env are composed +# by concatening of base environment file and variant files +# pattern name is applied the resulting files: base-variant.env +ENV_COMPOSED_DIR = "${WORKDIR}/target_composed" +# Env bin is directory where target env are store in binary form +# filename follows pattern name above : base-variant.bin +ENV_BIN_DIR = "${WORKDIR}/target_env_bin" + +# Env deploy dir is the name of directory where binary envs will be deployed +ENV_DEPLOY_DIR="u-boot-envs" + +# Env deploy src dir is the name of directory where txt envs will be deployed +ENV_SRC_DEPLOY_DIR="u-boot-envs-src" + +# Env target to use for IFWI stitching process +ENV_IFWI_TARGET_NAME="ifwi" +# Env image is U-Boot primary environment (where internal U-Boot variables are stored) +# The same vairiable is also defined in u-boot-osip recip in charge of doing stitching +# process for IFWI +ENV_IMAGE = "${S}/env.bin" + +do_build_mkimage_tool () { + HOSTCC="${CC}" HOSTLD="${LD}" HOSTLDFLAGS="${LDFLAGS}" HOSTSTRIP=true oe_runmake tools +} + +python do_environment_mkimage() { + import subprocess + import shutil + # list env variant target files + target_root_dir = d.getVar('ENV_DIR',True) + env_files = os.listdir(target_root_dir ) + # builds absolute paths + env_files = [ os.path.join(target_root_dir,f) for f in env_files] + + env_bin_dir = d.getVar("ENV_BIN_DIR",True) + # cleans if it exists env_bin directory + shutil.rmtree(env_bin_dir, ignore_errors=True) + # create env bin directory + os.mkdir(env_bin_dir) + # if a previous env image used for osip process exists delete it + env_image = d.getVar('ENV_IMAGE',True) + try: + os.unlink(env_image) + except OSError: pass + print 'Building binary environments in : %s' % env_bin_dir + # iterate targets list to build binary environment files + for target_env in env_files : + # get only filename without path and extension + target_filename = os.path.splitext(os.path.basename(target_env))[0] + # build output file path with ext + target_bin = os.path.join(env_bin_dir, + d.getVar('ENV_BASE_NAME',True) + '-' + target_filename + '.bin') + # generated mkenvimage tool command line + cmd_mkimg ='cat %s %s | grep -v -E "^$|^\#" |' \ + ' ./tools/mkenvimage -s %s -r -o %s -' \ + % ( d.getVar('ENV_BASE_FILE',True),target_env, + d.getVar("ENV_SIZE",True), target_bin) + print 'Building binary for %s target:' % (target_filename) + print '%s' % cmd_mkimg + # execute shell command + ret = subprocess.call(cmd_mkimg, shell=True) + if ret: return ret + if d.getVar('ENV_IFWI_TARGET_NAME',True) in target_bin : + # create a symbolic link on default binary file env file to + # avoid modifying to much osip part + print 'Create for IFWI stitching symlink %s to %s' % (env_image, target_bin) + os.symlink(target_bin, env_image) + return 0 +} + +do_deploy_append() { + install -d ${DEPLOYDIR} + # deploy binary U-boot environments + echo "Deploying U-boot Environments binary files in ${DEPLOYDIR}/${ENV_DEPLOY_DIR}" + install -d ${DEPLOYDIR}/${ENV_DEPLOY_DIR} + cp ${ENV_BIN_DIR}/*.bin ${DEPLOYDIR}/${ENV_DEPLOY_DIR} +} + +addtask build_mkimage_tool after do_compile before do_environment_mkimage +addtask environment_mkimage after do_build_mkimage_tool before do_deploy diff --git a/device-software/meta-edison/recipes-bsp/u-boot/u-boot-tools_2014.04.bb b/device-software/meta-edison/recipes-bsp/u-boot/u-boot-tools_2014.04.bb new file mode 100644 index 0000000..ebbef01 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/u-boot-tools_2014.04.bb @@ -0,0 +1,22 @@ +DESCRIPTION = "U-boot bootloader mkimage tool" +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://Licenses/README;md5=025bf9f768cbcb1a165dbe1a110babfb" +SECTION = "bootloader" + +require u-boot-internal.inc + +EXTRA_OEMAKE = 'HOSTCC="${CC}" HOSTLD="${LD}" HOSTLDFLAGS="${LDFLAGS}" HOSTSTRIP=true' + +do_compile () { + oe_runmake tools +} + +do_install () { + install -d ${D}${bindir} + install -m 0755 tools/mkimage ${D}${bindir}/uboot-mkimage + install -m 0755 tools/mkenvimage ${D}${bindir}/uboot-mkenvimage + ln -sf uboot-mkimage ${D}${bindir}/mkimage + ln -sf uboot-mkenvimage ${D}${bindir}/mkenvimage +} + +BBCLASSEXTEND = "native nativesdk" diff --git a/device-software/meta-edison/recipes-bsp/u-boot/u-boot_2014.04.bb b/device-software/meta-edison/recipes-bsp/u-boot/u-boot_2014.04.bb new file mode 100644 index 0000000..3785576 --- /dev/null +++ b/device-software/meta-edison/recipes-bsp/u-boot/u-boot_2014.04.bb @@ -0,0 +1,7 @@ +require u-boot-internal.inc +require recipes-bsp/u-boot/u-boot.inc +require u-boot-target-env.inc +require u-boot-osip.inc + +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://Licenses/README;md5=025bf9f768cbcb1a165dbe1a110babfb" diff --git a/device-software/meta-edison/recipes-kernel/linux/files/defconfig b/device-software/meta-edison/recipes-kernel/linux/files/defconfig index 7f3e626..b1ed708 100644 --- a/device-software/meta-edison/recipes-kernel/linux/files/defconfig +++ b/device-software/meta-edison/recipes-kernel/linux/files/defconfig @@ -153,7 +153,7 @@ CONFIG_NAMESPACES=y # CONFIG_IPC_NS is not set # CONFIG_USER_NS is not set # CONFIG_PID_NS is not set -# CONFIG_NET_NS is not set +CONFIG_NET_NS=y CONFIG_UIDGID_CONVERTED=y # CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set CONFIG_SCHED_AUTOGROUP=y @@ -1544,7 +1544,7 @@ CONFIG_I2C_ALGOBIT=y CONFIG_I2C_DESIGNWARE_CORE_FORK=y CONFIG_I2C_DESIGNWARE_PCI_FORK=y # CONFIG_I2C_DESIGNWARE_PLATFORM_FORK is not set -# CONFIG_I2C_DW_SPEED_MODE_DEBUG is not set +CONFIG_I2C_DW_SPEED_MODE_DEBUG=y CONFIG_I2C_PMIC=y # CONFIG_I2C_DESIGNWARE_PCI is not set # CONFIG_I2C_EG20T is not set @@ -1719,6 +1719,7 @@ CONFIG_BATTERY_MAX17042=y # CONFIG_POWER_RESET is not set # CONFIG_POWER_AVS is not set CONFIG_HWMON=y +CONFIG_INTEL_MCU=y # CONFIG_HWMON_VID is not set # CONFIG_HWMON_DEBUG_CHIP is not set @@ -2039,13 +2040,80 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y CONFIG_VIDEO_V4L2=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEOBUF2_CORE=m +CONFIG_VIDEOBUF2_MEMOPS=m +CONFIG_VIDEOBUF2_VMALLOC=m # CONFIG_VIDEO_V4L2_INT_DEVICE is not set # CONFIG_TTPCI_EEPROM is not set # # Media drivers # -# CONFIG_MEDIA_USB_SUPPORT is not set +CONFIG_MEDIA_USB_SUPPORT=y + +# +# Webcam devices +# +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +CONFIG_USB_GSPCA=m +# CONFIG_USB_M5602 is not set +# CONFIG_USB_STV06XX is not set +# CONFIG_USB_GL860 is not set +# CONFIG_USB_GSPCA_BENQ is not set +# CONFIG_USB_GSPCA_CONEX is not set +# CONFIG_USB_GSPCA_CPIA1 is not set +# CONFIG_USB_GSPCA_ETOMS is not set +# CONFIG_USB_GSPCA_FINEPIX is not set +# CONFIG_USB_GSPCA_JEILINJ is not set +# CONFIG_USB_GSPCA_JL2005BCD is not set +# CONFIG_USB_GSPCA_KINECT is not set +# CONFIG_USB_GSPCA_KONICA is not set +# CONFIG_USB_GSPCA_MARS is not set +# CONFIG_USB_GSPCA_MR97310A is not set +# CONFIG_USB_GSPCA_NW80X is not set +# CONFIG_USB_GSPCA_OV519 is not set +# CONFIG_USB_GSPCA_OV534 is not set +# CONFIG_USB_GSPCA_OV534_9 is not set +# CONFIG_USB_GSPCA_PAC207 is not set +# CONFIG_USB_GSPCA_PAC7302 is not set +# CONFIG_USB_GSPCA_PAC7311 is not set +# CONFIG_USB_GSPCA_SE401 is not set +# CONFIG_USB_GSPCA_SN9C2028 is not set +# CONFIG_USB_GSPCA_SN9C20X is not set +# CONFIG_USB_GSPCA_SONIXB is not set +# CONFIG_USB_GSPCA_SONIXJ is not set +# CONFIG_USB_GSPCA_SPCA500 is not set +# CONFIG_USB_GSPCA_SPCA501 is not set +# CONFIG_USB_GSPCA_SPCA505 is not set +# CONFIG_USB_GSPCA_SPCA506 is not set +# CONFIG_USB_GSPCA_SPCA508 is not set +# CONFIG_USB_GSPCA_SPCA561 is not set +# CONFIG_USB_GSPCA_SPCA1528 is not set +# CONFIG_USB_GSPCA_SQ905 is not set +# CONFIG_USB_GSPCA_SQ905C is not set +# CONFIG_USB_GSPCA_SQ930X is not set +# CONFIG_USB_GSPCA_STK014 is not set +# CONFIG_USB_GSPCA_STV0680 is not set +# CONFIG_USB_GSPCA_SUNPLUS is not set +# CONFIG_USB_GSPCA_T613 is not set +# CONFIG_USB_GSPCA_TOPRO is not set +# CONFIG_USB_GSPCA_TV8532 is not set +# CONFIG_USB_GSPCA_VC032X is not set +# CONFIG_USB_GSPCA_VICAM is not set +# CONFIG_USB_GSPCA_XIRLINK_CIT is not set +# CONFIG_USB_GSPCA_ZC3XX is not set +# CONFIG_USB_PWC is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_USB_SN9C102 is not set + +# +# Webcam, TV (analog/digital) USB devices +# +# CONFIG_VIDEO_EM28XX is not set # CONFIG_MEDIA_PCI_SUPPORT is not set # CONFIG_V4L_PLATFORM_DRIVERS is not set # CONFIG_V4L_MEM2MEM_DRIVERS is not set @@ -2314,7 +2382,8 @@ CONFIG_SOUND=y CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y -CONFIG_SND_COMPRESS_OFFLOAD=y +# CONFIG_SND_COMPRESS_OFFLOAD is not set +# CONFIG_SND_EFFECTS_OFFLOAD is not set CONFIG_SND_JACK=y CONFIG_SND_SEQUENCER=y # CONFIG_SND_SEQ_DUMMY is not set @@ -2344,7 +2413,7 @@ CONFIG_SND_ALOOP=y # CONFIG_SND_PCI is not set # CONFIG_SND_SPI is not set CONFIG_SND_USB=y -# CONFIG_SND_USB_AUDIO is not set +CONFIG_SND_USB_AUDIO=y # CONFIG_SND_USB_UA101 is not set # CONFIG_SND_USB_USX2Y is not set # CONFIG_SND_USB_CAIAQ is not set @@ -2353,8 +2422,15 @@ CONFIG_SND_USB=y CONFIG_SND_SOC=y # CONFIG_SND_ATMEL_SOC is not set # CONFIG_SND_MFLD_MACHINE is not set +CONFIG_SND_INTEL_SST=y +CONFIG_SND_MRFLD_MACHINE=y +CONFIG_SND_SST_PLATFORM=y +CONFIG_SST_MRFLD_DPCM=y +CONFIG_SND_SST_MACHINE=y CONFIG_SND_SOC_I2C_AND_SPI=y # CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_WM_HUBS=y +CONFIG_SND_SOC_WM8994=y # CONFIG_SND_SIMPLE_CARD is not set # CONFIG_SOUND_PRIME is not set @@ -2672,7 +2748,7 @@ CONFIG_USB_U_SERIAL=m # CONFIG_USB_G_ACM_MS is not set CONFIG_USB_G_MULTI=m CONFIG_USB_G_MULTI_RNDIS=y -# CONFIG_USB_G_MULTI_CDC is not set +CONFIG_USB_G_MULTI_CDC=y # CONFIG_USB_G_HID is not set # CONFIG_USB_G_DBGP is not set # CONFIG_USB_G_WEBCAM is not set @@ -3030,6 +3106,7 @@ CONFIG_INTEL_MID_POWER_BUTTON=y # CONFIG_IBM_RTL is not set # CONFIG_SAMSUNG_LAPTOP is not set CONFIG_INTEL_SCU_FLIS=y +CONFIG_INTEL_PSH_IPC=y # # Hardware Spinlock drivers @@ -3296,7 +3373,22 @@ CONFIG_PSTORE_RAM=y # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set # CONFIG_F2FS_FS is not set -# CONFIG_AUFS_FS is not set +CONFIG_AUFS_FS=m +CONFIG_AUFS_BRANCH_MAX_127=y +# CONFIG_AUFS_BRANCH_MAX_511 is not set +# CONFIG_AUFS_BRANCH_MAX_1023 is not set +# CONFIG_AUFS_BRANCH_MAX_32767 is not set +CONFIG_AUFS_SBILIST=y +# CONFIG_AUFS_HNOTIFY is not set +# CONFIG_AUFS_EXPORT is not set +# CONFIG_AUFS_RDU is not set +# CONFIG_AUFS_PROC_MAP is not set +# CONFIG_AUFS_SP_IATTR is not set +# CONFIG_AUFS_SHWH is not set +# CONFIG_AUFS_BR_RAMFS is not set +# CONFIG_AUFS_BR_FUSE is not set +CONFIG_AUFS_BDEV_LOOP=y +# CONFIG_AUFS_DEBUG is not set CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y diff --git a/device-software/meta-edison/recipes-kernel/linux/files/upstream_to_edison.patch b/device-software/meta-edison/recipes-kernel/linux/files/upstream_to_edison.patch index 6207981..14ed5ec 100644 --- a/device-software/meta-edison/recipes-kernel/linux/files/upstream_to_edison.patch +++ b/device-software/meta-edison/recipes-kernel/linux/files/upstream_to_edison.patch @@ -1,16 +1,16 @@ -From 225d200472d9c9af2117c8085b3682bcdd4dbeae Mon Sep 17 00:00:00 2001 +From 0146a06734d5329d58c801e99f1bef8b9c373036 Mon Sep 17 00:00:00 2001 From: Jenkins -Date: Tue, 14 Oct 2014 14:57:16 +0200 +Date: Fri, 30 Jan 2015 14:24:05 +0100 Subject: [PATCH] Squashed all commits from upstream to Edison -Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 +Change-Id: Id0e266dc44eb4f56c9e1970345eba7a1ff2b3baa --- Documentation/kernel-parameters.txt | 6 +- arch/x86/Kconfig | 62 +- arch/x86/Kconfig.cpu | 19 +- arch/x86/Makefile | 2 + arch/x86/Makefile_32.cpu | 2 + - arch/x86/configs/i386_edison_defconfig | 3768 +++++++++++++ + arch/x86/configs/i386_edison_defconfig | 3860 +++++++++++++ arch/x86/configs/i386_mrfl_defconfig | 3980 ++++++++++++++ arch/x86/include/asm/apb_timer.h | 1 + arch/x86/include/asm/bcm_bt_lpm.h | 46 + @@ -29,15 +29,21 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 arch/x86/include/asm/intel_mid_thermal.h | 77 + arch/x86/include/asm/intel_mid_vrtc.h | 9 + arch/x86/include/asm/intel_mip.h | 32 + + arch/x86/include/asm/intel_psh_ipc.h | 35 + arch/x86/include/asm/intel_scu_flis.h | 326 ++ arch/x86/include/asm/intel_scu_ipc.h | 105 +- arch/x86/include/asm/intel_scu_ipcutil.h | 135 + arch/x86/include/asm/intel_scu_pmic.h | 16 + arch/x86/include/asm/intel_soc_debug.h | 43 + + arch/x86/include/asm/intel_sst_mrfld.h | 44 + arch/x86/include/asm/module.h | 2 +- arch/x86/include/asm/mrst-vrtc.h | 9 - arch/x86/include/asm/mrst.h | 81 - arch/x86/include/asm/mwait.h | 6 + + arch/x86/include/asm/platform_byt_audio.h | 49 + + arch/x86/include/asm/platform_mrfld_audio.h | 25 + + arch/x86/include/asm/platform_sst.h | 132 + + arch/x86/include/asm/platform_sst_audio.h | 161 + arch/x86/include/asm/pmic_pdata.h | 45 + arch/x86/include/asm/required-features.h | 2 +- arch/x86/include/asm/scu_ipc_rpmsg.h | 19 + @@ -58,11 +64,12 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 arch/x86/pci/mrst.c | 21 +- arch/x86/platform/Makefile | 2 +- arch/x86/platform/intel-mid/Makefile | 27 + - arch/x86/platform/intel-mid/board.c | 160 + - arch/x86/platform/intel-mid/device_libs/Makefile | 64 + + arch/x86/platform/intel-mid/board.c | 166 + + arch/x86/platform/intel-mid/device_libs/Makefile | 66 + .../platform/intel-mid/device_libs/pci/Makefile | 6 + .../intel-mid/device_libs/pci/platform_sdhci_pci.c | 588 ++ .../intel-mid/device_libs/pci/platform_sdhci_pci.h | 30 + + .../intel-mid/device_libs/pci/platform_sst_pci.c | 229 + .../intel-mid/device_libs/pci/platform_usb_otg.c | 93 + .../intel-mid/device_libs/platform_ads7955.c | 37 + .../intel-mid/device_libs/platform_ads7955.h | 20 + @@ -99,6 +106,7 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 .../device_libs/platform_mrfl_regulator.c | 125 + .../intel-mid/device_libs/platform_mrfl_thermal.c | 133 + .../intel-mid/device_libs/platform_mrfl_thermal.h | 26 + + .../intel-mid/device_libs/platform_mrfld_audio.c | 130 + .../platform/intel-mid/device_libs/platform_msic.c | 92 + .../platform/intel-mid/device_libs/platform_msic.h | 21 + .../intel-mid/device_libs/platform_msic_adc.c | 56 + @@ -126,6 +134,7 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 .../intel-mid/device_libs/platform_soc_thermal.h | 20 + .../intel-mid/device_libs/platform_spidev.c | 73 + .../intel-mid/device_libs/platform_spidev.h | 20 + + .../intel-mid/device_libs/platform_sst_audio.c | 152 + .../intel-mid/device_libs/platform_tc35876x.c | 26 + .../intel-mid/device_libs/platform_tc35876x.h | 16 + .../intel-mid/device_libs/platform_tca6416.c | 45 + @@ -134,12 +143,14 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 .../platform/intel-mid/device_libs/platform_wifi.h | 21 + .../intel-mid/device_libs/platform_wl12xx.c | 182 + .../intel-mid/device_libs/platform_wl12xx.h | 21 + + .../intel-mid/device_libs/platform_wm8994.c | 221 + + .../intel-mid/device_libs/platform_wm8994.h | 5 + .../platform/intel-mid/early_printk_intel_mid.c | 637 +++ arch/x86/platform/intel-mid/intel-mid.c | 239 + arch/x86/platform/intel-mid/intel_mid_pcihelpers.c | 105 + arch/x86/platform/intel-mid/intel_mid_scu.c | 92 + arch/x86/platform/intel-mid/intel_mid_scu.h | 15 + - arch/x86/platform/intel-mid/intel_mid_sfi.c | 588 ++ + arch/x86/platform/intel-mid/intel_mid_sfi.c | 608 ++ arch/x86/platform/intel-mid/intel_mid_vrtc.c | 169 + arch/x86/platform/intel-mid/intel_mid_weak_decls.h | 22 + arch/x86/platform/intel-mid/intel_soc_clv.c | 146 + @@ -172,9 +183,9 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 drivers/cpufreq/sfi-cpufreq.c | 581 ++ drivers/cpufreq/sfi-cpufreq.h | 65 + drivers/dma/Makefile | 2 +- - drivers/dma/intel_mid_dma.c | 1278 +++-- - drivers/dma/intel_mid_dma_acpi.c | 177 + - drivers/dma/intel_mid_dma_regs.h | 164 +- + drivers/dma/intel_mid_dma.c | 1280 +++-- + drivers/dma/intel_mid_dma_acpi.c | 192 + + drivers/dma/intel_mid_dma_regs.h | 168 +- drivers/gpio/Kconfig | 11 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-langwell.c | 1061 +++- @@ -185,9 +196,11 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 drivers/gpu/drm/gma500/mdfld_dsi_output.h | 2 +- drivers/gpu/drm/gma500/oaktrail_device.c | 2 +- drivers/gpu/drm/gma500/oaktrail_lvds.c | 2 +- - drivers/hwmon/Kconfig | 16 + - drivers/hwmon/Makefile | 1 + + drivers/hwmon/Kconfig | 25 + + drivers/hwmon/Makefile | 2 + drivers/hwmon/coretemp.c | 362 +- + drivers/hwmon/intel_mcu_common.c | 700 +++ + drivers/hwmon/intel_mcu_common.h | 79 + drivers/hwmon/intel_mid_gpadc.c | 1212 ++++ drivers/i2c/busses/Kconfig | 46 + drivers/i2c/busses/Makefile | 8 + @@ -215,30 +228,31 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 drivers/misc/pti.c | 95 +- drivers/misc/stm.c | 470 ++ drivers/misc/stm.h | 114 + - drivers/mmc/card/block.c | 6 + + drivers/mmc/card/block.c | 194 +- drivers/mmc/card/queue.c | 3 +- drivers/mmc/card/queue.h | 1 + drivers/mmc/core/Makefile | 2 +- drivers/mmc/core/bus.c | 3 +- drivers/mmc/core/core.c | 25 +- drivers/mmc/core/debugfs.c | 3 + - drivers/mmc/core/mmc.c | 161 +- - drivers/mmc/core/mmc_ops.c | 4 +- + drivers/mmc/core/mmc.c | 177 +- + drivers/mmc/core/mmc_ops.c | 416 +- drivers/mmc/core/mmc_panic_ops.c | 837 +++ drivers/mmc/core/sdio_cis.c | 129 +- drivers/mmc/host/sdhci-pci.c | 819 ++- - drivers/mmc/host/sdhci.c | 1452 ++++- + drivers/mmc/host/sdhci.c | 1454 ++++- drivers/mmc/host/sdhci.h | 13 +- drivers/net/wireless/Kconfig | 10 + drivers/pci/Makefile | 1 + drivers/pci/pci-atom_soc.c | 78 + drivers/pci/pci.c | 5 +- drivers/pci/quirks.c | 6 +- - drivers/platform/x86/Kconfig | 23 + - drivers/platform/x86/Makefile | 4 +- + drivers/platform/x86/Kconfig | 40 + + drivers/platform/x86/Makefile | 6 +- drivers/platform/x86/intel_mid_powerbtn.c | 252 +- drivers/platform/x86/intel_mid_thermal.c | 574 -- drivers/platform/x86/intel_pmic_gpio.c | 2 +- + drivers/platform/x86/intel_psh_ipc.c | 637 +++ drivers/platform/x86/intel_scu_flis.c | 747 +++ drivers/platform/x86/intel_scu_fw_update.c | 1087 ++++ drivers/platform/x86/intel_scu_ipc.c | 636 +-- @@ -260,7 +274,7 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 drivers/pwm/Kconfig | 13 + drivers/pwm/Makefile | 2 + drivers/pwm/core.c | 25 +- - drivers/pwm/pwm-intel-mid.c | 405 ++ + drivers/pwm/pwm-intel-mid.c | 404 ++ drivers/pwm/sysfs.c | 353 ++ drivers/regulator/Kconfig | 6 +- drivers/regulator/Makefile | 2 + @@ -269,7 +283,7 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 drivers/remoteproc/Makefile | 1 + drivers/remoteproc/intel_mid_rproc_core.c | 269 + drivers/remoteproc/intel_mid_rproc_core.h | 82 + - drivers/remoteproc/intel_mid_rproc_scu.c | 438 ++ + drivers/remoteproc/intel_mid_rproc_scu.c | 441 ++ drivers/rpmsg/Kconfig | 9 + drivers/rpmsg/Makefile | 1 + drivers/rpmsg/intel_mid_rpmsg.c | 446 ++ @@ -277,7 +291,7 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 drivers/rtc/rtc-mrst.c | 296 +- drivers/spi/Kconfig | 9 + drivers/spi/Makefile | 1 + - drivers/spi/intel_mid_ssp_spi.c | 1751 ++++++ + drivers/spi/intel_mid_ssp_spi.c | 1787 ++++++ drivers/spi/spi-dw-mid.c | 133 +- drivers/spi/spi-dw-pci.c | 102 +- drivers/spi/spi-dw.c | 151 +- @@ -346,15 +360,17 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 include/linux/irqdesc.h | 7 + include/linux/lnw_gpio.h | 14 + include/linux/mfd/intel_msic.h | 42 + - include/linux/mmc/card.h | 5 + - include/linux/mmc/core.h | 1 + + include/linux/mfd/wm8994/pdata.h | 19 + + include/linux/mfd/wm8994/registers.h | 8 + + include/linux/mmc/card.h | 11 + + include/linux/mmc/core.h | 35 + include/linux/mmc/host.h | 64 + include/linux/mmc/mmc.h | 5 + include/linux/mmc/sdhci-pci-data.h | 16 + include/linux/mmc/sdhci.h | 52 + include/linux/mmc/sdio_ids.h | 2 + include/linux/panic_gbuffer.h | 37 + - include/linux/pci_ids.h | 13 + + include/linux/pci_ids.h | 14 + include/linux/platform_data/intel_mid_remoteproc.h | 119 + include/linux/platform_data/ti-ads7955.h | 21 + include/linux/power/battery_id.h | 78 + @@ -380,7 +396,21 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 include/linux/usb/phy.h | 14 + include/linux/wl12xx.h | 5 + include/linux/wlan_plat.h | 29 + + include/net/bluetooth/hci_core.h | 2 + + include/net/bluetooth/l2cap.h | 8 +- + include/sound/compress_driver.h | 15 + + include/sound/core.h | 5 + + include/sound/effect_driver.h | 63 + + include/sound/intel_sst_ioctl.h | 63 + + include/sound/pcm.h | 1 + + include/sound/soc-dai.h | 4 +- + include/sound/soc-dapm.h | 2 + + include/sound/soc-dpcm.h | 22 + + include/sound/soc.h | 35 + + include/uapi/linux/mmc/ioctl.h | 13 + include/uapi/linux/usb/ch9.h | 1 + + include/uapi/sound/compress_offload.h | 8 +- + include/uapi/sound/effect_offload.h | 62 + init/main.c | 2 + kernel/cgroup.c | 6 +- kernel/irq/chip.c | 1 + @@ -388,8 +418,66 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 kernel/power/process.c | 2 + kernel/printk.c | 18 +- kernel/trace/trace.c | 5 +- + net/bluetooth/l2cap_core.c | 20 +- + net/bluetooth/l2cap_sock.c | 5 +- + sound/core/Kconfig | 3 + + sound/core/Makefile | 2 + + sound/core/compress_offload.c | 123 +- + sound/core/effects_offload.c | 307 ++ + sound/soc/Kconfig | 2 +- + sound/soc/Makefile | 2 +- sound/soc/codecs/sn95031.c | 2 +- - 384 files changed, 83928 insertions(+), 6468 deletions(-) + sound/soc/codecs/wm8994.c | 491 +- + sound/soc/codecs/wm8994.h | 14 + + sound/soc/codecs/wm_hubs.c | 20 +- + sound/soc/intel/Kconfig | 58 + + sound/soc/intel/Makefile | 22 + + sound/soc/intel/board/Makefile | 14 + + sound/soc/intel/board/merr_dpcm_dummy.c | 233 + + sound/soc/intel/board/merr_dpcm_wm8958.c | 932 ++++ + sound/soc/intel/board/merr_saltbay_wm8958.c | 887 +++ + sound/soc/intel/compress.c | 254 + + sound/soc/intel/effects.c | 405 ++ + sound/soc/intel/pcm.c | 1021 ++++ + sound/soc/intel/platform-libs/controls_v1.c | 184 + + sound/soc/intel/platform-libs/controls_v2.c | 1770 ++++++ + sound/soc/intel/platform-libs/controls_v2.h | 708 +++ + sound/soc/intel/platform-libs/controls_v2_dpcm.c | 1803 ++++++ + sound/soc/intel/platform-libs/ipc_lib.h | 33 + + sound/soc/intel/platform-libs/ipc_lib_v2.c | 109 + + sound/soc/intel/platform-libs/sst_widgets.h | 337 ++ + sound/soc/intel/platform_ipc_v2.h | 693 +++ + sound/soc/intel/ssp/Makefile | 5 + + sound/soc/intel/ssp/mid_ssp.c | 1436 +++++ + sound/soc/intel/ssp/mid_ssp.h | 124 + + sound/soc/intel/sst/Makefile | 13 + + sound/soc/intel/sst/sst.c | 1255 +++++ + sound/soc/intel/sst/sst.h | 932 ++++ + sound/soc/intel/sst/sst_acpi.c | 669 +++ + sound/soc/intel/sst/sst_app_compat_interface.c | 85 + + sound/soc/intel/sst/sst_app_interface.c | 342 ++ + sound/soc/intel/sst/sst_debug.c | 1328 +++++ + sound/soc/intel/sst/sst_drv_interface.c | 1111 ++++ + sound/soc/intel/sst/sst_dsp.c | 1995 +++++++ + sound/soc/intel/sst/sst_ipc.c | 768 +++ + sound/soc/intel/sst/sst_pvt.c | 577 ++ + sound/soc/intel/sst/sst_stream.c | 831 +++ + sound/soc/intel/sst/sst_trace.h | 147 + + sound/soc/intel/sst_platform.h | 155 + + sound/soc/intel/sst_platform_pvt.h | 127 + + sound/soc/mid-x86/Kconfig | 13 - + sound/soc/mid-x86/Makefile | 5 - + sound/soc/mid-x86/mfld_machine.c | 447 -- + sound/soc/mid-x86/sst_dsp.h | 134 - + sound/soc/mid-x86/sst_platform.c | 733 --- + sound/soc/mid-x86/sst_platform.h | 157 - + sound/soc/soc-compress.c | 343 +- + sound/soc/soc-core.c | 36 +- + sound/soc/soc-dapm.c | 13 +- + sound/soc/soc-jack.c | 14 +- + sound/soc/soc-pcm.c | 83 +- + sound/soc/soc-utils.c | 34 +- + 472 files changed, 110390 insertions(+), 8166 deletions(-) create mode 100644 arch/x86/configs/i386_edison_defconfig create mode 100644 arch/x86/configs/i386_mrfl_defconfig create mode 100644 arch/x86/include/asm/bcm_bt_lpm.h @@ -406,12 +494,18 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 create mode 100644 arch/x86/include/asm/intel_mid_thermal.h create mode 100644 arch/x86/include/asm/intel_mid_vrtc.h create mode 100644 arch/x86/include/asm/intel_mip.h + create mode 100644 arch/x86/include/asm/intel_psh_ipc.h create mode 100644 arch/x86/include/asm/intel_scu_flis.h create mode 100644 arch/x86/include/asm/intel_scu_ipcutil.h create mode 100644 arch/x86/include/asm/intel_scu_pmic.h create mode 100644 arch/x86/include/asm/intel_soc_debug.h + create mode 100644 arch/x86/include/asm/intel_sst_mrfld.h delete mode 100644 arch/x86/include/asm/mrst-vrtc.h delete mode 100644 arch/x86/include/asm/mrst.h + create mode 100644 arch/x86/include/asm/platform_byt_audio.h + create mode 100644 arch/x86/include/asm/platform_mrfld_audio.h + create mode 100644 arch/x86/include/asm/platform_sst.h + create mode 100644 arch/x86/include/asm/platform_sst_audio.h create mode 100644 arch/x86/include/asm/pmic_pdata.h create mode 100644 arch/x86/include/asm/scu_ipc_rpmsg.h create mode 100644 arch/x86/platform/intel-mid/Makefile @@ -420,6 +514,7 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 create mode 100644 arch/x86/platform/intel-mid/device_libs/pci/Makefile create mode 100644 arch/x86/platform/intel-mid/device_libs/pci/platform_sdhci_pci.c create mode 100644 arch/x86/platform/intel-mid/device_libs/pci/platform_sdhci_pci.h + create mode 100644 arch/x86/platform/intel-mid/device_libs/pci/platform_sst_pci.c create mode 100644 arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_ads7955.c create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_ads7955.h @@ -456,6 +551,7 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_mrfl_regulator.c create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_mrfl_thermal.c create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_mrfl_thermal.h + create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_mrfld_audio.c create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_msic.c create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_msic.h create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_msic_adc.c @@ -483,6 +579,7 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_soc_thermal.h create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_spidev.c create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_spidev.h + create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_sst_audio.c create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_tc35876x.c create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_tc35876x.h create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_tca6416.c @@ -491,6 +588,8 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_wifi.h create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_wl12xx.c create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_wl12xx.h + create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_wm8994.c + create mode 100644 arch/x86/platform/intel-mid/device_libs/platform_wm8994.h create mode 100644 arch/x86/platform/intel-mid/early_printk_intel_mid.c create mode 100644 arch/x86/platform/intel-mid/intel-mid.c create mode 100644 arch/x86/platform/intel-mid/intel_mid_pcihelpers.c @@ -525,6 +624,8 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 create mode 100644 drivers/dma/intel_mid_dma_acpi.c create mode 100644 drivers/gpio/gpiodebug.c create mode 100644 drivers/gpio/gpiodebug.h + create mode 100644 drivers/hwmon/intel_mcu_common.c + create mode 100644 drivers/hwmon/intel_mcu_common.h create mode 100644 drivers/hwmon/intel_mid_gpadc.c create mode 100644 drivers/i2c/busses/i2c-pmic-regs.h create mode 100644 drivers/i2c/busses/i2c-pmic.c @@ -540,6 +641,7 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 create mode 100644 drivers/mmc/core/mmc_panic_ops.c create mode 100644 drivers/pci/pci-atom_soc.c delete mode 100644 drivers/platform/x86/intel_mid_thermal.c + create mode 100644 drivers/platform/x86/intel_psh_ipc.c create mode 100644 drivers/platform/x86/intel_scu_flis.c create mode 100644 drivers/platform/x86/intel_scu_fw_update.c create mode 100644 drivers/platform/x86/intel_scu_mip.c @@ -600,6 +702,51 @@ Change-Id: Ifec2f1375746c4c608cb0f799a6a5b9c2c96eaa6 create mode 100644 include/linux/usb/dwc3-intel-mrfl.h create mode 100644 include/linux/usb/penwell_otg.h create mode 100644 include/linux/wlan_plat.h + create mode 100644 include/sound/effect_driver.h + create mode 100644 include/sound/intel_sst_ioctl.h + create mode 100644 include/uapi/sound/effect_offload.h + create mode 100644 sound/core/effects_offload.c + create mode 100644 sound/soc/intel/Kconfig + create mode 100644 sound/soc/intel/Makefile + create mode 100644 sound/soc/intel/board/Makefile + create mode 100644 sound/soc/intel/board/merr_dpcm_dummy.c + create mode 100644 sound/soc/intel/board/merr_dpcm_wm8958.c + create mode 100644 sound/soc/intel/board/merr_saltbay_wm8958.c + create mode 100644 sound/soc/intel/compress.c + create mode 100644 sound/soc/intel/effects.c + create mode 100644 sound/soc/intel/pcm.c + create mode 100644 sound/soc/intel/platform-libs/controls_v1.c + create mode 100644 sound/soc/intel/platform-libs/controls_v2.c + create mode 100644 sound/soc/intel/platform-libs/controls_v2.h + create mode 100644 sound/soc/intel/platform-libs/controls_v2_dpcm.c + create mode 100644 sound/soc/intel/platform-libs/ipc_lib.h + create mode 100644 sound/soc/intel/platform-libs/ipc_lib_v2.c + create mode 100644 sound/soc/intel/platform-libs/sst_widgets.h + create mode 100644 sound/soc/intel/platform_ipc_v2.h + create mode 100644 sound/soc/intel/ssp/Makefile + create mode 100644 sound/soc/intel/ssp/mid_ssp.c + create mode 100644 sound/soc/intel/ssp/mid_ssp.h + create mode 100644 sound/soc/intel/sst/Makefile + create mode 100644 sound/soc/intel/sst/sst.c + create mode 100644 sound/soc/intel/sst/sst.h + create mode 100644 sound/soc/intel/sst/sst_acpi.c + create mode 100644 sound/soc/intel/sst/sst_app_compat_interface.c + create mode 100644 sound/soc/intel/sst/sst_app_interface.c + create mode 100644 sound/soc/intel/sst/sst_debug.c + create mode 100644 sound/soc/intel/sst/sst_drv_interface.c + create mode 100644 sound/soc/intel/sst/sst_dsp.c + create mode 100644 sound/soc/intel/sst/sst_ipc.c + create mode 100644 sound/soc/intel/sst/sst_pvt.c + create mode 100644 sound/soc/intel/sst/sst_stream.c + create mode 100644 sound/soc/intel/sst/sst_trace.h + create mode 100644 sound/soc/intel/sst_platform.h + create mode 100644 sound/soc/intel/sst_platform_pvt.h + delete mode 100644 sound/soc/mid-x86/Kconfig + delete mode 100644 sound/soc/mid-x86/Makefile + delete mode 100644 sound/soc/mid-x86/mfld_machine.c + delete mode 100644 sound/soc/mid-x86/sst_dsp.h + delete mode 100644 sound/soc/mid-x86/sst_platform.c + delete mode 100644 sound/soc/mid-x86/sst_platform.h diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 2fe6e76..8ec1e55 100644 @@ -802,10 +949,10 @@ index 6647ed4..a2eb6c6 100644 cflags-$(CONFIG_MELAN) += -march=i486 diff --git a/arch/x86/configs/i386_edison_defconfig b/arch/x86/configs/i386_edison_defconfig new file mode 100644 -index 0000000..e79bdd1 +index 0000000..b1ed708 --- /dev/null +++ b/arch/x86/configs/i386_edison_defconfig -@@ -0,0 +1,3768 @@ +@@ -0,0 +1,3860 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux/x86 3.10.17 Kernel Configuration @@ -961,7 +1108,7 @@ index 0000000..e79bdd1 +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set -+# CONFIG_NET_NS is not set ++CONFIG_NET_NS=y +CONFIG_UIDGID_CONVERTED=y +# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set +CONFIG_SCHED_AUTOGROUP=y @@ -2352,7 +2499,7 @@ index 0000000..e79bdd1 +CONFIG_I2C_DESIGNWARE_CORE_FORK=y +CONFIG_I2C_DESIGNWARE_PCI_FORK=y +# CONFIG_I2C_DESIGNWARE_PLATFORM_FORK is not set -+# CONFIG_I2C_DW_SPEED_MODE_DEBUG is not set ++CONFIG_I2C_DW_SPEED_MODE_DEBUG=y +CONFIG_I2C_PMIC=y +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EG20T is not set @@ -2527,6 +2674,7 @@ index 0000000..e79bdd1 +# CONFIG_POWER_RESET is not set +# CONFIG_POWER_AVS is not set +CONFIG_HWMON=y ++CONFIG_INTEL_MCU=y +# CONFIG_HWMON_VID is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + @@ -2847,13 +2995,80 @@ index 0000000..e79bdd1 +CONFIG_VIDEO_V4L2=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set ++CONFIG_VIDEOBUF2_CORE=m ++CONFIG_VIDEOBUF2_MEMOPS=m ++CONFIG_VIDEOBUF2_VMALLOC=m +# CONFIG_VIDEO_V4L2_INT_DEVICE is not set +# CONFIG_TTPCI_EEPROM is not set + +# +# Media drivers +# -+# CONFIG_MEDIA_USB_SUPPORT is not set ++CONFIG_MEDIA_USB_SUPPORT=y ++ ++# ++# Webcam devices ++# ++CONFIG_USB_VIDEO_CLASS=m ++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y ++CONFIG_USB_GSPCA=m ++# CONFIG_USB_M5602 is not set ++# CONFIG_USB_STV06XX is not set ++# CONFIG_USB_GL860 is not set ++# CONFIG_USB_GSPCA_BENQ is not set ++# CONFIG_USB_GSPCA_CONEX is not set ++# CONFIG_USB_GSPCA_CPIA1 is not set ++# CONFIG_USB_GSPCA_ETOMS is not set ++# CONFIG_USB_GSPCA_FINEPIX is not set ++# CONFIG_USB_GSPCA_JEILINJ is not set ++# CONFIG_USB_GSPCA_JL2005BCD is not set ++# CONFIG_USB_GSPCA_KINECT is not set ++# CONFIG_USB_GSPCA_KONICA is not set ++# CONFIG_USB_GSPCA_MARS is not set ++# CONFIG_USB_GSPCA_MR97310A is not set ++# CONFIG_USB_GSPCA_NW80X is not set ++# CONFIG_USB_GSPCA_OV519 is not set ++# CONFIG_USB_GSPCA_OV534 is not set ++# CONFIG_USB_GSPCA_OV534_9 is not set ++# CONFIG_USB_GSPCA_PAC207 is not set ++# CONFIG_USB_GSPCA_PAC7302 is not set ++# CONFIG_USB_GSPCA_PAC7311 is not set ++# CONFIG_USB_GSPCA_SE401 is not set ++# CONFIG_USB_GSPCA_SN9C2028 is not set ++# CONFIG_USB_GSPCA_SN9C20X is not set ++# CONFIG_USB_GSPCA_SONIXB is not set ++# CONFIG_USB_GSPCA_SONIXJ is not set ++# CONFIG_USB_GSPCA_SPCA500 is not set ++# CONFIG_USB_GSPCA_SPCA501 is not set ++# CONFIG_USB_GSPCA_SPCA505 is not set ++# CONFIG_USB_GSPCA_SPCA506 is not set ++# CONFIG_USB_GSPCA_SPCA508 is not set ++# CONFIG_USB_GSPCA_SPCA561 is not set ++# CONFIG_USB_GSPCA_SPCA1528 is not set ++# CONFIG_USB_GSPCA_SQ905 is not set ++# CONFIG_USB_GSPCA_SQ905C is not set ++# CONFIG_USB_GSPCA_SQ930X is not set ++# CONFIG_USB_GSPCA_STK014 is not set ++# CONFIG_USB_GSPCA_STV0680 is not set ++# CONFIG_USB_GSPCA_SUNPLUS is not set ++# CONFIG_USB_GSPCA_T613 is not set ++# CONFIG_USB_GSPCA_TOPRO is not set ++# CONFIG_USB_GSPCA_TV8532 is not set ++# CONFIG_USB_GSPCA_VC032X is not set ++# CONFIG_USB_GSPCA_VICAM is not set ++# CONFIG_USB_GSPCA_XIRLINK_CIT is not set ++# CONFIG_USB_GSPCA_ZC3XX is not set ++# CONFIG_USB_PWC is not set ++# CONFIG_VIDEO_CPIA2 is not set ++# CONFIG_USB_ZR364XX is not set ++# CONFIG_USB_STKWEBCAM is not set ++# CONFIG_USB_S2255 is not set ++# CONFIG_USB_SN9C102 is not set ++ ++# ++# Webcam, TV (analog/digital) USB devices ++# ++# CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set +# CONFIG_V4L_PLATFORM_DRIVERS is not set +# CONFIG_V4L_MEM2MEM_DRIVERS is not set @@ -3122,7 +3337,8 @@ index 0000000..e79bdd1 +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y -+CONFIG_SND_COMPRESS_OFFLOAD=y ++# CONFIG_SND_COMPRESS_OFFLOAD is not set ++# CONFIG_SND_EFFECTS_OFFLOAD is not set +CONFIG_SND_JACK=y +CONFIG_SND_SEQUENCER=y +# CONFIG_SND_SEQ_DUMMY is not set @@ -3152,7 +3368,7 @@ index 0000000..e79bdd1 +# CONFIG_SND_PCI is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_USB=y -+# CONFIG_SND_USB_AUDIO is not set ++CONFIG_SND_USB_AUDIO=y +# CONFIG_SND_USB_UA101 is not set +# CONFIG_SND_USB_USX2Y is not set +# CONFIG_SND_USB_CAIAQ is not set @@ -3161,8 +3377,15 @@ index 0000000..e79bdd1 +CONFIG_SND_SOC=y +# CONFIG_SND_ATMEL_SOC is not set +# CONFIG_SND_MFLD_MACHINE is not set ++CONFIG_SND_INTEL_SST=y ++CONFIG_SND_MRFLD_MACHINE=y ++CONFIG_SND_SST_PLATFORM=y ++CONFIG_SST_MRFLD_DPCM=y ++CONFIG_SND_SST_MACHINE=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set ++CONFIG_SND_SOC_WM_HUBS=y ++CONFIG_SND_SOC_WM8994=y +# CONFIG_SND_SIMPLE_CARD is not set +# CONFIG_SOUND_PRIME is not set + @@ -3838,6 +4061,7 @@ index 0000000..e79bdd1 +# CONFIG_IBM_RTL is not set +# CONFIG_SAMSUNG_LAPTOP is not set +CONFIG_INTEL_SCU_FLIS=y ++CONFIG_INTEL_PSH_IPC=y + +# +# Hardware Spinlock drivers @@ -4104,7 +4328,22 @@ index 0000000..e79bdd1 +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_F2FS_FS is not set -+# CONFIG_AUFS_FS is not set ++CONFIG_AUFS_FS=m ++CONFIG_AUFS_BRANCH_MAX_127=y ++# CONFIG_AUFS_BRANCH_MAX_511 is not set ++# CONFIG_AUFS_BRANCH_MAX_1023 is not set ++# CONFIG_AUFS_BRANCH_MAX_32767 is not set ++CONFIG_AUFS_SBILIST=y ++# CONFIG_AUFS_HNOTIFY is not set ++# CONFIG_AUFS_EXPORT is not set ++# CONFIG_AUFS_RDU is not set ++# CONFIG_AUFS_PROC_MAP is not set ++# CONFIG_AUFS_SP_IATTR is not set ++# CONFIG_AUFS_SHWH is not set ++# CONFIG_AUFS_BR_RAMFS is not set ++# CONFIG_AUFS_BR_FUSE is not set ++CONFIG_AUFS_BDEV_LOOP=y ++# CONFIG_AUFS_DEBUG is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V2=y @@ -9685,6 +9924,47 @@ index 0000000..f05fc05 + +int get_smip_property_by_name(enum platform_prop); +#endif +diff --git a/arch/x86/include/asm/intel_psh_ipc.h b/arch/x86/include/asm/intel_psh_ipc.h +new file mode 100644 +index 0000000..ed4d3c14 +--- /dev/null ++++ b/arch/x86/include/asm/intel_psh_ipc.h +@@ -0,0 +1,35 @@ ++#ifndef _ASM_X86_INTEL_PSH_IPC_H_ ++#define _ASM_X86_INTEL_PSH_IPC_H_ ++ ++#define CHANNEL_BUSY (1 << 31) ++#define PSH_IPC_CONTINUE (1 << 30) ++ ++struct psh_msg { ++ u32 msg; ++ u32 param; ++}; ++ ++enum psh_channel { ++ PSH_SEND_CH0 = 0, ++ PSH_SEND_CH1, ++ PSH_SEND_CH2, ++ PSH_SEND_CH3, ++ NUM_IA2PSH_IPC, ++ PSH_RECV_CH0 = NUM_IA2PSH_IPC, ++ PSH_RECV_CH1, ++ PSH_RECV_CH2, ++ PSH_RECV_CH3, ++ PSH_RECV_END, ++ NUM_PSH2IA_IPC = PSH_RECV_END - PSH_RECV_CH0, ++ NUM_ALL_CH = NUM_IA2PSH_IPC + NUM_PSH2IA_IPC, ++}; ++ ++typedef void(*psh_channel_handle_t)(u32 msg, u32 param, void *data); ++int intel_ia2psh_command(struct psh_msg *in, struct psh_msg *out, ++ int ch, int timeout); ++int intel_psh_ipc_bind(int ch, psh_channel_handle_t handle, void *data); ++void intel_psh_ipc_unbind(int ch); ++ ++void intel_psh_ipc_disable_irq(void); ++void intel_psh_ipc_enable_irq(void); ++#endif diff --git a/arch/x86/include/asm/intel_scu_flis.h b/arch/x86/include/asm/intel_scu_flis.h new file mode 100644 index 0000000..7cea735 @@ -10357,6 +10637,56 @@ index 0000000..9edb166 +#endif + +#endif +diff --git a/arch/x86/include/asm/intel_sst_mrfld.h b/arch/x86/include/asm/intel_sst_mrfld.h +new file mode 100644 +index 0000000..041ff85 +--- /dev/null ++++ b/arch/x86/include/asm/intel_sst_mrfld.h +@@ -0,0 +1,44 @@ ++/* intel_sst_mrlfd.h - Common enum of the Merrifield platform ++ * ++ * Copyright (C) 2013 Intel Corp ++ * Author: Samreen Nilofer ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ */ ++#ifndef _INTEL_SST_MRFLD_H ++#define _INTEL_SST_MRFLD_H ++ ++enum { ++ MERR_SALTBAY_AUDIO = 0, ++ MERR_SALTBAY_COMPR, ++ MERR_SALTBAY_VOIP, ++ MERR_SALTBAY_PROBE, ++ MERR_SALTBAY_AWARE, ++ MERR_SALTBAY_VAD, ++ MERR_SALTBAY_POWER, ++}; ++ ++enum { ++ MERR_DPCM_AUDIO = 0, ++ MERR_DPCM_DB, ++ MERR_DPCM_LL, ++ MERR_DPCM_COMPR, ++ MERR_DPCM_VOIP, ++ MERR_DPCM_PROBE, ++}; ++ ++#endif diff --git a/arch/x86/include/asm/module.h b/arch/x86/include/asm/module.h index e3b7819..a11269b 100644 --- a/arch/x86/include/asm/module.h @@ -10487,6 +10817,397 @@ index 2f366d0..2d34917 100644 +#endif + #endif /* _ASM_X86_MWAIT_H */ +diff --git a/arch/x86/include/asm/platform_byt_audio.h b/arch/x86/include/asm/platform_byt_audio.h +new file mode 100644 +index 0000000..fed2b1b +--- /dev/null ++++ b/arch/x86/include/asm/platform_byt_audio.h +@@ -0,0 +1,49 @@ ++/* ++ * platform_byt_audio.h: Baytrail audio platform data header file ++ * ++ * (C) Copyright 2013 Intel Corporation ++ * Author: Omair Md Abdullah ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ */ ++#ifndef _PLATFORM_BYT_AUDIO_H_ ++#define _PLATFORM_BYT_AUDIO_H_ ++ ++enum { ++ BYT_AUD_AIF1 = 0, ++ BYT_AUD_AIF2, ++ BYT_AUD_COMPR_DEV, ++#ifdef CONFIG_SND_SOC_COMMS_SSP ++ BYT_COMMS_BT, ++ BYT_COMMS_MODEM, ++#endif /* CONFIG_SND_SOC_COMMS_SSP */ ++ BYT_AUD_PROBE_DEV, ++}; ++ ++enum { ++ BYT_CR_AUD_AIF1 = 0, ++ BYT_CR_AUD_COMPR_DEV, ++ BYT_CR_COMMS_BT, ++}; ++/* LPE viewpoint addresses */ ++/* TODO: move to DSDT */ ++#define SST_BYT_IRAM_PHY_START 0xff2c0000 ++#define SST_BYT_IRAM_PHY_END 0xff2d4000 ++#define SST_BYT_DRAM_PHY_START 0xff300000 ++#define SST_BYT_DRAM_PHY_END 0xff320000 ++#define SST_BYT_IMR_VIRT_START 0xc0000000 /* virtual addr in LPE */ ++#define SST_BYT_IMR_VIRT_END 0xc01fffff ++#define SST_BYT_SHIM_PHY_ADDR 0xff340000 ++#define SST_BYT_MBOX_PHY_ADDR 0xff344000 ++#define SST_BYT_DMA0_PHY_ADDR 0xff298000 ++#define SST_BYT_DMA1_PHY_ADDR 0xff29c000 ++#define SST_BYT_SSP0_PHY_ADDR 0xff2a0000 ++#define SST_BYT_SSP2_PHY_ADDR 0xff2a2000 ++ ++#define BYT_FW_MOD_TABLE_OFFSET 0x80000 ++#define BYT_FW_MOD_TABLE_SIZE 0x100 ++ ++#endif +diff --git a/arch/x86/include/asm/platform_mrfld_audio.h b/arch/x86/include/asm/platform_mrfld_audio.h +new file mode 100644 +index 0000000..e2b1749 +--- /dev/null ++++ b/arch/x86/include/asm/platform_mrfld_audio.h +@@ -0,0 +1,25 @@ ++/* ++ * platform_mrfld_audio.h: MRFLD audio platform data header file ++ * ++ * (C) Copyright 2012 Intel Corporation ++ * Author: Vinod Koul ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ */ ++#ifndef _PLATFORM_MRFLD_AUDIO_H_ ++#define _PLATFORM_MRFLD_AUDIO_H_ ++ ++#include ++ ++struct mrfld_audio_platform_data { ++ const struct soft_platform_id *spid; ++ int codec_gpio; ++ int codec_rst; ++}; ++ ++extern void __init *merfld_audio_platform_data(void *info) __attribute__((weak)); ++extern void __init *merfld_wm8958_audio_platform_data(void *info) __attribute__((weak)); ++#endif +diff --git a/arch/x86/include/asm/platform_sst.h b/arch/x86/include/asm/platform_sst.h +new file mode 100644 +index 0000000..e752ed9 +--- /dev/null ++++ b/arch/x86/include/asm/platform_sst.h +@@ -0,0 +1,132 @@ ++ ++/* ++ * platform_sst.h: sst audio platform data header file ++ * ++ * Copyright (C) 2013 Intel Corporation ++ * Author: Dharageswari R ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ */ ++ ++#ifndef _PLATFORM_SST_H_ ++#define _PLATFORM_SST_H_ ++ ++#include ++ ++#define MAX_NUM_STREAMS_CTP 5 ++#define MAX_NUM_STREAMS_MRFLD 25 ++#define MAX_NUM_STREAMS MAX_NUM_STREAMS_MRFLD ++ ++#define SST_MAX_SSP_PORTS 4 ++#define SST_MAX_DMA 2 ++ ++enum { ++ SST_SSP_AUDIO = 0, ++ SST_SSP_MODEM, ++ SST_SSP_BT, ++ SST_SSP_FM, ++}; ++ ++struct sst_gpio_config { ++ u32 i2s_rx_alt; ++ u32 i2s_tx_alt; ++ u32 i2s_frame; ++ u32 i2s_clock; ++ u32 alt_function; ++}; ++ ++struct sst_ssp_info { ++ u32 base_add; ++ struct sst_gpio_config gpio; ++ bool gpio_in_use; ++}; ++ ++struct sst_info { ++ u32 iram_start; ++ u32 iram_end; ++ bool iram_use; ++ u32 dram_start; ++ u32 dram_end; ++ bool dram_use; ++ u32 imr_start; ++ u32 imr_end; ++ bool imr_use; ++ u32 mailbox_start; ++ bool use_elf; ++ bool lpe_viewpt_rqd; ++ unsigned int max_streams; ++ u32 dma_max_len; ++ u8 num_probes; ++}; ++ ++struct sst_ssp_platform_cfg { ++ u8 ssp_cfg_sst; ++ u8 port_number; ++ u8 is_master; ++ u8 pack_mode; ++ u8 num_slots_per_frame; ++ u8 num_bits_per_slot; ++ u8 active_tx_map; ++ u8 active_rx_map; ++ u8 ssp_frame_format; ++ u8 frame_polarity; ++ u8 serial_bitrate_clk_mode; ++ u8 frame_sync_width; ++ u8 dma_handshake_interface_tx; ++ u8 dma_handshake_interface_rx; ++ u8 network_mode; ++ u8 start_delay; ++ u32 ssp_base_add; ++} __packed; ++ ++struct sst_board_config_data { ++ struct sst_ssp_platform_cfg ssp_platform_data[SST_MAX_SSP_PORTS]; ++ u8 active_ssp_ports; ++ u8 platform_id; ++ u8 board_id; ++ u8 ihf_num_chan; ++ u32 osc_clk_freq; ++} __packed; ++ ++struct sst_platform_config_data { ++ u32 sst_sram_buff_base; ++ u32 sst_dma_base[SST_MAX_DMA]; ++} __packed; ++ ++struct sst_platform_debugfs_data { ++ u32 ssp_reg_size; ++ u32 dma_reg_size; ++ u32 checkpoint_offset; ++ u32 checkpoint_size; ++ u8 num_ssp; ++ u8 num_dma; ++}; ++ ++struct sst_ipc_info { ++ int ipc_offset; ++ bool use_32bit_ops; ++ unsigned int mbox_recv_off; ++}; ++ ++struct sst_lib_dnld_info { ++ unsigned int mod_base; ++ unsigned int mod_end; ++ unsigned int mod_table_offset; ++ unsigned int mod_table_size; ++ bool mod_ddr_dnld; ++}; ++ ++struct sst_platform_info { ++ const struct sst_info *probe_data; ++ const struct sst_ssp_info *ssp_data; ++ const struct sst_board_config_data *bdata; ++ const struct sst_platform_config_data *pdata; ++ const struct sst_ipc_info *ipc_info; ++ const struct sst_platform_debugfs_data *debugfs_data; ++ const struct sst_lib_dnld_info *lib_info; ++}; ++ ++#endif +diff --git a/arch/x86/include/asm/platform_sst_audio.h b/arch/x86/include/asm/platform_sst_audio.h +new file mode 100644 +index 0000000..6333631 +--- /dev/null ++++ b/arch/x86/include/asm/platform_sst_audio.h +@@ -0,0 +1,161 @@ ++/* ++ * platform_sst_audio.h: sst audio platform data header file ++ * ++ * Copyright (C) 2012 Intel Corporation ++ * Author: Jeeja KP ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ */ ++#ifndef _PLATFORM_SST_AUDIO_H_ ++#define _PLATFORM_SST_AUDIO_H_ ++ ++#include ++ ++/* The stream map status is used to dynamically assign ++ * device-id to a device, for example probe device. If ++ * a stream map entry is free for a device then the device-id ++ * for that device will be popluated when the device is ++ * opened and then the status set to IN_USE. When device ++ * is closed, the strm map status is set to FREE again. ++ */ ++enum sst_strm_map_status { ++ SST_DEV_MAP_FREE = 0, ++ SST_DEV_MAP_IN_USE, ++}; ++ ++/* Device IDs for CTP are same as stream IDs */ ++enum sst_audio_device_id_ctp { ++ SST_PCM_OUT0 = 1, ++ SST_PCM_OUT1 = 2, ++ SST_COMPRESSED_OUT = 3, ++ SST_CAPTURE_IN = 4, ++ SST_PROBE_IN = 5, ++}; ++ ++enum sst_audio_task_id_mrfld { ++ SST_TASK_ID_NONE = 0, ++ SST_TASK_ID_SBA = 1, ++ SST_TASK_ID_FBA_UL = 2, ++ SST_TASK_ID_MEDIA = 3, ++ SST_TASK_ID_AWARE = 4, ++ SST_TASK_ID_FBA_DL = 5, ++ SST_TASK_ID_MAX = SST_TASK_ID_FBA_DL, ++}; ++ ++/* Device IDs for Merrifield are Pipe IDs, ++ * ref: LPE DSP command interface spec v0.75 */ ++enum sst_audio_device_id_mrfld { ++ /* Output pipeline IDs */ ++ PIPE_ID_OUT_START = 0x0, ++ PIPE_MODEM_OUT = 0x0, ++ PIPE_BT_OUT = 0x1, ++ PIPE_CODEC_OUT0 = 0x2, ++ PIPE_CODEC_OUT1 = 0x3, ++ PIPE_SPROT_LOOP_OUT = 0x4, ++ PIPE_MEDIA_LOOP1_OUT = 0x5, ++ PIPE_MEDIA_LOOP2_OUT = 0x6, ++ PIPE_PROBE_OUT = 0x7, ++ PIPE_HF_SNS_OUT = 0x8, /* VOCIE_UPLINK_REF2 */ ++ PIPE_HF_OUT = 0x9, /* VOICE_UPLINK_REF1 */ ++ PIPE_SPEECH_OUT = 0xA, /* VOICE UPLINK */ ++ PIPE_RxSPEECH_OUT = 0xB, /* VOICE_DOWNLINK */ ++ PIPE_VOIP_OUT = 0xC, ++ PIPE_PCM0_OUT = 0xD, ++ PIPE_PCM1_OUT = 0xE, ++ PIPE_PCM2_OUT = 0xF, ++ PIPE_AWARE_OUT = 0x10, ++ PIPE_VAD_OUT = 0x11, ++ PIPE_MEDIA0_OUT = 0x12, ++ PIPE_MEDIA1_OUT = 0x13, ++ PIPE_FM_OUT = 0x14, ++ PIPE_PROBE1_OUT = 0x15, ++ PIPE_PROBE2_OUT = 0x16, ++ PIPE_PROBE3_OUT = 0x17, ++ PIPE_PROBE4_OUT = 0x18, ++ PIPE_PROBE5_OUT = 0x19, ++ PIPE_PROBE6_OUT = 0x1A, ++ PIPE_PROBE7_OUT = 0x1B, ++ PIPE_PROBE8_OUT = 0x1C, ++/* Input Pipeline IDs */ ++ PIPE_ID_IN_START = 0x80, ++ PIPE_MODEM_IN = 0x80, ++ PIPE_BT_IN = 0x81, ++ PIPE_CODEC_IN0 = 0x82, ++ PIPE_CODEC_IN1 = 0x83, ++ PIPE_SPROT_LOOP_IN = 0x84, ++ PIPE_MEDIA_LOOP1_IN = 0x85, ++ PIPE_MEDIA_LOOP2_IN = 0x86, ++ PIPE_PROBE_IN = 0x87, ++ PIPE_SIDETONE_IN = 0x88, ++ PIPE_TxSPEECH_IN = 0x89, ++ PIPE_SPEECH_IN = 0x8A, ++ PIPE_TONE_IN = 0x8B, ++ PIPE_VOIP_IN = 0x8C, ++ PIPE_PCM0_IN = 0x8D, ++ PIPE_PCM1_IN = 0x8E, ++ PIPE_MEDIA0_IN = 0x8F, ++ PIPE_MEDIA1_IN = 0x90, ++ PIPE_MEDIA2_IN = 0x91, ++ PIPE_FM_IN = 0x92, ++ PIPE_PROBE1_IN = 0x93, ++ PIPE_PROBE2_IN = 0x94, ++ PIPE_PROBE3_IN = 0x95, ++ PIPE_PROBE4_IN = 0x96, ++ PIPE_PROBE5_IN = 0x97, ++ PIPE_PROBE6_IN = 0x98, ++ PIPE_PROBE7_IN = 0x99, ++ PIPE_PROBE8_IN = 0x9A, ++ PIPE_MEDIA3_IN = 0x9C, ++ PIPE_LOW_PCM0_IN = 0x9D, ++ PIPE_RSVD = 0xFF, ++}; ++ ++/* The stream map for each platform consists of an array of the below ++ * stream map structure. The array index is used as the static stream-id ++ * associated with a device and (dev_num,subdev_num,direction) tuple match ++ * gives the device_id for the device. ++ */ ++struct sst_dev_stream_map { ++ u8 dev_num; ++ u8 subdev_num; ++ u8 direction; ++ u8 device_id; ++ u8 task_id; ++ u8 status; ++}; ++ ++#define MAX_DESCRIPTOR_SIZE 172 ++ ++struct sst_dev_effects_map { ++ char uuid[16]; ++ u16 algo_id; ++ char descriptor[MAX_DESCRIPTOR_SIZE]; ++}; ++ ++struct sst_dev_effects_resource_map { ++ char uuid[16]; ++ unsigned int flags; ++ u16 cpuLoad; ++ u16 memoryUsage; ++}; ++ ++struct sst_dev_effects { ++ struct sst_dev_effects_map *effs_map; ++ struct sst_dev_effects_resource_map *effs_res_map; ++ unsigned int effs_num_map; ++}; ++ ++struct sst_platform_data { ++ /* Intel software platform id*/ ++ const struct soft_platform_id *spid; ++ struct sst_dev_stream_map *pdev_strm_map; ++ struct sst_dev_effects pdev_effs; ++ unsigned int strm_map_size; ++}; ++ ++int add_sst_platform_device(void); ++#endif ++ diff --git a/arch/x86/include/asm/pmic_pdata.h b/arch/x86/include/asm/pmic_pdata.h new file mode 100644 index 0000000..d88c64a @@ -11197,10 +11918,10 @@ index 0000000..57886ea +obj-$(CONFIG_INTEL_DEBUG_FEATURE) += intel_soc_debug.o diff --git a/arch/x86/platform/intel-mid/board.c b/arch/x86/platform/intel-mid/board.c new file mode 100644 -index 0000000..eb9d098 +index 0000000..0f856fa --- /dev/null +++ b/arch/x86/platform/intel-mid/board.c -@@ -0,0 +1,160 @@ +@@ -0,0 +1,166 @@ +/* + * board-blackbay.c: Intel Medfield based board (Blackbay) + * @@ -11263,6 +11984,7 @@ index 0000000..eb9d098 +#include "device_libs/platform_soc_thermal.h" +#include "device_libs/platform_msic_adc.h" +#include "device_libs/platform_bcove_adc.h" ++#include +#include "device_libs/platform_mrfl_thermal.h" + +/* @@ -11278,6 +12000,8 @@ index 0000000..eb9d098 +#include "device_libs/platform_bq24261.h" +#include "device_libs/platform_pcal9555a.h" + ++#include "device_libs/platform_wm8994.h" ++ +/* + * SPI devices + */ @@ -11350,24 +12074,28 @@ index 0000000..eb9d098 + &ipc_device_handler}, + {"bcove_thrm", SFI_DEV_TYPE_IPC, 1, &mrfl_thermal_platform_data, + &ipc_device_handler}, -+ ++ {"wm8994", SFI_DEV_TYPE_I2C, 0, &wm8994_platform_data, NULL}, + /* IPC devices */ + {"pmic_charger", SFI_DEV_TYPE_IPC, 1, &no_platform_data, NULL}, + {"pmic_ccsm", SFI_DEV_TYPE_IPC, 1, &mrfl_pmic_ccsm_platform_data, + &ipc_device_handler}, + {"i2c_pmic_adap", SFI_DEV_TYPE_IPC, 1, &mrfl_pmic_i2c_platform_data, + &ipc_device_handler}, ++ {"mrfld_wm8958", SFI_DEV_TYPE_IPC, 1, &merfld_wm8958_audio_platform_data, ++ &ipc_device_handler}, + {"soc_thrm", SFI_DEV_TYPE_IPC, 1, &no_platform_data, + &soc_thrm_device_handler}, ++ {"wm8958", SFI_DEV_TYPE_I2C, 0, &wm8994_platform_data, NULL}, + {}, +}; diff --git a/arch/x86/platform/intel-mid/device_libs/Makefile b/arch/x86/platform/intel-mid/device_libs/Makefile new file mode 100644 -index 0000000..750ac8f +index 0000000..7fc1a26 --- /dev/null +++ b/arch/x86/platform/intel-mid/device_libs/Makefile -@@ -0,0 +1,64 @@ +@@ -0,0 +1,66 @@ +# IPC Devices ++obj-y += platform_sst_audio.o +obj-y += platform_mrfl_regulator.o +obj-y += platform_soc_thermal.o +obj-$(subst m,y,$(CONFIG_SND_BYT_MACHINE)) += platform_byt_audio.o @@ -11405,6 +12133,7 @@ index 0000000..750ac8f +obj-$(subst m,y,$(CONFIG_GPIO_PCA953X)) += platform_tca6416.o +obj-$(subst m,y,$(CONFIG_BQ24261_CHARGER)) += platform_bq24261.o +obj-$(subst m,y,$(CONFIG_GPIO_PCA953X)) += platform_pcal9555a.o ++obj-$(subst m,y,$(CONFIG_SND_SOC_WM8994)) += platform_wm8994.o +# SPI Devices +obj-$(subst m,y,$(CONFIG_SERIAL_MRST_MAX3110)) += platform_max3111.o +obj-$(subst m,y,$(CONFIG_SPI_SPIDEV)) += platform_spidev.o @@ -12073,6 +12802,241 @@ index 0000000..9f14952 + (void *dev_id, int card_present))); +#endif + +diff --git a/arch/x86/platform/intel-mid/device_libs/pci/platform_sst_pci.c b/arch/x86/platform/intel-mid/device_libs/pci/platform_sst_pci.c +new file mode 100644 +index 0000000..8721c3a +--- /dev/null ++++ b/arch/x86/platform/intel-mid/device_libs/pci/platform_sst_pci.c +@@ -0,0 +1,229 @@ ++/* ++ * platform_sst_pci.c: SST platform data initilization file ++ * ++ * (C) Copyright 2013 Intel Corporation ++ * Author: Dharageswari R ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define CTP_SSP_BASE 0xffa23000 ++#define CTP_DMA_BASE 0xffaf8000 ++#define MRFLD_SSP_BASE 0xff2a0000 ++#define MRFLD_DMA_BASE 0xff298000 ++#define CTP_MAX_CONFIG_SIZE 500 ++ ++#define SST_CTP_IRAM_START 0 ++#define SST_CTP_IRAM_END 0x80000 ++#define SST_CTP_DRAM_START 0x400000 ++#define SST_CTP_DRAM_END 0x480000 ++#define SSP_SIZE 0x1000 ++#define DMA_SIZE_CTP 0x1000 ++#define DMA_SIZE_MRFLD 0x4000 ++#define SST_CHECKPOINT_OFFSET 0x1C00 ++#define SST_CHECKPOINT_OFFSET_MRFLD 0x0C00 ++#define CHECKPOINT_DUMP_SZ 256 ++ ++#define SST_V1_MAILBOX_RECV 0x800 ++#define SST_V2_MAILBOX_RECV 0x400 ++ ++#define MRFLD_FW_LSP_DDR_BASE 0xC5E00000 ++#define MRFLD_FW_MOD_END (MRFLD_FW_LSP_DDR_BASE + 0x1FFFFF) ++#define MRFLD_FW_MOD_TABLE_OFFSET 0x80000 ++#define MRFLD_FW_MOD_TABLE_SIZE 0x100 ++ ++struct sst_platform_info sst_data; ++ ++static struct sst_ssp_info ssp_inf_ctp = { ++ .base_add = CTP_SSP_BASE, ++ .gpio = { ++ .alt_function = LNW_ALT_2, ++ }, ++ .gpio_in_use = true, ++}; ++ ++static struct sst_ssp_info ssp_inf_mrfld = { ++ .base_add = MRFLD_SSP_BASE, ++ .gpio_in_use = false, ++}; ++ ++static const struct sst_platform_config_data sst_ctp_pdata = { ++ .sst_sram_buff_base = 0xfffc0000, ++ .sst_dma_base[0] = CTP_DMA_BASE, ++ .sst_dma_base[1] = 0x0, ++}; ++ ++static struct sst_platform_config_data sst_mrfld_pdata = { ++ .sst_dma_base[0] = MRFLD_DMA_BASE, ++ .sst_dma_base[1] = 0x0, ++}; ++ ++static const struct sst_board_config_data sst_ctp_bdata = { ++ .active_ssp_ports = 4, ++ .platform_id = 2,/*FIXME: Once the firmware fix is available*/ ++ .board_id = 1,/*FIXME: Once the firmware fix is available*/ ++ .ihf_num_chan = 2, ++ .osc_clk_freq = 19200000, ++ .ssp_platform_data = { ++ [SST_SSP_AUDIO] = { ++ .ssp_cfg_sst = 1, ++ .port_number = 3, ++ .is_master = 1, ++ .pack_mode = 1, ++ .num_slots_per_frame = 2, ++ .num_bits_per_slot = 25, ++ .active_tx_map = 3, ++ .active_rx_map = 3, ++ .ssp_frame_format = 3, ++ .frame_polarity = 0, ++ .serial_bitrate_clk_mode = 0, ++ .frame_sync_width = 24, ++ .dma_handshake_interface_tx = 5, ++ .dma_handshake_interface_rx = 4, ++ .ssp_base_add = 0xFFA23000, ++ }, ++ [SST_SSP_MODEM] = {0}, ++ [SST_SSP_BT] = {0}, ++ [SST_SSP_FM] = {0}, ++ }, ++}; ++ ++static const struct sst_info ctp_sst_info = { ++ .iram_start = SST_CTP_IRAM_START, ++ .iram_end = SST_CTP_IRAM_END, ++ .iram_use = true, ++ .dram_start = SST_CTP_DRAM_START, ++ .dram_end = SST_CTP_DRAM_END, ++ .dram_use = true, ++ .imr_start = 0, ++ .imr_end = 0, ++ .imr_use = false, ++ .mailbox_start = 0, ++ .lpe_viewpt_rqd = false, ++ .use_elf = false, ++ .max_streams = MAX_NUM_STREAMS_CTP, ++ .dma_max_len = (SST_MAX_DMA_LEN * 4), ++ .num_probes = 1, ++}; ++ ++static const struct sst_ipc_info ctp_ipc_info = { ++ .use_32bit_ops = true, ++ .ipc_offset = 0, ++ .mbox_recv_off = SST_V1_MAILBOX_RECV, ++}; ++ ++static const struct sst_info mrfld_sst_info = { ++ .iram_start = 0, ++ .iram_end = 0, ++ .iram_use = false, ++ .dram_start = 0, ++ .dram_end = 0, ++ .dram_use = false, ++ .imr_start = 0, ++ .imr_end = 0, ++ .imr_use = false, ++ .mailbox_start = 0, ++ .use_elf = true, ++ .lpe_viewpt_rqd = false, ++ .max_streams = MAX_NUM_STREAMS_MRFLD, ++ .dma_max_len = SST_MAX_DMA_LEN_MRFLD, ++ .num_probes = 16, ++}; ++ ++static struct sst_platform_debugfs_data ctp_debugfs_data = { ++ .ssp_reg_size = SSP_SIZE, ++ .dma_reg_size = DMA_SIZE_CTP, ++ .num_ssp = 1, ++ .num_dma = 1, ++ .checkpoint_offset = SST_CHECKPOINT_OFFSET, ++ .checkpoint_size = CHECKPOINT_DUMP_SZ, ++}; ++ ++static struct sst_platform_debugfs_data mrfld_debugfs_data = { ++ .ssp_reg_size = SSP_SIZE, ++ .dma_reg_size = DMA_SIZE_MRFLD, ++ .num_ssp = 3, ++ .num_dma = 2, ++ .checkpoint_offset = SST_CHECKPOINT_OFFSET_MRFLD, ++ .checkpoint_size = CHECKPOINT_DUMP_SZ, ++}; ++ ++static const struct sst_ipc_info mrfld_ipc_info = { ++ .use_32bit_ops = false, ++ .ipc_offset = 0, ++ .mbox_recv_off = SST_V2_MAILBOX_RECV, ++}; ++ ++static const struct sst_lib_dnld_info mrfld_lib_dnld_info = { ++ .mod_base = MRFLD_FW_LSP_DDR_BASE, ++ .mod_end = MRFLD_FW_MOD_END, ++ .mod_table_offset = MRFLD_FW_MOD_TABLE_OFFSET, ++ .mod_table_size = MRFLD_FW_MOD_TABLE_SIZE, ++ .mod_ddr_dnld = true, ++}; ++ ++static int set_ctp_sst_config(struct sst_platform_info *sst_info) ++{ ++ unsigned int conf_len; ++ ++ ssp_inf_ctp.gpio.i2s_rx_alt = get_gpio_by_name("gpio_i2s3_rx"); ++ ssp_inf_ctp.gpio.i2s_tx_alt = get_gpio_by_name("gpio_i2s3_rx"); ++ ssp_inf_ctp.gpio.i2s_frame = get_gpio_by_name("gpio_i2s3_fs"); ++ ssp_inf_ctp.gpio.i2s_clock = get_gpio_by_name("gpio_i2s3_clk"); ++ ++ sst_info->ssp_data = &ssp_inf_ctp; ++ conf_len = sizeof(sst_ctp_pdata) + sizeof(sst_ctp_bdata); ++ if (conf_len > CTP_MAX_CONFIG_SIZE) ++ return -EINVAL; ++ sst_info->pdata = &sst_ctp_pdata; ++ sst_info->bdata = &sst_ctp_bdata; ++ sst_info->probe_data = &ctp_sst_info; ++ sst_info->ipc_info = &ctp_ipc_info; ++ sst_info->debugfs_data = &ctp_debugfs_data; ++ sst_info->lib_info = NULL; ++ ++ return 0; ++} ++ ++static void set_mrfld_sst_config(struct sst_platform_info *sst_info) ++{ ++ sst_info->ssp_data = &ssp_inf_mrfld; ++ sst_info->pdata = &sst_mrfld_pdata; ++ sst_info->bdata = NULL; ++ sst_info->probe_data = &mrfld_sst_info; ++ sst_info->ipc_info = &mrfld_ipc_info; ++ sst_info->debugfs_data = &mrfld_debugfs_data; ++ sst_info->lib_info = &mrfld_lib_dnld_info; ++ ++ return ; ++ ++} ++ ++static struct sst_platform_info *get_sst_platform_data(struct pci_dev *pdev) ++{ ++ struct sst_platform_info *sst_pinfo = NULL; ++ ++ set_mrfld_sst_config(&sst_data); ++ sst_pinfo = &sst_data; ++ ++ return sst_pinfo; ++} ++ ++static void sst_pci_early_quirks(struct pci_dev *pci_dev) ++{ ++ pci_dev->dev.platform_data = get_sst_platform_data(pci_dev); ++} ++ ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SST_MRFLD, ++ sst_pci_early_quirks); diff --git a/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c b/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c new file mode 100644 index 0000000..4deead8 @@ -12913,7 +13877,7 @@ index 0000000..5095329 +#endif diff --git a/arch/x86/platform/intel-mid/device_libs/platform_hsu.c b/arch/x86/platform/intel-mid/device_libs/platform_hsu.c new file mode 100644 -index 0000000..293793e +index 0000000..f1e3d29 --- /dev/null +++ b/arch/x86/platform/intel-mid/device_libs/platform_hsu.c @@ -0,0 +1,440 @@ @@ -12970,7 +13934,7 @@ index 0000000..293793e + }, + [hsu_port1] = { + .id = 1, -+ .name = HSU_GPS_PORT, ++ .name = HSU_UART1_PORT, + .wake_gpio = 130, + .rx_gpio = 130, + .rx_alt = 1, @@ -12983,7 +13947,7 @@ index 0000000..293793e + }, + [hsu_port2] = { + .id = 2, -+ .name = HSU_DEBUG_PORT, ++ .name = HSU_UART2_PORT, + .wake_gpio = 134, + .rx_gpio = 134, + .rx_alt = 1, @@ -13017,7 +13981,7 @@ index 0000000..293793e + .type = gps_port, + .hw_ip = hsu_intel, + .index = 1, -+ .name = HSU_GPS_PORT, ++ .name = HSU_UART1_PORT, + .idle = 30, + .preamble = 1, + .hw_init = intel_mid_hsu_init, @@ -13033,7 +13997,7 @@ index 0000000..293793e + .type = debug_port, + .hw_ip = hsu_intel, + .index = 2, -+ .name = HSU_DEBUG_PORT, ++ .name = HSU_UART2_PORT, + .idle = 5000, + .hw_init = intel_mid_hsu_init, + .hw_set_alt = intel_mid_hsu_switch, @@ -13359,7 +14323,7 @@ index 0000000..293793e +fs_initcall(hsu_dev_platform_data); diff --git a/arch/x86/platform/intel-mid/device_libs/platform_hsu.h b/arch/x86/platform/intel-mid/device_libs/platform_hsu.h new file mode 100644 -index 0000000..1a0182c +index 0000000..7bc6eaf --- /dev/null +++ b/arch/x86/platform/intel-mid/device_libs/platform_hsu.h @@ -0,0 +1,56 @@ @@ -13378,9 +14342,9 @@ index 0000000..1a0182c +#define _PLATFORM_HSU_H_ + +#define HSU_BT_PORT "hsu_bt_port" -+#define HSU_MODEM_PORT "hsu_modem_port" -+#define HSU_GPS_PORT "hsu_gps_port" -+#define HSU_DEBUG_PORT "hsu_debug_port" ++#define HSU_UART0_PORT "hsu_uart0_port" ++#define HSU_UART1_PORT "hsu_uart1_port" ++#define HSU_UART2_PORT "hsu_uart2_port" + +enum hsu_core { + hsu_pnw, @@ -14506,6 +15470,142 @@ index 0000000..f1011a1 +}; + +#endif +diff --git a/arch/x86/platform/intel-mid/device_libs/platform_mrfld_audio.c b/arch/x86/platform/intel-mid/device_libs/platform_mrfld_audio.c +new file mode 100644 +index 0000000..b37818e +--- /dev/null ++++ b/arch/x86/platform/intel-mid/device_libs/platform_mrfld_audio.c +@@ -0,0 +1,130 @@ ++/* ++ * platform_mrfld_audio.c: MRFLD audio platform data initilization file ++ * ++ * (C) Copyright 2012 Intel Corporation ++ * Author: Dharageswari R ++ * Vinod Koul ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "platform_msic.h" ++ ++static struct mrfld_audio_platform_data mrfld_audio_pdata; ++ ++void *merfld_audio_platform_data(void *info) ++{ ++ struct platform_device *pdev; ++ int ret; ++ ++ pr_debug("in %s\n", __func__); ++ ++ ret = add_sst_platform_device(); ++ if (ret < 0) { ++ pr_err("%s failed to sst_platform device\n", __func__); ++ return NULL; ++ } ++ ++ pdev = platform_device_alloc("hdmi-audio", -1); ++ if (!pdev) { ++ pr_err("failed to allocate hdmi-audio platform device\n"); ++ return NULL; ++ } ++ ++ ret = platform_device_add(pdev); ++ if (ret) { ++ pr_err("failed to add hdmi-audio platform device\n"); ++ platform_device_put(pdev); ++ return NULL; ++ } ++ ++ /* request the gpios for audio */ ++ mrfld_audio_pdata.codec_gpio = get_gpio_by_name("audiocodec_int"); ++ mrfld_audio_pdata.codec_rst = get_gpio_by_name("audiocodec_rst"); ++ ++ pdev = platform_device_alloc("mrfld_lm49453", -1); ++ if (!pdev) { ++ pr_err("failed to allocate mrfld_lm49453 platform device\n"); ++ return NULL; ++ } ++ ++ ret = platform_device_add(pdev); ++ if (ret) { ++ pr_err("failed to add mrfld_lm49453 platform device\n"); ++ platform_device_put(pdev); ++ return NULL; ++ } ++ if (platform_device_add_data(pdev, &mrfld_audio_pdata, ++ sizeof(mrfld_audio_pdata))) { ++ pr_err("failed to add mrfld_lm49453 platform data\n"); ++ platform_device_put(pdev); ++ return NULL; ++ } ++ ++ register_rpmsg_service("rpmsg_msic_mrfld_audio", RPROC_SCU, ++ RP_MSIC_MRFLD_AUDIO); ++ ++ return NULL; ++} ++ ++void *merfld_wm8958_audio_platform_data(void *info) ++{ ++ struct platform_device *pdev; ++ int ret; ++ ++ ret = add_sst_platform_device(); ++ if (ret < 0) { ++ pr_err("%s failed to sst_platform device\n", __func__); ++ return NULL; ++ } ++ ++ pdev = platform_device_alloc("hdmi-audio", -1); ++ if (!pdev) { ++ pr_err("failed to allocate hdmi-audio platform device\n"); ++ return NULL; ++ } ++ ++ ret = platform_device_add(pdev); ++ if (ret) { ++ pr_err("failed to add hdmi-audio platform device\n"); ++ platform_device_put(pdev); ++ return NULL; ++ } ++ ++ pdev = platform_device_alloc("mrfld_wm8958", -1); ++ if (!pdev) { ++ pr_err("failed to allocate mrfld_wm8958 platform device\n"); ++ return NULL; ++ } ++ ++ ret = platform_device_add(pdev); ++ if (ret) { ++ pr_err("failed to add mrfld_wm8958 platform device\n"); ++ platform_device_put(pdev); ++ return NULL; ++ } ++ if (platform_device_add_data(pdev, &mrfld_audio_pdata, ++ sizeof(mrfld_audio_pdata))) { ++ pr_err("failed to add mrfld_wm8958 platform data\n"); ++ platform_device_put(pdev); ++ return NULL; ++ } ++ ++ register_rpmsg_service("rpmsg_mrfld_wm8958_audio", RPROC_SCU, ++ RP_MSIC_MRFLD_AUDIO); ++ ++ return NULL; ++} diff --git a/arch/x86/platform/intel-mid/device_libs/platform_msic.c b/arch/x86/platform/intel-mid/device_libs/platform_msic.c new file mode 100644 index 0000000..a601f2c @@ -16232,7 +17332,7 @@ index 0000000..c8ece32 +#endif diff --git a/arch/x86/platform/intel-mid/device_libs/platform_spidev.c b/arch/x86/platform/intel-mid/device_libs/platform_spidev.c new file mode 100644 -index 0000000..8eaa92f +index 0000000..c6b3f7b --- /dev/null +++ b/arch/x86/platform/intel-mid/device_libs/platform_spidev.c @@ -0,0 +1,73 @@ @@ -16271,7 +17371,7 @@ index 0000000..8eaa92f + +static void tng_ssp_spi_cs_control(u32 command) +{ -+ gpio_set_value(tng_ssp_spi2_FS_gpio, (command == CS_ASSERT) ? 0 : 1); ++ gpio_set_value(tng_ssp_spi2_FS_gpio, (command != 0) ? 1 : 0); +} + +static void tng_ssp_spi_platform_pinmux(void) @@ -16335,6 +17435,164 @@ index 0000000..a40ef8f + +extern void *spidev_platform_data(void *info) __attribute__((weak)); +#endif +diff --git a/arch/x86/platform/intel-mid/device_libs/platform_sst_audio.c b/arch/x86/platform/intel-mid/device_libs/platform_sst_audio.c +new file mode 100644 +index 0000000..7270162 +--- /dev/null ++++ b/arch/x86/platform/intel-mid/device_libs/platform_sst_audio.c +@@ -0,0 +1,152 @@ ++/* ++ * platform_sst_libs.c: SST platform data initilization file ++ * ++ * Copyright (C) 2012 Intel Corporation ++ * Author: Jeeja KP ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static struct sst_platform_data sst_platform_pdata; ++ ++#if IS_BUILTIN(CONFIG_SST_MRFLD_DPCM) ++static struct sst_dev_stream_map mrfld_strm_map[] = { ++ {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}, /* Reserved, not in use */ ++ {MERR_DPCM_AUDIO, 0, SNDRV_PCM_STREAM_PLAYBACK, PIPE_MEDIA1_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_DB, 0, SNDRV_PCM_STREAM_PLAYBACK, PIPE_MEDIA3_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_LL, 0, SNDRV_PCM_STREAM_PLAYBACK, PIPE_LOW_PCM0_IN, SST_TASK_ID_SBA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_COMPR, 0, SNDRV_PCM_STREAM_PLAYBACK, PIPE_MEDIA0_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_VOIP, 0, SNDRV_PCM_STREAM_PLAYBACK, PIPE_VOIP_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 0, SNDRV_PCM_STREAM_PLAYBACK, PIPE_PROBE1_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 1, SNDRV_PCM_STREAM_PLAYBACK, PIPE_PROBE2_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 2, SNDRV_PCM_STREAM_PLAYBACK, PIPE_PROBE3_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 3, SNDRV_PCM_STREAM_PLAYBACK, PIPE_PROBE4_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 4, SNDRV_PCM_STREAM_PLAYBACK, PIPE_PROBE5_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 5, SNDRV_PCM_STREAM_PLAYBACK, PIPE_PROBE6_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 6, SNDRV_PCM_STREAM_PLAYBACK, PIPE_PROBE7_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 7, SNDRV_PCM_STREAM_PLAYBACK, PIPE_PROBE8_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_AUDIO, 0, SNDRV_PCM_STREAM_CAPTURE, PIPE_PCM1_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_VOIP, 0, SNDRV_PCM_STREAM_CAPTURE, PIPE_VOIP_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 0, SNDRV_PCM_STREAM_CAPTURE, PIPE_PROBE1_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 1, SNDRV_PCM_STREAM_CAPTURE, PIPE_PROBE2_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 2, SNDRV_PCM_STREAM_CAPTURE, PIPE_PROBE3_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 3, SNDRV_PCM_STREAM_CAPTURE, PIPE_PROBE4_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 4, SNDRV_PCM_STREAM_CAPTURE, PIPE_PROBE5_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 5, SNDRV_PCM_STREAM_CAPTURE, PIPE_PROBE6_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 6, SNDRV_PCM_STREAM_CAPTURE, PIPE_PROBE7_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_DPCM_PROBE, 7, SNDRV_PCM_STREAM_CAPTURE, PIPE_PROBE8_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++}; ++#else ++static struct sst_dev_stream_map mrfld_strm_map[] = { ++ {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}, /* Reserved, not in use */ ++ {MERR_SALTBAY_AUDIO, 0, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_AUDIO, 1, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_AUDIO, 2, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_COMPR, 0, SNDRV_PCM_STREAM_PLAYBACK, PIPE_MEDIA0_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_SALTBAY_VOIP, 0, SNDRV_PCM_STREAM_PLAYBACK, PIPE_VOIP_IN, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_SALTBAY_AUDIO, 0, SNDRV_PCM_STREAM_CAPTURE, PIPE_PCM1_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_SALTBAY_VOIP, 0, SNDRV_PCM_STREAM_CAPTURE, PIPE_VOIP_OUT, SST_TASK_ID_MEDIA, SST_DEV_MAP_IN_USE}, ++ {MERR_SALTBAY_PROBE, 0, SNDRV_PCM_STREAM_CAPTURE, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 1, SNDRV_PCM_STREAM_CAPTURE, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 2, SNDRV_PCM_STREAM_CAPTURE, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 3, SNDRV_PCM_STREAM_CAPTURE, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 4, SNDRV_PCM_STREAM_CAPTURE, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 5, SNDRV_PCM_STREAM_CAPTURE, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 6, SNDRV_PCM_STREAM_CAPTURE, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 7, SNDRV_PCM_STREAM_CAPTURE, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 0, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 1, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 2, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 3, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 4, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 5, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 6, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_PROBE, 7, SNDRV_PCM_STREAM_PLAYBACK, PIPE_RSVD, SST_TASK_ID_MEDIA, SST_DEV_MAP_FREE}, ++ {MERR_SALTBAY_AWARE, 0, SNDRV_PCM_STREAM_CAPTURE, PIPE_AWARE_OUT, SST_TASK_ID_AWARE, SST_DEV_MAP_IN_USE}, ++ {MERR_SALTBAY_VAD, 0, SNDRV_PCM_STREAM_CAPTURE, PIPE_VAD_OUT, SST_TASK_ID_AWARE, SST_DEV_MAP_IN_USE}, ++}; ++#endif ++ ++#define EQ_EFFECT_ALGO_ID 0x99 ++static struct sst_dev_effects_map mrfld_effs_map[] = { ++ { ++ {0xc1, 0x47, 0xa2, 0xf7, 0x7b, 0x1a, 0xe0, 0x11, 0x0d, 0xbb, 0x2a, 0x30, 0xdf, 0xd7, 0x20, 0x45},/* uuid */ ++ EQ_EFFECT_ALGO_ID, /* algo id */ ++ {0x00, 0x43, 0xed, 0x0b, 0xd6, 0xdd, 0xdb, 0x11, 0x34, 0x8f, 0x00, 0x02, 0xa5, 0xd5, 0xc5, 0x1b, /* descriptor */ ++ 0xc1, 0x47, 0xa2, 0xf7, 0x7b, 0x1a, 0xe0, 0x11, 0x0d, 0xbb, 0x2a, 0x30, 0xdf, 0xd7, 0x20, 0x45, ++ 0x12, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x45, 0x71, 0x75, 0x61, ++ 0x6c, 0x69, 0x7a, 0x65, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49, 0x6e, 0x74, 0x65, ++ 0x6c, 0x20, 0x43, 0x6f, 0x72, 0x70, 0x6f, 0x72, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 ++ }, ++ } ++}; ++ ++static struct sst_dev_effects_resource_map mrfld_effs_res_map[] = { ++ { ++ {0xc1, 0x47, 0xa2, 0xf7, 0x7b, 0x1a, 0xe0, 0x11, 0x0d, 0xbb, 0x2a, 0x30, 0xdf, 0xd7, 0x20, 0x45}, /* uuid */ ++ 0x50, /* Flags */ ++ 0x00, /* Cpu load */ ++ 0x01, /* Memory Usage */ ++ } ++}; ++ ++static void set_mrfld_platform_config(void) ++{ ++ sst_platform_pdata.pdev_strm_map = mrfld_strm_map; ++ sst_platform_pdata.strm_map_size = ARRAY_SIZE(mrfld_strm_map); ++ sst_platform_pdata.pdev_effs.effs_map = mrfld_effs_map; ++ sst_platform_pdata.pdev_effs.effs_res_map = mrfld_effs_res_map; ++ sst_platform_pdata.pdev_effs.effs_num_map = ARRAY_SIZE(mrfld_effs_map); ++} ++ ++static void populate_platform_data(void) ++{ ++ set_mrfld_platform_config(); ++} ++ ++int add_sst_platform_device(void) ++{ ++ struct platform_device *pdev = NULL; ++ int ret; ++ ++ populate_platform_data(); ++ ++ pdev = platform_device_alloc("sst-platform", -1); ++ if (!pdev) { ++ pr_err("failed to allocate audio platform device\n"); ++ return -EINVAL; ++ } ++ ++ ret = platform_device_add_data(pdev, &sst_platform_pdata, ++ sizeof(sst_platform_pdata)); ++ if (ret) { ++ pr_err("failed to add sst platform data\n"); ++ platform_device_put(pdev); ++ return -EINVAL; ++ } ++ ret = platform_device_add(pdev); ++ if (ret) { ++ pr_err("failed to add audio platform device\n"); ++ platform_device_put(pdev); ++ return -EINVAL; ++ } ++ return ret; ++} diff --git a/arch/x86/platform/intel-mid/device_libs/platform_tc35876x.c b/arch/x86/platform/intel-mid/device_libs/platform_tc35876x.c new file mode 100644 index 0000000..127091d @@ -16842,6 +18100,244 @@ index 0000000..909f697 + +extern void __init *wl12xx_platform_data(void *info) __attribute__((weak)); +#endif +diff --git a/arch/x86/platform/intel-mid/device_libs/platform_wm8994.c b/arch/x86/platform/intel-mid/device_libs/platform_wm8994.c +new file mode 100644 +index 0000000..82ada45 +--- /dev/null ++++ b/arch/x86/platform/intel-mid/device_libs/platform_wm8994.c +@@ -0,0 +1,221 @@ ++/* ++ * platform_wm8994.c: wm8994 platform data initilization file ++ * ++ * (C) Copyright 2013 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "platform_wm8994.h" ++ ++/***********WM89941 REGUATOR platform data*************/ ++static struct regulator_consumer_supply vwm89941_consumer[] = { ++ REGULATOR_SUPPLY("DBVDD", "1-001a"), ++ REGULATOR_SUPPLY("DBVDD1", "1-001a"), ++ REGULATOR_SUPPLY("DBVDD2", "1-001a"), ++ REGULATOR_SUPPLY("DBVDD3", "1-001a"), ++ REGULATOR_SUPPLY("AVDD2", "1-001a"), ++ REGULATOR_SUPPLY("CPVDD", "1-001a"), ++}; ++ ++static struct regulator_init_data vwm89941_data = { ++ .constraints = { ++ .always_on = 1, ++ }, ++ .num_consumer_supplies = ARRAY_SIZE(vwm89941_consumer), ++ .consumer_supplies = vwm89941_consumer, ++}; ++ ++static struct fixed_voltage_config vwm89941_config = { ++ .supply_name = "VCC_1.8V_PDA", ++ .microvolts = 1800000, ++ .gpio = -EINVAL, ++ .init_data = &vwm89941_data, ++}; ++ ++static struct platform_device vwm89941_device = { ++ .name = "reg-fixed-voltage", ++ .id = 0, ++ .dev = { ++ .platform_data = &vwm89941_config, ++ }, ++}; ++ ++/***********WM89942 REGUATOR platform data*************/ ++static struct regulator_consumer_supply vwm89942_consumer[] = { ++ REGULATOR_SUPPLY("SPKVDD1", "1-001a"), ++ REGULATOR_SUPPLY("SPKVDD2", "1-001a"), ++}; ++ ++static struct regulator_init_data vwm89942_data = { ++ .constraints = { ++ .always_on = 1, ++ }, ++ .num_consumer_supplies = ARRAY_SIZE(vwm89942_consumer), ++ .consumer_supplies = vwm89942_consumer, ++}; ++ ++static struct fixed_voltage_config vwm89942_config = { ++ .supply_name = "V_BAT", ++ .microvolts = 3700000, ++ .gpio = -EINVAL, ++ .init_data = &vwm89942_data, ++}; ++ ++static struct platform_device vwm89942_device = { ++ .name = "reg-fixed-voltage", ++ .id = 1, ++ .dev = { ++ .platform_data = &vwm89942_config, ++ }, ++}; ++ ++static struct platform_device wm8994_ldo1_device; ++static struct platform_device wm8994_ldo2_device; ++static struct platform_device *wm1811a_reg_devices[] __initdata = { ++ &vwm89941_device, ++ &vwm89942_device, ++ &wm8994_ldo1_device, ++ &wm8994_ldo2_device ++}; ++ ++static struct platform_device *wm8958_reg_devices[] __initdata = { ++ &vwm89941_device, ++ &vwm89942_device ++}; ++ ++static struct regulator_consumer_supply wm8994_avdd1_supply = ++ REGULATOR_SUPPLY("AVDD1", "1-001a"); ++ ++static struct regulator_consumer_supply wm8994_dcvdd_supply = ++ REGULATOR_SUPPLY("DCVDD", "1-001a"); ++ ++static struct regulator_init_data wm8994_ldo1_data = { ++ .constraints = { ++ .always_on = 1, ++ .name = "AVDD1_3.0V", ++ .valid_ops_mask = REGULATOR_CHANGE_STATUS, ++ }, ++ .num_consumer_supplies = 1, ++ .consumer_supplies = &wm8994_avdd1_supply, ++}; ++ ++static struct fixed_voltage_config wm8994_ldo1_config = { ++ .supply_name = "V_BAT_X", ++ .microvolts = 3700000, ++ .gpio = -EINVAL, ++ .init_data = &wm8994_ldo1_data, ++}; ++ ++static struct platform_device wm8994_ldo1_device = { ++ .name = "reg-fixed-voltage", ++ .id = 2, ++ .dev = { ++ .platform_data = &wm8994_ldo1_config, ++ }, ++}; ++ ++ ++static struct regulator_init_data wm8994_ldo2_data = { ++ .constraints = { ++ .always_on = 1, ++ .name = "DCVDD_1.0V", ++ }, ++ .num_consumer_supplies = 1, ++ .consumer_supplies = &wm8994_dcvdd_supply, ++}; ++ ++static struct fixed_voltage_config wm8994_ldo2_config = { ++ .supply_name = "V_BAT_Y", ++ .microvolts = 3700000, ++ .gpio = -EINVAL, ++ .init_data = &wm8994_ldo2_data, ++}; ++ ++static struct platform_device wm8994_ldo2_device = { ++ .name = "reg-fixed-voltage", ++ .id = 3, ++ .dev = { ++ .platform_data = &wm8994_ldo2_config, ++ }, ++}; ++ ++static struct wm8958_custom_config custom_config = { ++ .format = 6, ++ .rate = 48000, ++ .channels = 2, ++}; ++ ++static struct wm8994_pdata wm8994_pdata = { ++ /* configure gpio1 function: 0x0001(Logic level input/output) */ ++ .gpio_defaults[0] = 0x0003, ++ .irq_flags = IRQF_TRIGGER_RISING | IRQF_ONESHOT, ++ /* FIXME: Below are 1811A specfic, we need to use SPID for these */ ++ ++ /* configure gpio3/4/5/7 function for AIF2 voice */ ++ .gpio_defaults[2] = 0x8100, ++ .gpio_defaults[3] = 0x8100, ++ .gpio_defaults[4] = 0x8100, ++ .gpio_defaults[6] = 0x0100, ++ /* configure gpio8/9/10/11 function for AIF3 BT */ ++ /* gpio7 is codec intr pin for GV M2 */ ++ .gpio_defaults[7] = 0x0003, ++ .gpio_defaults[8] = 0x0105, ++ .gpio_defaults[9] = 0x0100, ++ .gpio_defaults[10] = 0x0100, ++ .ldo[0] = { 0, &wm8994_ldo1_data }, /* set actual value at wm8994_platform_data() */ ++ .ldo[1] = { 0, &wm8994_ldo2_data }, ++ .ldo_ena_always_driven = 1, ++ ++ .mic_id_delay = 300, /*300ms delay*/ ++ .micdet_delay = 500, ++ .micb_en_delay = 5000, /* Keeps MICBIAS2 high for 5sec during jack insertion/removal */ ++ ++ .custom_cfg = &custom_config, ++}; ++ ++static int wm8994_get_irq_data(struct wm8994_pdata *pdata, ++ struct i2c_board_info *i2c_info, char *name) ++{ ++ int codec_gpio; ++ ++ /* alek tells me that since driver is registering a new chip ++ * irq we need to give it a base which is unused so put ++ * 256+192 here */ ++ pdata->irq_base = (256 + 192); ++ codec_gpio = get_gpio_by_name(name); ++ if (codec_gpio < 0) { ++ pr_err("%s failed for : %d\n", __func__, codec_gpio); ++ return -EINVAL; ++ } ++ i2c_info->irq = codec_gpio + INTEL_MID_IRQ_OFFSET; ++ return codec_gpio; ++} ++ ++void __init *wm8994_platform_data(void *info) ++{ ++ struct i2c_board_info *i2c_info = (struct i2c_board_info *)info; ++ int irq = 0; ++ ++ platform_add_devices(wm8958_reg_devices, ++ ARRAY_SIZE(wm8958_reg_devices)); ++ ++ irq = wm8994_get_irq_data(&wm8994_pdata, i2c_info, ++ "audiocodec_int"); ++ if (irq < 0) ++ return NULL; ++ ++ return &wm8994_pdata; ++} +diff --git a/arch/x86/platform/intel-mid/device_libs/platform_wm8994.h b/arch/x86/platform/intel-mid/device_libs/platform_wm8994.h +new file mode 100644 +index 0000000..5abead7 +--- /dev/null ++++ b/arch/x86/platform/intel-mid/device_libs/platform_wm8994.h +@@ -0,0 +1,5 @@ ++#ifndef _PLATFORM_WM8994_H_ ++#define _PLATFORM_WM8994_H_ ++ ++extern void *wm8994_platform_data(void *info) __attribute__((weak)); ++#endif diff --git a/arch/x86/platform/intel-mid/early_printk_intel_mid.c b/arch/x86/platform/intel-mid/early_printk_intel_mid.c new file mode 100644 index 0000000..3b361bd @@ -17962,10 +19458,10 @@ index 0000000..0601fe9 +#endif diff --git a/arch/x86/platform/intel-mid/intel_mid_sfi.c b/arch/x86/platform/intel-mid/intel_mid_sfi.c new file mode 100644 -index 0000000..41f98c4 +index 0000000..f73b84e --- /dev/null +++ b/arch/x86/platform/intel-mid/intel_mid_sfi.c -@@ -0,0 +1,588 @@ +@@ -0,0 +1,608 @@ +/* + * intel_mid_sfi.c: Intel MID SFI initialization code + * @@ -18284,6 +19780,26 @@ index 0000000..41f98c4 +} +EXPORT_SYMBOL_GPL(intel_scu_devices_destroy); + ++static struct platform_device *psh_ipc; ++void intel_psh_devices_create(void) ++{ ++ psh_ipc = platform_device_alloc("intel_psh_ipc", 0); ++ if (psh_ipc == NULL) { ++ pr_err("out of memory for platform device psh_ipc.\n"); ++ return; ++ } ++ ++ platform_device_add(psh_ipc); ++} ++EXPORT_SYMBOL_GPL(intel_psh_devices_create); ++ ++void intel_psh_devices_destroy(void) ++{ ++ if (psh_ipc) ++ platform_device_del(psh_ipc); ++} ++EXPORT_SYMBOL_GPL(intel_psh_devices_destroy); ++ +void __init install_irq_resource(struct platform_device *pdev, int irq) +{ + /* Single threaded */ @@ -31189,7 +32705,7 @@ index a2b0df5..4b82961 100644 obj-$(CONFIG_INTEL_IOATDMA) += ioat/ obj-$(CONFIG_INTEL_IOP_ADMA) += iop-adma.o diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c -index a0de82e..2a51cf7 100644 +index a0de82e..91c6f8f 100644 --- a/drivers/dma/intel_mid_dma.c +++ b/drivers/dma/intel_mid_dma.c @@ -28,34 +28,41 @@ @@ -32528,7 +34044,7 @@ index a0de82e..2a51cf7 100644 + if (i < 0) { + pr_err("ERR_MDMA:Invalid ch index %x\n", i); + return; - } ++ } + /* clear the status bit */ + status = status & ~(1 << (i + mid->chan_base)); + midc = &mid->ch[i]; @@ -32546,7 +34062,7 @@ index a0de82e..2a51cf7 100644 + if (midc->block_intr_status) { + midc_collect_descriptors(mid, midc); + midc_start_descriptors(mid, midc); -+ } + } + + iowrite32(UNMASK_INTR_REG(midc->ch_id), + mid->dma_base + MASK_BLOCK); @@ -32912,7 +34428,8 @@ index a0de82e..2a51cf7 100644 + goto err_ioremap; pm_runtime_put_noidle(&pdev->dev); - pm_runtime_allow(&pdev->dev); +- pm_runtime_allow(&pdev->dev); ++ pm_runtime_forbid(&pdev->dev); return 0; -err_dma: @@ -33173,10 +34690,10 @@ index a0de82e..2a51cf7 100644 +MODULE_ALIAS("acpi:intel_dma_acpi"); diff --git a/drivers/dma/intel_mid_dma_acpi.c b/drivers/dma/intel_mid_dma_acpi.c new file mode 100644 -index 0000000..65363b4 +index 0000000..2bef1ab --- /dev/null +++ b/drivers/dma/intel_mid_dma_acpi.c -@@ -0,0 +1,177 @@ +@@ -0,0 +1,192 @@ + +/* intel_mid_dma_acpi.c - Intel MID DMA driver init file for ACPI enumaration. + * @@ -33210,17 +34727,35 @@ index 0000000..65363b4 +#include +#include + -+#define MAX_CHAN 4 /*max ch across controllers*/ +#include "intel_mid_dma_regs.h" + -+static struct device *acpi_dma_dev; ++#define HID_MAX_SIZE 8 ++ ++struct list_head dma_dev_list; + -+struct device *intel_mid_get_acpi_dma(void) ++LIST_HEAD(dma_dev_list); ++ ++struct acpi_dma_dev_list { ++ struct list_head dmadev_list; ++ char dma_hid[HID_MAX_SIZE]; ++ struct device *acpi_dma_dev; ++}; ++ ++struct device *intel_mid_get_acpi_dma(const char *hid) +{ -+ return acpi_dma_dev; ++ struct acpi_dma_dev_list *listnode; ++ if (list_empty(&dma_dev_list)) ++ return NULL; ++ ++ list_for_each_entry(listnode, &dma_dev_list, dmadev_list) { ++ if (!(strncmp(listnode->dma_hid, hid, HID_MAX_SIZE))) ++ return listnode->acpi_dma_dev; ++ } ++ return NULL; +} +EXPORT_SYMBOL_GPL(intel_mid_get_acpi_dma); + ++#if IS_ENABLED(CONFIG_ACPI) +static int mid_get_and_map_rsrc(void **dest, struct platform_device *pdev, + unsigned int num) +{ @@ -33269,7 +34804,6 @@ index 0000000..65363b4 + return 0; +} + -+#if IS_ENABLED(CONFIG_ACPI) +int dma_acpi_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; @@ -33347,18 +34881,25 @@ index 0000000..65363b4 + +int dma_acpi_remove(struct platform_device *pdev) +{ -+ pm_runtime_get_noresume(&pdev->dev); -+ pm_runtime_disable(&pdev->dev); -+ acpi_dma_dev = NULL; ++ pm_runtime_forbid(&pdev->dev); + middma_shutdown(&pdev->dev); + platform_set_drvdata(pdev, NULL); + return 0; +} diff --git a/drivers/dma/intel_mid_dma_regs.h b/drivers/dma/intel_mid_dma_regs.h -index 17b4219..e82cb8d 100644 +index 17b4219..30160e4 100644 --- a/drivers/dma/intel_mid_dma_regs.h +++ b/drivers/dma/intel_mid_dma_regs.h -@@ -45,11 +45,13 @@ +@@ -31,6 +31,8 @@ + + #define INTEL_MID_DMA_DRIVER_VERSION "1.1.0" + ++#define MID_MAX_CHAN 8 /*max ch across controllers*/ ++ + #define REG_BIT0 0x00000001 + #define REG_BIT8 0x00000100 + #define INT_MASK_WE 0x8 +@@ -45,11 +47,13 @@ #define DISABLE_CHANNEL(chan_num) \ (REG_BIT8 << chan_num) @@ -33373,7 +34914,7 @@ index 17b4219..e82cb8d 100644 /*CH X REG = (DMA_CH_SIZE)*CH_NO + REG*/ #define SAR 0x00 /* Source Address Register*/ -@@ -83,6 +85,17 @@ +@@ -83,6 +87,17 @@ #define INTR_STATUS 0x360 #define DMA_CFG 0x398 #define DMA_CHAN_EN 0x3A0 @@ -33391,7 +34932,7 @@ index 17b4219..e82cb8d 100644 /*DMA channel control registers*/ union intel_mid_dma_ctl_lo { -@@ -111,6 +124,34 @@ union intel_mid_dma_ctl_lo { +@@ -111,6 +126,34 @@ union intel_mid_dma_ctl_lo { u32 llp_src_en:1; /*enable/disable source LLP = 0*/ u32 reser2:3; } ctlx; @@ -33426,7 +34967,7 @@ index 17b4219..e82cb8d 100644 u32 ctl_lo; }; -@@ -120,8 +161,13 @@ union intel_mid_dma_ctl_hi { +@@ -120,8 +163,13 @@ union intel_mid_dma_ctl_hi { u32 done:1; /*Done - updated by DMAC*/ u32 reser:19; /*configured by DMAC*/ } ctlx; @@ -33441,7 +34982,7 @@ index 17b4219..e82cb8d 100644 }; /*DMA channel configuration registers*/ -@@ -141,6 +187,33 @@ union intel_mid_dma_cfg_lo { +@@ -141,6 +189,33 @@ union intel_mid_dma_cfg_lo { u32 reload_src:1; /*auto reload src addr =1 if src is P*/ u32 reload_dst:1; /*AR destn addr =1 if dstn is P*/ } cfgx; @@ -33475,7 +35016,7 @@ index 17b4219..e82cb8d 100644 u32 cfg_lo; }; -@@ -154,9 +227,43 @@ union intel_mid_dma_cfg_hi { +@@ -154,9 +229,43 @@ union intel_mid_dma_cfg_hi { u32 dst_per:4; /*dstn hw HS interface*/ u32 reser2:17; } cfgx; @@ -33519,7 +35060,7 @@ index 17b4219..e82cb8d 100644 /** * struct intel_mid_dma_chan - internal mid representation of a DMA channel -@@ -168,13 +275,14 @@ union intel_mid_dma_cfg_hi { +@@ -168,13 +277,14 @@ union intel_mid_dma_cfg_hi { * @active_list: current active descriptors * @queue: current queued up descriptors * @free_list: current free descriptors @@ -33537,7 +35078,7 @@ index 17b4219..e82cb8d 100644 */ struct intel_mid_dma_chan { struct dma_chan chan; -@@ -192,6 +300,8 @@ struct intel_mid_dma_chan { +@@ -192,6 +302,8 @@ struct intel_mid_dma_chan { u32 raw_tfr; u32 raw_block; struct intel_mid_dma_slave *mid_slave; @@ -33546,7 +35087,7 @@ index 17b4219..e82cb8d 100644 }; static inline struct intel_mid_dma_chan *to_intel_mid_dma_chan( -@@ -207,6 +317,8 @@ enum intel_mid_dma_state { +@@ -207,6 +319,8 @@ enum intel_mid_dma_state { /** * struct middma_device - internal representation of a DMA device * @pdev: PCI device @@ -33555,7 +35096,7 @@ index 17b4219..e82cb8d 100644 * @dma_base: MMIO register space pointer of DMA * @dma_pool: for allocating DMA descriptors * @common: embedded struct dma_device -@@ -220,9 +332,12 @@ enum intel_mid_dma_state { +@@ -220,14 +334,17 @@ enum intel_mid_dma_state { * @block_size: Block size of DMA transfer supported (from drv_data) * @pimr_mask: MMIO register addr for periphral interrupt (from drv_data) * @state: dma PM device state @@ -33569,7 +35110,13 @@ index 17b4219..e82cb8d 100644 void __iomem *dma_base; struct pci_pool *dma_pool; struct dma_device common; -@@ -235,7 +350,13 @@ struct middma_device { + struct tasklet_struct tasklet; +- struct intel_mid_dma_chan ch[MAX_CHAN]; ++ struct intel_mid_dma_chan ch[MID_MAX_CHAN]; + unsigned int pci_id; + unsigned int intr_mask; + void __iomem *mask_reg; +@@ -235,7 +352,13 @@ struct middma_device { int max_chan; int block_size; unsigned int pimr_mask; @@ -33583,7 +35130,7 @@ index 17b4219..e82cb8d 100644 }; static inline struct middma_device *to_middma_device(struct dma_device *common) -@@ -266,15 +387,30 @@ struct intel_mid_dma_desc { +@@ -266,15 +389,30 @@ struct intel_mid_dma_desc { enum intel_mid_dma_mode cfg_mode; /*mode configuration*/ }; @@ -33618,7 +35165,7 @@ index 17b4219..e82cb8d 100644 static inline int test_ch_en(void __iomem *dma, u32 ch_no) { u32 en_reg = ioread32(dma + DMA_CHAN_EN); -@@ -294,6 +430,12 @@ static inline struct intel_mid_dma_slave *to_intel_mid_dma_slave +@@ -294,6 +432,12 @@ static inline struct intel_mid_dma_slave *to_intel_mid_dma_slave } @@ -35946,7 +37493,7 @@ index 325013a..d011e91 100644 #include "intel_bios.h" #include "psb_drv.h" diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index df064e8..3899d25 100644 +index df064e8..877aa4d 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -504,6 +504,16 @@ config SENSORS_CORETEMP @@ -35966,7 +37513,7 @@ index df064e8..3899d25 100644 config SENSORS_IBMAEM tristate "IBM Active Energy Manager temperature/power sensors and control" select IPMI_SI -@@ -822,6 +832,12 @@ config SENSORS_LM95245 +@@ -822,6 +832,21 @@ config SENSORS_LM95245 This driver can also be built as a module. If so, the module will be called lm95245. @@ -35975,19 +37522,29 @@ index df064e8..3899d25 100644 + depends on INTEL_SCU_IPC + help + Say Y here to enable MSIC GPADC driver on Intel Medfield Platform ++ ++config INTEL_MCU ++ tristate "Intel generic MCU control interface" ++ help ++ Say Y here to enable control interface for intel mcu ++ ++ This driver provide userspace tty interface for the control and ++ message output. ++ You could use normal read/write to complete those operation. + config SENSORS_MAX1111 tristate "Maxim MAX1111 Serial 8-bit ADC chip and compatibles" depends on SPI_MASTER diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile -index d17d3e6..4e1d647 100644 +index d17d3e6..11e757a 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile -@@ -140,6 +140,7 @@ obj-$(CONFIG_SENSORS_W83L785TS) += w83l785ts.o +@@ -140,6 +140,8 @@ obj-$(CONFIG_SENSORS_W83L785TS) += w83l785ts.o obj-$(CONFIG_SENSORS_W83L786NG) += w83l786ng.o obj-$(CONFIG_SENSORS_WM831X) += wm831x-hwmon.o obj-$(CONFIG_SENSORS_WM8350) += wm8350-hwmon.o +obj-$(CONFIG_MSIC_GPADC) += intel_mid_gpadc.o ++obj-$(CONFIG_INTEL_MCU) += intel_mcu_common.o obj-$(CONFIG_PMBUS) += pmbus/ @@ -36518,6 +38075,797 @@ index 658ce3a..7d091ab 100644 kfree(pdata->core_data[indx]); pdata->core_data[indx] = NULL; +diff --git a/drivers/hwmon/intel_mcu_common.c b/drivers/hwmon/intel_mcu_common.c +new file mode 100644 +index 0000000..cdf078c +--- /dev/null ++++ b/drivers/hwmon/intel_mcu_common.c +@@ -0,0 +1,700 @@ ++/** ++ * intel_mcu_common.c - Intel MCU common interface file ++ * ++ * Copyright (C) 2014 Intel Inc. - http://www.intel.com ++ * ++ * Authors: Lei Wen , ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "intel_mcu_common.h" ++#include ++ ++#define APP_IMR_SIZE (1024 * 126) ++#define DRIVER_AUTHOR "Lei Wen " ++#define DRIVER_DESC "Intel mcu common control interface" ++#define INTEL_MCU_TTY_MAJOR 168 ++#define INTEL_MCU_TTY_MINORS 3 ++ ++#define LOAD_APP "load mcu app" ++#define GET_VERSION "get mcu app version" ++struct tty_driver *intel_mcu_tty_driver; ++ ++#define VER_LEN 1024 ++struct mcu { ++ char ver[VER_LEN]; ++ uintptr_t ddr_phy[2]; ++ void *ddr[2]; ++ int load_in_progress; ++}; ++ ++struct mcu_data { ++ struct device *dev; ++ struct tty_port port; ++ struct mcu *mcu; ++ struct completion cmp; ++ struct loop_buffer lbuf; ++ int index; ++}; ++ ++static struct mcu_data *mcu_table[INTEL_MCU_TTY_MINORS]; ++static int log_level = 1; ++static char *debug_msg[] = { ++ "fatal", ++ "error", ++ "warning", ++ "info", ++ "debug", ++}; ++ ++static int send_cmd(struct mcu_data *data, ++ struct psh_msg *in, int ch, int wait) ++{ ++ int ret; ++ ret = intel_ia2psh_command(in, NULL, ch, 1000000); ++ if (ret) ++ return ret; ++ ++ if (wait) { ++ ret = wait_for_completion_timeout(&data->cmp, 3 * HZ); ++ if (ret == 0) ++ return -ETIME; ++ } ++ ++ return 0; ++} ++ ++static void lbuf_read_reset(struct loop_buffer *lbuf) ++{ ++ if (lbuf) { ++ lbuf->off_head = lbuf->off_tail = 0; ++ lbuf->in_reading = 0; ++ } ++} ++ ++static int lbuf_read_next(struct loop_buffer *lbuf, u8 **buf, u16 *size) ++{ ++ struct frame_head *fhead = ++ (struct frame_head *)(lbuf->addr + lbuf->off_head); ++ *buf = NULL; ++ *size = 0; ++ ++ if (lbuf->in_reading) { ++ lbuf->in_reading = 0; ++ ++ /* go over previous frame has been read */ ++ lbuf->off_head += frame_size(fhead->length); ++ lbuf->off_tail = lbuf->off_head; ++ fhead = (struct frame_head *)(lbuf->addr + lbuf->off_head); ++ } ++ ++ if (fhead->sign == LBUF_DISCARD_SIGN) { ++ fhead = (struct frame_head *)lbuf->addr; ++ lbuf->off_head = lbuf->off_tail = 0; ++ } ++ ++ if (fhead->sign == LBUF_CELL_SIGN) { ++ ++ *buf = lbuf->addr + lbuf->off_head + sizeof(*fhead); ++ *size = fhead->length; ++ lbuf->in_reading = 1; ++ } ++ ++ return !lbuf->in_reading; ++} ++ ++static int intel_mcu_mcudbg_level(struct mcu_data *data, int level) ++{ ++ struct psh_msg in; ++ struct cmd_debug_param *param; ++ ++ in.param = 0; ++ in.msg = CMD_MCU_APP_DEBUG; ++ param = (struct cmd_debug_param *) (&(in.param)); ++ if (level > 0) { ++ param->level = level; ++ param->sub_cmd = CMD_DEBUG_SET_MASK; ++ } else ++ param->sub_cmd = CMD_DEBUG_GET_MASK; ++ ++ return send_cmd(data, &in, PSH2IA_CHANNEL2, 1); ++} ++ ++static void push_char_into_port(struct tty_port *port, const char *buf, int len) ++{ ++ int count; ++ ++ if (len <= 0) ++ return; ++ ++ do { ++ count = tty_insert_flip_string(port, buf, len); ++ len -= count; ++ buf += count; ++ } while (len > 0); ++ ++ tty_flip_buffer_push(port); ++} ++ ++static int intel_mcu_tty_open(struct tty_struct *tty, struct file *filp) ++{ ++ dev_dbg(tty->dev, "%s\n", __func__); ++ tty->driver_data = mcu_table[tty->index]; ++ /* ++ * For we may get data cached while we don't open this tty, ++ * so we need to flush out buffer, then we could ++ * get full content without disappoint user ++ */ ++ if (tty->port) ++ tty_flip_buffer_push(tty->port); ++ ++ return 0; ++} ++ ++static void intel_mcu_tty_close(struct tty_struct *tty, struct file *filp) ++{ ++ dev_dbg(tty->dev, "%s\n", __func__); ++ tty->driver_data = NULL; ++} ++ ++static int do_get_ver(struct mcu_data *data) ++{ ++ struct psh_msg in; ++ ++ in.param = 0; ++ in.msg = CMD_MCU_APP_GET_VERSION; ++ return send_cmd(data, &in, PSH2IA_CHANNEL2, 1); ++} ++ ++static int do_setup_ddr(struct mcu_data *data) ++{ ++ struct mcu *mcu = data->mcu; ++ const struct firmware *fw_entry; ++ static int fw_load_done; ++ char fname[20]; ++ struct psh_msg in; ++ ++ if (fw_load_done) ++ return 0; ++ ++ snprintf(fname, 20, "intel_mcu.bin"); ++ if (!request_firmware(&fw_entry, fname, data->dev)) { ++ if (!fw_entry) ++ return -ENOMEM; ++ ++ pr_debug("psh fw size %d virt:0x%p\n", ++ (int)fw_entry->size, fw_entry->data); ++ if (fw_entry->size > APP_IMR_SIZE) { ++ pr_err("psh fw size too big\n"); ++ } else { ++ memcpy(mcu->ddr[0], fw_entry->data, ++ fw_entry->size); ++ in.msg = CMD_MCU_LOAD_APP; ++ in.param = mcu->ddr_phy[0]; ++ mcu->load_in_progress = 1; ++ if (send_cmd(data, &in, PSH2IA_CHANNEL3, 1)) ++ return -1; ++ fw_load_done = 1; ++ } ++ release_firmware(fw_entry); ++ } else { ++ pr_err("cannot find psh firmware(%s)\n", fname); ++ return -ENODEV; ++ } ++ in.msg = CMD_MCU_SETUP_DDR; ++ in.param = mcu->ddr_phy[1]; ++ return send_cmd(data, &in, PSH2IA_CHANNEL2, 1); ++} ++ ++static ssize_t load_app_store(struct device *device, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ int len = strlen(LOAD_APP); ++ ++ if (count >= len && strncmp(buf, LOAD_APP, len) == 0) { ++ do_setup_ddr(mcu_table[2]); ++ return count; ++ } ++ ++ pr_err("Please provide right string as [%s]!\n", LOAD_APP); ++ return -1; ++} ++ ++static ssize_t get_ver_show(struct device *device, ++ struct device_attribute *attr, char *buf) ++{ ++ struct mcu_data *data = mcu_table[2]; ++ struct mcu *mcu = data->mcu; ++ ++ if (do_get_ver(data)) ++ return -1; ++ ++ return scnprintf(buf, VER_LEN, "%s", mcu->ver); ++} ++ ++static ssize_t mdbg_control_show(struct device *device, ++ struct device_attribute *attr, char *buf) ++{ ++ if (intel_mcu_mcudbg_level(mcu_table[2], -1) < 0) ++ goto err; ++ ++ if (log_level > 0 && log_level < 6) ++ return scnprintf(buf, 8, "%s\n", debug_msg[log_level - 1]); ++ ++err: ++ pr_info("get log level err\n"); ++ return -1; ++} ++/* ++ *set msg level:echo log_level=fatal|info|warning|error|debug| >control ++*/ ++#define LOG_LEVEL "fatal|error|warning|info|debug" ++static ssize_t mdbg_control_store(struct device *device, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct mcu_data *data = mcu_table[2]; ++ int level = 0; ++ long ltmp = 0; ++ ++ if (!buf) ++ return -1; ++ if (!strncmp(buf, "fatal", strlen("fatal"))) ++ level = 1; ++ else if (!strncmp(buf, "error", strlen("error"))) ++ level = 2; ++ else if (!strncmp(buf, "warning", strlen("warning"))) ++ level = 3; ++ else if (!strncmp(buf, "info", strlen("info"))) ++ level = 4; ++ else if (!strncmp(buf, "debug", strlen("debug"))) ++ level = 5; ++ else { ++ int err; ++ err = kstrtol(buf, 10, <mp); ++ if (!err && (ltmp > 0) && (ltmp < 6)) ++ level = ltmp; ++ else { ++ pr_err("Please input words as [%s]\n", LOG_LEVEL); ++ return -1; ++ } ++ } ++ pr_info("set level:%d\n", level); ++ if (intel_mcu_mcudbg_level(data, level) < 0) ++ return -1; ++ return count; ++} ++ ++static DEVICE_ATTR(control, 0200, NULL, load_app_store); ++static DEVICE_ATTR(fw_version, 0400, get_ver_show, NULL); ++static DEVICE_ATTR(log_level, 0600, mdbg_control_show, mdbg_control_store); ++ ++static struct attribute *control_sysfs_attrs[] = { ++ &dev_attr_control.attr, ++ &dev_attr_fw_version.attr, ++ &dev_attr_log_level.attr, ++ NULL, ++ ++}; ++ ++static struct attribute_group intel_mcu_tty_attribute_group = { ++ .name = NULL, ++ .attrs = control_sysfs_attrs, ++ ++}; ++ ++static void raw_output(struct mcu_data *data, int ch, ++ const unsigned char *buf, int count) ++{ ++ struct psh_msg in; ++ int i, left; ++ ++ for (i = 0; i < count; i += 4) { ++ left = count - i; ++ if (left > 4) { ++ left = 4; ++ in.msg = PSH_IPC_CONTINUE; ++ } else ++ in.msg = 0; ++ ++ memcpy(&in.param, buf, left); ++ buf += left; ++ send_cmd(data, &in, ch, 0); ++ } ++} ++ ++#define TTY_WRITE_ROOM 512 ++static int intel_mcu_tty_write(struct tty_struct *tty, ++ const unsigned char *buf, int count) ++{ ++ struct mcu_data *data = tty->driver_data; ++ ++ switch (tty->index) { ++ default: ++ pr_err("TTY index %d not supported!\n", tty->index); ++ case 1: ++ return -1; ++ case 0: ++ if (count > TTY_WRITE_ROOM) { ++ pr_err("Port 0's input size is limited by %d!\n", ++ TTY_WRITE_ROOM); ++ return -1; ++ } ++ raw_output(data, tty->index, buf, count); ++ break; ++ } ++ return count; ++} ++ ++static int intel_mcu_tty_write_room(struct tty_struct *tty) ++{ ++ return TTY_WRITE_ROOM; ++} ++ ++static const struct tty_operations intel_mcu_ops = { ++ .open = intel_mcu_tty_open, ++ .close = intel_mcu_tty_close, ++ .write = intel_mcu_tty_write, ++ .write_room = intel_mcu_tty_write_room, ++}; ++ ++static int mem_alloc(struct pci_dev *pdev, uintptr_t *phy_addr, ++ void **virt_addr, int bar) ++{ ++ void __iomem *mem; ++ int ret = 0; ++ unsigned long start = 0, len; ++ ++ /* dedicate isolated memory region */ ++ start = pci_resource_start(pdev, bar); ++ len = pci_resource_len(pdev, bar); ++ if (!start || !len) { ++ dev_err(&pdev->dev, "bar %d address not set\n", bar); ++ ret = -EINVAL; ++ goto err; ++ } ++ ++ ret = pci_request_region(pdev, bar, "intel_mcu"); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "failed to request psh region 0x%lx-0x%lx\n", ++ start, ++ (unsigned long)pci_resource_end(pdev, bar)); ++ goto err; ++ } ++ ++ mem = ioremap_nocache(start, len); ++ if (!mem) { ++ dev_err(&pdev->dev, "can not ioremap app imr address\n"); ++ ret = -EINVAL; ++ goto err_ioremap; ++ } ++ ++ *phy_addr = start; ++ *virt_addr = (void *)mem; ++ return 0; ++ ++err_ioremap: ++ pci_release_region(pdev, bar); ++err: ++ return ret; ++} ++ ++static void cmd_handler(u32 msg, u32 param, void *_data) ++{ ++ struct mcu_data *data = (struct mcu_data *)_data; ++ struct mcu *mcu = data->mcu; ++ struct cmd_resp *resp; ++ const struct version_resp *version; ++ struct debug_resp *debug_resp; ++ u8 *dbuf = NULL; ++ u16 size = 0; ++ ++ if (mcu->load_in_progress) { ++ mcu->load_in_progress = 0; ++ goto done; ++ } ++ ++ while (!lbuf_read_next(&data->lbuf, &dbuf, &size)) { ++ resp = (struct cmd_resp *)dbuf; ++ ++ if (!resp->len) ++ continue; ++ ++ switch (resp->cmd_id) { ++ case CMD_MCU_APP_GET_VERSION: ++ version = (struct version_resp *)resp->param; ++ if (version->total_length) ++ snprintf(mcu->ver, VER_LEN, version->buf, ++ version->total_length); ++ break; ++ case CMD_MCU_APP_DEBUG: ++ debug_resp = (struct debug_resp *)resp->param; ++ log_level = debug_resp->level; ++ default: ++ break; ++ } ++ } ++done: ++ complete(&data->cmp); ++} ++ ++static void raw_data_handler(u32 msg, u32 param, void *_data) ++{ ++ struct mcu_data *data = (struct mcu_data *)_data; ++ struct cmd_resp *resp; ++ u8 *dbuf = NULL; ++ u16 size = 0; ++ ++ while (!lbuf_read_next(&data->lbuf, &dbuf, &size)) { ++ resp = (struct cmd_resp *)dbuf; ++ push_char_into_port(&data->port, resp->param, resp->len); ++ } ++ complete(&data->cmp); ++} ++ ++static int mcu_platform_probe(struct platform_device *pdev) ++{ ++ int ret, i; ++ struct mcu_data *data; ++ struct mcu *mcu; ++ u8 *base; ++ ++ mcu = platform_get_drvdata(pdev); ++ intel_mcu_tty_driver = alloc_tty_driver(INTEL_MCU_TTY_MINORS); ++ if (!intel_mcu_tty_driver) { ++ dev_err(&pdev->dev, "fail to alloc tty driver\n"); ++ return -ENODEV; ++ } ++ ++ intel_mcu_tty_driver->name = "ttymcu"; ++ intel_mcu_tty_driver->major = INTEL_MCU_TTY_MAJOR; ++ intel_mcu_tty_driver->minor_start = 0; ++ intel_mcu_tty_driver->type = TTY_DRIVER_TYPE_SERIAL; ++ intel_mcu_tty_driver->subtype = SERIAL_TYPE_NORMAL; ++ intel_mcu_tty_driver->flags = TTY_DRIVER_REAL_RAW ++ | TTY_DRIVER_DYNAMIC_DEV; ++ intel_mcu_tty_driver->init_termios = tty_std_termios; ++ intel_mcu_tty_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | ++ HUPCL | CLOCAL; ++ intel_mcu_tty_driver->init_termios.c_ispeed = 38400; ++ intel_mcu_tty_driver->init_termios.c_ospeed = 38400; ++ intel_mcu_tty_driver->init_termios.c_iflag = 0; ++ intel_mcu_tty_driver->init_termios.c_oflag = 0; ++ intel_mcu_tty_driver->init_termios.c_lflag = 0; ++ tty_set_operations(intel_mcu_tty_driver, &intel_mcu_ops); ++ ++ ret = tty_register_driver(intel_mcu_tty_driver); ++ if (ret) { ++ dev_err(&pdev->dev, "fail to register tty driver\n"); ++ goto tty_reg_fail; ++ } ++ ++ base = (u8 *)mcu->ddr[1]; ++ for (i = INTEL_MCU_TTY_MINORS - 1; i >= 0; i--) { ++ data = kzalloc(sizeof(struct mcu_data), GFP_KERNEL); ++ if (data == NULL) { ++ dev_err(&pdev->dev, "fail to alloc mcu data\n"); ++ goto data_alloc_fail; ++ } ++ ++ data->index = i; ++ tty_port_init(&data->port); ++ data->dev = tty_port_register_device(&data->port, ++ intel_mcu_tty_driver, i, &pdev->dev); ++ mcu_table[i] = data; ++ data->mcu = mcu; ++ init_completion(&data->cmp); ++ data->lbuf.addr = base; ++ data->lbuf.length = BUF_IA_DDR_SIZE; ++ lbuf_read_reset(&data->lbuf); ++ base += BUF_IA_DDR_SIZE; ++ } ++ ret = sysfs_create_group(&pdev->dev.kobj, ++ &intel_mcu_tty_attribute_group); ++ if (ret) { ++ pr_err("failed to create the mdbg sysfs attributes\n"); ++ sysfs_remove_group(&pdev->dev.kobj, ++ &intel_mcu_tty_attribute_group); ++ goto data_alloc_fail; ++ } ++ ++ intel_psh_ipc_bind(PSH_RECV_CH0, raw_data_handler, mcu_table[0]); ++ intel_psh_ipc_bind(PSH_RECV_CH1, raw_data_handler, mcu_table[1]); ++ intel_psh_ipc_bind(PSH_RECV_CH2, cmd_handler, mcu_table[2]); ++ ++ pr_info("MCU detected and ready to used!\n"); ++ ++ return 0; ++ ++data_alloc_fail: ++ for (i = 0; i < INTEL_MCU_TTY_MINORS; i++) ++ kfree(mcu_table[i]); ++tty_reg_fail: ++ put_tty_driver(intel_mcu_tty_driver); ++ return ret; ++} ++ ++static int mcu_platform_remove(struct platform_device *pdev) ++{ ++ struct mcu *mcu; ++ int i; ++ ++ mcu = platform_get_drvdata(pdev); ++ sysfs_remove_group(&pdev->dev.kobj, ++ &intel_mcu_tty_attribute_group); ++ ++ for (i = 0; i < INTEL_MCU_TTY_MINORS; i++) ++ kfree(mcu_table[i]); ++ put_tty_driver(intel_mcu_tty_driver); ++ kfree(mcu); ++ ++ return 0; ++} ++ ++static struct platform_driver intel_mcu_platform = { ++ .driver = { ++ .name = "intel_mcu", ++ }, ++ .probe = mcu_platform_probe, ++ .remove = mcu_platform_remove, ++}; ++module_platform_driver(intel_mcu_platform); ++ ++static int intel_mcu_probe(struct pci_dev *pdev, const struct pci_device_id *id) ++{ ++ struct platform_device *dev; ++ struct mcu *mcu; ++ int ret; ++ ++ ret = pci_enable_device(pdev); ++ if (ret) { ++ dev_err(&pdev->dev, "fail to enable psh pci device\n"); ++ return -ENODEV; ++ } ++ ++ mcu = kzalloc(sizeof(struct mcu), GFP_KERNEL); ++ if (!mcu) { ++ dev_err(&pdev->dev, "cannot allocate memory for mcu\n"); ++ ret = -ENOMEM; ++ goto mcu_err; ++ } ++ ++ ret = mem_alloc(pdev, &mcu->ddr_phy[0], &mcu->ddr[0], 0); ++ if (ret) ++ goto plat_alloc_fail; ++ ++ ret = mem_alloc(pdev, &mcu->ddr_phy[1], &mcu->ddr[1], 1); ++ if (ret) ++ goto plat_alloc_fail; ++ ++ dev = platform_device_alloc("intel_mcu", -1); ++ if (!dev) { ++ ret = -ENODEV; ++ goto plat_alloc_fail; ++ } ++ ++ dev->dev.dma_mask = &dev->dev.coherent_dma_mask; ++ platform_set_drvdata(dev, mcu); ++ dev_set_drvdata(&pdev->dev, mcu); ++ ++ ret = platform_device_add(dev); ++ return ret; ++ ++plat_alloc_fail: ++ kfree(mcu); ++mcu_err: ++ pci_dev_put(pdev); ++ return ret; ++} ++ ++static void intel_mcu_remove(struct pci_dev *pdev) ++{ ++ struct mcu *mcu; ++ ++ mcu = dev_get_drvdata(&pdev->dev); ++ iounmap((void __iomem *)mcu->ddr[0]); ++ iounmap((void __iomem *)mcu->ddr[1]); ++ ++ pci_release_region(pdev, 0); ++ pci_release_region(pdev, 1); ++ pci_dev_put(pdev); ++} ++ ++static DEFINE_PCI_DEVICE_TABLE(pci_ids) = { ++ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x11a4)}, ++ { 0,} ++}; ++ ++MODULE_DEVICE_TABLE(pci, pci_ids); ++static struct pci_driver intel_mcu_driver = { ++ .name = "intel_mcu", ++ .id_table = pci_ids, ++ .probe = intel_mcu_probe, ++ .remove = intel_mcu_remove, ++}; ++ ++static int __init intel_mcu_init(void) ++{ ++ return pci_register_driver(&intel_mcu_driver); ++} ++ ++static void __exit intel_mcu_exit(void) ++{ ++ pci_unregister_driver(&intel_mcu_driver); ++} ++ ++module_init(intel_mcu_init); ++module_exit(intel_mcu_exit); ++MODULE_AUTHOR(DRIVER_AUTHOR); ++MODULE_DESCRIPTION(DRIVER_DESC); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS_CHARDEV_MAJOR(INTEL_MCU_TTY_MAJOR); +diff --git a/drivers/hwmon/intel_mcu_common.h b/drivers/hwmon/intel_mcu_common.h +new file mode 100644 +index 0000000..1ffd081 +--- /dev/null ++++ b/drivers/hwmon/intel_mcu_common.h +@@ -0,0 +1,79 @@ ++#ifndef _EDISON_COMMON_H_ ++#define _EDISON_COMMON_H_ ++ ++#define PSH2IA_CHANNEL0 0 ++#define PSH2IA_CHANNEL1 1 ++#define PSH2IA_CHANNEL2 2 ++#define PSH2IA_CHANNEL3 3 ++ ++enum cmd_id { ++ CMD_MCU_LOAD_APP = 0, ++ CMD_MCU_SETUP_DDR, ++ CMD_MCU_APP_DEBUG, ++ CMD_MCU_APP_GET_VERSION, ++}; ++ ++#define CIRC_SIZE (1024 * 64) ++struct ddr_param { ++ u32 ddr; ++ u32 ddr1; ++} __packed; ++ ++#define CMD_DEBUG_SET_MASK ((u8)0x1) ++#define CMD_DEBUG_GET_MASK ((u8)0x2) ++#define MCU_DBG_ALL ((u16)-1) ++#define MCU_DBG_FATAL 1 ++#define MCU_DBG_ERR 2 ++#define MCU_DBG_WARN 3 ++#define MCU_DBG_INFO 4 ++#define MCU_DBG_DBG 5 ++ ++struct cmd_debug_param { ++ u8 sub_cmd; ++ u16 level; ++ char tag[30]; ++} __packed; ++ ++#define RESP_PARAM_MAX_SIZE 56 ++struct cmd_resp { ++ u8 cmd_id; ++ u8 len; ++ int ret; ++ char param[RESP_PARAM_MAX_SIZE]; ++} __packed; ++ ++struct debug_resp { ++ u16 level; ++} __packed; ++ ++struct version_resp { ++ u8 total_length; ++ u8 segment_length; ++ u8 sequence_number; ++ char buf[0]; ++} __packed; ++ ++#define LBUF_CELL_SIGN ((u16)0x4853) ++#define LBUF_EMPTY_SIGN ((u16)0x0000) ++#define LBUF_DISCARD_SIGN ((u16)0x4944) ++#define size_align(size) ((size % 4) ? (size + 4 - (size % 4)) : size) ++#define frame_size(size) (size_align(size) + \ ++ sizeof(struct frame_head)) ++ ++struct frame_head { ++ u16 sign; ++ u16 length; ++ u8 buf[0]; ++} __packed; ++ ++#define BUF_IA_DDR_SIZE 8192 ++struct loop_buffer { ++ int in_reading; ++ u8 *addr; ++ u16 length; ++ ++ u16 off_head; ++ u16 off_tail; ++}; ++ ++#endif diff --git a/drivers/hwmon/intel_mid_gpadc.c b/drivers/hwmon/intel_mid_gpadc.c new file mode 100644 index 0000000..f4d0d2f @@ -45118,24 +47466,268 @@ index 0000000..1fb2d2e + +#endif /* _STM_H */ diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c -index dd27b07..72bab34 100644 +index dd27b07..1137130 100644 --- a/drivers/mmc/card/block.c +++ b/drivers/mmc/card/block.c -@@ -161,6 +161,12 @@ static struct mmc_blk_data *mmc_blk_get(struct gendisk *disk) - return md; +@@ -96,6 +96,7 @@ struct mmc_blk_data { + #define MMC_BLK_CMD23 (1 << 0) /* Can do SET_BLOCK_COUNT for multiblock */ + #define MMC_BLK_REL_WR (1 << 1) /* MMC Reliable write support */ + #define MMC_BLK_PACKED_CMD (1 << 2) /* MMC packed command support */ ++#define MMC_BLK_SUSPENDED (1 << 3) /* MMC block device suspended */ + + unsigned int usage; + unsigned int read_only; +@@ -106,7 +107,8 @@ struct mmc_blk_data { + #define MMC_BLK_WRITE BIT(1) + #define MMC_BLK_DISCARD BIT(2) + #define MMC_BLK_SECDISCARD BIT(3) +- ++#define MMC_BLK_RPMB BIT(4) ++#define MMC_BLK_USER BIT(5) + /* + * Only set in main mmc_blk_data associated + * with mmc_card with mmc_set_drvdata, and keeps +@@ -146,6 +148,9 @@ static inline void mmc_blk_clear_packed(struct mmc_queue_req *mqrq) + packed->blocks = 0; + } + ++static int mmc_rpmb_req_process(struct mmc_blk_data *, ++ struct mmc_ioc_rpmb_req *); ++ + static struct mmc_blk_data *mmc_blk_get(struct gendisk *disk) + { + struct mmc_blk_data *md; +@@ -568,12 +573,53 @@ cmd_err: + return err; + } + ++static int mmc_blk_ioctl_rpmb_req(struct block_device *bdev, ++ struct mmc_ioc_rpmb_req __user *ptr) ++{ ++ struct mmc_ioc_rpmb_req req; ++ struct mmc_blk_data *md = NULL; ++ int err = 0; ++ ++ /* The caller must have CAP_SYS_RAWIO */ ++ if (!capable(CAP_SYS_RAWIO)) ++ return -EPERM; ++ ++ memset(&req, 0, sizeof(req)); ++ ++ if (copy_from_user(&req, ptr, sizeof(req))) ++ return -EFAULT; ++ ++ md = mmc_blk_get(bdev->bd_disk); ++ if (!md) { ++ pr_err("%s: NO eMMC block data. Try it later\n", ++ __func__); ++ return -ENODEV; ++ } ++ /* handle RPMB request event */ ++ err = mmc_rpmb_req_process(md, &req); ++ if (err) { ++ mmc_blk_put(md); ++ return err; ++ } ++ /* ++ * feedback to user space ++ */ ++ if (copy_to_user(ptr, &req, sizeof(req))) ++ return -EFAULT; ++ ++ mmc_blk_put(md); ++ return 0; ++} ++ + static int mmc_blk_ioctl(struct block_device *bdev, fmode_t mode, + unsigned int cmd, unsigned long arg) + { + int ret = -EINVAL; + if (cmd == MMC_IOC_CMD) + ret = mmc_blk_ioctl_cmd(bdev, (struct mmc_ioc_cmd __user *)arg); ++ else if (cmd == MMC_IOC_RPMB_REQ) ++ ret = mmc_blk_ioctl_rpmb_req(bdev, ++ (struct mmc_ioc_rpmb_req __user *)arg); + return ret; + } + +@@ -891,6 +937,114 @@ static inline void mmc_blk_reset_success(struct mmc_blk_data *md, int type) + md->reset_done &= ~type; } ++static int mmc_rpmb_req_process(struct mmc_blk_data *md, ++ struct mmc_ioc_rpmb_req *req) ++{ ++ struct mmc_core_rpmb_req rpmb_req; ++ struct mmc_card *card = NULL; ++ int ret; ++ ++ if (!md || !req) ++ return -EINVAL; ++ ++ if (!(md->flags & MMC_BLK_CMD23) || ++ (md->part_type != EXT_CSD_PART_CONFIG_ACC_RPMB)) ++ return -EOPNOTSUPP; ++ ++ card = md->queue.card; ++ if (!card || !mmc_card_mmc(card) || !card->ext_csd.rpmb_size) ++ return -ENODEV; ++ ++ memset(&rpmb_req, 0, sizeof(struct mmc_core_rpmb_req)); ++ rpmb_req.req = req; ++ /* check request */ ++ ret = mmc_rpmb_pre_frame(&rpmb_req, card); ++ if (ret) { ++ pr_err("%s: prepare frame failed\n", mmc_hostname(card->host)); ++ return ret; ++ } ++ ++ mmc_claim_host(card->host); ++ ++ if (md->flags & MMC_BLK_SUSPENDED) { ++ pr_warn("%s: MMC block device is already suspended\n", ++ mmc_hostname(card->host)); ++ ret = -EPERM; ++ goto out; ++ } ++ /* ++ * before start, let's change to RPMB partition first ++ */ ++ ret = mmc_blk_part_switch(card, md); ++ if (ret) { ++ pr_err("%s: Invalid RPMB partition switch (%d)!\n", ++ mmc_hostname(card->host), ret); ++ /* ++ * In case partition is not in user data area, make ++ * a force partition switch. ++ * we need reset eMMC card at here ++ */ ++ ret = mmc_blk_reset(md, card->host, MMC_BLK_RPMB); ++ if (!ret) ++ mmc_blk_reset_success(md, MMC_BLK_RPMB); ++ else ++ pr_err("%s: eMMC card reset failed (%d)\n", ++ mmc_hostname(card->host), ret); ++ goto out; ++ } ++ ++ ret = mmc_rpmb_partition_ops(&rpmb_req, card); ++ if (ret) ++ pr_err("%s: failed (%d) to handle RPMB request type (%d)!\n", ++ mmc_hostname(card->host), ret, req->type); ++out: ++ mmc_release_host(card->host); ++ mmc_rpmb_post_frame(&rpmb_req); ++ return ret; ++} ++ +int mmc_access_rpmb(struct mmc_queue *mq) +{ + struct mmc_blk_data *md = mq->data; -+ return md && md->part_type == EXT_CSD_PART_CONFIG_ACC_RPMB; ++ /* ++ * If this is a RPMB partition access, return ture ++ */ ++ if (md && md->part_type == EXT_CSD_PART_CONFIG_ACC_RPMB) ++ return true; ++ ++ return false; ++} ++EXPORT_SYMBOL_GPL(mmc_access_rpmb); ++ ++int mmc_rpmb_req_handle(struct device *emmc, struct mmc_ioc_rpmb_req *req) ++{ ++ int ret = 0; ++ struct gendisk *disk = NULL; ++ struct mmc_blk_data *md = NULL; ++ ++ if (!emmc || !req) ++ return -EINVAL; ++ ++ disk = dev_to_disk(emmc); ++ if (!disk) { ++ pr_err("%s: NO eMMC disk found. Try it later\n", ++ __func__); ++ return -ENODEV; ++ } ++ ++ md = mmc_blk_get(disk); ++ if (!md) { ++ pr_err("%s: NO eMMC block data. Try it later\n", ++ __func__); ++ return -ENODEV; ++ } ++ ret = mmc_rpmb_req_process(md, req); ++ mmc_blk_put(md); ++ ++ return ret; +} ++EXPORT_SYMBOL_GPL(mmc_rpmb_req_handle); + - static inline int mmc_get_devidx(struct gendisk *disk) + static int mmc_blk_issue_discard_rq(struct mmc_queue *mq, struct request *req) { - int devmaj = MAJOR(disk_devt(disk)); + struct mmc_blk_data *md = mq->data; +@@ -1899,11 +2053,16 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) + + ret = mmc_blk_part_switch(card, md); + if (ret) { +- if (req) { +- blk_end_request_all(req, -EIO); ++ pr_err("%s: switch part failed. Try to reset eMMC\n", ++ mmc_hostname(card->host)); ++ if (mmc_blk_reset(md, card->host, MMC_BLK_USER)) { ++ if (req) ++ blk_end_request_all(req, -EIO); ++ ret = 0; ++ goto out; + } +- ret = 0; +- goto out; ++ pr_info("%s: Reset eMMC success\n", mmc_hostname(card->host)); ++ mmc_blk_reset_success(md, MMC_BLK_USER); + } + + mq->flags &= ~MMC_QUEUE_NEW_REQUEST; +@@ -2366,6 +2525,19 @@ static int mmc_blk_suspend(struct mmc_card *card) + mmc_queue_suspend(&md->queue); + list_for_each_entry(part_md, &md->part, part) { + mmc_queue_suspend(&part_md->queue); ++ if (part_md->part_type == ++ EXT_CSD_PART_CONFIG_ACC_RPMB) { ++ /* ++ * RPMB partition is accessed by API directly. ++ * Driver need to set a flag when suspending ++ * MMC block device to notify API that the ++ * accessing of RPMB partition needs to be ++ * stopped ++ */ ++ mmc_claim_host(card->host); ++ part_md->flags |= MMC_BLK_SUSPENDED; ++ mmc_release_host(card->host); ++ } + } + } + return 0; +@@ -2385,6 +2557,18 @@ static int mmc_blk_resume(struct mmc_card *card) + mmc_queue_resume(&md->queue); + list_for_each_entry(part_md, &md->part, part) { + mmc_queue_resume(&part_md->queue); ++ if (part_md->part_type == ++ EXT_CSD_PART_CONFIG_ACC_RPMB) { ++ /* ++ * RPMB partition is accessed by API directly. ++ * Driver need to clear MMC_BLK_SUSPENDED flag ++ * to make sure the next RPMB partition access ++ * request won't be blocked ++ */ ++ mmc_claim_host(card->host); ++ part_md->flags &= ~MMC_BLK_SUSPENDED; ++ mmc_release_host(card->host); ++ } + } + } + return 0; diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c -index 9447a0e..2c84ec5 100644 +index 9447a0e..88327f7 100644 --- a/drivers/mmc/card/queue.c +++ b/drivers/mmc/card/queue.c @@ -18,6 +18,7 @@ @@ -45151,19 +47743,19 @@ index 9447a0e..2c84ec5 100644 } - if (mq && mmc_card_removed(mq->card)) -+ if (mq && mmc_card_removed(mq->card) || mmc_access_rpmb(mq)) ++ if (mq && (mmc_card_removed(mq->card) || mmc_access_rpmb(mq))) return BLKPREP_KILL; req->cmd_flags |= REQ_DONTPREP; diff --git a/drivers/mmc/card/queue.h b/drivers/mmc/card/queue.h -index 5752d50..23460e6 100644 +index 5752d50..3bbd4e6 100644 --- a/drivers/mmc/card/queue.h +++ b/drivers/mmc/card/queue.h @@ -73,4 +73,5 @@ extern void mmc_queue_bounce_post(struct mmc_queue_req *); extern int mmc_packed_init(struct mmc_queue *, struct mmc_card *); extern void mmc_packed_clean(struct mmc_queue *); -+int mmc_access_rpmb(struct mmc_queue *mq); ++extern int mmc_access_rpmb(struct mmc_queue *); #endif diff --git a/drivers/mmc/core/Makefile b/drivers/mmc/core/Makefile index 38ed210..d55cc5d 100644 @@ -45302,7 +47894,7 @@ index 35c2f85..a0cb347 100644 str = "invalid"; break; diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c -index 0cbd1ef..89d6082 100644 +index 0cbd1ef..fc39179 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -239,7 +239,8 @@ static int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd) @@ -45328,7 +47920,51 @@ index 0cbd1ef..89d6082 100644 card->ext_csd.hs_max_dtr = hs_max_dtr; card->ext_csd.card_type = card_type; } -@@ -707,8 +714,12 @@ static int mmc_select_powerclass(struct mmc_card *card, +@@ -497,6 +504,9 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd) + * RPMB regions are defined in multiples of 128K. + */ + card->ext_csd.raw_rpmb_size_mult = ext_csd[EXT_CSD_RPMB_MULT]; ++ card->ext_csd.rpmb_size = 128 * ++ card->ext_csd.raw_rpmb_size_mult; ++ card->ext_csd.rpmb_size <<= 2; /* Unit: half sector */ + if (ext_csd[EXT_CSD_RPMB_MULT] && mmc_host_cmd23(card->host)) { + mmc_part_add(card, ext_csd[EXT_CSD_RPMB_MULT] << 17, + EXT_CSD_PART_CONFIG_ACC_RPMB, +@@ -548,6 +558,17 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd) + card->ext_csd.data_sector_size = 512; + } + ++ /* ++ * If use legacy reliable write, then the blk counts must not ++ * big than the reliable write sectors ++ */ ++ if (!(card->ext_csd.rel_param & EXT_CSD_WR_REL_PARAM_EN)) { ++ if (card->ext_csd.rel_sectors < RPMB_AVALIABLE_SECTORS) ++ card->rpmb_max_req = card->ext_csd.rel_sectors; ++ else ++ card->rpmb_max_req = RPMB_AVALIABLE_SECTORS; ++ } else ++ card->rpmb_max_req = RPMB_AVALIABLE_SECTORS; + out: + return err; + } +@@ -635,6 +656,7 @@ MMC_DEV_ATTR(enhanced_area_offset, "%llu\n", + MMC_DEV_ATTR(enhanced_area_size, "%u\n", card->ext_csd.enhanced_area_size); + MMC_DEV_ATTR(raw_rpmb_size_mult, "%#x\n", card->ext_csd.raw_rpmb_size_mult); + MMC_DEV_ATTR(rel_sectors, "%#x\n", card->ext_csd.rel_sectors); ++MMC_DEV_ATTR(rpmb_size, "%d\n", card->ext_csd.rpmb_size); + + static struct attribute *mmc_std_attrs[] = { + &dev_attr_cid.attr, +@@ -653,6 +675,7 @@ static struct attribute *mmc_std_attrs[] = { + &dev_attr_enhanced_area_size.attr, + &dev_attr_raw_rpmb_size_mult.attr, + &dev_attr_rel_sectors.attr, ++ &dev_attr_rpmb_size.attr, + NULL, + }; + +@@ -707,8 +730,12 @@ static int mmc_select_powerclass(struct mmc_card *card, index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ? EXT_CSD_PWR_CL_52_195 : EXT_CSD_PWR_CL_DDR_52_195; @@ -45343,7 +47979,7 @@ index 0cbd1ef..89d6082 100644 break; case MMC_VDD_27_28: case MMC_VDD_28_29: -@@ -755,6 +766,81 @@ static int mmc_select_powerclass(struct mmc_card *card, +@@ -755,6 +782,81 @@ static int mmc_select_powerclass(struct mmc_card *card, } /* @@ -45425,7 +48061,7 @@ index 0cbd1ef..89d6082 100644 * Selects the desired buswidth and switch to the HS200 mode * if bus width set without error */ -@@ -775,12 +861,16 @@ static int mmc_select_hs200(struct mmc_card *card) +@@ -775,12 +877,16 @@ static int mmc_select_hs200(struct mmc_card *card) host = card->host; @@ -45446,7 +48082,7 @@ index 0cbd1ef..89d6082 100644 err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); /* If fails try again during next card power cycle */ -@@ -1038,8 +1128,10 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, +@@ -1038,8 +1144,10 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, */ if (card->ext_csd.hs_max_dtr != 0) { err = 0; @@ -45458,7 +48094,7 @@ index 0cbd1ef..89d6082 100644 err = mmc_select_hs200(card); else if (host->caps & MMC_CAP_MMC_HIGHSPEED) err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, -@@ -1055,6 +1147,15 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, +@@ -1055,6 +1163,15 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, err = 0; } else { if (card->ext_csd.hs_max_dtr > 52000000 && @@ -45474,7 +48110,7 @@ index 0cbd1ef..89d6082 100644 host->caps2 & MMC_CAP2_HS200) { mmc_card_set_hs200(card); mmc_set_timing(card->host, -@@ -1071,7 +1172,9 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, +@@ -1071,7 +1188,9 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, */ max_dtr = (unsigned int)-1; @@ -45485,7 +48121,7 @@ index 0cbd1ef..89d6082 100644 if (max_dtr > card->ext_csd.hs_max_dtr) max_dtr = card->ext_csd.hs_max_dtr; if (mmc_card_highspeed(card) && (max_dtr > 52000000)) -@@ -1099,9 +1202,9 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, +@@ -1099,9 +1218,9 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, } /* @@ -45497,7 +48133,7 @@ index 0cbd1ef..89d6082 100644 u32 ext_csd_bits; u32 bus_width = card->host->ios.bus_width; -@@ -1116,7 +1219,9 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, +@@ -1116,7 +1235,9 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, * 3. set the clock to > 52Mhz <=200MHz and * 4. execute tuning for HS200 */ @@ -45508,7 +48144,7 @@ index 0cbd1ef..89d6082 100644 card->host->ops->execute_tuning) { mmc_host_clk_hold(card->host); err = card->host->ops->execute_tuning(card->host, -@@ -1129,19 +1234,45 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, +@@ -1129,19 +1250,45 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, goto err; } @@ -45558,7 +48194,7 @@ index 0cbd1ef..89d6082 100644 (host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) { static unsigned ext_csd_bits[][2] = { diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c -index 49f04bc..a3d0615 100644 +index 49f04bc..432af79 100644 --- a/drivers/mmc/core/mmc_ops.c +++ b/drivers/mmc/core/mmc_ops.c @@ -141,7 +141,7 @@ int mmc_send_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr) @@ -45579,6 +48215,422 @@ index 49f04bc..a3d0615 100644 } if (rocr && !mmc_host_is_spi(host)) +@@ -638,3 +638,415 @@ int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status) + + return 0; + } ++ ++static int mmc_rpmb_send_command(struct mmc_card *card, u8 *buf, __u16 blks, ++ __u16 type, u8 req_type) ++{ ++ struct mmc_request mrq = {NULL}; ++ struct mmc_command cmd = {0}; ++ struct mmc_command sbc = {0}; ++ struct mmc_data data = {0}; ++ struct scatterlist sg; ++ u8 *transfer_buf = NULL; ++ ++ mrq.sbc = &sbc; ++ mrq.cmd = &cmd; ++ mrq.data = &data; ++ mrq.stop = NULL; ++ transfer_buf = kzalloc(512 * blks, GFP_KERNEL); ++ if (!transfer_buf) ++ return -ENOMEM; ++ ++ /* ++ * set CMD23 ++ */ ++ sbc.opcode = MMC_SET_BLOCK_COUNT; ++ sbc.arg = blks; ++ if ((req_type == RPMB_REQ) && (type == RPMB_WRITE_DATA || ++ type == RPMB_PROGRAM_KEY)) ++ sbc.arg |= 1 << 31; ++ sbc.flags = MMC_RSP_R1 | MMC_CMD_AC; ++ ++ /* ++ * set CMD25/18 ++ */ ++ sg_init_one(&sg, transfer_buf, 512 * blks); ++ if (req_type == RPMB_REQ) { ++ cmd.opcode = MMC_WRITE_MULTIPLE_BLOCK; ++ sg_copy_from_buffer(&sg, 1, buf, 512 * blks); ++ data.flags |= MMC_DATA_WRITE; ++ } else { ++ cmd.opcode = MMC_READ_MULTIPLE_BLOCK; ++ data.flags |= MMC_DATA_READ; ++ } ++ cmd.arg = 0; ++ cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; ++ data.blksz = 512; ++ data.blocks = blks; ++ data.sg = &sg; ++ data.sg_len = 1; ++ ++ mmc_set_data_timeout(&data, card); ++ ++ mmc_wait_for_req(card->host, &mrq); ++ ++ if (req_type != RPMB_REQ) ++ sg_copy_to_buffer(&sg, 1, buf, 512 * blks); ++ ++ kfree(transfer_buf); ++ ++ if (cmd.error) ++ return cmd.error; ++ if (data.error) ++ return data.error; ++ return 0; ++} ++ ++void mmc_rpmb_post_frame(struct mmc_core_rpmb_req *rpmb_req) ++{ ++ int i; ++ struct mmc_ioc_rpmb_req *p_req; ++ __u8 *buf_frame; ++ ++ if (!rpmb_req || !rpmb_req->ready) ++ return; ++ ++ p_req = rpmb_req->req; ++ buf_frame = rpmb_req->frame; ++ ++ if (!p_req || !buf_frame) ++ return; ++ /* ++ * Regarding to the check rules, here is the post ++ * rules ++ * All will return result. ++ * GET_WRITE_COUNTER: ++ * must: write counter, nonce ++ * optional: MAC ++ * WRITE_DATA: ++ * must: MAC, write counter ++ * READ_DATA: ++ * must: nonce, data ++ * optional: MAC ++ * PROGRAM_KEY: ++ * must: Nothing ++ * ++ * Except READ_DATA, all of these operations only need to parse ++ * one frame. READ_DATA needs blks frames to get DATA ++ */ ++ ++ memcpy(p_req->result, buf_frame + RPMB_RES_BEG, 2); ++ *p_req->result = be16_to_cpup(p_req->result); ++ ++ if (p_req->type == RPMB_PROGRAM_KEY) ++ goto out; ++ ++ if (p_req->type == RPMB_GET_WRITE_COUNTER || ++ p_req->type == RPMB_WRITE_DATA) { ++ memcpy(p_req->wc, buf_frame + RPMB_WCOUNTER_BEG, 4); ++ *p_req->wc = be32_to_cpup(p_req->wc); ++ } ++ ++ if (p_req->type == RPMB_GET_WRITE_COUNTER || ++ p_req->type == RPMB_READ_DATA) { ++ /* nonce copy */ ++ memcpy(p_req->nonce, buf_frame + RPMB_NONCE_BEG, 16); ++ } ++ /* ++ * Take MAC within the last package ++ */ ++ if (p_req->type == RPMB_READ_DATA) { ++ __u8 *data = p_req->data; ++ for (i = 0; i < p_req->blk_cnt; i++) { ++ memcpy(data, buf_frame + i * 512 + RPMB_DATA_BEG, 256); ++ data += 256; ++ } ++ /* ++ * MAC stored in the last package ++ */ ++ if (p_req->mac) ++ memcpy(p_req->mac, buf_frame + i * 512 + RPMB_MAC_BEG, ++ 32); ++ } else if (p_req->mac) ++ memcpy(p_req->mac, buf_frame + RPMB_MAC_BEG, 32); ++out: ++ kfree(buf_frame); ++ rpmb_req->frame = NULL; ++ return; ++} ++EXPORT_SYMBOL_GPL(mmc_rpmb_post_frame); ++ ++static int mmc_rpmb_request_check(struct mmc_card *card, ++ struct mmc_ioc_rpmb_req *p_req) ++{ ++ /* ++ * Some parameters are a must for the operation. Different ++ * operation expect different paramters. Below code is ++ * used for checking this. ++ * ++ * All operations will need result. ++ * GET_WRITE_COUNTER: ++ * must: write counter, nonce ++ * optional: MAC ++ * WRITE_DATA: ++ * must: MAC, data, write counter ++ * READ_DATA: ++ * must: nonce, data ++ * optional: MAC ++ * PROGRAM_KEY: ++ * must: MAC ++ * ++ * So here, we only check the 'must' paramters ++ */ ++ if (!p_req->result) { ++ pr_err("%s: Type %d has NULL pointer for result\n", ++ mmc_hostname(card->host), p_req->type); ++ return -EINVAL; ++ } ++ ++ if (p_req->type == RPMB_GET_WRITE_COUNTER) { ++ if (!p_req->nonce || !p_req->wc) { ++ pr_err("%s: Type %d has NULL pointer for nonce/wc\n", ++ mmc_hostname(card->host), p_req->type); ++ return -EINVAL; ++ } ++ /* ++ * used to allocate frame ++ */ ++ p_req->blk_cnt = 1; ++ } else if (p_req->type == RPMB_WRITE_DATA || ++ p_req->type == RPMB_READ_DATA) { ++ if ((__u32)(p_req->addr + p_req->blk_cnt) > ++ card->ext_csd.rpmb_size) { ++ pr_err("%s Type %d: beyond the RPMB partition rang addr %d, blk_cnt %d, rpmb_size %d\n", ++ mmc_hostname(card->host), ++ p_req->type, ++ p_req->addr, ++ p_req->blk_cnt, ++ card->ext_csd.rpmb_size); ++ return -EINVAL; ++ } ++ if (p_req->blk_cnt == 0) { ++ pr_err("%s: Type %d has zero block count\n", ++ mmc_hostname(card->host), ++ p_req->blk_cnt); ++ return -EINVAL; ++ } else if (p_req->blk_cnt > card->rpmb_max_req) { ++ pr_err("%s: Type %d has invalid block count, cannot large than %d\n", ++ mmc_hostname(card->host), ++ p_req->blk_cnt, ++ card->rpmb_max_req); ++ return -EINVAL; ++ } ++ if (!p_req->data) { ++ pr_err("%s: Type %d has NULL pointer for data\n", ++ mmc_hostname(card->host), p_req->type); ++ return -EINVAL; ++ } ++ if (p_req->type == RPMB_WRITE_DATA) { ++ if (!p_req->wc || !p_req->mac) { ++ pr_err("%s: Type %d has NULL pointer for write counter/MAC\n", ++ mmc_hostname(card->host), ++ p_req->type); ++ return -EINVAL; ++ } ++ } else { ++ if (!p_req->nonce) { ++ pr_err("%s: Type %d has NULL pointer for nonce\n", ++ mmc_hostname(card->host), ++ p_req->type); ++ return -EINVAL; ++ } ++ } ++ } else if (p_req->type == RPMB_PROGRAM_KEY) { ++ if (!p_req->mac) { ++ pr_err("%s: Type %d has NULL pointer for MAC\n", ++ mmc_hostname(card->host), p_req->type); ++ return -EINVAL; ++ } ++ /* ++ * used to allocate frame ++ */ ++ p_req->blk_cnt = 1; ++ } else ++ return -EOPNOTSUPP; ++ ++ return 0; ++} ++ ++/* ++ * prepare the request of RPMB frame ++ * RPMB frame is MSB first ++ * convert needed bytes ++ * return how many frames will be prepared ++ */ ++int mmc_rpmb_pre_frame(struct mmc_core_rpmb_req *rpmb_req, ++ struct mmc_card *card) ++{ ++ int i, ret; ++ struct mmc_ioc_rpmb_req *p_req; ++ __u8 *buf_frame; ++ __u16 blk_cnt, addr, type; ++ __u32 w_counter; ++ ++ if (!rpmb_req || !card) ++ return -EINVAL; ++ ++ p_req = rpmb_req->req; ++ if (!p_req) { ++ pr_err("%s: mmc_ioc_rpmb_req is NULL. Wrong parameter\n", ++ mmc_hostname(card->host)); ++ return -EINVAL; ++ } ++ ++ /* ++ * make sure these two items are clear ++ */ ++ rpmb_req->ready = 0; ++ rpmb_req->frame = NULL; ++ ++ ret = mmc_rpmb_request_check(card, p_req); ++ if (ret) ++ return ret; ++ ++ buf_frame = kzalloc(512 * p_req->blk_cnt, GFP_KERNEL); ++ if (!buf_frame) { ++ pr_err("%s: cannot allocate frame for type %d\n", ++ mmc_hostname(card->host), p_req->type); ++ return -ENOMEM; ++ } ++ ++ type = cpu_to_be16p(&p_req->type); ++ if (p_req->type == RPMB_GET_WRITE_COUNTER || ++ p_req->type == RPMB_READ_DATA) { ++ /* ++ * One package prepared ++ * This request needs Nonce and type ++ * If is data read, then also need addr ++ */ ++ memcpy(buf_frame + RPMB_TYPE_BEG, &type, 2); ++ if (p_req->type == RPMB_READ_DATA) { ++ addr = cpu_to_be16p(&p_req->addr); ++ memcpy(buf_frame + RPMB_ADDR_BEG, &addr, 2); ++ } ++ /* convert Nonce code */ ++ memcpy(buf_frame + RPMB_NONCE_BEG, p_req->nonce, 16); ++ } else if (p_req->type == RPMB_WRITE_DATA) { ++ __u8 *data = p_req->data; ++ /* ++ * multiple package prepared ++ * This request nees blk_cnt, addr, write_counter, ++ * data and mac ++ */ ++ blk_cnt = cpu_to_be16p(&p_req->blk_cnt); ++ addr = cpu_to_be16p(&p_req->addr); ++ w_counter = cpu_to_be32p(p_req->wc); ++ for (i = 0; i < p_req->blk_cnt; i++) { ++ memcpy(buf_frame + i * 512 + RPMB_TYPE_BEG, ++ &type, 2); ++ memcpy(buf_frame + i * 512 + RPMB_BLKS_BEG, ++ &blk_cnt, 2); ++ memcpy(buf_frame + i * 512 + RPMB_ADDR_BEG, ++ &addr, 2); ++ memcpy(buf_frame + i * 512 + RPMB_WCOUNTER_BEG, ++ &w_counter, 4); ++ memcpy(buf_frame + i * 512 + RPMB_DATA_BEG, ++ data, 256); ++ data += 256; ++ } ++ /* convert MAC code */ ++ memcpy(buf_frame + 512 * (i - 1) + RPMB_MAC_BEG, ++ p_req->mac, 32); ++ } else if (p_req->type == RPMB_PROGRAM_KEY) { ++ /* ++ * One package prepared ++ * This request only need mac ++ */ ++ memcpy(buf_frame + RPMB_TYPE_BEG, &type, 2); ++ /* convert MAC code */ ++ memcpy(buf_frame + RPMB_MAC_BEG, ++ p_req->mac, 32); ++ } else { ++ pr_err("%s: We shouldn't be here\n", mmc_hostname(card->host)); ++ kfree(buf_frame); ++ return -EINVAL; ++ } ++ rpmb_req->ready = 1; ++ rpmb_req->frame = buf_frame; ++ return 0; ++} ++EXPORT_SYMBOL_GPL(mmc_rpmb_pre_frame); ++ ++int mmc_rpmb_partition_ops(struct mmc_core_rpmb_req *rpmb_req, ++ struct mmc_card *card) ++{ ++ int err = 0; ++ struct mmc_ioc_rpmb_req *p_req; ++ __u16 type, blks; ++ __u8 *buf_frame; ++ ++ if (!rpmb_req || !card) ++ return -EINVAL; ++ ++ p_req = rpmb_req->req; ++ buf_frame = rpmb_req->frame; ++ ++ if (!p_req || !rpmb_req->ready || !buf_frame) { ++ pr_err("%s: mmc_ioc_rpmb_req is not prepared\n", ++ mmc_hostname(card->host)); ++ return -EINVAL; ++ } ++ ++ type = p_req->type; ++ blks = p_req->blk_cnt; ++ ++ /* ++ * STEP 1: send request to RPMB partition ++ */ ++ if (type == RPMB_WRITE_DATA) ++ err = mmc_rpmb_send_command(card, buf_frame, blks, ++ type, RPMB_REQ); ++ else ++ err = mmc_rpmb_send_command(card, buf_frame, 1, type, RPMB_REQ); ++ ++ if (err) { ++ pr_err("%s: request write counter failed (%d)\n", ++ mmc_hostname(card->host), err); ++ goto out; ++ } ++ ++ memset(buf_frame, 0, 512 * blks); ++ /* ++ * STEP 2: check write result ++ * Only for WRITE_DATA or Program key ++ */ ++ if (type == RPMB_WRITE_DATA || ++ type == RPMB_PROGRAM_KEY) { ++ buf_frame[RPMB_TYPE_BEG + 1] = RPMB_RESULT_READ; ++ err = mmc_rpmb_send_command(card, buf_frame, 1, ++ RPMB_RESULT_READ, RPMB_REQ); ++ if (err) { ++ pr_err("%s: request write counter failed (%d)\n", ++ mmc_hostname(card->host), err); ++ goto out; ++ } ++ } ++ ++ /* ++ * STEP 3: get response from RPMB partition ++ */ ++ ++ if (type == RPMB_READ_DATA) ++ err = mmc_rpmb_send_command(card, buf_frame, ++ blks, type, RPMB_RESP); ++ else ++ err = mmc_rpmb_send_command(card, buf_frame, ++ 1, type, RPMB_RESP); ++ if (err) { ++ pr_err("%s: response write counter failed (%d)\n", ++ mmc_hostname(card->host), err); ++ } ++out: ++ return err; ++} ++EXPORT_SYMBOL_GPL(mmc_rpmb_partition_ops); diff --git a/drivers/mmc/core/mmc_panic_ops.c b/drivers/mmc/core/mmc_panic_ops.c new file mode 100644 index 0000000..2ed0204 @@ -47699,7 +50751,7 @@ index 701d06d..39696af 100644 .pm = &sdhci_pci_pm_ops }, diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c -index 2ea429c..8289777 100644 +index 2ea429c..1f7c796 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -54,6 +54,7 @@ static void sdhci_finish_command(struct sdhci_host *); @@ -48431,7 +51483,12 @@ index 2ea429c..8289777 100644 /* The controller does not support the end-of-busy IRQ, * fall through and take the SDHCI_INT_RESPONSE */ -@@ -2306,7 +2701,10 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) +@@ -2303,10 +2698,23 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) + * The "data complete" interrupt is also used to + * indicate that a busy state has ended. See comment + * above in sdhci_cmd_irq(). ++ * ++ * "data timeout" interrupt may also happen */ if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) { if (intmask & SDHCI_INT_DATA_END) { @@ -48440,10 +51497,18 @@ index 2ea429c..8289777 100644 + sdhci_finish_command(host); + else + host->r1b_busy_end = 1; ++ return; ++ } else if (intmask & SDHCI_INT_DATA_TIMEOUT) { ++ pr_err("%s: Got data interrupt 0x%08x for busy cmd %d\n", ++ mmc_hostname(host->mmc), ++ (unsigned)intmask, ++ host->cmd->opcode); ++ host->cmd->error = -ETIMEDOUT; ++ tasklet_schedule(&host->finish_tasklet); return; } } -@@ -2436,6 +2834,21 @@ again: +@@ -2436,6 +2844,21 @@ again: } if (intmask & SDHCI_INT_CMD_MASK) { @@ -48465,7 +51530,7 @@ index 2ea429c..8289777 100644 sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, SDHCI_INT_STATUS); sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); -@@ -2491,94 +2904,841 @@ out: +@@ -2491,83 +2914,830 @@ out: return result; } @@ -48639,9 +51704,6 @@ index 2ea429c..8289777 100644 - } else { - sdhci_enable_irq_wakeups(host); - enable_irq_wake(host->irq); -- } -- return ret; --} + /* + * set transfer mode + */ @@ -48655,19 +51717,18 @@ index 2ea429c..8289777 100644 + } + if (host->flags & SDHCI_REQ_USE_DMA) + mode |= SDHCI_TRNS_DMA; ++ ++ sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); + } +- return ret; +-} -EXPORT_SYMBOL_GPL(sdhci_suspend_host); -+ sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); -+ } ++ sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); -int sdhci_resume_host(struct sdhci_host *host) -{ - int ret; -+ sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); - -- if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { -- if (host->ops->enable_dma) -- host->ops->enable_dma(host); + if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { + pr_err("%s %s: Unsupported response type!\n", + __func__, mmc_hostname(host->mmc)); @@ -49359,13 +52420,10 @@ index 2ea429c..8289777 100644 + unsigned long flags; + + sdhci_acquire_ownership(host->mmc); -+ -+ if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { -+ if (host->ops->enable_dma) -+ host->ops->enable_dma(host); - } - if (!device_may_wakeup(mmc_dev(host->mmc))) { + if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { + if (host->ops->enable_dma) +@@ -2578,7 +3748,7 @@ int sdhci_resume_host(struct sdhci_host *host) ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, mmc_hostname(host->mmc), host); if (ret) @@ -49374,7 +52432,7 @@ index 2ea429c..8289777 100644 } else { sdhci_disable_irq_wakeups(host); disable_irq_wake(host->irq); -@@ -2596,6 +3756,10 @@ int sdhci_resume_host(struct sdhci_host *host) +@@ -2596,6 +3766,10 @@ int sdhci_resume_host(struct sdhci_host *host) mmiowb(); } @@ -49385,7 +52443,7 @@ index 2ea429c..8289777 100644 ret = mmc_resume_host(host->mmc); sdhci_enable_card_detection(host); -@@ -2606,6 +3770,10 @@ int sdhci_resume_host(struct sdhci_host *host) +@@ -2606,6 +3780,10 @@ int sdhci_resume_host(struct sdhci_host *host) if (host->flags & SDHCI_USING_RETUNING_TIMER) host->flags |= SDHCI_NEEDS_RETUNING; @@ -49396,7 +52454,7 @@ index 2ea429c..8289777 100644 return ret; } -@@ -2630,6 +3798,7 @@ int sdhci_runtime_suspend_host(struct sdhci_host *host) +@@ -2630,6 +3808,7 @@ int sdhci_runtime_suspend_host(struct sdhci_host *host) unsigned long flags; int ret = 0; @@ -49404,7 +52462,7 @@ index 2ea429c..8289777 100644 /* Disable tuning since we are suspending */ if (host->flags & SDHCI_USING_RETUNING_TIMER) { del_timer_sync(&host->tuning_timer); -@@ -2646,6 +3815,7 @@ int sdhci_runtime_suspend_host(struct sdhci_host *host) +@@ -2646,6 +3825,7 @@ int sdhci_runtime_suspend_host(struct sdhci_host *host) host->runtime_suspended = true; spin_unlock_irqrestore(&host->lock, flags); @@ -49412,7 +52470,7 @@ index 2ea429c..8289777 100644 return ret; } EXPORT_SYMBOL_GPL(sdhci_runtime_suspend_host); -@@ -2655,6 +3825,8 @@ int sdhci_runtime_resume_host(struct sdhci_host *host) +@@ -2655,6 +3835,8 @@ int sdhci_runtime_resume_host(struct sdhci_host *host) unsigned long flags; int ret = 0, host_flags = host->flags; @@ -49421,7 +52479,7 @@ index 2ea429c..8289777 100644 if (host_flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { if (host->ops->enable_dma) host->ops->enable_dma(host); -@@ -2692,6 +3864,7 @@ int sdhci_runtime_resume_host(struct sdhci_host *host) +@@ -2692,6 +3874,7 @@ int sdhci_runtime_resume_host(struct sdhci_host *host) spin_unlock_irqrestore(&host->lock, flags); @@ -49429,7 +52487,7 @@ index 2ea429c..8289777 100644 return ret; } EXPORT_SYMBOL_GPL(sdhci_runtime_resume_host); -@@ -2724,6 +3897,36 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev, +@@ -2724,6 +3907,36 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev, EXPORT_SYMBOL_GPL(sdhci_alloc_host); @@ -49466,7 +52524,7 @@ index 2ea429c..8289777 100644 int sdhci_add_host(struct sdhci_host *host) { struct mmc_host *mmc; -@@ -2897,6 +4100,8 @@ int sdhci_add_host(struct sdhci_host *host) +@@ -2897,6 +4110,8 @@ int sdhci_add_host(struct sdhci_host *host) mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23; @@ -49475,7 +52533,7 @@ index 2ea429c..8289777 100644 if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12) host->flags |= SDHCI_AUTO_CMD12; -@@ -2989,6 +4194,8 @@ int sdhci_add_host(struct sdhci_host *host) +@@ -2989,6 +4204,8 @@ int sdhci_add_host(struct sdhci_host *host) /* Initial value for re-tuning timer count */ host->tuning_count = (caps[1] & SDHCI_RETUNING_TIMER_COUNT_MASK) >> SDHCI_RETUNING_TIMER_COUNT_SHIFT; @@ -49484,7 +52542,7 @@ index 2ea429c..8289777 100644 /* * In case Re-tuning Timer is not disabled, the actual value of -@@ -3002,17 +4209,10 @@ int sdhci_add_host(struct sdhci_host *host) +@@ -3002,17 +4219,10 @@ int sdhci_add_host(struct sdhci_host *host) SDHCI_RETUNING_MODE_SHIFT; ocr_avail = 0; @@ -49504,7 +52562,7 @@ index 2ea429c..8289777 100644 /* * Voltage range check makes sense only if regulator reports * any voltage value. -@@ -3080,6 +4280,11 @@ int sdhci_add_host(struct sdhci_host *host) +@@ -3080,6 +4290,11 @@ int sdhci_add_host(struct sdhci_host *host) SDHCI_MAX_CURRENT_MULTIPLIER; } @@ -49516,7 +52574,7 @@ index 2ea429c..8289777 100644 mmc->ocr_avail = ocr_avail; mmc->ocr_avail_sdio = ocr_avail; if (host->ocr_avail_sdio) -@@ -3099,8 +4304,6 @@ int sdhci_add_host(struct sdhci_host *host) +@@ -3099,8 +4314,6 @@ int sdhci_add_host(struct sdhci_host *host) return -ENODEV; } @@ -49525,7 +52583,7 @@ index 2ea429c..8289777 100644 /* * Maximum number of segments. Depends on if the hardware * can do scatter/gather or not. -@@ -3181,6 +4384,7 @@ int sdhci_add_host(struct sdhci_host *host) +@@ -3181,6 +4394,7 @@ int sdhci_add_host(struct sdhci_host *host) mmc_hostname(mmc), host->irq, ret); goto untasklet; } @@ -49533,7 +52591,7 @@ index 2ea429c..8289777 100644 sdhci_init(host, 0); -@@ -3189,18 +4393,20 @@ int sdhci_add_host(struct sdhci_host *host) +@@ -3189,18 +4403,20 @@ int sdhci_add_host(struct sdhci_host *host) #endif #ifdef SDHCI_USE_LEDS_CLASS @@ -49566,7 +52624,7 @@ index 2ea429c..8289777 100644 } #endif -@@ -3215,13 +4421,18 @@ int sdhci_add_host(struct sdhci_host *host) +@@ -3215,13 +4431,18 @@ int sdhci_add_host(struct sdhci_host *host) sdhci_enable_card_detection(host); @@ -49588,7 +52646,7 @@ index 2ea429c..8289777 100644 #endif untasklet: tasklet_kill(&host->card_tasklet); -@@ -3257,7 +4468,8 @@ void sdhci_remove_host(struct sdhci_host *host, int dead) +@@ -3257,7 +4478,8 @@ void sdhci_remove_host(struct sdhci_host *host, int dead) mmc_remove_host(host->mmc); #ifdef SDHCI_USE_LEDS_CLASS @@ -49814,7 +52872,7 @@ index df4655c..02d48ec 100644 * If arch hasn't set it explicitly yet, use the CLS * value shared by all PCI devices. If there's a diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig -index 8577261..a1df080 100644 +index 8577261..d42f5ef 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -651,6 +651,20 @@ config INTEL_SCU_IPC @@ -49838,7 +52896,7 @@ index 8577261..a1df080 100644 config INTEL_SCU_IPC_UTIL tristate "Intel SCU IPC utility driver" -@@ -789,4 +803,13 @@ config PVPANIC +@@ -789,4 +803,30 @@ config PVPANIC a paravirtualized device provided by QEMU; it lets a virtual machine (guest) communicate panic events to the host. @@ -49850,10 +52908,27 @@ index 8577261..a1df080 100644 + This driver builds the SCU Flis Access Sysfs Interfaces. + We could read write the flis address and configure the + pin pull up/down using these interfaces. ++ ++config INTEL_PSH_IPC ++ bool "Intel PSH IPC Support" ++ depends on X86_INTEL_MID ++ ---help--- ++ PSH(Platform Services Hub) is a low frequence IA core on Tangier Platform, ++ whose power consumption is quite low. PSH runs RTOS software inside itself, ++ which independently controls and collects sensor data, pre-processes the data, ++ and communicates with Atom. Thus ATOM side could be put into low power mode ++ with more time, while all the sensor data are collected without any lost. ++ ++ PSH IPC is used as a bridge for OS sensor service to control and access PSH ++ sensors communications between kernel and PSH. This is not needed for PC-type ++ machines. ++ ++ Say Y here to get Intel PSH IPC support. ++ + endif # X86_PLATFORM_DEVICES diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile -index ef0ec74..c075bb2 100644 +index ef0ec74..7d82ebf 100644 --- a/drivers/platform/x86/Makefile +++ b/drivers/platform/x86/Makefile @@ -36,9 +36,9 @@ obj-$(CONFIG_TOPSTAR_LAPTOP) += topstar-laptop.o @@ -49868,6 +52943,12 @@ index ef0ec74..c075bb2 100644 obj-$(CONFIG_INTEL_IPS) += intel_ips.o obj-$(CONFIG_GPIO_INTEL_PMIC) += intel_pmic_gpio.o obj-$(CONFIG_XO1_RFKILL) += xo1-rfkill.o +@@ -53,3 +53,5 @@ obj-$(CONFIG_APPLE_GMUX) += apple-gmux.o + obj-$(CONFIG_CHROMEOS_LAPTOP) += chromeos_laptop.o + + obj-$(CONFIG_PVPANIC) += pvpanic.o ++ ++obj-$(CONFIG_INTEL_PSH_IPC) += intel_psh_ipc.o diff --git a/drivers/platform/x86/intel_mid_powerbtn.c b/drivers/platform/x86/intel_mid_powerbtn.c index f59683a..669a254 100644 --- a/drivers/platform/x86/intel_mid_powerbtn.c @@ -50785,6 +53866,649 @@ index 6f4b728..c2d271a 100644 #include #include #include +diff --git a/drivers/platform/x86/intel_psh_ipc.c b/drivers/platform/x86/intel_psh_ipc.c +new file mode 100644 +index 0000000..12e8bf1 +--- /dev/null ++++ b/drivers/platform/x86/intel_psh_ipc.c +@@ -0,0 +1,637 @@ ++/* ++ * intel_psh_ipc.c: Driver for the Intel PSH IPC mechanism ++ * ++ * (C) Copyright 2012 Intel Corporation ++ * Author: Yang Bin (bin.yang@intel.com) ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PSH_ERR(fmt, arg...) dev_err(&ipc_ctrl.pdev->dev, fmt, ##arg) ++#define PSH_DBG(fmt, arg...) dev_dbg(&ipc_ctrl.pdev->dev, fmt, ##arg) ++ ++#define STATUS_PSH2IA(x) (1 << ((x) + 6)) ++#define FLAG_BIND (1 << 0) ++ ++#define PIMR_ADDR(x) (&ipc_ctrl.psh_regs->psh_regs_b_step.pimr##x) ++ ++#define PSH_REG_ADDR(x) (&ipc_ctrl.psh_regs->psh_regs_b_step.x) ++ ++#define PSH_CH_HANDLE(x) (ipc_ctrl.channel_handle[x]) ++#define PSH_CH_DATA(x) (ipc_ctrl.channel_data[x]) ++#define PSH_CH_FLAG(x) (ipc_ctrl.flags[x]) ++ ++/* PSH registers */ ++union psh_registers { ++ /* reg mem map A */ ++ struct { ++ u32 csr; /* 00h */ ++ u32 res1; /* padding */ ++ u32 pisr; /* 08h */ ++ u32 pimr0; /* 0Ch */ ++ u32 pimr1; /* 10h */ ++ u32 pimr2; /* 14h */ ++ u32 pimr3; /* 18h */ ++ u32 pmctl; /* 1Ch */ ++ u32 pmstat; /* 20h */ ++ u32 res2; /* padding */ ++ struct psh_msg ia2psh[NUM_IA2PSH_IPC];/* 28h ~ 44h + 3 */ ++ struct psh_msg cry2psh;/* 48h ~ 4Ch + 3 */ ++ struct psh_msg scu2psh;/* 50h ~ 54h + 3 */ ++ u32 res3[2];/* padding */ ++ struct psh_msg psh2ia[NUM_PSH2IA_IPC];/* 60h ~ 7Ch + 3 */ ++ struct psh_msg psh2cry;/* 80h ~ 84h + 3 */ ++ struct psh_msg psh2scu;/* 88h */ ++ u32 msi_dir;/* 90h */ ++ u32 res4[3]; ++ u32 scratchpad[2];/* A0 */ ++ } __packed psh_regs_a_step; ++ /* reg mem map B */ ++ struct { ++ u32 pimr0; /* 00h */ ++ u32 csr; /* 04h */ ++ u32 pmctl; /* 08h */ ++ u32 pmstat; /* 0Ch */ ++ u32 psh_msi_direct; /* 10h */ ++ u32 res1[59]; /* 14h ~ FCh + 3, padding */ ++ u32 pimr3; /* 100h */ ++ struct psh_msg scu2psh; /* 104h ~ 108h + 3 */ ++ struct psh_msg psh2scu; /* 10Ch ~ 110h + 3 */ ++ u32 res2[187]; /* 114h ~ 3FCh + 3, padding */ ++ u32 pisr; /* 400h */ ++ u32 scratchpad[2]; /* 404h ~ 407h */ ++ u32 res3[61]; /* 40Ch ~ 4FCh + 3, padding */ ++ u32 pimr1; /* 500h */ ++ struct psh_msg ia2psh[NUM_IA2PSH_IPC]; /* 504h ~ 520h + 3 */ ++ struct psh_msg psh2ia[NUM_PSH2IA_IPC]; /* 524h ~ 540h + 3 */ ++ u32 res4[175]; /* 544h ~ 7FCh + 3, padding */ ++ u32 pimr2; /* 800h */ ++ struct psh_msg cry2psh; /* 804h ~ 808h + 3 */ ++ struct psh_msg psh2cry; /* 80Ch ~ 810h + 3 */ ++ } __packed psh_regs_b_step; ++} __packed; ++ ++static struct ipc_controller_t { ++ int reg_map; ++ int initialized; ++ struct pci_dev *pdev; ++ spinlock_t lock; ++ int flags[NUM_ALL_CH]; ++ union psh_registers *psh_regs; ++ struct semaphore ch_lock[NUM_ALL_CH]; ++ struct mutex psh_mutex; ++ psh_channel_handle_t channel_handle[NUM_PSH2IA_IPC]; ++ void *channel_data[NUM_PSH2IA_IPC]; ++} ipc_ctrl; ++ ++ ++/** ++ * intel_ia2psh_command - send IA to PSH command ++ * Send ia2psh command and return psh message and status ++ * ++ * @in: input psh message ++ * @out: output psh message ++ * @ch: psh channel ++ * @timeout: timeout for polling busy bit, in us ++ */ ++int intel_ia2psh_command(struct psh_msg *in, struct psh_msg *out, ++ int ch, int timeout) ++{ ++ int ret = 0; ++ u32 status; ++ ++ might_sleep(); ++ ++ if (!ipc_ctrl.initialized) ++ return -ENODEV; ++ ++ if (ch < PSH_SEND_CH0 || ch > PSH_SEND_CH0 + NUM_IA2PSH_IPC - 1 ++ || in == NULL) ++ return -EINVAL; ++ ++ if (!in || in->msg & CHANNEL_BUSY) ++ return -EINVAL; ++ ++ pm_runtime_get_sync(&ipc_ctrl.pdev->dev); ++ down(&ipc_ctrl.ch_lock[ch]); ++ ++ in->msg |= CHANNEL_BUSY; ++ /* Check if channel is ready for IA sending command */ ++ ++ if (readl(PSH_REG_ADDR(ia2psh[ch].msg)) & CHANNEL_BUSY) { ++ ret = -EBUSY; ++ goto end; ++ } ++ ++ writel(in->param, PSH_REG_ADDR(ia2psh[ch].param)); ++ writel(in->msg, PSH_REG_ADDR(ia2psh[ch].msg)); ++ ++ /* Input timeout is zero, do not check channel status */ ++ if (timeout == 0) ++ goto end; ++ ++ /* Input timeout is nonzero, check channel status */ ++ while (((status = readl(PSH_REG_ADDR(ia2psh[ch].msg))) & CHANNEL_BUSY) ++ && timeout) { ++ usleep_range(100, 101); ++ timeout -= 100; ++ } ++ ++ if (timeout <= 0) { ++ ret = -ETIMEDOUT; ++ PSH_ERR("ia2psh channel %d is always busy!\n", ch); ++ goto end; ++ } else { ++ if (out == NULL) ++ goto end; ++ ++ out->param = readl(PSH_REG_ADDR(ia2psh[ch].param)); ++ out->msg = status; ++ } ++ ++end: ++ up(&ipc_ctrl.ch_lock[ch]); ++ pm_runtime_put(&ipc_ctrl.pdev->dev); ++ ++ return ret; ++} ++EXPORT_SYMBOL(intel_ia2psh_command); ++ ++/** ++ * intel_psh_ipc_bind - bind a handler to a psh channel ++ * ++ * @ch: psh channel ++ * @handle: handle function called when IA received psh interrupt ++ * @data: data passed to handle ++ */ ++int intel_psh_ipc_bind(int ch, psh_channel_handle_t handle, void *data) ++{ ++ unsigned long flags; ++ ++ if (!ipc_ctrl.initialized) ++ return -ENODEV; ++ ++ if (!handle || ch < PSH_RECV_CH0 ++ || ch > PSH_RECV_CH0 + NUM_PSH2IA_IPC - 1) ++ return -EINVAL; ++ ++ mutex_lock(&ipc_ctrl.psh_mutex); ++ down(&ipc_ctrl.ch_lock[ch]); ++ if (PSH_CH_HANDLE(ch - PSH_RECV_CH0) != NULL) { ++ up(&ipc_ctrl.ch_lock[ch]); ++ mutex_unlock(&ipc_ctrl.psh_mutex); ++ return -EBUSY; ++ } else { ++ PSH_CH_DATA(ch - PSH_RECV_CH0) = data; ++ PSH_CH_HANDLE(ch - PSH_RECV_CH0) = handle; ++ } ++ up(&ipc_ctrl.ch_lock[ch]); ++ ++ pm_runtime_get_sync(&ipc_ctrl.pdev->dev); ++ spin_lock_irqsave(&ipc_ctrl.lock, flags); ++ PSH_CH_FLAG(ch) |= FLAG_BIND; ++ writel(readl(PIMR_ADDR(1)) | (1 << (ch - PSH_RECV_CH0)), PIMR_ADDR(1)); ++ spin_unlock_irqrestore(&ipc_ctrl.lock, flags); ++ pm_runtime_put(&ipc_ctrl.pdev->dev); ++ mutex_unlock(&ipc_ctrl.psh_mutex); ++ ++ return 0; ++} ++EXPORT_SYMBOL(intel_psh_ipc_bind); ++ ++/** ++ * intel_psh_ipc_unbind - unbind a handler to a psh channel ++ * ++ * @ch: psh channel ++ */ ++void intel_psh_ipc_unbind(int ch) ++{ ++ unsigned long flags; ++ ++ if (!ipc_ctrl.initialized) ++ return; ++ ++ if (ch < PSH_RECV_CH0 || ch > PSH_RECV_CH0 + NUM_PSH2IA_IPC - 1) ++ return; ++ ++ if (!(PSH_CH_FLAG(ch) & FLAG_BIND)) ++ return; ++ ++ mutex_lock(&ipc_ctrl.psh_mutex); ++ pm_runtime_get_sync(&ipc_ctrl.pdev->dev); ++ spin_lock_irqsave(&ipc_ctrl.lock, flags); ++ PSH_CH_FLAG(ch) &= ~FLAG_BIND; ++ writel(readl(PIMR_ADDR(1)) & (~(1 << (ch - PSH_RECV_CH0))), ++ PIMR_ADDR(1)); ++ spin_unlock_irqrestore(&ipc_ctrl.lock, flags); ++ pm_runtime_put(&ipc_ctrl.pdev->dev); ++ ++ down(&ipc_ctrl.ch_lock[ch]); ++ PSH_CH_HANDLE(ch - PSH_RECV_CH0) = NULL; ++ up(&ipc_ctrl.ch_lock[ch]); ++ mutex_unlock(&ipc_ctrl.psh_mutex); ++} ++EXPORT_SYMBOL(intel_psh_ipc_unbind); ++ ++void intel_psh_ipc_disable_irq(void) ++{ ++ disable_irq(ipc_ctrl.pdev->irq); ++} ++EXPORT_SYMBOL(intel_psh_ipc_disable_irq); ++ ++void intel_psh_ipc_enable_irq(void) ++{ ++ enable_irq(ipc_ctrl.pdev->irq); ++} ++EXPORT_SYMBOL(intel_psh_ipc_enable_irq); ++ ++static void psh_recv_handle(int i) ++{ ++ int msg, param; ++ ++ down(&ipc_ctrl.ch_lock[i + PSH_RECV_CH0]); ++ ++ msg = readl(PSH_REG_ADDR(psh2ia[i].msg)) & (~CHANNEL_BUSY); ++ param = readl(PSH_REG_ADDR(psh2ia[i].param)); ++ ++ if (PSH_CH_HANDLE(i) == NULL) { ++ PSH_ERR("Ignore message from channel %d\n", i+PSH_RECV_CH0); ++ goto end; ++ } ++ ++ /* write back to clear the busy bit */ ++ writel(msg, PSH_REG_ADDR(psh2ia[i].msg)); ++ PSH_CH_HANDLE(i)(msg, param, PSH_CH_DATA(i)); ++end: ++ up(&ipc_ctrl.ch_lock[i+PSH_RECV_CH0]); ++} ++ ++static irqreturn_t psh_ipc_irq(int irq, void *data) ++{ ++ int i; ++ u32 status; ++ ++ pm_runtime_get_sync(&ipc_ctrl.pdev->dev); ++ status = readl(PSH_REG_ADDR(pisr)); ++ ++ for (i = 0; i < NUM_PSH2IA_IPC; i++) { ++ if (status & STATUS_PSH2IA(i)) ++ psh_recv_handle(i); ++ } ++ ++ pm_runtime_put(&ipc_ctrl.pdev->dev); ++ return IRQ_HANDLED; ++} ++ ++static void psh_regs_dump(void) ++{ ++ int i; ++ ++ pm_runtime_get_sync(&ipc_ctrl.pdev->dev); ++ PSH_ERR("\n<-------------start------------>\n"); ++ ++ PSH_ERR("csr:\t%#x\n", readl(PSH_REG_ADDR(csr))); ++ PSH_ERR("pisr:\t%#x\n", readl(PSH_REG_ADDR(pisr))); ++ ++ PSH_ERR("pimr0:\t%#x\n", readl(PIMR_ADDR(0))); ++ PSH_ERR("pimr1:\t%#x\n", readl(PIMR_ADDR(1))); ++ PSH_ERR("pimr2:\t%#x\n", readl(PIMR_ADDR(2))); ++ PSH_ERR("pimr3:\t%#x\n", readl(PIMR_ADDR(3))); ++ ++ PSH_ERR("pmctl:\t%#x\n", readl(PSH_REG_ADDR(pmctl))); ++ PSH_ERR("pmstat:\t%#x\n", readl(PSH_REG_ADDR(pmstat))); ++ PSH_ERR("scratchpad0:\t%#x\n", readl(PSH_REG_ADDR(scratchpad[0]))); ++ PSH_ERR("scratchpad1:\t%#x\n", readl(PSH_REG_ADDR(scratchpad[1]))); ++ ++ for (i = 0; i < NUM_IA2PSH_IPC; i++) { ++ PSH_ERR("ia2psh[%d].msg:\t%#x\n", i, ++ readl(PSH_REG_ADDR(ia2psh[i].msg))); ++ PSH_ERR("ia2psh[%d].param:\t%#x\n", i, ++ readl(PSH_REG_ADDR(ia2psh[i].param))); ++ } ++ ++ PSH_ERR("cry2psh.msg:\t%#x\n", readl(PSH_REG_ADDR(cry2psh.msg))); ++ PSH_ERR("cry2psh.param:\t%#x\n", readl(PSH_REG_ADDR(cry2psh.param))); ++ PSH_ERR("scu2psh.msg:\t%#x\n", readl(PSH_REG_ADDR(scu2psh.msg))); ++ PSH_ERR("scu2psh.param:\t%#x\n", readl(PSH_REG_ADDR(scu2psh.param))); ++ ++ for (i = 0; i < NUM_PSH2IA_IPC; i++) { ++ PSH_ERR("psh2ia[%d].msg:\t%#x\n", i, ++ readl(PSH_REG_ADDR(psh2ia[i].msg))); ++ PSH_ERR("psh2ia[%d].param:\t%#x\n", i, ++ readl(PSH_REG_ADDR(psh2ia[i].param))); ++ } ++ ++ PSH_ERR("psh2cry.msg:\t%#x\n", readl(PSH_REG_ADDR(psh2cry.msg))); ++ PSH_ERR("psh2cry.param:\t%#x\n", readl(PSH_REG_ADDR(psh2cry.param))); ++ ++ PSH_ERR("\n<-------------end------------>\n"); ++ pm_runtime_put(&ipc_ctrl.pdev->dev); ++} ++ ++static struct psh_msg psh_dbg_msg; ++static int psh_ch; ++ ++static ssize_t psh_msg_show(struct device *dev, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ return snprintf(buf, PAGE_SIZE, ++ "\nLast ia2psh command with msg: %#x\nparam: %#x\n", ++ psh_dbg_msg.msg, psh_dbg_msg.param); ++} ++ ++static ssize_t psh_msg_store(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t size) ++{ ++ int ret; ++ u32 msg, param; ++ ++ memset(&psh_dbg_msg, 0, sizeof(psh_dbg_msg)); ++ ++ ret = sscanf(buf, "%x %x", &msg, ¶m); ++ if (ret != 2) { ++ PSH_ERR("Input two arguments as psh msg and param\n"); ++ return -EINVAL; ++ } ++ ++ psh_dbg_msg.msg = msg; ++ psh_dbg_msg.param = param; ++ ++ return size; ++} ++ ++static ssize_t psh_ch_show(struct device *dev, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ return snprintf(buf, PAGE_SIZE, ++ "\nLast psh channel: %d\n", psh_ch); ++} ++ ++static ssize_t psh_ch_store(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t size) ++{ ++ int ret; ++ ++ ret = sscanf(buf, "%d", &psh_ch); ++ if (ret != 1) { ++ PSH_ERR("Input one argument as psh channel\n"); ++ return -EINVAL; ++ } ++ ++ return size; ++} ++ ++static ssize_t psh_send_cmd_store(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t size) ++{ ++ int psh_dbg_err; ++ struct psh_msg out_msg; ++ ++ memset(&out_msg, 0, sizeof(out_msg)); ++ ++ psh_dbg_err = intel_ia2psh_command(&psh_dbg_msg, &out_msg, ++ psh_ch, 3000000); ++ if (psh_dbg_err) { ++ PSH_ERR("Send ia2psh command failed, err %d\n", psh_dbg_err); ++ psh_regs_dump(); ++ return psh_dbg_err; ++ } ++ ++ return size; ++} ++ ++static DEVICE_ATTR(psh_msg, S_IRUGO | S_IWUSR, psh_msg_show, psh_msg_store); ++static DEVICE_ATTR(psh_ch, S_IRUGO | S_IWUSR, psh_ch_show, psh_ch_store); ++static DEVICE_ATTR(ia2psh_cmd, S_IWUSR, NULL, psh_send_cmd_store); ++ ++static struct attribute *psh_attrs[] = { ++ &dev_attr_psh_msg.attr, ++ &dev_attr_psh_ch.attr, ++ &dev_attr_ia2psh_cmd.attr, ++ NULL, ++}; ++ ++static struct attribute_group psh_attr_group = { ++ .name = "psh_debug", ++ .attrs = psh_attrs, ++}; ++ ++static int intel_psh_debug_sysfs_create(struct pci_dev *pdev) ++{ ++ return sysfs_create_group(&pdev->dev.kobj, &psh_attr_group); ++} ++ ++static void pmic_sysfs_remove(struct pci_dev *pdev) ++{ ++ sysfs_remove_group(&pdev->dev.kobj, &psh_attr_group); ++} ++ ++#ifdef CONFIG_PM ++static int psh_ipc_suspend_noirq(struct device *dev) ++{ ++ int i; ++ int ret = 0; ++ ++ for (i = 0; i < NUM_ALL_CH; i++) { ++ if (down_trylock(&ipc_ctrl.ch_lock[i])) { ++ ret = -EBUSY; ++ break; ++ } ++ } ++ ++ if (ret) { ++ for (; i > 0; i--) ++ up(&ipc_ctrl.ch_lock[i - 1]); ++ } ++ ++ return ret; ++} ++ ++static int psh_ipc_resume_noirq(struct device *dev) ++{ ++ int i; ++ ++ for (i = 0; i < NUM_ALL_CH; i++) ++ up(&ipc_ctrl.ch_lock[i]); ++ ++ return 0; ++} ++ ++#else ++ ++#define psh_ipc_suspend_noirq NULL ++#define psh_ipc_resume_noirq NULL ++ ++#endif ++ ++#ifdef CONFIG_PM_RUNTIME ++static int psh_ipc_runtime_suspend(struct device *dev) ++{ ++ dev_dbg(dev, "runtime suspend called\n"); ++ return 0; ++} ++ ++static int psh_ipc_runtime_resume(struct device *dev) ++{ ++ dev_dbg(dev, "runtime resume called\n"); ++ return 0; ++} ++ ++#else ++ ++#define psh_ipc_runtime_suspend NULL ++#define psh_ipc_runtime_resume NULL ++ ++#endif ++ ++static int psh_ipc_probe(struct pci_dev *pdev, const struct pci_device_id *id) ++{ ++ int i, ret; ++ unsigned long start, len; ++ ++ ipc_ctrl.pdev = pci_dev_get(pdev); ++ ret = pci_enable_device(pdev); ++ if (ret) ++ goto err1; ++ ++ start = pci_resource_start(pdev, 0); ++ len = pci_resource_len(pdev, 0); ++ if (!start || !len) { ++ ret = -ENODEV; ++ goto err1; ++ } ++ ++ ret = pci_request_regions(pdev, "intel_psh_ipc"); ++ if (ret) ++ goto err1; ++ ++ switch (intel_mid_identify_cpu()) { ++ case INTEL_MID_CPU_CHIP_TANGIER: ++ ipc_ctrl.reg_map = 1; ++ break; ++ case INTEL_MID_CPU_CHIP_ANNIEDALE: ++ ipc_ctrl.reg_map = 1; ++ break; ++ default: ++ dev_err(&pdev->dev, "error register map\n"); ++ ret = -EINVAL; ++ goto err2; ++ break; ++ } ++ ++ ipc_ctrl.psh_regs = (union psh_registers *)ioremap_nocache(start, len); ++ if (!ipc_ctrl.psh_regs) { ++ ret = -ENOMEM; ++ goto err2; ++ } ++ ++ ret = request_threaded_irq(pdev->irq, NULL, psh_ipc_irq, IRQF_ONESHOT, ++ "intel_psh_ipc", NULL); ++ if (ret) { ++ dev_err(&pdev->dev, "Unable to register irq %d\n", pdev->irq); ++ goto err3; ++ } ++ ++ irq_set_irq_wake(pdev->irq, 1); ++ ++ spin_lock_init(&ipc_ctrl.lock); ++ mutex_init(&ipc_ctrl.psh_mutex); ++ ++ for (i = 0; i < NUM_ALL_CH; i++) ++ sema_init(&ipc_ctrl.ch_lock[i], 1); ++ ++ intel_psh_devices_create(); ++ ++ intel_psh_debug_sysfs_create(pdev); ++ ++ ipc_ctrl.initialized = 1; ++ ++ pm_runtime_put_noidle(&pdev->dev); ++ pm_runtime_allow(&pdev->dev); ++ ++ return 0; ++ ++err3: ++ iounmap(ipc_ctrl.psh_regs); ++err2: ++ pci_release_regions(pdev); ++err1: ++ pci_dev_put(pdev); ++ ++ return ret; ++} ++ ++static void psh_ipc_remove(struct pci_dev *pdev) ++{ ++ pm_runtime_forbid(&pdev->dev); ++ pm_runtime_get_noresume(&pdev->dev); ++ free_irq(pdev->irq, NULL); ++ iounmap(ipc_ctrl.psh_regs); ++ pci_release_regions(pdev); ++ pci_dev_put(pdev); ++ intel_psh_devices_destroy(); ++ pmic_sysfs_remove(pdev); ++ ipc_ctrl.initialized = 0; ++} ++ ++static const struct dev_pm_ops psh_ipc_drv_pm_ops = { ++ .suspend_noirq = psh_ipc_suspend_noirq, ++ .resume_noirq = psh_ipc_resume_noirq, ++ .runtime_suspend = psh_ipc_runtime_suspend, ++ .runtime_resume = psh_ipc_runtime_resume, ++}; ++ ++static DEFINE_PCI_DEVICE_TABLE(pci_ids) = { ++ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x11a3)}, ++ { 0,} ++}; ++MODULE_DEVICE_TABLE(pci, pci_ids); ++ ++static struct pci_driver psh_ipc_driver = { ++ .name = "intel_psh_ipc", ++ .driver = { ++ .pm = &psh_ipc_drv_pm_ops, ++ }, ++ .id_table = pci_ids, ++ .probe = psh_ipc_probe, ++ .remove = psh_ipc_remove, ++}; ++ ++static int __init psh_ipc_init(void) ++{ ++ return pci_register_driver(&psh_ipc_driver); ++} ++ ++static void __exit psh_ipc_exit(void) ++{ ++ pci_unregister_driver(&psh_ipc_driver); ++} ++ ++MODULE_AUTHOR("bin.yang@intel.com"); ++MODULE_DESCRIPTION("Intel PSH IPC driver"); ++MODULE_LICENSE("GPL v2"); ++ ++fs_initcall(psh_ipc_init); ++module_exit(psh_ipc_exit); diff --git a/drivers/platform/x86/intel_scu_flis.c b/drivers/platform/x86/intel_scu_flis.c new file mode 100644 index 0000000..4dc3598 @@ -63668,10 +67392,10 @@ index 32221cb..9e9f5b8 100644 diff --git a/drivers/pwm/pwm-intel-mid.c b/drivers/pwm/pwm-intel-mid.c new file mode 100644 -index 0000000..5564a1b +index 0000000..7897607 --- /dev/null +++ b/drivers/pwm/pwm-intel-mid.c -@@ -0,0 +1,405 @@ +@@ -0,0 +1,404 @@ +/* + * pwm-intel-mid.c: Driver for PWM on Intel MID platform + * @@ -63748,15 +67472,9 @@ index 0000000..5564a1b + u64 on_time_divisor; + + /* Calculate and set on time divisor */ -+ if (duty_cycle == period) { -+ on_time_divisor = 1UL; -+ } else { -+ on_time_divisor = duty_cycle * -+ (u64)(PWM_COMPARE_UNIT_SIZE - 1UL); -+ do_div(on_time_divisor, period); -+ on_time_divisor = PWM_COMPARE_UNIT_SIZE - -+ on_time_divisor - 1UL; -+ } ++ on_time_divisor = duty_cycle * (u64)(PWM_COMPARE_UNIT_SIZE - 1UL); ++ do_div(on_time_divisor, period); ++ on_time_divisor = PWM_COMPARE_UNIT_SIZE - on_time_divisor - 1UL; + + pwmctrl->full = readl(reg); + pwmctrl->part.on_time_divisor = on_time_divisor; @@ -63841,6 +67559,11 @@ index 0000000..5564a1b + fraction -= numerator; + } + } ++ /* If both the values are 0, the output will be somehow not correct. ++ * So if it happens, change the fraction to 1. ++ */ ++ if ((0 == base_unit_fraction) && (0 == base_unit_integer)) ++ base_unit_fraction = 1UL; + + pwmctrl->full = readl(reg); + pwmctrl->part.base_unit_int = (u32)base_unit_integer; @@ -65173,10 +68896,10 @@ index 0000000..bfe6f6c +extern void intel_scu_ipc_unlock(void); diff --git a/drivers/remoteproc/intel_mid_rproc_scu.c b/drivers/remoteproc/intel_mid_rproc_scu.c new file mode 100644 -index 0000000..fd5023b +index 0000000..53a1cdc --- /dev/null +++ b/drivers/remoteproc/intel_mid_rproc_scu.c -@@ -0,0 +1,438 @@ +@@ -0,0 +1,441 @@ +/* + * INTEL MID Remote Processor - SCU driver + * @@ -65436,6 +69159,7 @@ index 0000000..fd5023b + struct intel_mid_rproc *iproc; + struct rproc_vdev *rvdev; + struct device *dev = rproc->dev.parent; ++ static unsigned long ns_info_all_received; + + iproc = (struct intel_mid_rproc *)rproc->priv; + @@ -65447,19 +69171,21 @@ index 0000000..fd5023b + + switch (idx) { + case RX_VRING: -+ if (iproc->ns_enabled && -+ !list_is_last(&iproc->ns_info->node, &nslist->list)) { ++ if (iproc->ns_enabled && !ns_info_all_received) { ++ /* push messages with ns_info for ALL available ++ name services in the list (nslist) into ++ rx buffers. */ + list_for_each_entry_continue(iproc->ns_info, + &nslist->list, node) { + ret = intel_mid_rproc_ns_handle(iproc, -+ iproc->ns_info); ++ iproc->ns_info); + if (ret) { + dev_err(dev, "ns handle error\n"); + return; + } -+ break; + } + ++ ns_info_all_received = 1; + intel_mid_rproc_vq_interrupt(rproc, vqid); + } + break; @@ -66650,10 +70376,10 @@ index 33f9c09..1ab0e90 100644 obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o diff --git a/drivers/spi/intel_mid_ssp_spi.c b/drivers/spi/intel_mid_ssp_spi.c new file mode 100644 -index 0000000..938180e +index 0000000..d790620 --- /dev/null +++ b/drivers/spi/intel_mid_ssp_spi.c -@@ -0,0 +1,1751 @@ +@@ -0,0 +1,1787 @@ +/* + * intel_mid_ssp_spi.c + * This driver supports Bulverde SSP core used on Intel MID platforms @@ -67384,7 +71110,7 @@ index 0000000..938180e +#endif + + if (sspc->cs_control) -+ sspc->cs_control(CS_DEASSERT); ++ sspc->cs_control(!sspc->cs_assert); + + dev_dbg(dev, "End of transfer. SSSR:%08X\n", read_SSSR(reg)); + msg = sspc->cur_msg; @@ -67562,9 +71288,9 @@ index 0000000..938180e + +static unsigned int ssp_get_clk_div(struct ssp_drv_context *sspc, int speed) +{ -+ /* The clock divider shall stay between 3 and 4095 as specified in TRM. */ + if (sspc->quirks & QUIRKS_PLATFORM_MRFL) -+ return clamp(25000000 / speed - 1, 3, 4095); ++ /* The clock divider shall stay between 0 and 4095. */ ++ return clamp(25000000 / speed - 1, 0, 4095); + else + return clamp(100000000 / speed - 1, 3, 4095); +} @@ -67607,7 +71333,7 @@ index 0000000..938180e + u32 cr0, saved_cr0, cr1, saved_cr1; + struct device *dev = &sspc->pdev->dev; + struct spi_message *msg = sspc->cur_msg; -+ u32 clk_div, saved_speed_hz; ++ u32 clk_div, saved_speed_hz, speed_hz; + u8 dma_enabled; + u32 timeout; + u8 chip_select; @@ -67779,9 +71505,11 @@ index 0000000..938180e + + /* recalculate the frequency for each transfer */ + if (transfer->speed_hz) -+ clk_div = ssp_get_clk_div(sspc, transfer->speed_hz); ++ speed_hz = transfer->speed_hz; + else -+ clk_div = ssp_get_clk_div(sspc, saved_speed_hz); ++ speed_hz = saved_speed_hz; ++ ++ clk_div = ssp_get_clk_div(sspc, speed_hz); + + cr0 &= ~SSCR0_SCR; + cr0 |= (clk_div & 0xFFF) << 8; @@ -67792,6 +71520,13 @@ index 0000000..938180e + (sspc->quirks & QUIRKS_BIT_BANGING))) { + start_bitbanging(sspc); + } else { ++ ++ /* if speed is higher than 6.25Mhz, enable clock delay */ ++ if (speed_hz > 6250000) ++ write_SSCR2((read_SSCR2(reg) | SSCR2_CLK_DEL_EN), reg); ++ else ++ write_SSCR2((read_SSCR2(reg) & ~SSCR2_CLK_DEL_EN), reg); ++ + /* (re)start the SSP */ + if (ssp_timing_wr) { + dev_dbg(dev, "original cr0 before reset:%x", @@ -67809,7 +71544,7 @@ index 0000000..938180e + } + + if (sspc->cs_control) -+ sspc->cs_control(CS_ASSERT); ++ sspc->cs_control(sspc->cs_assert); + + if (likely(dma_enabled)) { + if (unlikely(sspc->quirks & QUIRKS_USE_PM_QOS)) @@ -67824,7 +71559,7 @@ index 0000000..938180e + if (list_is_last(&transfer->transfer_list, &msg->transfers) + || sspc->cs_change) { + if (sspc->cs_control) -+ sspc->cs_control(CS_DEASSERT); ++ sspc->cs_control(!sspc->cs_assert); + } + + } /* end of list_for_each_entry */ @@ -67863,7 +71598,8 @@ index 0000000..938180e + sspc->cur_msg = NULL; + } + spin_unlock_irqrestore(&sspc->lock, flags); -+ pm_runtime_put(dev); ++ pm_runtime_mark_last_busy(dev); ++ pm_runtime_put_autosuspend(dev); +} + +/** @@ -67914,6 +71650,26 @@ index 0000000..938180e + /* chip_info isn't always needed */ + chip->cr1 = 0; + if (chip_info) { ++ /* If user requested CS Active High need to verify that there ++ * is no transfer pending. If this is the case, kindly fail. */ ++ if ((spi->mode & SPI_CS_HIGH) != sspc->cs_assert) { ++ if (sspc->cur_msg) { ++ dev_err(&spi->dev, "message pending... Failing\n"); ++ /* A message is currently in transfer. Do not toggle CS */ ++ spin_unlock_irqrestore(&sspc->lock, flags); ++ return -EAGAIN; ++ } ++ if (!chip_info->cs_control) { ++ /* unable to control cs by hand */ ++ dev_err(&spi->dev, ++ "This CS does not support SPI_CS_HIGH flag\n"); ++ spin_unlock_irqrestore(&sspc->lock, flags); ++ return -EINVAL; ++ } ++ sspc->cs_assert = spi->mode & SPI_CS_HIGH; ++ chip_info->cs_control(!sspc->cs_assert); ++ } ++ + burst_size = chip_info->burst_size; + if (burst_size > IMSS_FIFO_BURST_8) + burst_size = DFLT_FIFO_BURST_SIZE; @@ -68113,7 +71869,7 @@ index 0000000..938180e + if (ssp_cfg_is_spi_slave(ssp_cfg)) + sspc->quirks |= QUIRKS_SPI_SLAVE_CLOCK_MODE; + -+ master->mode_bits = SPI_CPOL | SPI_CPHA; ++ master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; + master->bus_num = ssp_cfg_get_spi_bus_nb(ssp_cfg); + master->num_chipselect = 4; + master->cleanup = cleanup; @@ -68214,6 +71970,12 @@ index 0000000..938180e + pm_qos_add_request(&sspc->pm_qos_req, PM_QOS_CPU_DMA_LATENCY, + PM_QOS_DEFAULT_VALUE); + ++ pm_runtime_set_autosuspend_delay(&pdev->dev, 25); ++ pm_runtime_use_autosuspend(&pdev->dev); ++ pm_runtime_set_active(&pdev->dev); ++ pm_runtime_enable(&pdev->dev); ++ if (!pm_runtime_enabled(&pdev->dev)) ++ dev_err(&pdev->dev, "spi runtime pm not enabled!\n"); + pm_runtime_put_noidle(&pdev->dev); + pm_runtime_allow(&pdev->dev); + @@ -95921,7 +99683,7 @@ index 88bf0f0..2a50d36 100644 enum iio_modifier { diff --git a/include/linux/intel_mid_dma.h b/include/linux/intel_mid_dma.h -index 10496bd..374514e 100644 +index 10496bd..d7f2997 100644 --- a/include/linux/intel_mid_dma.h +++ b/include/linux/intel_mid_dma.h @@ -29,6 +29,10 @@ @@ -95939,7 +99701,7 @@ index 10496bd..374514e 100644 struct dma_slave_config dma_slave; }; -+struct device *intel_mid_get_acpi_dma(void); ++struct device *intel_mid_get_acpi_dma(const char *hid); +dma_addr_t intel_dma_get_src_addr(struct dma_chan *chan); +dma_addr_t intel_dma_get_dst_addr(struct dma_chan *chan); #endif /*__INTEL_MID_DMA_H__*/ @@ -96370,8 +100132,78 @@ index 439a7a6..5121763 100644 }; struct intel_msic; +diff --git a/include/linux/mfd/wm8994/pdata.h b/include/linux/mfd/wm8994/pdata.h +index 68e7765..9e96ca7 100644 +--- a/include/linux/mfd/wm8994/pdata.h ++++ b/include/linux/mfd/wm8994/pdata.h +@@ -130,6 +130,12 @@ struct wm8958_micd_rate { + int rate; + }; + ++struct wm8958_custom_config { ++ int format; ++ int rate; ++ int channels; ++}; ++ + struct wm8994_pdata { + int gpio_base; + +@@ -182,6 +188,16 @@ struct wm8994_pdata { + */ + int micdet_delay; + ++ /* Delay between microphone detect completing and reporting on ++ * insert (specified in ms) ++ */ ++ int mic_id_delay; ++ ++ /* Keep MICBIAS2 high for micb_en_delay, during jack insertion ++ * removal ++ */ ++ int micb_en_delay; ++ + /* IRQ for microphone detection if brought out directly as a + * signal. + */ +@@ -223,6 +239,9 @@ struct wm8994_pdata { + * lines is mastered. + */ + int max_channels_clocked[WM8994_NUM_AIF]; ++ ++ /* custom config for overriding the hw params */ ++ struct wm8958_custom_config *custom_cfg; + }; + + #endif +diff --git a/include/linux/mfd/wm8994/registers.h b/include/linux/mfd/wm8994/registers.h +index 0535489..db8cef3 100644 +--- a/include/linux/mfd/wm8994/registers.h ++++ b/include/linux/mfd/wm8994/registers.h +@@ -2668,6 +2668,10 @@ + /* + * R772 (0x304) - AIF1ADC LRCLK + */ ++#define WM8958_AIF1_LRCLK_INV 0x1000 /* AIF1_LRCLK_INV */ ++#define WM8958_AIF1_LRCLK_INV_MASK 0x1000 /* AIF1_LRCLK_INV */ ++#define WM8958_AIF1_LRCLK_INV_SHIFT 12 /* AIF1_LRCLK_INV */ ++#define WM8958_AIF1_LRCLK_INV_WIDTH 1 /* AIF1_LRCLK_INV */ + #define WM8994_AIF1ADC_LRCLK_DIR 0x0800 /* AIF1ADC_LRCLK_DIR */ + #define WM8994_AIF1ADC_LRCLK_DIR_MASK 0x0800 /* AIF1ADC_LRCLK_DIR */ + #define WM8994_AIF1ADC_LRCLK_DIR_SHIFT 11 /* AIF1ADC_LRCLK_DIR */ +@@ -2679,6 +2683,10 @@ + /* + * R773 (0x305) - AIF1DAC LRCLK + */ ++#define WM8958_AIF1_LRCLK_INV 0x1000 /* AIF1_LRCLK_INV */ ++#define WM8958_AIF1_LRCLK_INV_MASK 0x1000 /* AIF1_LRCLK_INV */ ++#define WM8958_AIF1_LRCLK_INV_SHIFT 12 /* AIF1_LRCLK_INV */ ++#define WM8958_AIF1_LRCLK_INV_WIDTH 1 /* AIF1_LRCLK_INV */ + #define WM8994_AIF1DAC_LRCLK_DIR 0x0800 /* AIF1DAC_LRCLK_DIR */ + #define WM8994_AIF1DAC_LRCLK_DIR_MASK 0x0800 /* AIF1DAC_LRCLK_DIR */ + #define WM8994_AIF1DAC_LRCLK_DIR_SHIFT 11 /* AIF1DAC_LRCLK_DIR */ diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h -index f31725b..39e8279 100644 +index f31725b..4b0fe47 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -67,6 +67,7 @@ struct mmc_ext_csd { @@ -96382,7 +100214,15 @@ index f31725b..39e8279 100644 unsigned int sectors; unsigned int card_type; unsigned int hc_erase_size; /* In sectors */ -@@ -248,6 +249,7 @@ struct mmc_card { +@@ -83,6 +84,7 @@ struct mmc_ext_csd { + unsigned int hpi_cmd; /* cmd used as HPI */ + bool bkops; /* background support bit */ + bool bkops_en; /* background enable bit */ ++ unsigned int rpmb_size; /* Units: half sector */ + unsigned int data_sector_size; /* 512 bytes or 4KB */ + unsigned int data_tag_unit_size; /* DATA TAG UNIT size */ + unsigned int boot_ro_lock; /* ro lock support */ +@@ -248,6 +250,7 @@ struct mmc_card { #define MMC_CARD_SDXC (1<<6) /* card is SDXC */ #define MMC_CARD_REMOVED (1<<7) /* card has been removed */ #define MMC_STATE_HIGHSPEED_200 (1<<8) /* card is in HS200 mode */ @@ -96390,7 +100230,7 @@ index f31725b..39e8279 100644 #define MMC_STATE_DOING_BKOPS (1<<10) /* card is doing BKOPS */ unsigned int quirks; /* card quirks */ #define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */ -@@ -264,6 +266,7 @@ struct mmc_card { +@@ -264,6 +267,7 @@ struct mmc_card { #define MMC_QUIRK_LONG_READ_TIME (1<<9) /* Data read time > CSD says */ #define MMC_QUIRK_SEC_ERASE_TRIM_BROKEN (1<<10) /* Skip secure for erase/trim */ /* byte mode */ @@ -96398,7 +100238,16 @@ index f31725b..39e8279 100644 unsigned int erase_size; /* erase size in sectors */ unsigned int erase_shift; /* if erase unit is power 2 */ -@@ -409,6 +412,7 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data) +@@ -294,6 +298,8 @@ struct mmc_card { + struct dentry *debugfs_root; + struct mmc_part part[MMC_NUM_PHY_PARTITION]; /* physical partitions */ + unsigned int nr_parts; ++ ++ unsigned int rpmb_max_req; + }; + + /* +@@ -409,6 +415,7 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data) #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) #define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED) #define mmc_card_hs200(c) ((c)->state & MMC_STATE_HIGHSPEED_200) @@ -96406,7 +100255,7 @@ index f31725b..39e8279 100644 #define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR) #define mmc_card_ddr_mode(c) ((c)->state & MMC_STATE_HIGHSPEED_DDR) #define mmc_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED) -@@ -421,6 +425,7 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data) +@@ -421,6 +428,7 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data) #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) #define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED) #define mmc_card_set_hs200(c) ((c)->state |= MMC_STATE_HIGHSPEED_200) @@ -96414,11 +100263,28 @@ index f31725b..39e8279 100644 #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) #define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR) #define mmc_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED) +@@ -520,4 +528,7 @@ extern void mmc_unregister_driver(struct mmc_driver *); + extern void mmc_fixup_device(struct mmc_card *card, + const struct mmc_fixup *table); + ++extern int mmc_rpmb_req_handle(struct device *emmc, ++ struct mmc_ioc_rpmb_req *req); ++ + #endif /* LINUX_MMC_CARD_H */ diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h -index 39613b9..3e3b95e 100644 +index 39613b9..a4ab8e1 100644 --- a/include/linux/mmc/core.h +++ b/include/linux/mmc/core.h -@@ -121,6 +121,7 @@ struct mmc_data { +@@ -10,6 +10,8 @@ + + #include + #include ++#include ++#include + + struct request; + struct mmc_data; +@@ -121,6 +123,7 @@ struct mmc_data { unsigned int sg_len; /* size of scatter list */ struct scatterlist *sg; /* I/O scatter list */ s32 host_cookie; /* host private data */ @@ -96426,6 +100292,52 @@ index 39613b9..3e3b95e 100644 }; struct mmc_host; +@@ -135,6 +138,34 @@ struct mmc_request { + struct mmc_host *host; + }; + ++/* ++ * RPMB frame structure for MMC core stack ++ */ ++struct mmc_core_rpmb_req { ++ struct mmc_ioc_rpmb_req *req; ++ __u8 *frame; ++ bool ready; ++}; ++ ++#define RPMB_PROGRAM_KEY 1 /* Program RPMB Authentication Key */ ++#define RPMB_GET_WRITE_COUNTER 2 /* Read RPMB write counter */ ++#define RPMB_WRITE_DATA 3 /* Write data to RPMB partition */ ++#define RPMB_READ_DATA 4 /* Read data from RPMB partition */ ++#define RPMB_RESULT_READ 5 /* Read result request */ ++#define RPMB_REQ 1 /* RPMB request mark */ ++#define RPMB_RESP (1 << 1)/* RPMB response mark */ ++#define RPMB_AVALIABLE_SECTORS 8 /* 4K page size */ ++ ++#define RPMB_TYPE_BEG 510 ++#define RPMB_RES_BEG 508 ++#define RPMB_BLKS_BEG 506 ++#define RPMB_ADDR_BEG 504 ++#define RPMB_WCOUNTER_BEG 500 ++ ++#define RPMB_NONCE_BEG 484 ++#define RPMB_DATA_BEG 228 ++#define RPMB_MAC_BEG 196 ++ + struct mmc_card; + struct mmc_async_req; + +@@ -152,6 +183,10 @@ extern void mmc_start_bkops(struct mmc_card *card, bool from_exception); + extern int __mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int, bool); + extern int mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int); + extern int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd); ++extern int mmc_rpmb_partition_ops(struct mmc_core_rpmb_req *, ++ struct mmc_card *); ++extern int mmc_rpmb_pre_frame(struct mmc_core_rpmb_req *, struct mmc_card *); ++extern void mmc_rpmb_post_frame(struct mmc_core_rpmb_req *); + + #define MMC_ERASE_ARG 0x00000000 + #define MMC_SECURE_ERASE_ARG 0x80000000 diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index e326ae2..1416210 100644 --- a/include/linux/mmc/host.h @@ -96749,7 +100661,7 @@ index 0000000..c0580e5 + +#endif /* _LINUX_PANIC_GBUFFER_H */ diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h -index cb45b70..eacb93b 100644 +index cb45b70..6d11952 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2551,6 +2551,19 @@ @@ -96772,6 +100684,14 @@ index cb45b70..eacb93b 100644 #define PCI_DEVICE_ID_INTEL_I960RM 0x0962 #define PCI_DEVICE_ID_INTEL_CENTERTON_ILB 0x0c60 #define PCI_DEVICE_ID_INTEL_8257X_SOL 0x1062 +@@ -2862,6 +2875,7 @@ + #define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500 + #define PCI_DEVICE_ID_INTEL_IXP2800 0x9004 + #define PCI_DEVICE_ID_INTEL_S21152BB 0xb152 ++#define PCI_DEVICE_ID_INTEL_SST_MRFLD 0x119A + + #define PCI_VENDOR_ID_SCALEMP 0x8686 + #define PCI_DEVICE_ID_SCALEMP_VSMP_CTL 0x1010 diff --git a/include/linux/platform_data/intel_mid_remoteproc.h b/include/linux/platform_data/intel_mid_remoteproc.h new file mode 100644 index 0000000..a16dffb @@ -97586,7 +101506,7 @@ index fe81791..cd50488 100644 u16 addr; diff --git a/include/linux/spi/intel_mid_ssp_spi.h b/include/linux/spi/intel_mid_ssp_spi.h new file mode 100644 -index 0000000..453c40b +index 0000000..2eed919 --- /dev/null +++ b/include/linux/spi/intel_mid_ssp_spi.h @@ -0,0 +1,352 @@ @@ -97701,6 +101621,7 @@ index 0000000..453c40b +DEFINE_SSP_REG(SSDR, 0x10) +DEFINE_SSP_REG(SSTO, 0x28) +DEFINE_SSP_REG(SSPSP, 0x2c) ++DEFINE_SSP_REG(SSCR2, 0x40) +DEFINE_SSP_REG(SSFS, 0x44) +DEFINE_SSP_REG(SFIFOL, 0x68) + @@ -97800,6 +101721,8 @@ index 0000000..453c40b +#define SSPSP_SFRMP (1 << 2) /* Serial Frame Polarity */ +#define SSPSP_SCMODE(x) ((x) << 0) /* Serial Bit Rate Clock Mode */ + ++#define SSCR2_CLK_DEL_EN (1 << 3) /* Delay logic for capturing input data */ ++ +/* + * For testing SSCR1 changes that require SSP restart, basically + * everything except the service and interrupt enables @@ -97812,11 +101735,6 @@ index 0000000..453c40b + | SSCR1_RFT | SSCR1_TFT | SSCR1_MWDS \ + | SSCR1_SPH | SSCR1_SPO | SSCR1_LBM) + -+/* add CS control call back feature to give user capability -+to control CS signal by themselves*/ -+#define CS_DEASSERT 0 -+#define CS_ASSERT 1 -+ +struct callback_param { + void *drv_context; + u32 direction; @@ -97893,6 +101811,8 @@ index 0000000..453c40b + unsigned long quirks; + u32 rx_fifo_threshold; + ++ /* if CS_ACTIVE_HIGH, cs_assert == 1 else cs_assert == 0 */ ++ int cs_assert; + int cs_change; + void (*cs_control)(u32 command); +}; @@ -99312,6 +103232,456 @@ index 0000000..98bbea0 +}; + +#endif +diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h +index 7cb6d36..b9e7142 100644 +--- a/include/net/bluetooth/hci_core.h ++++ b/include/net/bluetooth/hci_core.h +@@ -308,6 +308,8 @@ struct hci_conn { + + bdaddr_t dst; + __u8 dst_type; ++ bdaddr_t src; ++ __u8 src_type; + __u16 handle; + __u16 state; + __u8 mode; +diff --git a/include/net/bluetooth/l2cap.h b/include/net/bluetooth/l2cap.h +index fb94cf1..bfca6cf 100644 +--- a/include/net/bluetooth/l2cap.h ++++ b/include/net/bluetooth/l2cap.h +@@ -442,7 +442,13 @@ struct l2cap_chan { + + __u8 state; + ++ bdaddr_t dst; ++ __u8 dst_type; ++ bdaddr_t src; ++ __u8 src_type; ++ + __le16 psm; ++ __le16 sport; + __u16 dcid; + __u16 scid; + +@@ -453,8 +459,6 @@ struct l2cap_chan { + __u8 chan_type; + __u8 chan_policy; + +- __le16 sport; +- + __u8 sec_level; + + __u8 ident; +diff --git a/include/sound/compress_driver.h b/include/sound/compress_driver.h +index 9031a26..9307359 100644 +--- a/include/sound/compress_driver.h ++++ b/include/sound/compress_driver.h +@@ -32,6 +32,7 @@ + #include + + struct snd_compr_ops; ++struct snd_pcm_substream; + + /** + * struct snd_compr_runtime: runtime stream description +@@ -48,6 +49,8 @@ struct snd_compr_ops; + * the ring buffer + * @total_bytes_transferred: cumulative bytes transferred by offload DSP + * @sleep: poll sleep ++ * @wait: drain wait queue ++ * @drain_wake: condition for drain wake + */ + struct snd_compr_runtime { + snd_pcm_state_t state; +@@ -59,6 +62,9 @@ struct snd_compr_runtime { + u64 total_bytes_available; + u64 total_bytes_transferred; + wait_queue_head_t sleep; ++ wait_queue_head_t wait; ++ unsigned int drain_wake; ++ struct snd_pcm_substream *fe_substream; + void *private_data; + }; + +@@ -157,6 +163,7 @@ int snd_compress_register(struct snd_compr *device); + int snd_compress_deregister(struct snd_compr *device); + int snd_compress_new(struct snd_card *card, int device, + int type, struct snd_compr *compr); ++int snd_compr_stop(struct snd_compr_stream *stream); + + /* dsp driver callback apis + * For playback: driver should call snd_compress_fragment_elapsed() to let the +@@ -171,4 +178,12 @@ static inline void snd_compr_fragment_elapsed(struct snd_compr_stream *stream) + wake_up(&stream->runtime->sleep); + } + ++static inline void snd_compr_drain_notify(struct snd_compr_stream *stream) ++{ ++ snd_BUG_ON(!stream); ++ ++ stream->runtime->drain_wake = 1; ++ wake_up(&stream->runtime->wait); ++} ++ + #endif +diff --git a/include/sound/core.h b/include/sound/core.h +index 5bfe513..971a2ec 100644 +--- a/include/sound/core.h ++++ b/include/sound/core.h +@@ -146,6 +146,11 @@ struct snd_card { + struct snd_mixer_oss *mixer_oss; + int mixer_oss_change_count; + #endif ++ ++#if IS_ENABLED(CONFIG_SND_EFFECTS_OFFLOAD) ++ struct snd_effect_ops *effect_ops; ++ struct mutex effect_lock; /* effect lock */ ++#endif + }; + + #ifdef CONFIG_PM +diff --git a/include/sound/effect_driver.h b/include/sound/effect_driver.h +new file mode 100644 +index 0000000..410e5f9 +--- /dev/null ++++ b/include/sound/effect_driver.h +@@ -0,0 +1,63 @@ ++/* ++ * effect_driver.h - effect offload driver APIs ++ * ++ * Copyright (C) 2013 Intel Corporation ++ * Authors: Vinod Koul ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ */ ++#ifndef __EFFECT_DRIVER_H ++#define __EFFECT_DRIVER_H ++ ++#include ++ ++struct snd_effect_ops { ++ int (*create)(struct snd_card *card, struct snd_effect *effect); ++ int (*destroy)(struct snd_card *card, struct snd_effect *effect); ++ int (*set_params)(struct snd_card *card, ++ struct snd_effect_params *params); ++ int (*get_params)(struct snd_card *card, ++ struct snd_effect_params *params); ++ int (*query_num_effects)(struct snd_card *card); ++ int (*query_effect_caps)(struct snd_card *card, ++ struct snd_effect_caps *caps); ++}; ++ ++#if IS_ENABLED(CONFIG_SND_EFFECTS_OFFLOAD) ++int snd_effect_register(struct snd_card *card, struct snd_effect_ops *ops); ++int snd_effect_deregister(struct snd_card *card); ++#else ++static inline int snd_effect_register(struct snd_card *card, ++ struct snd_effect_ops *ops) ++{ ++ return -ENODEV; ++} ++static inline int snd_effect_deregister(struct snd_card *card) ++{ ++ return -ENODEV; ++} ++#endif ++ ++/* IOCTL fns */ ++int snd_ctl_effect_create(struct snd_card *card, void *arg); ++int snd_ctl_effect_destroy(struct snd_card *card, void *arg); ++int snd_ctl_effect_set_params(struct snd_card *card, void *arg); ++int snd_ctl_effect_get_params(struct snd_card *card, void *arg); ++int snd_ctl_effect_query_num_effects(struct snd_card *card, void *arg); ++int snd_ctl_effect_query_effect_caps(struct snd_card *card, void *arg); ++#endif +diff --git a/include/sound/intel_sst_ioctl.h b/include/sound/intel_sst_ioctl.h +new file mode 100644 +index 0000000..6025ef9 +--- /dev/null ++++ b/include/sound/intel_sst_ioctl.h +@@ -0,0 +1,63 @@ ++#ifndef __INTEL_SST_IOCTL_H__ ++#define __INTEL_SST_IOCTL_H__ ++/* ++ * intel_sst_ioctl.h - Intel SST Driver for audio engine ++ * ++ * Copyright (C) 2008-10 Intel Corporation ++ * Authors: Vinod Koul ++ * Harsha Priya ++ * Dharageswari R ++ * KP Jeeja ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This file defines all sst ioctls ++ */ ++ ++/* codec and post/pre processing related info */ ++ ++#include ++ ++/* Pre and post processing params structure */ ++struct snd_ppp_params { ++ __u8 algo_id;/* Post/Pre processing algorithm ID */ ++ __u8 str_id; /*Only 5 bits used 0 - 31 are valid*/ ++ __u8 enable; /* 0= disable, 1= enable*/ ++ __u8 operation; /* 0 = set_algo, 1 = get_algo */ ++ __u32 size; /*Size of parameters for all blocks*/ ++ void *params; ++} __packed; ++ ++struct snd_sst_driver_info { ++ __u32 max_streams; ++}; ++ ++struct snd_sst_tuning_params { ++ __u8 type; ++ __u8 str_id; ++ __u8 size; ++ __u8 rsvd; ++ __u64 addr; ++} __packed; ++ ++/*IOCTL defined here */ ++/*SST common ioctls */ ++#define SNDRV_SST_DRIVER_INFO _IOR('L', 0x10, struct snd_sst_driver_info) ++#define SNDRV_SST_SET_ALGO _IOW('L', 0x30, struct snd_ppp_params) ++#define SNDRV_SST_GET_ALGO _IOWR('L', 0x31, struct snd_ppp_params) ++#define SNDRV_SST_TUNING_PARAMS _IOW('L', 0x32, struct snd_sst_tuning_params) ++#endif /* __INTEL_SST_IOCTL_H__ */ +diff --git a/include/sound/pcm.h b/include/sound/pcm.h +index b48792f..6f01136 100644 +--- a/include/sound/pcm.h ++++ b/include/sound/pcm.h +@@ -285,6 +285,7 @@ struct snd_pcm_runtime { + unsigned long hw_ptr_jiffies; /* Time when hw_ptr is updated */ + unsigned long hw_ptr_buffer_jiffies; /* buffer time in jiffies */ + snd_pcm_sframes_t delay; /* extra delay; typically FIFO size */ ++ snd_pcm_sframes_t soc_delay; /* extra delay; typically delay incurred in soc */ + u64 hw_ptr_wrap; /* offset for hw_ptr due to boundary wrap-around */ + + /* -- HW params -- */ +diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h +index ae9a227..41e9df9 100644 +--- a/include/sound/soc-dai.h ++++ b/include/sound/soc-dai.h +@@ -231,8 +231,8 @@ struct snd_soc_dai { + struct snd_soc_dai_driver *driver; + + /* DAI runtime info */ +- unsigned int capture_active:1; /* stream is in use */ +- unsigned int playback_active:1; /* stream is in use */ ++ unsigned int capture_active; /* cap streams is in use */ ++ unsigned int playback_active; /* pb streams is in use */ + unsigned int symmetric_rates:1; + struct snd_pcm_runtime *runtime; + unsigned int active; +diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h +index 385c632..f48d25c 100644 +--- a/include/sound/soc-dapm.h ++++ b/include/sound/soc-dapm.h +@@ -422,6 +422,8 @@ void dapm_mark_io_dirty(struct snd_soc_dapm_context *dapm); + int snd_soc_dapm_dai_get_connected_widgets(struct snd_soc_dai *dai, int stream, + struct snd_soc_dapm_widget_list **list); + ++struct snd_soc_codec *snd_soc_dapm_kcontrol_codec(struct snd_kcontrol *kcontrol); ++ + /* dapm widget types */ + enum snd_soc_dapm_type { + snd_soc_dapm_input = 0, /* input pin */ +diff --git a/include/sound/soc-dpcm.h b/include/sound/soc-dpcm.h +index 04598f1..a2e15ca 100644 +--- a/include/sound/soc-dpcm.h ++++ b/include/sound/soc-dpcm.h +@@ -11,6 +11,7 @@ + #ifndef __LINUX_SND_SOC_DPCM_H + #define __LINUX_SND_SOC_DPCM_H + ++#include + #include + #include + +@@ -135,4 +136,25 @@ int soc_dpcm_be_digital_mute(struct snd_soc_pcm_runtime *fe, int mute); + int soc_dpcm_debugfs_add(struct snd_soc_pcm_runtime *rtd); + int soc_dpcm_runtime_update(struct snd_soc_dapm_widget *); + ++int dpcm_path_get(struct snd_soc_pcm_runtime *fe, ++ int stream, struct snd_soc_dapm_widget_list **list_); ++int dpcm_process_paths(struct snd_soc_pcm_runtime *fe, ++ int stream, struct snd_soc_dapm_widget_list **list, int new); ++int dpcm_be_dai_startup(struct snd_soc_pcm_runtime *fe, int stream); ++int dpcm_be_dai_shutdown(struct snd_soc_pcm_runtime *fe, int stream); ++void dpcm_be_disconnect(struct snd_soc_pcm_runtime *fe, int stream); ++void dpcm_clear_pending_state(struct snd_soc_pcm_runtime *fe, int stream); ++int dpcm_be_dai_hw_free(struct snd_soc_pcm_runtime *fe, int stream); ++int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int tream); ++int dpcm_be_dai_trigger(struct snd_soc_pcm_runtime *fe, int stream, int cmd); ++int dpcm_be_dai_prepare(struct snd_soc_pcm_runtime *fe, int stream); ++int dpcm_dapm_stream_event(struct snd_soc_pcm_runtime *fe, int dir, ++ int event); ++ ++static inline void dpcm_path_put(struct snd_soc_dapm_widget_list **list) ++{ ++ kfree(*list); ++} ++ ++ + #endif +diff --git a/include/sound/soc.h b/include/sound/soc.h +index 85c1522..9338da8 100644 +--- a/include/sound/soc.h ++++ b/include/sound/soc.h +@@ -26,6 +26,7 @@ + #include + #include + #include ++#include + + /* + * Convenience kcontrol builders +@@ -92,6 +93,12 @@ + {.reg = xreg, .rreg = xreg, .shift = xshift, \ + .rshift = xshift, .min = xmin, .max = xmax, \ + .platform_max = xmax, .invert = xinvert} } ++#define SND_SOC_BYTES_EXT(xname, xcount, xhandler_get, xhandler_put) \ ++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ ++ .info = snd_soc_info_bytes_ext, \ ++ .get = xhandler_get, .put = xhandler_put, \ ++ .private_value = (unsigned long)&(struct soc_bytes_ext) \ ++ {.max = xcount} } + #define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \ + { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ + .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \ +@@ -420,6 +427,21 @@ struct snd_pcm_substream *snd_soc_get_dai_substream(struct snd_soc_card *card, + const char *dai_link, int stream); + struct snd_soc_pcm_runtime *snd_soc_get_pcm_runtime(struct snd_soc_card *card, + const char *dai_link); ++#if IS_ENABLED(CONFIG_SND_EFFECTS_OFFLOAD) ++int snd_soc_register_effect(struct snd_soc_card *card, ++ struct snd_effect_ops *ops); ++int snd_soc_unregister_effect(struct snd_soc_card *card); ++#else ++static inline int snd_soc_register_effect(struct snd_soc_card *card, ++ struct snd_effect_ops *ops) ++{ ++ return -ENODEV; ++} ++static inline int snd_soc_unregister_effect(struct snd_soc_card *card) ++{ ++ return -ENODEV; ++} ++#endif + + /* Utility functions to get clock rates from various things */ + int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots); +@@ -538,6 +560,8 @@ int snd_soc_get_strobe(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + int snd_soc_put_strobe(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); ++int snd_soc_info_bytes_ext(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *ucontrol); + + /** + * struct snd_soc_reg_access - Describes whether a given register is +@@ -594,6 +618,7 @@ struct snd_soc_jack_zone { + * @name: gpio name + * @report: value to report when jack detected + * @invert: report presence in low state ++ * @irq_flag: Interrupt flags for GPIO-Irq line + * @debouce_time: debouce time in ms + * @wake: enable as wake source + * @jack_status_check: callback function which overrides the detection +@@ -608,6 +633,7 @@ struct snd_soc_jack_gpio { + int invert; + int debounce_time; + bool wake; ++ unsigned long irq_flags; + + struct snd_soc_jack *jack; + struct delayed_work work; +@@ -932,6 +958,10 @@ struct snd_soc_dai_link { + /* machine stream operations */ + const struct snd_soc_ops *ops; + const struct snd_soc_compr_ops *compr_ops; ++ ++ /*no of substreams */ ++ unsigned int playback_count; ++ unsigned int capture_count; + }; + + struct snd_soc_codec_conf { +@@ -1063,6 +1093,7 @@ struct snd_soc_pcm_runtime { + + /* Dynamic PCM BE runtime data */ + struct snd_soc_dpcm_runtime dpcm[2]; ++ int fe_compr; + + long pmdown_time; + unsigned char pop_wait:1; +@@ -1100,6 +1131,10 @@ struct soc_mreg_control { + unsigned int regbase, regcount, nbits, invert; + }; + ++struct soc_bytes_ext { ++ int max; ++}; ++ + /* enumerated kcontrol */ + struct soc_enum { + unsigned short reg; +diff --git a/include/uapi/linux/mmc/ioctl.h b/include/uapi/linux/mmc/ioctl.h +index 1f5e689..98ad956 100644 +--- a/include/uapi/linux/mmc/ioctl.h ++++ b/include/uapi/linux/mmc/ioctl.h +@@ -47,6 +47,19 @@ struct mmc_ioc_cmd { + + #define MMC_IOC_CMD _IOWR(MMC_BLOCK_MAJOR, 0, struct mmc_ioc_cmd) + ++struct mmc_ioc_rpmb_req { ++ __u16 type; /* RPMB request type */ ++ __u16 *result; /* response or request result */ ++ __u16 blk_cnt; /* Number of blocks(half sector 256B) */ ++ __u16 addr; /* data address */ ++ __u32 *wc; /* write counter */ ++ __u8 *nonce; /* Ramdom number */ ++ __u8 *data; /* Buffer of the user data */ ++ __u8 *mac; /* Message Authentication Code */ ++}; ++ ++#define MMC_IOC_RPMB_REQ _IOWR(MMC_BLOCK_MAJOR, 1, struct mmc_ioc_rpmb_req) ++ + /* + * Since this ioctl is only meant to enhance (and not replace) normal access + * to the mmc bus device, an upper data transfer limit of MMC_IOC_MAX_BYTES diff --git a/include/uapi/linux/usb/ch9.h b/include/uapi/linux/usb/ch9.h index aa33fd1..29860d6 100644 --- a/include/uapi/linux/usb/ch9.h @@ -99324,6 +103694,107 @@ index aa33fd1..29860d6 100644 #define USB_CLASS_WIRELESS_CONTROLLER 0xe0 #define USB_CLASS_MISC 0xef #define USB_CLASS_APP_SPEC 0xfe +diff --git a/include/uapi/sound/compress_offload.h b/include/uapi/sound/compress_offload.h +index d630163..21eed48 100644 +--- a/include/uapi/sound/compress_offload.h ++++ b/include/uapi/sound/compress_offload.h +@@ -30,7 +30,7 @@ + #include + + +-#define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 1) ++#define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 2) + /** + * struct snd_compressed_buffer: compressed buffer + * @fragment_size: size of buffer fragment in bytes +@@ -67,8 +67,8 @@ struct snd_compr_params { + struct snd_compr_tstamp { + __u32 byte_offset; + __u32 copied_total; +- snd_pcm_uframes_t pcm_frames; +- snd_pcm_uframes_t pcm_io_frames; ++ __u32 pcm_frames; ++ __u32 pcm_io_frames; + __u32 sampling_rate; + }; + +@@ -80,7 +80,7 @@ struct snd_compr_tstamp { + struct snd_compr_avail { + __u64 avail; + struct snd_compr_tstamp tstamp; +-}; ++} __attribute__((packed)); + + enum snd_compr_direction { + SND_COMPRESS_PLAYBACK = 0, +diff --git a/include/uapi/sound/effect_offload.h b/include/uapi/sound/effect_offload.h +new file mode 100644 +index 0000000..9c30031 +--- /dev/null ++++ b/include/uapi/sound/effect_offload.h +@@ -0,0 +1,62 @@ ++/* ++ * effect_offload.h - effect offload header definations ++ * ++ * Copyright (C) 2013 Intel Corporation ++ * Authors: Vinod Koul ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ */ ++#ifndef __EFFECT_OFFLOAD_H ++#define __EFFECT_OFFLOAD_H ++ ++#include ++ ++#define SNDRV_EFFECT_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 0) ++ ++struct snd_effect { ++ char uuid[16]; /* effect UUID */ ++ int device; /* streaming interface for effect insertion */ ++ int pos; /* position of effect to be placed in effect chain */ ++ int mode; /* Backend for Global device (Headset/Speaker) */ ++}; ++ ++struct snd_effect_params { ++ char uuid[16]; ++ int device; ++ u32 size; /* size of parameter blob */ ++ char *buffer; ++}; ++ ++struct snd_effect_caps { ++ u32 size; /* size of buffer to read effect descriptors */ ++ char *buffer; ++}; ++ ++#define SNDRV_CTL_IOCTL_EFFECT_VERSION _IOR('E', 0x00, int) ++#define SNDRV_CTL_IOCTL_EFFECT_CREATE _IOW('E', 0x01,\ ++ struct snd_effect *) ++#define SNDRV_CTL_IOCTL_EFFECT_DESTROY _IOW('E', 0x02,\ ++ struct snd_effect *) ++#define SNDRV_CTL_IOCTL_EFFECT_SET_PARAMS _IOW('E', 0x03,\ ++ struct snd_effect_params *) ++#define SNDRV_CTL_IOCTL_EFFECT_GET_PARAMS _IOWR('E', 0x04,\ ++ struct snd_effect_params *) ++#define SNDRV_CTL_IOCTL_EFFECT_QUERY_NUM _IOR('E', 0x05, int) ++#define SNDRV_CTL_IOCTL_EFFECT_QUERY_CAPS _IOWR('E', 0x06,\ ++ struct snd_effect_caps *) ++#endif diff --git a/init/main.c b/init/main.c index fc071a6..beddd35 100644 --- a/init/main.c @@ -99495,6 +103966,706 @@ index 0582a01..5546ae9 100644 } *ppos += read; +diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c +index 68843a2..1d6f790 100644 +--- a/net/bluetooth/l2cap_core.c ++++ b/net/bluetooth/l2cap_core.c +@@ -58,6 +58,18 @@ static void l2cap_send_disconn_req(struct l2cap_chan *chan, int err); + static void l2cap_tx(struct l2cap_chan *chan, struct l2cap_ctrl *control, + struct sk_buff_head *skbs, u8 event); + ++static inline __u8 bdaddr_type(struct hci_conn *hcon, __u8 type) ++{ ++ if (hcon->type == LE_LINK) { ++ if (type == ADDR_LE_DEV_PUBLIC) ++ return BDADDR_LE_PUBLIC; ++ else ++ return BDADDR_LE_RANDOM; ++ } ++ ++ return BDADDR_BREDR; ++} ++ + /* ---- L2CAP channels ---- */ + + static struct l2cap_chan *__l2cap_get_chan_by_dcid(struct l2cap_conn *conn, +@@ -1364,6 +1376,8 @@ static void l2cap_le_conn_ready(struct l2cap_conn *conn) + + bacpy(&bt_sk(sk)->src, conn->src); + bacpy(&bt_sk(sk)->dst, conn->dst); ++ chan->src_type = bdaddr_type(conn->hcon, conn->hcon->src_type); ++ chan->dst_type = bdaddr_type(conn->hcon, conn->hcon->dst_type); + + l2cap_chan_add(conn, chan); + +@@ -1785,6 +1799,7 @@ int l2cap_chan_connect(struct l2cap_chan *chan, __le16 psm, u16 cid, + /* Set destination address and psm */ + lock_sock(sk); + bacpy(&bt_sk(sk)->dst, dst); ++ chan->dst_type = dst_type; + release_sock(sk); + + chan->psm = psm; +@@ -1792,7 +1807,7 @@ int l2cap_chan_connect(struct l2cap_chan *chan, __le16 psm, u16 cid, + + auth_type = l2cap_get_auth_type(chan); + +- if (chan->dcid == L2CAP_CID_LE_DATA) ++ if (bdaddr_type_is_le(dst_type)) + hcon = hci_connect(hdev, LE_LINK, dst, dst_type, + chan->sec_level, auth_type); + else +@@ -1825,6 +1840,7 @@ int l2cap_chan_connect(struct l2cap_chan *chan, __le16 psm, u16 cid, + + /* Update source addr of the socket */ + bacpy(src, conn->src); ++ chan->src_type = bdaddr_type(hcon, hcon->src_type); + + l2cap_chan_unlock(chan); + l2cap_chan_add(conn, chan); +@@ -3755,6 +3771,8 @@ static struct l2cap_chan *l2cap_connect(struct l2cap_conn *conn, + + bacpy(&bt_sk(sk)->src, conn->src); + bacpy(&bt_sk(sk)->dst, conn->dst); ++ chan->src_type = bdaddr_type(conn->hcon, conn->hcon->src_type); ++ chan->dst_type = bdaddr_type(conn->hcon, conn->hcon->dst_type); + chan->psm = psm; + chan->dcid = scid; + chan->local_amp_id = amp_id; +diff --git a/net/bluetooth/l2cap_sock.c b/net/bluetooth/l2cap_sock.c +index 36fed40..d0ff076 100644 +--- a/net/bluetooth/l2cap_sock.c ++++ b/net/bluetooth/l2cap_sock.c +@@ -103,7 +103,8 @@ static int l2cap_sock_bind(struct socket *sock, struct sockaddr *addr, int alen) + __le16_to_cpu(la.l2_psm) == L2CAP_PSM_RFCOMM) + chan->sec_level = BT_SECURITY_SDP; + +- bacpy(&bt_sk(sk)->src, &la.l2_bdaddr); ++ bacpy(&chan->src, &la.l2_bdaddr); ++ chan->src_type = la.l2_bdaddr_type; + + chan->state = BT_BOUND; + sk->sk_state = BT_BOUND; +@@ -267,10 +268,12 @@ static int l2cap_sock_getname(struct socket *sock, struct sockaddr *addr, + la->l2_psm = chan->psm; + bacpy(&la->l2_bdaddr, &bt_sk(sk)->dst); + la->l2_cid = cpu_to_le16(chan->dcid); ++ la->l2_bdaddr_type = chan->dst_type; + } else { + la->l2_psm = chan->sport; + bacpy(&la->l2_bdaddr, &bt_sk(sk)->src); + la->l2_cid = cpu_to_le16(chan->scid); ++ la->l2_bdaddr_type = chan->src_type; + } + + return 0; +diff --git a/sound/core/Kconfig b/sound/core/Kconfig +index b413ed0..27a27bd 100644 +--- a/sound/core/Kconfig ++++ b/sound/core/Kconfig +@@ -15,6 +15,9 @@ config SND_RAWMIDI + config SND_COMPRESS_OFFLOAD + tristate + ++config SND_EFFECTS_OFFLOAD ++ tristate ++ + # To be effective this also requires INPUT - users should say: + # select SND_JACK if INPUT=y || INPUT=SND + # to avoid having to force INPUT on. +diff --git a/sound/core/Makefile b/sound/core/Makefile +index 43d4117..9e37a2b 100644 +--- a/sound/core/Makefile ++++ b/sound/core/Makefile +@@ -23,6 +23,7 @@ snd-rtctimer-objs := rtctimer.o + snd-hwdep-objs := hwdep.o + + snd-compress-objs := compress_offload.o ++snd-effects-objs := effects_offload.o + + obj-$(CONFIG_SND) += snd.o + obj-$(CONFIG_SND_HWDEP) += snd-hwdep.o +@@ -36,3 +37,4 @@ obj-$(CONFIG_SND_OSSEMUL) += oss/ + obj-$(CONFIG_SND_SEQUENCER) += seq/ + + obj-$(CONFIG_SND_COMPRESS_OFFLOAD) += snd-compress.o ++obj-$(CONFIG_SND_EFFECTS_OFFLOAD) += snd-effects.o +diff --git a/sound/core/compress_offload.c b/sound/core/compress_offload.c +index 5863ba6..632dcd6 100644 +--- a/sound/core/compress_offload.c ++++ b/sound/core/compress_offload.c +@@ -123,6 +123,7 @@ static int snd_compr_open(struct inode *inode, struct file *f) + } + runtime->state = SNDRV_PCM_STATE_OPEN; + init_waitqueue_head(&runtime->sleep); ++ init_waitqueue_head(&runtime->wait); + data->stream.runtime = runtime; + f->private_data = (void *)data; + mutex_lock(&compr->lock); +@@ -139,6 +140,18 @@ static int snd_compr_open(struct inode *inode, struct file *f) + static int snd_compr_free(struct inode *inode, struct file *f) + { + struct snd_compr_file *data = f->private_data; ++ struct snd_compr_runtime *runtime = data->stream.runtime; ++ ++ switch (runtime->state) { ++ case SNDRV_PCM_STATE_RUNNING: ++ case SNDRV_PCM_STATE_DRAINING: ++ case SNDRV_PCM_STATE_PAUSED: ++ data->stream.ops->trigger(&data->stream, SNDRV_PCM_TRIGGER_STOP); ++ break; ++ default: ++ break; ++ } ++ + data->stream.ops->free(&data->stream); + kfree(data->stream.runtime->buffer); + kfree(data->stream.runtime); +@@ -256,16 +269,25 @@ static ssize_t snd_compr_write(struct file *f, const char __user *buf, + struct snd_compr_file *data = f->private_data; + struct snd_compr_stream *stream; + size_t avail; +- int retval; ++ int retval = 0; + + if (snd_BUG_ON(!data)) + return -EFAULT; + + stream = &data->stream; + mutex_lock(&stream->device->lock); +- /* write is allowed when stream is running or has been steup */ ++ /* ++ * if the stream is in paused state, return the ++ * number of bytes consumed as 0 ++ */ ++ if (stream->runtime->state == SNDRV_PCM_STATE_PAUSED) { ++ mutex_unlock(&stream->device->lock); ++ return retval; ++ } ++ /* write is allowed when stream is running or prepared or in setup */ + if (stream->runtime->state != SNDRV_PCM_STATE_SETUP && +- stream->runtime->state != SNDRV_PCM_STATE_RUNNING) { ++ stream->runtime->state != SNDRV_PCM_STATE_RUNNING && ++ stream->runtime->state != SNDRV_PCM_STATE_PREPARED) { + mutex_unlock(&stream->device->lock); + return -EBADFD; + } +@@ -372,8 +394,7 @@ static unsigned int snd_compr_poll(struct file *f, poll_table *wait) + return -EFAULT; + + mutex_lock(&stream->device->lock); +- if (stream->runtime->state == SNDRV_PCM_STATE_PAUSED || +- stream->runtime->state == SNDRV_PCM_STATE_OPEN) { ++ if (stream->runtime->state == SNDRV_PCM_STATE_OPEN) { + retval = -EBADFD; + goto out; + } +@@ -397,6 +418,7 @@ static unsigned int snd_compr_poll(struct file *f, poll_table *wait) + retval = snd_compr_get_poll(stream); + break; + default: ++ pr_err("poll returns err!...\n"); + if (stream->direction == SND_COMPRESS_PLAYBACK) + retval = POLLOUT | POLLWRNORM | POLLERR; + else +@@ -627,7 +649,8 @@ static int snd_compr_pause(struct snd_compr_stream *stream) + { + int retval; + +- if (stream->runtime->state != SNDRV_PCM_STATE_RUNNING) ++ if ((stream->runtime->state != SNDRV_PCM_STATE_RUNNING) && ++ (stream->runtime->state != SNDRV_PCM_STATE_DRAINING)) + return -EPERM; + retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_PAUSE_PUSH); + if (!retval) +@@ -642,8 +665,10 @@ static int snd_compr_resume(struct snd_compr_stream *stream) + if (stream->runtime->state != SNDRV_PCM_STATE_PAUSED) + return -EPERM; + retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_PAUSE_RELEASE); +- if (!retval) ++ if (!retval) { + stream->runtime->state = SNDRV_PCM_STATE_RUNNING; ++ wake_up(&stream->runtime->sleep); ++ } + return retval; + } + +@@ -659,35 +684,71 @@ static int snd_compr_start(struct snd_compr_stream *stream) + return retval; + } + +-static int snd_compr_stop(struct snd_compr_stream *stream) ++int snd_compr_stop(struct snd_compr_stream *stream) + { +- int retval; ++ int retval = 0; + +- if (stream->runtime->state == SNDRV_PCM_STATE_PREPARED || +- stream->runtime->state == SNDRV_PCM_STATE_SETUP) ++ if (stream->runtime->state == SNDRV_PCM_STATE_SETUP) + return -EPERM; +- retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_STOP); ++ if (stream->runtime->state != SNDRV_PCM_STATE_PREPARED) ++ retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_STOP); + if (!retval) { + stream->runtime->state = SNDRV_PCM_STATE_SETUP; + wake_up(&stream->runtime->sleep); ++ snd_compr_drain_notify(stream); + stream->runtime->total_bytes_available = 0; + stream->runtime->total_bytes_transferred = 0; + } + return retval; + } ++EXPORT_SYMBOL(snd_compr_stop); ++ ++static int snd_compress_wait_for_drain(struct snd_compr_stream *stream) ++{ ++ /* ++ * We are called with lock held. So drop the lock while we wait for ++ * drain complete notfication from the driver ++ * ++ * It is expected that driver will notify the drain completion and then ++ * stream will be moved to SETUP state, even if draining resulted in an ++ * error. We can trigger next track after this. ++ */ ++ stream->runtime->state = SNDRV_PCM_STATE_DRAINING; ++ mutex_unlock(&stream->device->lock); ++ ++ wait_event(stream->runtime->wait, stream->runtime->drain_wake); ++ ++ wake_up(&stream->runtime->sleep); ++ mutex_lock(&stream->device->lock); ++ ++ return 0; ++} + + static int snd_compr_drain(struct snd_compr_stream *stream) + { +- int retval; ++ int retval = 0; + +- if (stream->runtime->state == SNDRV_PCM_STATE_PREPARED || +- stream->runtime->state == SNDRV_PCM_STATE_SETUP) ++ if (stream->runtime->state == SNDRV_PCM_STATE_SETUP) + return -EPERM; +- retval = stream->ops->trigger(stream, SND_COMPR_TRIGGER_DRAIN); +- if (!retval) { +- stream->runtime->state = SNDRV_PCM_STATE_DRAINING; ++ ++ stream->runtime->drain_wake = 0; ++ ++ /* this is hackish for our tree but for now lets carry it while we fix ++ * usermode behaviour ++ */ ++ if (stream->runtime->state != SNDRV_PCM_STATE_PREPARED) ++ retval = stream->ops->trigger(stream, SND_COMPR_TRIGGER_DRAIN); ++ else ++ return 0; ++ ++ if (retval) { ++ pr_err("SND_COMPR_TRIGGER_DRAIN failed %d\n", retval); + wake_up(&stream->runtime->sleep); ++ return retval; + } ++ ++ retval = snd_compress_wait_for_drain(stream); ++ stream->runtime->state = SNDRV_PCM_STATE_SETUP; + return retval; + } + +@@ -715,17 +776,30 @@ static int snd_compr_next_track(struct snd_compr_stream *stream) + + static int snd_compr_partial_drain(struct snd_compr_stream *stream) + { +- int retval; +- if (stream->runtime->state == SNDRV_PCM_STATE_PREPARED || +- stream->runtime->state == SNDRV_PCM_STATE_SETUP) ++ int retval = 0; ++ ++ /* agaain hackish changes */ ++ if (stream->runtime->state == SNDRV_PCM_STATE_SETUP) + return -EPERM; + /* stream can be drained only when next track has been signalled */ + if (stream->next_track == false) + return -EPERM; + +- retval = stream->ops->trigger(stream, SND_COMPR_TRIGGER_PARTIAL_DRAIN); ++ stream->runtime->drain_wake = 0; ++ if (stream->runtime->state != SNDRV_PCM_STATE_PREPARED) ++ retval = stream->ops->trigger(stream, SND_COMPR_TRIGGER_PARTIAL_DRAIN); ++ else ++ return 0; ++ ++ if (retval) { ++ pr_err("Partial drain returned failure\n"); ++ wake_up(&stream->runtime->sleep); ++ return retval; ++ } + + stream->next_track = false; ++ retval = snd_compress_wait_for_drain(stream); ++ stream->runtime->state = SNDRV_PCM_STATE_SETUP; + return retval; + } + +@@ -804,6 +878,9 @@ static const struct file_operations snd_compr_file_ops = { + .write = snd_compr_write, + .read = snd_compr_read, + .unlocked_ioctl = snd_compr_ioctl, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl = snd_compr_ioctl, ++#endif + .mmap = snd_compr_mmap, + .poll = snd_compr_poll, + }; +@@ -818,7 +895,7 @@ static int snd_compress_dev_register(struct snd_device *device) + return -EBADFD; + compr = device->device_data; + +- sprintf(str, "comprC%iD%i", compr->card->number, compr->device); ++ snprintf(str, sizeof(str), "comprC%iD%i", compr->card->number, compr->device); + pr_debug("reg %s for device %s, direction %d\n", str, compr->name, + compr->direction); + /* register compressed device */ +diff --git a/sound/core/effects_offload.c b/sound/core/effects_offload.c +new file mode 100644 +index 0000000..def0a89 +--- /dev/null ++++ b/sound/core/effects_offload.c +@@ -0,0 +1,307 @@ ++/* ++ * effect_offload.c - effects offload core ++ * ++ * Copyright (C) 2013 Intel Corporation ++ * Authors: Lakshmi N Vinnakota ++ * Vinod Koul ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ */ ++#define FORMAT(fmt) "%s: %d: " fmt, __func__, __LINE__ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " FORMAT(fmt) ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static DEFINE_MUTEX(effect_mutex); ++ ++int snd_ctl_effect_create(struct snd_card *card, void *arg) ++{ ++ int retval = 0; ++ struct snd_effect *effect; ++ ++ effect = kmalloc(sizeof(*effect), GFP_KERNEL); ++ if (!effect) ++ return -ENOMEM; ++ if (copy_from_user(effect, (void __user *)arg, sizeof(*effect))) { ++ retval = -EFAULT; ++ goto out; ++ } ++ pr_debug("effect_offload: device %d, pos %d, mode%d\n", ++ effect->device, effect->pos, effect->mode); ++ ++ mutex_lock(&card->effect_lock); ++ retval = card->effect_ops->create(card, effect); ++ mutex_unlock(&card->effect_lock); ++out: ++ kfree(effect); ++ return retval; ++} ++EXPORT_SYMBOL_GPL(snd_ctl_effect_create); ++ ++int snd_ctl_effect_destroy(struct snd_card *card, void *arg) ++{ ++ int retval = 0; ++ struct snd_effect *effect; ++ ++ effect = kmalloc(sizeof(*effect), GFP_KERNEL); ++ if (!effect) ++ return -ENOMEM; ++ if (copy_from_user(effect, (void __user *)arg, sizeof(*effect))) { ++ retval = -EFAULT; ++ goto out; ++ } ++ mutex_lock(&card->effect_lock); ++ retval = card->effect_ops->destroy(card, effect); ++ mutex_unlock(&card->effect_lock); ++out: ++ kfree(effect); ++ return retval; ++} ++EXPORT_SYMBOL_GPL(snd_ctl_effect_destroy); ++ ++int snd_ctl_effect_set_params(struct snd_card *card, void *arg) ++{ ++ int retval = 0; ++ struct snd_effect_params *params; ++ char __user *argp = (char __user *)arg; ++ char __user *bufp; ++ ++ params = kmalloc(sizeof(*params), GFP_KERNEL); ++ if (!params) ++ return -ENOMEM; ++ ++ if (copy_from_user(params, argp, sizeof(*params))) { ++ retval = -EFAULT; ++ goto out; ++ } ++ bufp = params->buffer; ++ params->buffer = kmalloc(params->size, GFP_KERNEL); ++ if (!params->buffer) { ++ retval = -ENOMEM; ++ goto out; ++ } ++ ++ if (copy_from_user((void *)params->buffer, bufp, params->size)) { ++ retval = -EFAULT; ++ goto free_buf; ++ } ++ ++ mutex_lock(&card->effect_lock); ++ retval = card->effect_ops->set_params(card, params); ++ mutex_unlock(&card->effect_lock); ++free_buf: ++ kfree(params->buffer); ++out: ++ kfree(params); ++ return retval; ++} ++EXPORT_SYMBOL_GPL(snd_ctl_effect_set_params); ++ ++int snd_ctl_effect_get_params(struct snd_card *card, void *arg) ++{ ++ int retval = 0; ++ struct snd_effect_params inparams; ++ struct snd_effect_params *outparams; ++ unsigned int offset; ++ char __user *argp = (char __user *)arg; ++ ++ if (copy_from_user((void *)&inparams, argp, sizeof(inparams))) ++ retval = -EFAULT; ++ ++ outparams = kmalloc(sizeof(*outparams), GFP_KERNEL); ++ if (!outparams) ++ return -ENOMEM; ++ ++ memcpy(outparams, &inparams, sizeof(inparams)); ++ outparams->buffer = kmalloc(inparams.size, GFP_KERNEL); ++ if (!outparams->buffer) { ++ retval = -ENOMEM; ++ goto free_out; ++ } ++ ++ if (copy_from_user((void *)outparams->buffer, inparams.buffer, ++ inparams.size)) { ++ retval = -EFAULT; ++ goto free_buf; ++ } ++ ++ mutex_lock(&card->effect_lock); ++ retval = card->effect_ops->get_params(card, outparams); ++ mutex_unlock(&card->effect_lock); ++ ++ if (retval) ++ goto free_buf; ++ ++ if (!outparams->size) ++ goto free_buf; ++ ++ if (outparams->size > inparams.size) { ++ pr_err("mem insufficient to copy\n"); ++ retval = -EMSGSIZE; ++ goto free_buf; ++ } else { ++ offset = offsetof(struct snd_effect_params, size); ++ if (copy_to_user((argp + offset), (void *)&outparams->size, ++ sizeof(u32))) ++ retval = -EFAULT; ++ ++ if (copy_to_user(inparams.buffer, outparams->buffer, ++ outparams->size)) ++ retval = -EFAULT; ++ } ++free_buf: ++ kfree(outparams->buffer); ++free_out: ++ kfree(outparams); ++ return retval; ++} ++EXPORT_SYMBOL_GPL(snd_ctl_effect_get_params); ++ ++int snd_ctl_effect_query_num_effects(struct snd_card *card, void *arg) ++{ ++ int retval = 0; ++ int __user *ip = arg; ++ ++ mutex_lock(&card->effect_lock); ++ retval = card->effect_ops->query_num_effects(card); ++ mutex_unlock(&card->effect_lock); ++ ++ if (retval < 0) ++ goto out; ++ retval = put_user(retval, ip) ? -EFAULT : 0; ++out: ++ return retval; ++} ++EXPORT_SYMBOL_GPL(snd_ctl_effect_query_num_effects); ++ ++int snd_ctl_effect_query_effect_caps(struct snd_card *card, void *arg) ++{ ++ int retval = 0; ++ struct snd_effect_caps *caps; ++ unsigned int offset, insize; ++ char __user *argp = (char __user *)arg; ++ char __user *bufp; ++ ++ caps = kmalloc(sizeof(*caps), GFP_KERNEL); ++ if (!caps) ++ return -ENOMEM; ++ ++ if (copy_from_user(caps, argp, sizeof(*caps))) { ++ retval = -EFAULT; ++ goto out; ++ } ++ bufp = caps->buffer; ++ insize = caps->size; ++ caps->buffer = kmalloc(caps->size, GFP_KERNEL); ++ if (!caps->buffer) { ++ retval = -ENOMEM; ++ goto out; ++ } ++ ++ mutex_lock(&card->effect_lock); ++ retval = card->effect_ops->query_effect_caps(card, caps); ++ mutex_unlock(&card->effect_lock); ++ ++ if (retval) ++ goto free_buf; ++ ++ if (insize < caps->size) { ++ pr_err("mem insufficient to copy\n"); ++ retval = -EMSGSIZE; ++ goto free_buf; ++ } ++ ++ offset = offsetof(struct snd_effect_caps, size); ++ if (copy_to_user((argp + offset), (void *)&caps->size, sizeof(u32))) { ++ retval = -EFAULT; ++ goto free_buf; ++ } ++ ++ if (copy_to_user(bufp, caps->buffer, caps->size)) ++ retval = -EFAULT; ++ ++free_buf: ++ kfree(caps->buffer); ++out: ++ kfree(caps); ++ return retval; ++} ++EXPORT_SYMBOL_GPL(snd_ctl_effect_query_effect_caps); ++ ++/** ++ * snd_effect_register - register compressed device ++ * ++ * @card : snd card to which the effect is registered ++ * @ops : effect_ops to register ++ */ ++int snd_effect_register(struct snd_card *card, struct snd_effect_ops *ops) ++{ ++ ++ if (card == NULL || ops == NULL) ++ return -EINVAL; ++ ++ if (snd_BUG_ON(!ops->create)) ++ return -EINVAL; ++ if (snd_BUG_ON(!ops->destroy)) ++ return -EINVAL; ++ if (snd_BUG_ON(!ops->set_params)) ++ return -EINVAL; ++ ++ mutex_init(&card->effect_lock); ++ ++ pr_debug("Registering Effects to card %s\n", card->shortname); ++ /* register the effect ops with the card */ ++ mutex_lock(&effect_mutex); ++ card->effect_ops = ops; ++ mutex_unlock(&effect_mutex); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(snd_effect_register); ++ ++int snd_effect_deregister(struct snd_card *card) ++{ ++ pr_debug("Removing effects for card %s\n", card->shortname); ++ mutex_lock(&effect_mutex); ++ card->effect_ops = NULL; ++ mutex_unlock(&effect_mutex); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(snd_effect_deregister); ++ ++static int __init snd_effect_init(void) ++{ ++ return 0; ++} ++ ++static void __exit snd_effect_exit(void) ++{ ++} ++ ++module_init(snd_effect_init); ++module_exit(snd_effect_exit); ++ ++MODULE_DESCRIPTION("ALSA Effect offload framework"); ++MODULE_AUTHOR("Lakshmi N Vinnakota "); ++MODULE_AUTHOR("Vinod Koul "); ++MODULE_LICENSE("GPL v2"); +diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig +index 9e675c7..23f39d2 100644 +--- a/sound/soc/Kconfig ++++ b/sound/soc/Kconfig +@@ -45,7 +45,7 @@ source "sound/soc/jz4740/Kconfig" + source "sound/soc/nuc900/Kconfig" + source "sound/soc/omap/Kconfig" + source "sound/soc/kirkwood/Kconfig" +-source "sound/soc/mid-x86/Kconfig" ++source "sound/soc/intel/Kconfig" + source "sound/soc/mxs/Kconfig" + source "sound/soc/pxa/Kconfig" + source "sound/soc/samsung/Kconfig" +diff --git a/sound/soc/Makefile b/sound/soc/Makefile +index 197b6ae..25201f53 100644 +--- a/sound/soc/Makefile ++++ b/sound/soc/Makefile +@@ -20,7 +20,7 @@ obj-$(CONFIG_SND_SOC) += davinci/ + obj-$(CONFIG_SND_SOC) += dwc/ + obj-$(CONFIG_SND_SOC) += fsl/ + obj-$(CONFIG_SND_SOC) += jz4740/ +-obj-$(CONFIG_SND_SOC) += mid-x86/ ++obj-$(CONFIG_SND_SOC) += intel/ + obj-$(CONFIG_SND_SOC) += mxs/ + obj-$(CONFIG_SND_SOC) += nuc900/ + obj-$(CONFIG_SND_SOC) += omap/ diff --git a/sound/soc/codecs/sn95031.c b/sound/soc/codecs/sn95031.c index d1ae869d..fc12d6e 100644 --- a/sound/soc/codecs/sn95031.c @@ -99508,6 +104679,25160 @@ index d1ae869d..fc12d6e 100644 #include #include #include +diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c +index 29e95f9..97b7b8f 100644 +--- a/sound/soc/codecs/wm8994.c ++++ b/sound/soc/codecs/wm8994.c +@@ -16,6 +16,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -93,9 +94,9 @@ static int wm8994_retune_mobile_base[] = { + + static const struct wm8958_micd_rate micdet_rates[] = { + { 32768, true, 1, 4 }, +- { 32768, false, 1, 1 }, ++ { 32768, false, 1, 0 }, + { 44100 * 256, true, 7, 10 }, +- { 44100 * 256, false, 7, 10 }, ++ { 44100 * 256, false, 7, 9 }, + }; + + static const struct wm8958_micd_rate jackdet_rates[] = { +@@ -539,13 +540,13 @@ static const struct soc_enum adc_osr = + static const struct snd_kcontrol_new wm8994_snd_controls[] = { + SOC_DOUBLE_R_TLV("AIF1ADC1 Volume", WM8994_AIF1_ADC1_LEFT_VOLUME, + WM8994_AIF1_ADC1_RIGHT_VOLUME, +- 1, 119, 0, digital_tlv), ++ 1, 120, 0, digital_tlv), + SOC_DOUBLE_R_TLV("AIF1ADC2 Volume", WM8994_AIF1_ADC2_LEFT_VOLUME, + WM8994_AIF1_ADC2_RIGHT_VOLUME, +- 1, 119, 0, digital_tlv), ++ 1, 120, 0, digital_tlv), + SOC_DOUBLE_R_TLV("AIF2ADC Volume", WM8994_AIF2_ADC_LEFT_VOLUME, + WM8994_AIF2_ADC_RIGHT_VOLUME, +- 1, 119, 0, digital_tlv), ++ 1, 120, 0, digital_tlv), + + SOC_ENUM("AIF1ADCL Source", aif1adcl_src), + SOC_ENUM("AIF1ADCR Source", aif1adcr_src), +@@ -607,12 +608,12 @@ SOC_ENUM("ADC OSR", adc_osr), + SOC_ENUM("DAC OSR", dac_osr), + + SOC_DOUBLE_R_TLV("DAC1 Volume", WM8994_DAC1_LEFT_VOLUME, +- WM8994_DAC1_RIGHT_VOLUME, 1, 96, 0, digital_tlv), ++ WM8994_DAC1_RIGHT_VOLUME, 1, 112, 0, digital_tlv), + SOC_DOUBLE_R("DAC1 Switch", WM8994_DAC1_LEFT_VOLUME, + WM8994_DAC1_RIGHT_VOLUME, 9, 1, 1), + + SOC_DOUBLE_R_TLV("DAC2 Volume", WM8994_DAC2_LEFT_VOLUME, +- WM8994_DAC2_RIGHT_VOLUME, 1, 96, 0, digital_tlv), ++ WM8994_DAC2_RIGHT_VOLUME, 1, 112, 0, digital_tlv), + SOC_DOUBLE_R("DAC2 Switch", WM8994_DAC2_LEFT_VOLUME, + WM8994_DAC2_RIGHT_VOLUME, 9, 1, 1), + +@@ -638,6 +639,11 @@ SOC_SINGLE_TLV("AIF2DAC 3D Stereo Volume", WM8994_AIF2_DAC_FILTERS_2, + 10, 15, 0, wm8994_3d_tlv), + SOC_SINGLE("AIF2DAC 3D Stereo Switch", WM8994_AIF2_DAC_FILTERS_2, + 8, 1, 0), ++ ++SOC_SINGLE_TLV("MIXINL MIXOUTL Volume", WM8994_INPUT_MIXER_3, 0, 7, 0, ++ mixin_boost_tlv), ++SOC_SINGLE_TLV("MIXINR MIXOUTR Volume", WM8994_INPUT_MIXER_4, 0, 7, 0, ++ mixin_boost_tlv), + }; + + static const struct snd_kcontrol_new wm8994_eq_controls[] = { +@@ -866,7 +872,7 @@ static void vmid_reference(struct snd_soc_codec *codec) + WM8994_BIAS_SRC | + WM8994_STARTUP_BIAS_ENA | + WM8994_VMID_BUF_ENA | +- (0x2 << WM8994_VMID_RAMP_SHIFT)); ++ (0x3 << WM8994_VMID_RAMP_SHIFT)); + + /* Main bias enable, VMID=2x40k */ + snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, +@@ -874,7 +880,14 @@ static void vmid_reference(struct snd_soc_codec *codec) + WM8994_VMID_SEL_MASK, + WM8994_BIAS_ENA | 0x2); + +- msleep(300); ++ /* The delay of 300ms was recommended to support pop ++ * free startup of the line output driver, as we don't use ++ * that feature reducing the delay to 50ms as recommended in ++ * the spec, Also changing VMID_RAMP to soft fast start ++ * accordingly Also applies for VMID_FORCE and ++ * vmid_dereference. ++ */ ++ msleep(50); + + snd_soc_update_bits(codec, WM8994_ANTIPOP_2, + WM8994_VMID_RAMP_MASK | +@@ -893,15 +906,14 @@ static void vmid_reference(struct snd_soc_codec *codec) + WM8994_BIAS_SRC | + WM8994_STARTUP_BIAS_ENA | + WM8994_VMID_BUF_ENA | +- (0x2 << WM8994_VMID_RAMP_SHIFT)); ++ (0x3 << WM8994_VMID_RAMP_SHIFT)); + + /* Main bias enable, VMID=2x40k */ + snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, + WM8994_BIAS_ENA | + WM8994_VMID_SEL_MASK, + WM8994_BIAS_ENA | 0x2); +- +- msleep(400); ++ msleep(50); + + snd_soc_update_bits(codec, WM8994_ANTIPOP_2, + WM8994_VMID_RAMP_MASK | +@@ -946,7 +958,7 @@ static void vmid_dereference(struct snd_soc_codec *codec) + snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, + WM8994_VMID_SEL_MASK, 0); + +- msleep(400); ++ msleep(50); + + /* Active discharge */ + snd_soc_update_bits(codec, WM8994_ANTIPOP_1, +@@ -969,7 +981,7 @@ static void vmid_dereference(struct snd_soc_codec *codec) + WM8994_VMID_RAMP_MASK, 0); + + snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_1, +- WM8994_VMID_SEL_MASK, 0); ++ WM8994_BIAS_ENA | WM8994_VMID_SEL_MASK, 0); + } + + pm_runtime_put(codec->dev); +@@ -1055,7 +1067,7 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w, + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + /* Don't enable timeslot 2 if not in use */ +- if (wm8994->channels[0] <= 2) ++ if ((wm8994->channels[0] <= 2) && (wm8994->slots <= 2)) + mask &= ~(WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA); + + val = snd_soc_read(codec, WM8994_AIF1_CONTROL_1); +@@ -1331,6 +1343,26 @@ static int dac_ev(struct snd_soc_dapm_widget *w, + struct snd_soc_codec *codec = w->codec; + unsigned int mask = 1 << w->shift; + ++ /* Don't propagate FIFO errors unless the DAC is running */ ++ switch (event) { ++ case SND_SOC_DAPM_POST_PMU: ++ /* Clear FIFO error status */ ++ snd_soc_update_bits(codec, WM8994_INTERRUPT_STATUS_2, ++ WM8994_FIFOS_ERR_EINT_MASK, ++ 1 << WM8994_FIFOS_ERR_EINT_SHIFT); ++ /* Unmask FIFO error interrupts */ ++ snd_soc_update_bits(codec, WM8994_INTERRUPT_STATUS_2_MASK, ++ WM8994_IM_FIFOS_ERR_EINT_MASK, ++ 0 << WM8994_IM_FIFOS_ERR_EINT_SHIFT); ++ break; ++ case SND_SOC_DAPM_PRE_PMD: ++ /* Mask FIFO error interrupts */ ++ snd_soc_update_bits(codec, WM8994_INTERRUPT_STATUS_2_MASK, ++ WM8994_IM_FIFOS_ERR_EINT_MASK, ++ 1 << WM8994_IM_FIFOS_ERR_EINT_SHIFT); ++ break; ++ } ++ + snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, + mask, mask); + return 0; +@@ -1498,6 +1530,24 @@ static const char *aif1dac_text[] = { + "AIF1DACDAT", "AIF3DACDAT", + }; + ++static const char *loopback_text[] = { ++ "None", "ADCDAT", ++}; ++ ++static const struct soc_enum aif1_loopback_enum = ++ SOC_ENUM_SINGLE(WM8994_AIF1_CONTROL_2, WM8994_AIF1_LOOPBACK_SHIFT, 2, ++ loopback_text); ++ ++static const struct snd_kcontrol_new aif1_loopback = ++ SOC_DAPM_ENUM("AIF1 Loopback", aif1_loopback_enum); ++ ++static const struct soc_enum aif2_loopback_enum = ++ SOC_ENUM_SINGLE(WM8994_AIF2_CONTROL_2, WM8994_AIF2_LOOPBACK_SHIFT, 2, ++ loopback_text); ++ ++static const struct snd_kcontrol_new aif2_loopback = ++ SOC_DAPM_ENUM("AIF2 Loopback", aif2_loopback_enum); ++ + static const struct soc_enum aif1dac_enum = + SOC_ENUM_SINGLE(WM8994_POWER_MANAGEMENT_6, 0, 2, aif1dac_text); + +@@ -1616,13 +1666,17 @@ SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &wm_hubs_hpr_mux), + + static const struct snd_soc_dapm_widget wm8994_dac_revd_widgets[] = { + SND_SOC_DAPM_DAC_E("DAC2L", NULL, SND_SOC_NOPM, 3, 0, +- dac_ev, SND_SOC_DAPM_PRE_PMU), ++ dac_ev, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | ++ SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_DAC_E("DAC2R", NULL, SND_SOC_NOPM, 2, 0, +- dac_ev, SND_SOC_DAPM_PRE_PMU), ++ dac_ev, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | ++ SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_DAC_E("DAC1L", NULL, SND_SOC_NOPM, 1, 0, +- dac_ev, SND_SOC_DAPM_PRE_PMU), ++ dac_ev, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | ++ SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_DAC_E("DAC1R", NULL, SND_SOC_NOPM, 0, 0, +- dac_ev, SND_SOC_DAPM_PRE_PMU), ++ dac_ev, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | ++ SND_SOC_DAPM_PRE_PMD), + }; + + static const struct snd_soc_dapm_widget wm8994_dac_widgets[] = { +@@ -1633,15 +1687,15 @@ SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 0, 0), + }; + + static const struct snd_soc_dapm_widget wm8994_adc_revd_widgets[] = { +-SND_SOC_DAPM_VIRT_MUX_E("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux, ++SND_SOC_DAPM_VIRT_MUX_E("ADCL Mux", SND_SOC_NOPM, 1, 0, &adcl_mux, + adc_mux_ev, SND_SOC_DAPM_PRE_PMU), +-SND_SOC_DAPM_VIRT_MUX_E("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux, ++SND_SOC_DAPM_VIRT_MUX_E("ADCR Mux", SND_SOC_NOPM, 0, 0, &adcr_mux, + adc_mux_ev, SND_SOC_DAPM_PRE_PMU), + }; + + static const struct snd_soc_dapm_widget wm8994_adc_widgets[] = { +-SND_SOC_DAPM_VIRT_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux), +-SND_SOC_DAPM_VIRT_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux), ++SND_SOC_DAPM_VIRT_MUX("ADCL Mux", SND_SOC_NOPM, 1, 0, &adcl_mux), ++SND_SOC_DAPM_VIRT_MUX("ADCR Mux", SND_SOC_NOPM, 0, 0, &adcr_mux), + }; + + static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = { +@@ -1737,12 +1791,11 @@ SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8994_POWER_MANAGEMENT_4, 4, 0), + SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8994_POWER_MANAGEMENT_4, 3, 0), + SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8994_POWER_MANAGEMENT_4, 2, 0), + +-/* Power is done with the muxes since the ADC power also controls the +- * downsampling chain, the chip will automatically manage the analogue +- * specific portions. +- */ +-SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 1, 0), +-SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0), ++SND_SOC_DAPM_ADC("ADCL", NULL, WM8994_POWER_MANAGEMENT_4, 1, 0), ++SND_SOC_DAPM_ADC("ADCR", NULL, WM8994_POWER_MANAGEMENT_4, 0, 0), ++ ++SND_SOC_DAPM_MUX("AIF1 Loopback", SND_SOC_NOPM, 0, 0, &aif1_loopback), ++SND_SOC_DAPM_MUX("AIF2 Loopback", SND_SOC_NOPM, 0, 0, &aif2_loopback), + + SND_SOC_DAPM_POST("Debug log", post_ev), + }; +@@ -1875,9 +1928,9 @@ static const struct snd_soc_dapm_route intercon[] = { + { "AIF1DAC2L", NULL, "AIF1DAC Mux" }, + { "AIF1DAC2R", NULL, "AIF1DAC Mux" }, + +- { "AIF1DAC Mux", "AIF1DACDAT", "AIF1DACDAT" }, ++ { "AIF1DAC Mux", "AIF1DACDAT", "AIF1 Loopback" }, + { "AIF1DAC Mux", "AIF3DACDAT", "AIF3DACDAT" }, +- { "AIF2DAC Mux", "AIF2DACDAT", "AIF2DACDAT" }, ++ { "AIF2DAC Mux", "AIF2DACDAT", "AIF2 Loopback" }, + { "AIF2DAC Mux", "AIF3DACDAT", "AIF3DACDAT" }, + { "AIF2ADC Mux", "AIF2ADCDAT", "AIF2ADCL" }, + { "AIF2ADC Mux", "AIF2ADCDAT", "AIF2ADCR" }, +@@ -1928,6 +1981,12 @@ static const struct snd_soc_dapm_route intercon[] = { + { "AIF3ADCDAT", "AIF2DACDAT", "AIF2DACL" }, + { "AIF3ADCDAT", "AIF2DACDAT", "AIF2DACR" }, + ++ /* Loopback */ ++ { "AIF1 Loopback", "ADCDAT", "AIF1ADCDAT" }, ++ { "AIF1 Loopback", "None", "AIF1DACDAT" }, ++ { "AIF2 Loopback", "ADCDAT", "AIF2ADCDAT" }, ++ { "AIF2 Loopback", "None", "AIF2DACDAT" }, ++ + /* Sidetone */ + { "Left Sidetone", "ADC/DMIC1", "ADCL Mux" }, + { "Left Sidetone", "DMIC2", "DMIC2L" }, +@@ -2010,15 +2069,16 @@ struct fll_div { + u16 outdiv; + u16 n; + u16 k; ++ u16 lambda; + u16 clk_ref_div; + u16 fll_fratio; + }; + +-static int wm8994_get_fll_config(struct fll_div *fll, ++static int wm8994_get_fll_config(struct wm8994 *control, struct fll_div *fll, + int freq_in, int freq_out) + { + u64 Kpart; +- unsigned int K, Ndiv, Nmod; ++ unsigned int K, Ndiv, Nmod, gcd_fll; + + pr_debug("FLL input=%dHz, output=%dHz\n", freq_in, freq_out); + +@@ -2067,20 +2127,32 @@ static int wm8994_get_fll_config(struct fll_div *fll, + Nmod = freq_out % freq_in; + pr_debug("Nmod=%d\n", Nmod); + +- /* Calculate fractional part - scale up so we can round. */ +- Kpart = FIXED_FLL_SIZE * (long long)Nmod; ++ switch (control->type) { ++ case WM8994: ++ /* Calculate fractional part - scale up so we can round. */ ++ Kpart = FIXED_FLL_SIZE * (long long)Nmod; ++ ++ do_div(Kpart, freq_in); ++ ++ K = Kpart & 0xFFFFFFFF; + +- do_div(Kpart, freq_in); ++ if ((K % 10) >= 5) ++ K += 5; + +- K = Kpart & 0xFFFFFFFF; ++ /* Move down to proper range now rounding is done */ ++ fll->k = K / 10; ++ fll->lambda = 0; + +- if ((K % 10) >= 5) +- K += 5; ++ pr_debug("N=%x K=%x\n", fll->n, fll->k); ++ break; + +- /* Move down to proper range now rounding is done */ +- fll->k = K / 10; ++ default: ++ gcd_fll = gcd(freq_out, freq_in); + +- pr_debug("N=%x K=%x\n", fll->n, fll->k); ++ fll->k = (freq_out - (freq_in * fll->n)) / gcd_fll; ++ fll->lambda = freq_in / gcd_fll; ++ ++ } + + return 0; + } +@@ -2144,9 +2216,9 @@ static int _wm8994_set_fll(struct snd_soc_codec *codec, int id, int src, + * analysis bugs spewing warnings. + */ + if (freq_out) +- ret = wm8994_get_fll_config(&fll, freq_in, freq_out); ++ ret = wm8994_get_fll_config(control, &fll, freq_in, freq_out); + else +- ret = wm8994_get_fll_config(&fll, wm8994->fll[id].in, ++ ret = wm8994_get_fll_config(control, &fll, wm8994->fll[id].in, + wm8994->fll[id].out); + if (ret < 0) + return ret; +@@ -2191,6 +2263,17 @@ static int _wm8994_set_fll(struct snd_soc_codec *codec, int id, int src, + WM8994_FLL1_N_MASK, + fll.n << WM8994_FLL1_N_SHIFT); + ++ if (fll.lambda) { ++ snd_soc_update_bits(codec, WM8958_FLL1_EFS_1 + reg_offset, ++ WM8958_FLL1_LAMBDA_MASK, ++ fll.lambda); ++ snd_soc_update_bits(codec, WM8958_FLL1_EFS_2 + reg_offset, ++ WM8958_FLL1_EFS_ENA, WM8958_FLL1_EFS_ENA); ++ } else { ++ snd_soc_update_bits(codec, WM8958_FLL1_EFS_2 + reg_offset, ++ WM8958_FLL1_EFS_ENA, 0); ++ } ++ + snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_5 + reg_offset, + WM8994_FLL1_FRC_NCO | WM8958_FLL1_BYP | + WM8994_FLL1_REFCLK_DIV_MASK | +@@ -2271,7 +2354,8 @@ out: + * If SYSCLK will be less than 50kHz adjust AIFnCLK dividers + * for detection. + */ +- if (max(wm8994->aifclk[0], wm8994->aifclk[1]) < 50000) { ++ if (max(wm8994->aifclk[0], wm8994->aifclk[1]) < 50000 && ++ !wm8994->aifdiv[0]) { + dev_dbg(codec->dev, "Configuring AIFs for 128fs\n"); + + wm8994->aifdiv[0] = snd_soc_read(codec, WM8994_AIF1_RATE) +@@ -2555,17 +2639,24 @@ static int wm8994_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) + struct wm8994 *control = wm8994->wm8994; + int ms_reg; + int aif1_reg; ++ int dac_reg; ++ int adc_reg; + int ms = 0; + int aif1 = 0; ++ int lrclk = 0; + + switch (dai->id) { + case 1: + ms_reg = WM8994_AIF1_MASTER_SLAVE; + aif1_reg = WM8994_AIF1_CONTROL_1; ++ dac_reg = WM8994_AIF1DAC_LRCLK; ++ adc_reg = WM8994_AIF1ADC_LRCLK; + break; + case 2: + ms_reg = WM8994_AIF2_MASTER_SLAVE; + aif1_reg = WM8994_AIF2_CONTROL_1; ++ dac_reg = WM8994_AIF1DAC_LRCLK; ++ adc_reg = WM8994_AIF1ADC_LRCLK; + break; + default: + return -EINVAL; +@@ -2584,6 +2675,7 @@ static int wm8994_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_DSP_B: + aif1 |= WM8994_AIF1_LRCLK_INV; ++ lrclk |= WM8958_AIF1_LRCLK_INV; + case SND_SOC_DAIFMT_DSP_A: + aif1 |= 0x18; + break; +@@ -2622,12 +2714,14 @@ static int wm8994_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) + break; + case SND_SOC_DAIFMT_IB_IF: + aif1 |= WM8994_AIF1_BCLK_INV | WM8994_AIF1_LRCLK_INV; ++ lrclk |= WM8958_AIF1_LRCLK_INV; + break; + case SND_SOC_DAIFMT_IB_NF: + aif1 |= WM8994_AIF1_BCLK_INV; + break; + case SND_SOC_DAIFMT_NB_IF: + aif1 |= WM8994_AIF1_LRCLK_INV; ++ lrclk |= WM8958_AIF1_LRCLK_INV; + break; + default: + return -EINVAL; +@@ -2658,6 +2752,10 @@ static int wm8994_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) + aif1); + snd_soc_update_bits(codec, ms_reg, WM8994_AIF1_MSTR, + ms); ++ snd_soc_update_bits(codec, dac_reg, ++ WM8958_AIF1_LRCLK_INV, lrclk); ++ snd_soc_update_bits(codec, adc_reg, ++ WM8958_AIF1_LRCLK_INV, lrclk); + + return 0; + } +@@ -2706,9 +2804,40 @@ static int wm8994_hw_params(struct snd_pcm_substream *substream, + int lrclk = 0; + int rate_val = 0; + int id = dai->id - 1; ++ struct snd_pcm_hw_params hw_params; + + int i, cur_val, best_val, bclk_rate, best; + ++ if (params) ++ memcpy(&hw_params, params, sizeof(*params)); ++ else ++ return -EINVAL; ++ ++ /* If custom params are there, override to custom params */ ++ if (pdata->custom_cfg) { ++ ++ dev_dbg(codec->dev, "%s: Overriding to custom params....\n", ++ __func__); ++ ++ snd_mask_none(hw_param_mask(&hw_params, ++ SNDRV_PCM_HW_PARAM_FORMAT)); ++ snd_mask_set(hw_param_mask(&hw_params, ++ SNDRV_PCM_HW_PARAM_FORMAT), ++ pdata->custom_cfg->format); ++ ++ hw_param_interval(&hw_params, SNDRV_PCM_HW_PARAM_RATE)->min = ++ pdata->custom_cfg->rate; ++ hw_param_interval(&hw_params, SNDRV_PCM_HW_PARAM_RATE)->max = ++ pdata->custom_cfg->rate; ++ ++ hw_param_interval(&hw_params, ++ SNDRV_PCM_HW_PARAM_CHANNELS)->min = ++ pdata->custom_cfg->channels; ++ hw_param_interval(&hw_params, ++ SNDRV_PCM_HW_PARAM_CHANNELS)->max = ++ pdata->custom_cfg->channels; ++ } ++ + switch (dai->id) { + case 1: + aif1_reg = WM8994_AIF1_CONTROL_1; +@@ -2740,8 +2869,9 @@ static int wm8994_hw_params(struct snd_pcm_substream *substream, + return -EINVAL; + } + +- bclk_rate = params_rate(params); +- switch (params_format(params)) { ++ bclk_rate = params_rate(&hw_params); ++ ++ switch (params_format(&hw_params)) { + case SNDRV_PCM_FORMAT_S16_LE: + bclk_rate *= 16; + break; +@@ -2761,7 +2891,7 @@ static int wm8994_hw_params(struct snd_pcm_substream *substream, + return -EINVAL; + } + +- wm8994->channels[id] = params_channels(params); ++ wm8994->channels[id] = params_channels(&hw_params); + if (pdata->max_channels_clocked[id] && + wm8994->channels[id] > pdata->max_channels_clocked[id]) { + dev_dbg(dai->dev, "Constraining channels to %d from %d\n", +@@ -2781,7 +2911,7 @@ static int wm8994_hw_params(struct snd_pcm_substream *substream, + + /* Try to find an appropriate sample rate; look for an exact match. */ + for (i = 0; i < ARRAY_SIZE(srs); i++) +- if (srs[i].rate == params_rate(params)) ++ if (srs[i].rate == params_rate(&hw_params)) + break; + if (i == ARRAY_SIZE(srs)) + return -EINVAL; +@@ -2802,10 +2932,10 @@ static int wm8994_hw_params(struct snd_pcm_substream *substream, + + /* AIFCLK/fs ratio; look for a close match in either direction */ + best = 0; +- best_val = abs((fs_ratios[0] * params_rate(params)) ++ best_val = abs((fs_ratios[0] * params_rate(&hw_params)) + - wm8994->aifclk[id]); + for (i = 1; i < ARRAY_SIZE(fs_ratios); i++) { +- cur_val = abs((fs_ratios[i] * params_rate(params)) ++ cur_val = abs((fs_ratios[i] * params_rate(&hw_params)) + - wm8994->aifclk[id]); + if (cur_val >= best_val) + continue; +@@ -2833,7 +2963,7 @@ static int wm8994_hw_params(struct snd_pcm_substream *substream, + bclk_divs[best], bclk_rate); + bclk |= best << WM8994_AIF1_BCLK_DIV_SHIFT; + +- lrclk = bclk_rate / params_rate(params); ++ lrclk = bclk_rate / params_rate(&hw_params); + if (!lrclk) { + dev_err(dai->dev, "Unable to generate LRCLK from %dHz BCLK\n", + bclk_rate); +@@ -2853,12 +2983,12 @@ static int wm8994_hw_params(struct snd_pcm_substream *substream, + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + switch (dai->id) { + case 1: +- wm8994->dac_rates[0] = params_rate(params); ++ wm8994->dac_rates[0] = params_rate(&hw_params); + wm8994_set_retune_mobile(codec, 0); + wm8994_set_retune_mobile(codec, 1); + break; + case 2: +- wm8994->dac_rates[1] = params_rate(params); ++ wm8994->dac_rates[1] = params_rate(&hw_params); + wm8994_set_retune_mobile(codec, 2); + break; + } +@@ -2911,6 +3041,13 @@ static int wm8994_aif3_hw_params(struct snd_pcm_substream *substream, + return snd_soc_update_bits(codec, aif1_reg, WM8994_AIF1_WL_MASK, aif1); + } + ++#if IS_ENABLED(CONFIG_SND_MRFLD_MACHINE) || \ ++ IS_ENABLED(CONFIG_SND_MOOR_MACHINE) ++static int wm8994_aif_mute(struct snd_soc_dai *codec_dai, int mute) ++{ ++ return 0; ++} ++#else + static int wm8994_aif_mute(struct snd_soc_dai *codec_dai, int mute) + { + struct snd_soc_codec *codec = codec_dai->codec; +@@ -2937,6 +3074,7 @@ static int wm8994_aif_mute(struct snd_soc_dai *codec_dai, int mute) + + return 0; + } ++#endif + + static int wm8994_set_tristate(struct snd_soc_dai *codec_dai, int tristate) + { +@@ -2964,6 +3102,25 @@ static int wm8994_set_tristate(struct snd_soc_dai *codec_dai, int tristate) + return snd_soc_update_bits(codec, reg, mask, val); + } + ++static int wm8994_set_tdm_slots(struct snd_soc_dai *dai, ++ unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) ++{ ++ struct snd_soc_codec *codec = dai->codec; ++ struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); ++ struct wm8994 *control = wm8994->wm8994; ++ ++ switch (control->type) { ++ case WM8958: ++ wm8994->slots = slots; ++ break; ++ default: ++ pr_err("we dont support tdm for non 8958!"); ++ return -EINVAL; ++ break; ++ } ++ return 0; ++} ++ + static int wm8994_aif2_probe(struct snd_soc_dai *dai) + { + struct snd_soc_codec *codec = dai->codec; +@@ -2991,6 +3148,7 @@ static const struct snd_soc_dai_ops wm8994_aif1_dai_ops = { + .digital_mute = wm8994_aif_mute, + .set_pll = wm8994_set_fll, + .set_tristate = wm8994_set_tristate, ++ .set_tdm_slot = wm8994_set_tdm_slots, + }; + + static const struct snd_soc_dai_ops wm8994_aif2_dai_ops = { +@@ -3096,24 +3254,7 @@ static int wm8994_codec_suspend(struct snd_soc_codec *codec) + static int wm8994_codec_resume(struct snd_soc_codec *codec) + { + struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); +- struct wm8994 *control = wm8994->wm8994; + int i, ret; +- unsigned int val, mask; +- +- if (control->revision < 4) { +- /* force a HW read */ +- ret = regmap_read(control->regmap, +- WM8994_POWER_MANAGEMENT_5, &val); +- +- /* modify the cache only */ +- codec->cache_only = 1; +- mask = WM8994_DAC1R_ENA | WM8994_DAC1L_ENA | +- WM8994_DAC2R_ENA | WM8994_DAC2L_ENA; +- val &= mask; +- snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5, +- mask, val); +- codec->cache_only = 0; +- } + + for (i = 0; i < ARRAY_SIZE(wm8994->fll); i++) { + if (!wm8994->fll_suspend[i].out) +@@ -3495,6 +3636,32 @@ static void wm8958_button_det(struct snd_soc_codec *codec, u16 status) + wm8994->btn_mask); + } + ++static void wm8958_open_circuit_work(struct work_struct *work) ++{ ++ struct wm8994_priv *wm8994 = container_of(work, ++ struct wm8994_priv, ++ open_circuit_work.work); ++ struct device *dev = wm8994->wm8994->dev; ++ ++ wm1811_micd_stop(wm8994->hubs.codec); ++ ++ mutex_lock(&wm8994->accdet_lock); ++ ++ dev_dbg(dev, "Reporting open circuit\n"); ++ ++ wm8994->jack_mic = false; ++ wm8994->mic_detecting = true; ++ wm8994->headphone_detected = false; ++ ++ wm8958_micd_set_rate(wm8994->hubs.codec); ++ ++ snd_soc_jack_report(wm8994->micdet[0].jack, 0, ++ wm8994->btn_mask | ++ SND_JACK_HEADSET); ++ ++ mutex_unlock(&wm8994->accdet_lock); ++} ++ + static void wm8958_mic_id(void *data, u16 status) + { + struct snd_soc_codec *codec = data; +@@ -3504,16 +3671,9 @@ static void wm8958_mic_id(void *data, u16 status) + if (!(status & WM8958_MICD_STS)) { + /* If nothing present then clear our statuses */ + dev_dbg(codec->dev, "Detected open circuit\n"); +- wm8994->jack_mic = false; +- wm8994->mic_detecting = true; +- +- wm1811_micd_stop(codec); + +- wm8958_micd_set_rate(codec); +- +- snd_soc_jack_report(wm8994->micdet[0].jack, 0, +- wm8994->btn_mask | +- SND_JACK_HEADSET); ++ schedule_delayed_work(&wm8994->open_circuit_work, ++ msecs_to_jiffies(2500)); + return; + } + +@@ -3568,10 +3728,8 @@ static void wm1811_mic_work(struct work_struct *work) + + dev_dbg(codec->dev, "Starting mic detection\n"); + +- /* Use a user-supplied callback if we have one */ +- if (wm8994->micd_cb) { +- wm8994->micd_cb(wm8994->micd_cb_data); +- } else { ++ /* If there's a callback it'll be called out of the lock */ ++ if (!wm8994->micd_cb) { + /* + * Start off measument of microphone impedence to find out + * what's actually there. +@@ -3585,6 +3743,10 @@ static void wm1811_mic_work(struct work_struct *work) + + mutex_unlock(&wm8994->accdet_lock); + ++ /* Custom callbacks may reasonably wish to take the same locks */ ++ if (wm8994->micd_cb) ++ wm8994->micd_cb(wm8994->micd_cb_data); ++ + pm_runtime_put(codec->dev); + } + +@@ -3596,8 +3758,12 @@ static irqreturn_t wm1811_jackdet_irq(int irq, void *data) + int reg, delay; + bool present; + ++ cancel_delayed_work_sync(&wm8994->mic_work); ++ + pm_runtime_get_sync(codec->dev); + ++ cancel_delayed_work_sync(&wm8994->mic_complete_work); ++ + mutex_lock(&wm8994->accdet_lock); + + reg = snd_soc_read(codec, WM1811_JACKDET_CTRL); +@@ -3630,8 +3796,6 @@ static irqreturn_t wm1811_jackdet_irq(int irq, void *data) + } else { + dev_dbg(codec->dev, "Jack not detected\n"); + +- cancel_delayed_work_sync(&wm8994->mic_work); +- + snd_soc_update_bits(codec, WM8958_MICBIAS2, + WM8958_MICB2_DISCH, WM8958_MICB2_DISCH); + +@@ -3720,6 +3884,7 @@ int wm8958_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, + } else { + wm8994->mic_detecting = true; + wm8994->jack_mic = false; ++ wm8994->headphone_detected = false; + } + + if (id_cb) { +@@ -3780,11 +3945,70 @@ int wm8958_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, + } + EXPORT_SYMBOL_GPL(wm8958_mic_detect); + ++int wm8958_micd_set_custom_rate(struct snd_soc_codec *codec, ++ wm8958_micd_set_custom_rate_cb micd_custom_rate_cb, ++ void *micd_custom_rate_cb_data) ++{ ++ struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); ++ ++ if (micd_custom_rate_cb) { ++ wm8994->micd_custom_rate_cb = micd_custom_rate_cb; ++ wm8994->micd_custom_rate_cb_data = micd_custom_rate_cb_data; ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(wm8958_micd_set_custom_rate); ++ ++static void wm8958_mic_work(struct work_struct *work) ++{ ++ struct wm8994_priv *wm8994 = container_of(work, ++ struct wm8994_priv, ++ mic_complete_work.work); ++ struct snd_soc_codec *codec = wm8994->hubs.codec; ++ ++ dev_crit(codec->dev, "MIC WORK %x\n", wm8994->mic_status); ++ ++ pm_runtime_get_sync(codec->dev); ++ ++ mutex_lock(&wm8994->accdet_lock); ++ ++ wm8994->mic_id_cb(wm8994->mic_id_cb_data, wm8994->mic_status); ++ ++ mutex_unlock(&wm8994->accdet_lock); ++ ++ pm_runtime_put(codec->dev); ++ ++ dev_crit(codec->dev, "MIC WORK %x DONE\n", wm8994->mic_status); ++} ++ ++static void wm8958_micd_set_custom_rate_work(struct work_struct *work) ++{ ++ struct wm8994_priv *wm8994 = container_of(work, ++ struct wm8994_priv, ++ micd_set_custom_rate_work.work); ++ struct snd_soc_codec *codec = wm8994->hubs.codec; ++ ++ dev_dbg(codec->dev, "%s: Set custom rates\n", __func__); ++ ++ pm_runtime_get_sync(codec->dev); ++ ++ mutex_lock(&wm8994->accdet_lock); ++ ++ wm8994->micd_custom_rate_cb(wm8994->micd_custom_rate_cb_data); ++ ++ mutex_unlock(&wm8994->accdet_lock); ++ ++ pm_runtime_put(codec->dev); ++ ++} ++ + static irqreturn_t wm8958_mic_irq(int irq, void *data) + { + struct wm8994_priv *wm8994 = data; + struct snd_soc_codec *codec = wm8994->hubs.codec; +- int reg, count, ret; ++ struct wm8994 *control = wm8994->wm8994; ++ int reg, count, ret, id_delay; + + /* + * Jack detection may have detected a removal simulataneously +@@ -3794,6 +4018,9 @@ static irqreturn_t wm8958_mic_irq(int irq, void *data) + if (!(snd_soc_read(codec, WM8958_MIC_DETECT_1) & WM8958_MICD_ENA)) + return IRQ_HANDLED; + ++ cancel_delayed_work_sync(&wm8994->mic_complete_work); ++ cancel_delayed_work_sync(&wm8994->open_circuit_work); ++ + pm_runtime_get_sync(codec->dev); + + /* We may occasionally read a detection without an impedence +@@ -3842,14 +4069,30 @@ static irqreturn_t wm8958_mic_irq(int irq, void *data) + snd_soc_jack_report(wm8994->micdet[0].jack, 0, + SND_JACK_MECHANICAL | SND_JACK_HEADSET | + wm8994->btn_mask); ++ wm8994->jack_mic = false; ++ wm8994->headphone_detected = false; + wm8994->mic_detecting = true; + goto out; + } + +- if (wm8994->mic_detecting) +- wm8994->mic_id_cb(wm8994->mic_id_cb_data, reg); +- else ++ wm8994->mic_status = reg; ++ id_delay = wm8994->wm8994->pdata.mic_id_delay; ++ ++ if (wm8994->mic_detecting) { ++ if (control->type == WM8958) { ++ /* Set mic-bias high during detection phase (micb_en_delay) */ ++ /* 0 == Continuous */ ++ dev_dbg(codec->dev, "Set MICBIAS High, for micb_en_delay time\n"); ++ snd_soc_update_bits(codec, WM8958_MIC_DETECT_1, ++ WM8958_MICD_BIAS_STARTTIME_MASK | ++ WM8958_MICD_RATE_MASK, 0); ++ } ++ ++ schedule_delayed_work(&wm8994->mic_complete_work, ++ msecs_to_jiffies(id_delay)); ++ } else { + wm8958_button_det(codec, reg); ++ } + + out: + pm_runtime_put(codec->dev); +@@ -3888,6 +4131,7 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) + struct wm8994 *control = dev_get_drvdata(codec->dev->parent); + struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); + struct snd_soc_dapm_context *dapm = &codec->dapm; ++ unsigned int dcs_done_irq; + unsigned int reg; + int ret, i; + +@@ -3899,6 +4143,8 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) + mutex_init(&wm8994->accdet_lock); + INIT_DELAYED_WORK(&wm8994->jackdet_bootstrap, + wm1811_jackdet_bootstrap); ++ INIT_DELAYED_WORK(&wm8994->open_circuit_work, ++ wm8958_open_circuit_work); + + switch (control->type) { + case WM8994: +@@ -3907,10 +4153,16 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) + case WM1811: + INIT_DELAYED_WORK(&wm8994->mic_work, wm1811_mic_work); + break; ++ case WM8958: ++ INIT_DELAYED_WORK(&wm8994->micd_set_custom_rate_work, ++ wm8958_micd_set_custom_rate_work); ++ break; + default: + break; + } + ++ INIT_DELAYED_WORK(&wm8994->mic_complete_work, wm8958_mic_work); ++ + for (i = 0; i < ARRAY_SIZE(wm8994->fll_locked); i++) + init_completion(&wm8994->fll_locked[i]); + +@@ -3983,6 +4235,9 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) + wm8994_request_irq(wm8994->wm8994, WM8994_IRQ_TEMP_SHUT, + wm8994_temp_shut, "Thermal shutdown", codec); + ++ dcs_done_irq = regmap_irq_get_virq(wm8994->wm8994->irq_data, ++ WM8994_IRQ_DCS_DONE); ++ irq_set_status_flags(dcs_done_irq, IRQ_NOAUTOEN); + ret = wm8994_request_irq(wm8994->wm8994, WM8994_IRQ_DCS_DONE, + wm_hubs_dcs_done, "DC servo done", + &wm8994->hubs); +@@ -4089,7 +4344,6 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) + } + if ((reg & WM8994_GPN_FN_MASK) != WM8994_GP_FN_PIN_SPECIFIC) { + wm8994->lrclk_shared[0] = 1; +- wm8994_dai[0].symmetric_rates = 1; + } else { + wm8994->lrclk_shared[0] = 0; + } +@@ -4219,6 +4473,7 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) + } + + wm_hubs_add_analogue_routes(codec, 0, 0); ++ enable_irq(dcs_done_irq); + snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon)); + + switch (control->type) { +@@ -4261,6 +4516,11 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) + break; + } + ++ /* Make sure FIFO errors are masked */ ++ snd_soc_update_bits(codec, WM8994_INTERRUPT_STATUS_2_MASK, ++ WM8994_IM_FIFOS_ERR_EINT_MASK, ++ 1 << WM8994_IM_FIFOS_ERR_EINT_SHIFT); ++ + return 0; + + err_irq: +@@ -4365,6 +4625,11 @@ static int wm8994_remove(struct platform_device *pdev) + static int wm8994_suspend(struct device *dev) + { + struct wm8994_priv *wm8994 = dev_get_drvdata(dev); ++ struct wm8994 *control = wm8994->wm8994; ++ struct snd_soc_codec *codec = wm8994->hubs.codec; ++ unsigned int reg; ++ int ret; ++ + + /* Drop down to power saving mode when system is suspended */ + if (wm8994->jackdet && !wm8994->active_refcount) +@@ -4372,18 +4637,62 @@ static int wm8994_suspend(struct device *dev) + WM1811_JACKDET_MODE_MASK, + wm8994->jackdet_mode); + ++ /* Disable the MIC Detection when suspended */ ++ if ((control->type == WM8958) && wm8994->mic_id_cb) { ++ ++ reg = snd_soc_read(codec, WM8958_MIC_DETECT_3); ++ ++ dev_dbg(codec->dev, "%s: WM8958_MIC_DETECT_3 0x%x\n", __func__, reg); ++ dev_dbg(codec->dev, "mic_detect %d jack_mic %d headphone %d\n", ++ wm8994->mic_detecting, wm8994->jack_mic, ++ wm8994->headphone_detected); ++ ++ if (!(wm8994->jack_mic) && !(wm8994->headphone_detected)) { ++ ++ dev_dbg(codec->dev, "Jack not connected..Mask interrupt\n"); ++ snd_soc_write(codec, WM8994_INTERRUPT_CONTROL, 0x01); ++ ++ ret = regcache_sync_region(wm8994->wm8994->regmap, ++ WM8994_INTERRUPT_CONTROL, ++ WM8994_INTERRUPT_CONTROL); ++ if (ret != 0) ++ dev_err(dev, "Failed to sync register: %d\n", ret); ++ synchronize_irq(control->irq); ++ ++ dev_dbg(codec->dev, "Disable MIC Detection!!!\n"); ++ snd_soc_update_bits(codec, WM8958_MIC_DETECT_1, ++ WM8958_MICD_ENA, 0); ++ ++ snd_soc_dapm_disable_pin(&codec->dapm, "CLK_SYS"); ++ snd_soc_dapm_sync(&codec->dapm); ++ } ++ } ++ + return 0; + } + + static int wm8994_resume(struct device *dev) + { + struct wm8994_priv *wm8994 = dev_get_drvdata(dev); ++ struct wm8994 *control = wm8994->wm8994; ++ struct snd_soc_codec *codec = wm8994->hubs.codec; + + if (wm8994->jackdet && wm8994->jackdet_mode) + regmap_update_bits(wm8994->wm8994->regmap, WM8994_ANTIPOP_2, + WM1811_JACKDET_MODE_MASK, + WM1811_JACKDET_MODE_AUDIO); + ++ /* Enable the MIC Detection when resumed */ ++ if ((control->type == WM8958) && wm8994->mic_id_cb) { ++ dev_dbg(codec->dev, "Enable MIC Detection!!!\n"); ++ snd_soc_dapm_force_enable_pin(&codec->dapm, "CLK_SYS"); ++ snd_soc_dapm_sync(&codec->dapm); ++ ++ snd_soc_update_bits(codec, WM8958_MIC_DETECT_1, ++ WM8958_MICD_ENA, WM8958_MICD_ENA); ++ snd_soc_write(codec, WM8994_INTERRUPT_CONTROL, 0x00); ++ } ++ + return 0; + } + #endif +diff --git a/sound/soc/codecs/wm8994.h b/sound/soc/codecs/wm8994.h +index 55ddf4d..0a834df 100644 +--- a/sound/soc/codecs/wm8994.h ++++ b/sound/soc/codecs/wm8994.h +@@ -41,6 +41,7 @@ enum wm8994_vmid_mode { + + typedef void (*wm1811_micdet_cb)(void *data); + typedef void (*wm1811_mic_id_cb)(void *data, u16 status); ++typedef void (*wm8958_micd_set_custom_rate_cb)(struct snd_soc_codec *codec); + + int wm8994_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, + int micbias); +@@ -55,6 +56,10 @@ int wm8958_aif_ev(struct snd_soc_dapm_widget *w, + + void wm8958_dsp2_init(struct snd_soc_codec *codec); + ++int wm8958_micd_set_custom_rate(struct snd_soc_codec *codec, ++ wm8958_micd_set_custom_rate_cb micd_custom_rate_cb, ++ void *micd_custom_rate_cb_data); ++ + struct wm8994_micdet { + struct snd_soc_jack *jack; + bool detecting; +@@ -86,6 +91,7 @@ struct wm8994_priv { + bool fll_locked_irq; + bool fll_byp; + bool clk_has_run; ++ int slots; + + int vmid_refcount; + int active_refcount; +@@ -134,8 +140,14 @@ struct wm8994_priv { + struct mutex accdet_lock; + struct wm8994_micdet micdet[2]; + struct delayed_work mic_work; ++ struct delayed_work open_circuit_work; ++ struct delayed_work mic_complete_work; ++ struct delayed_work micd_set_custom_rate_work; ++ ++ u16 mic_status; + bool mic_detecting; + bool jack_mic; ++ bool headphone_detected; + int btn_mask; + bool jackdet; + int jackdet_mode; +@@ -146,6 +158,8 @@ struct wm8994_priv { + void *micd_cb_data; + wm1811_mic_id_cb mic_id_cb; + void *mic_id_cb_data; ++ wm8958_micd_set_custom_rate_cb micd_custom_rate_cb; ++ void *micd_custom_rate_cb_data; + + unsigned int aif1clk_enable:1; + unsigned int aif2clk_enable:1; +diff --git a/sound/soc/codecs/wm_hubs.c b/sound/soc/codecs/wm_hubs.c +index f5d81b9..2874ec9 100644 +--- a/sound/soc/codecs/wm_hubs.c ++++ b/sound/soc/codecs/wm_hubs.c +@@ -530,6 +530,7 @@ static int hp_supply_event(struct snd_soc_dapm_widget *w, + hubs->hp_startup_mode); + break; + } ++ break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1, +@@ -1222,11 +1223,6 @@ int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec, + WM8993_LINEOUT2_MODE, + WM8993_LINEOUT2_MODE); + +- if (!lineout1_diff && !lineout2_diff) +- snd_soc_update_bits(codec, WM8993_ANTIPOP1, +- WM8993_LINEOUT_VMID_BUF_ENA, +- WM8993_LINEOUT_VMID_BUF_ENA); +- + if (lineout1fb) + snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL, + WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB); +@@ -1252,6 +1248,13 @@ void wm_hubs_vmid_ena(struct snd_soc_codec *codec) + struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); + int val = 0; + ++ if ((hubs->lineout1_se && hubs->lineout2_se) && ++ (hubs->lineout1n_ena || hubs->lineout1p_ena || ++ hubs->lineout2n_ena || hubs->lineout2p_ena)) ++ snd_soc_update_bits(codec, WM8993_ANTIPOP1, ++ WM8993_LINEOUT_VMID_BUF_ENA, ++ WM8993_LINEOUT_VMID_BUF_ENA); ++ + if (hubs->lineout1_se) + val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA; + +@@ -1281,6 +1284,13 @@ void wm_hubs_set_bias_level(struct snd_soc_codec *codec, + val = 0; + mask = 0; + ++ if ((hubs->lineout1_se && hubs->lineout2_se) && ++ (hubs->lineout1n_ena || hubs->lineout1p_ena || ++ hubs->lineout2n_ena || hubs->lineout2p_ena)) ++ snd_soc_update_bits(codec, WM8993_ANTIPOP1, ++ WM8993_LINEOUT_VMID_BUF_ENA, ++ WM8993_LINEOUT_VMID_BUF_ENA); ++ + if (hubs->lineout1_se) + mask |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA; + +diff --git a/sound/soc/intel/Kconfig b/sound/soc/intel/Kconfig +new file mode 100644 +index 0000000..b6efaac +--- /dev/null ++++ b/sound/soc/intel/Kconfig +@@ -0,0 +1,58 @@ ++config SND_MFLD_MACHINE ++ tristate "SOC Machine Audio driver for Intel Medfield MID platform" ++ depends on INTEL_SCU_IPC && INTEL_SCU_IPC_UTIL && X86 && GPIO_LANGWELL ++ depends on MSIC_GPADC ++ select SND_SOC_SN95031 ++ select SND_SST_PLATFORM ++ select SND_SST_MACHINE ++ select SND_INTEL_SST ++ default n ++ help ++ This adds support for ASoC machine driver for Intel(R) MID Medfield platform ++ used as alsa device in audio subsystem in Intel(R) MID devices ++ Say Y if you have such a device ++ If unsure select "N". ++ ++config SND_MRFLD_MACHINE ++ tristate "SOC Machine Audio driver for Intel Merrifield MID platform" ++ depends on INTEL_SCU_IPC && X86 ++ select SND_SOC_LM49453 ++ select SND_SOC_WM8994 ++ select MFD_CORE ++ select MFD_WM8994 ++ select REGULATOR_WM8994 ++ select SND_SST_PLATFORM ++ select SND_SST_MACHINE ++ select SND_INTEL_SST ++ select SND_EFFECTS_OFFLOAD ++ default n ++ help ++ This adds support for ASoC machine driver for Intel(R) MID Merrifield platform ++ used as alsa device in audio substem in Intel(R) MID devices ++ Say Y if you have such a device ++ If unsure select "N". ++ ++config SND_INTEL_SST ++ tristate ++ ++config SND_SST_PLATFORM ++ tristate ++ ++config SND_SOC_COMMS_SSP ++ depends on SND_INTEL_MID_I2S ++ tristate "Use ASOC framework to drive AudioComms SSP BT and Modem" ++ help ++ Sound SOC cards usually used for BT VOIP and MODEM MIXING use cases. ++ This will add devices for these uses cases in the list of alsa cards. ++ Say Y if you need these sound cards (BT chipset or Modem present). ++ Requires to enable the INTEL_MID_I2S low level SSP I2S driver. ++ ++config SST_MRFLD_DPCM ++ bool "Use DPCM based Merrifield Machine Audio driver" ++ default n ++ help ++ This adds an option to enable the DPCM based MRFLD machine driver ++ ++config SND_SST_MACHINE ++ tristate ++ +diff --git a/sound/soc/intel/Makefile b/sound/soc/intel/Makefile +new file mode 100644 +index 0000000..02d5120 +--- /dev/null ++++ b/sound/soc/intel/Makefile +@@ -0,0 +1,22 @@ ++#EXTRA CFLAGS ++ccflags-y += -Werror ++ ++ifeq (${TARGET_BUILD_VARIANT},$(filter ${TARGET_BUILD_VARIANT}, eng)) ++ccflags-y += -DCONFIG_SND_VERBOSE_PRINTK -DCONFIG_SND_DEBUG -DCONFIG_SND_DEBUG_VERBOSE ++endif ++ ++# SST Platform Driver ++PLATFORM_LIBS = platform-libs/controls_v1.o platform-libs/controls_v2.o platform-libs/controls_v2_dpcm.o \ ++ platform-libs/ipc_lib_v2.o ++ ++snd-soc-sst-platform-objs := pcm.o compress.o effects.o $(PLATFORM_LIBS) ++obj-$(CONFIG_SND_SST_PLATFORM) += snd-soc-sst-platform.o ++ ++# Relevant Machine driver ++obj-$(CONFIG_SND_SST_MACHINE) += board/ ++ ++# DSP driver ++obj-$(CONFIG_SND_INTEL_SST) += sst/ ++ ++# Audio Comms ++obj-$(CONFIG_SND_SOC_COMMS_SSP) += ssp/ +diff --git a/sound/soc/intel/board/Makefile b/sound/soc/intel/board/Makefile +new file mode 100644 +index 0000000..3581ae1 +--- /dev/null ++++ b/sound/soc/intel/board/Makefile +@@ -0,0 +1,14 @@ ++#EXTRA CFLAGS ++ccflags-y += -Werror ++ ++# Merrifield board ++snd-merr-saltbay-wm8958-objs := merr_saltbay_wm8958.o ++snd-merr-dpcm-wm8958-objs := merr_dpcm_wm8958.o ++snd-merr-dpcm-dummy-objs := merr_dpcm_dummy.o ++ ++ifdef CONFIG_SST_MRFLD_DPCM ++ obj-$(CONFIG_SND_MRFLD_MACHINE) += snd-merr-dpcm-wm8958.o ++ obj-$(CONFIG_SND_MRFLD_MACHINE) += snd-merr-dpcm-dummy.o ++else ++ obj-$(CONFIG_SND_MRFLD_MACHINE) += snd-merr-saltbay-wm8958.o ++endif +diff --git a/sound/soc/intel/board/merr_dpcm_dummy.c b/sound/soc/intel/board/merr_dpcm_dummy.c +new file mode 100644 +index 0000000..3cb879c +--- /dev/null ++++ b/sound/soc/intel/board/merr_dpcm_dummy.c +@@ -0,0 +1,233 @@ ++/* ++ * ASoc Dummy DPCM Machine driver for Intel Edison MID platform ++ * ++ * Copyright (C) 2014 Intel Corp ++ * Author: Michael Soares ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static bool wm_hardware_avail = true; ++module_param(wm_hardware_avail, bool, S_IRUSR); ++MODULE_PARM_DESC(wm_hardware_avail, "1 in cmdline to use dummy version"); ++ ++#ifdef CONFIG_PM_SLEEP ++static int snd_merr_dpcm_prepare(struct device *dev) ++{ ++ pr_debug("In %s device name\n", __func__); ++ snd_soc_suspend(dev); ++ return 0; ++} ++ ++static void snd_merr_dpcm_complete(struct device *dev) ++{ ++ pr_debug("In %s\n", __func__); ++ snd_soc_resume(dev); ++ return; ++} ++ ++static int snd_merr_dpcm_poweroff(struct device *dev) ++{ ++ pr_debug("In %s\n", __func__); ++ snd_soc_poweroff(dev); ++ return 0; ++} ++#else ++#define snd_merr_dpcm_prepare NULL ++#define snd_merr_dpcm_complete NULL ++#define snd_merr_dpcm_poweroff NULL ++#endif ++ ++static unsigned int rates_48000[] = { ++ 48000, ++}; ++ ++static struct snd_pcm_hw_constraint_list constraints_48000 = { ++ .count = ARRAY_SIZE(rates_48000), ++ .list = rates_48000, ++}; ++ ++static int merr_dummy_startup(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_hw_constraint_list(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_RATE, ++ &constraints_48000); ++} ++ ++static struct snd_soc_ops merr_dummy_ops = { ++ .startup = merr_dummy_startup, ++}; ++ ++static int merr_codec_fixup(struct snd_soc_pcm_runtime *rtd, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_interval *rate = hw_param_interval(params, ++ SNDRV_PCM_HW_PARAM_RATE); ++ struct snd_interval *channels = hw_param_interval(params, ++ SNDRV_PCM_HW_PARAM_CHANNELS); ++ ++ pr_debug("Invoked %s for dailink %s\n", __func__, rtd->dai_link->name); ++ ++ /* The DSP will convert the FE rate to 48k, stereo, 24bits */ ++ rate->min = rate->max = 48000; ++ channels->min = channels->max = 2; ++ ++ /* set SSP2 to 24-bit */ ++ snd_mask_set(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT - ++ SNDRV_PCM_HW_PARAM_FIRST_MASK], ++ SNDRV_PCM_FORMAT_S24_LE); ++ return 0; ++} ++ ++struct snd_soc_dai_link merr_msic_dailink[] = { ++ [MERR_DPCM_AUDIO] = { ++ .name = "Media Audio Port", ++ .stream_name = "Edison Audio", ++ .cpu_dai_name = "Headset-cpu-dai", ++ .codec_name = "snd-soc-dummy", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .platform_name = "sst-platform", ++ .ignore_suspend = 1, ++ .dynamic = 1, ++ .ops = &merr_dummy_ops, ++ }, ++ /* back ends */ ++ { ++ .name = "SSP2-Codec", ++ .be_id = 1, ++ .cpu_dai_name = "ssp2-codec", ++ .platform_name = "sst-platform", ++ .no_pcm = 1, ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .codec_name = "snd-soc-dummy", ++ .be_hw_params_fixup = merr_codec_fixup, ++ .ignore_suspend = 1, ++ }, ++ { ++ .name = "SSP1-BT", ++ .be_id = 2, ++ .cpu_dai_name = "snd-soc-dummy-dai", ++ .platform_name = "snd-soc-dummy", ++ .no_pcm = 1, ++ .codec_name = "snd-soc-dummy", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .ignore_suspend = 1, ++ }, ++ ++}; ++ ++static const struct snd_soc_dapm_route map[] = { ++ { "Dummy Playback", NULL, "codec_out0" }, ++ { "Dummy Playback", NULL, "codec_out1" }, ++ { "codec_in0", NULL, "Dummy Capture" }, ++ { "codec_in1", NULL, "Dummy Capture" }, ++}; ++ ++/* SoC card */ ++static struct snd_soc_card snd_soc_card_merr = { ++ .name = "dummy-audio", ++ .dai_link = merr_msic_dailink, ++ .num_links = ARRAY_SIZE(merr_msic_dailink), ++ .dapm_routes = map, ++ .num_dapm_routes = ARRAY_SIZE(map), ++}; ++ ++static int snd_merr_dpcm_probe(struct platform_device *pdev) ++{ ++ int ret_val = 0; ++ pr_debug("%s enter\n", __func__); ++ ++ /* register the soc card */ ++ snd_soc_card_merr.dev = &pdev->dev; ++ ret_val = snd_soc_register_card(&snd_soc_card_merr); ++ if (ret_val) { ++ pr_err("snd_soc_register_card failed %d\n", ret_val); ++ return ret_val; ++ } ++ platform_set_drvdata(pdev, &snd_soc_card_merr); ++ pr_info("%s successful\n", __func__); ++ return ret_val; ++} ++ ++static int snd_merr_dpcm_remove(struct platform_device *pdev) ++{ ++ struct snd_soc_card *soc_card = platform_get_drvdata(pdev); ++ pr_err("snd_merr_dpcm_remove"); ++ snd_soc_unregister_card(soc_card); ++ platform_set_drvdata(pdev, NULL); ++ return 0; ++} ++ ++const struct dev_pm_ops snd_merr_dpcm_mc_pm_ops = { ++ .prepare = snd_merr_dpcm_prepare, ++ .complete = snd_merr_dpcm_complete, ++ .poweroff = snd_merr_dpcm_poweroff, ++}; ++ ++static struct platform_driver snd_merr_dpcm_drv = { ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = "merr_dpcm_dummy", ++ .pm = &snd_merr_dpcm_mc_pm_ops, ++ }, ++ .probe = snd_merr_dpcm_probe, ++ .remove = snd_merr_dpcm_remove, ++}; ++ ++static int __init snd_merr_dpcm_dummy_init(void) ++{ ++ int err; ++ struct platform_device *device; ++ ++ /* Check from cmdline if hardware is plugged to the board */ ++ if (wm_hardware_avail) { ++ pr_info("dpcm dummy is not supported according to cmdline"); ++ return -EINVAL; ++ } ++ ++ err = platform_driver_register(&snd_merr_dpcm_drv); ++ if (err < 0) ++ return err; ++ ++ device = platform_device_register_simple("merr_dpcm_dummy", ++ 0, NULL, 0); ++ if (IS_ERR(device)) ++ return -ENODEV; ++ ++ return 0; ++} ++late_initcall(snd_merr_dpcm_dummy_init); ++ ++static void __exit snd_merr_dpcm_dummy_exit(void) ++{ ++ return platform_driver_unregister(&snd_merr_dpcm_drv); ++} ++module_exit(snd_merr_dpcm_dummy_exit); ++ ++MODULE_DESCRIPTION("ASoC Intel(R) Edison dummy MID Machine driver"); ++MODULE_AUTHOR("Michael Soares "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:merr_dpcm_dummy"); ++ +diff --git a/sound/soc/intel/board/merr_dpcm_wm8958.c b/sound/soc/intel/board/merr_dpcm_wm8958.c +new file mode 100644 +index 0000000..9d3aba8 +--- /dev/null ++++ b/sound/soc/intel/board/merr_dpcm_wm8958.c +@@ -0,0 +1,932 @@ ++/* ++ * merr_dpcm_wm8958.c - ASoc DPCM Machine driver for Intel Merrfield MID platform ++ * ++ * Copyright (C) 2013 Intel Corp ++ * Author: Vinod Koul ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ */ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include "../../codecs/wm8994.h" ++ ++/* Codec PLL output clk rate */ ++#define CODEC_SYSCLK_RATE 24576000 ++/* Input clock to codec at MCLK1 PIN */ ++#define CODEC_IN_MCLK1_RATE 19200000 ++/* Input clock to codec at MCLK2 PIN */ ++#define CODEC_IN_MCLK2_RATE 32768 ++/* define to select between MCLK1 and MCLK2 input to codec as its clock */ ++#define CODEC_IN_MCLK1 1 ++#define CODEC_IN_MCLK2 2 ++ ++/* Register address for OSC Clock */ ++#define MERR_OSC_CLKOUT_CTRL0_REG_ADDR 0xFF00BC04 ++/* Size of osc clock register */ ++#define MERR_OSC_CLKOUT_CTRL0_REG_SIZE 4 ++ ++struct mrfld_8958_mc_private { ++ struct snd_soc_jack jack; ++ int jack_retry; ++ u8 pmic_id; ++ void __iomem *osc_clk0_reg; ++}; ++ ++ ++/* set_osc_clk0- enable/disables the osc clock0 ++ * addr: address of the register to write to ++ * enable: bool to enable or disable the clock ++ */ ++static inline void set_soc_osc_clk0(void __iomem *addr, bool enable) ++{ ++ u32 osc_clk_ctrl; ++ ++ osc_clk_ctrl = readl(addr); ++ if (enable) ++ osc_clk_ctrl |= BIT(31); ++ else ++ osc_clk_ctrl &= ~(BIT(31)); ++ ++ pr_debug("%s: enable:%d val 0x%x\n", __func__, enable, osc_clk_ctrl); ++ ++ writel(osc_clk_ctrl, addr); ++} ++ ++static inline struct snd_soc_codec *mrfld_8958_get_codec(struct snd_soc_card *card) ++{ ++ bool found = false; ++ struct snd_soc_codec *codec; ++ ++ list_for_each_entry(codec, &card->codec_dev_list, card_list) { ++ if (!strstr(codec->name, "wm8994-codec")) { ++ pr_debug("codec was %s", codec->name); ++ continue; ++ } else { ++ found = true; ++ break; ++ } ++ } ++ if (found == false) { ++ pr_warn("%s: cant find codec", __func__); ++ return NULL; ++ } ++ return codec; ++} ++ ++/* TODO: find better way of doing this */ ++static struct snd_soc_dai *find_codec_dai(struct snd_soc_card *card, const char *dai_name) ++{ ++ int i; ++ for (i = 0; i < card->num_rtd; i++) { ++ if (!strcmp(card->rtd[i].codec_dai->name, dai_name)) ++ return card->rtd[i].codec_dai; ++ } ++ pr_err("%s: unable to find codec dai\n", __func__); ++ /* this should never occur */ ++ WARN_ON(1); ++ return NULL; ++} ++ ++/* Function to switch the input clock for codec, When audio is in ++ * progress input clock to codec will be through MCLK1 which is 19.2MHz ++ * while in off state input clock to codec will be through 32KHz through ++ * MCLK2 ++ * card : Sound card structure ++ * src : Input clock source to codec ++ */ ++static int mrfld_8958_set_codec_clk(struct snd_soc_card *card, int src) ++{ ++ struct snd_soc_dai *aif1_dai = find_codec_dai(card, "wm8994-aif1"); ++ int ret; ++ ++ if (!aif1_dai) ++ return -ENODEV; ++ ++ switch (src) { ++ case CODEC_IN_MCLK1: ++ /* Turn ON the PLL to generate required sysclk rate ++ * from MCLK1 */ ++ ret = snd_soc_dai_set_pll(aif1_dai, ++ WM8994_FLL1, WM8994_FLL_SRC_MCLK1, ++ CODEC_IN_MCLK1_RATE, CODEC_SYSCLK_RATE); ++ if (ret < 0) { ++ pr_err("Failed to start FLL: %d\n", ret); ++ return ret; ++ } ++ /* Switch to MCLK1 input */ ++ ret = snd_soc_dai_set_sysclk(aif1_dai, WM8994_SYSCLK_FLL1, ++ CODEC_SYSCLK_RATE, SND_SOC_CLOCK_IN); ++ if (ret < 0) { ++ pr_err("Failed to set codec sysclk configuration %d\n", ++ ret); ++ return ret; ++ } ++ break; ++ case CODEC_IN_MCLK2: ++ /* Switch to MCLK2 */ ++ ret = snd_soc_dai_set_sysclk(aif1_dai, WM8994_SYSCLK_MCLK2, ++ 32768, SND_SOC_CLOCK_IN); ++ if (ret < 0) { ++ pr_err("Failed to switch to MCLK2: %d", ret); ++ return ret; ++ } ++ /* Turn off PLL for MCLK1 */ ++ ret = snd_soc_dai_set_pll(aif1_dai, WM8994_FLL1, 0, 0, 0); ++ if (ret < 0) { ++ pr_err("Failed to stop the FLL: %d", ret); ++ return ret; ++ } ++ break; ++ default: ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static int mrfld_wm8958_set_clk_fmt(struct snd_soc_dai *codec_dai) ++{ ++ unsigned int fmt; ++ int ret = 0; ++ struct snd_soc_card *card = codec_dai->card; ++ struct mrfld_8958_mc_private *ctx = snd_soc_card_get_drvdata(card); ++ ++ /* Enable the osc clock at start so that it gets settling time */ ++ set_soc_osc_clk0(ctx->osc_clk0_reg, true); ++ ++ pr_err("setting snd_soc_dai_set_tdm_slot\n"); ++ ret = snd_soc_dai_set_tdm_slot(codec_dai, 0, 0, 4, SNDRV_PCM_FORMAT_S24_LE); ++ if (ret < 0) { ++ pr_err("can't set codec pcm format %d\n", ret); ++ return ret; ++ } ++ ++ /* WM8958 slave Mode */ ++ fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF ++ | SND_SOC_DAIFMT_CBS_CFS; ++ ret = snd_soc_dai_set_fmt(codec_dai, fmt); ++ if (ret < 0) { ++ pr_err("can't set codec DAI configuration %d\n", ret); ++ return ret; ++ } ++ ++ /* FIXME: move this to SYS_CLOCK event handler when codec driver ++ * dependency is clean. ++ */ ++ /* Switch to 19.2MHz MCLK1 input clock for codec */ ++ ret = mrfld_8958_set_codec_clk(card, CODEC_IN_MCLK1); ++ ++ return ret; ++} ++ ++static int mrfld_8958_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ ++ if (!strcmp(codec_dai->name, "wm8994-aif1")) ++ return mrfld_wm8958_set_clk_fmt(codec_dai); ++ return 0; ++} ++ ++static int mrfld_wm8958_compr_set_params(struct snd_compr_stream *cstream) ++{ ++ return 0; ++} ++ ++static const struct snd_soc_pcm_stream mrfld_wm8958_dai_params = { ++ .formats = SNDRV_PCM_FMTBIT_S24_LE, ++ .rate_min = 48000, ++ .rate_max = 48000, ++ .channels_min = 2, ++ .channels_max = 2, ++}; ++ ++static int merr_codec_fixup(struct snd_soc_pcm_runtime *rtd, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_interval *rate = hw_param_interval(params, ++ SNDRV_PCM_HW_PARAM_RATE); ++ struct snd_interval *channels = hw_param_interval(params, ++ SNDRV_PCM_HW_PARAM_CHANNELS); ++ ++ pr_debug("Invoked %s for dailink %s\n", __func__, rtd->dai_link->name); ++ ++ /* The DSP will covert the FE rate to 48k, stereo, 24bits */ ++ rate->min = rate->max = 48000; ++ channels->min = channels->max = 2; ++ ++ /* set SSP2 to 24-bit */ ++ snd_mask_set(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT - ++ SNDRV_PCM_HW_PARAM_FIRST_MASK], ++ SNDRV_PCM_FORMAT_S24_LE); ++ return 0; ++} ++ ++static int mrfld_8958_set_bias_level(struct snd_soc_card *card, ++ struct snd_soc_dapm_context *dapm, ++ enum snd_soc_bias_level level) ++{ ++ struct snd_soc_dai *aif1_dai = find_codec_dai(card, "wm8994-aif1"); ++ int ret = 0; ++ ++ if (!aif1_dai) ++ return -ENODEV; ++ ++ if (dapm->dev != aif1_dai->dev) ++ return 0; ++ switch (level) { ++ case SND_SOC_BIAS_PREPARE: ++ if (card->dapm.bias_level == SND_SOC_BIAS_STANDBY) ++ ++ ret = mrfld_wm8958_set_clk_fmt(aif1_dai); ++ break; ++ default: ++ break; ++ } ++ pr_debug("%s card(%s)->bias_level %u\n", __func__, card->name, ++ card->dapm.bias_level); ++ return ret; ++} ++ ++static int mrfld_8958_set_bias_level_post(struct snd_soc_card *card, ++ struct snd_soc_dapm_context *dapm, ++ enum snd_soc_bias_level level) ++{ ++ struct snd_soc_dai *aif1_dai = find_codec_dai(card, "wm8994-aif1"); ++ struct mrfld_8958_mc_private *ctx = snd_soc_card_get_drvdata(card); ++ int ret = 0; ++ ++ if (!aif1_dai) ++ return -ENODEV; ++ ++ if (dapm->dev != aif1_dai->dev) ++ return 0; ++ ++ switch (level) { ++ case SND_SOC_BIAS_STANDBY: ++ /* We are in stabdba down so */ ++ /* Switch to 32KHz MCLK2 input clock for codec ++ */ ++ ret = mrfld_8958_set_codec_clk(card, CODEC_IN_MCLK2); ++ /* Turn off 19.2MHz soc osc clock */ ++ set_soc_osc_clk0(ctx->osc_clk0_reg, false); ++ break; ++ default: ++ break; ++ } ++ card->dapm.bias_level = level; ++ pr_debug("%s card(%s)->bias_level %u\n", __func__, card->name, ++ card->dapm.bias_level); ++ return ret; ++} ++ ++#define PMIC_ID_ADDR 0x00 ++#define PMIC_CHIP_ID_A0_VAL 0xC0 ++ ++static int mrfld_8958_set_vflex_vsel(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *k, int event) ++{ ++#define VFLEXCNT 0xAB ++#define VFLEXVSEL_5V 0x01 ++#define VFLEXVSEL_B0_VSYS_PT 0x80 /* B0: Vsys pass-through */ ++#define VFLEXVSEL_A0_4P5V 0x41 /* A0: 4.5V */ ++ ++ struct snd_soc_dapm_context *dapm = w->dapm; ++ struct snd_soc_card *card = dapm->card; ++ struct mrfld_8958_mc_private *ctx = snd_soc_card_get_drvdata(card); ++ ++ u8 vflexvsel, pmic_id = ctx->pmic_id; ++ int retval = 0; ++ ++ pr_debug("%s: ON? %d\n", __func__, SND_SOC_DAPM_EVENT_ON(event)); ++ ++ vflexvsel = (pmic_id == PMIC_CHIP_ID_A0_VAL) ? VFLEXVSEL_A0_4P5V : VFLEXVSEL_B0_VSYS_PT; ++ pr_debug("pmic_id %#x vflexvsel %#x\n", pmic_id, ++ SND_SOC_DAPM_EVENT_ON(event) ? VFLEXVSEL_5V : vflexvsel); ++ ++ if (SND_SOC_DAPM_EVENT_ON(event)) ++ retval = intel_scu_ipc_iowrite8(VFLEXCNT, VFLEXVSEL_5V); ++ else if (SND_SOC_DAPM_EVENT_OFF(event)) ++ retval = intel_scu_ipc_iowrite8(VFLEXCNT, vflexvsel); ++ if (retval) ++ pr_err("Error writing to VFLEXCNT register\n"); ++ ++ return retval; ++} ++ ++static const struct snd_soc_dapm_widget widgets[] = { ++ SND_SOC_DAPM_HP("Headphones", NULL), ++ SND_SOC_DAPM_MIC("AMIC", NULL), ++ SND_SOC_DAPM_MIC("DMIC", NULL), ++ SND_SOC_DAPM_SUPPLY("VFLEXCNT", SND_SOC_NOPM, 0, 0, ++ mrfld_8958_set_vflex_vsel, ++ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), ++}; ++ ++static const struct snd_soc_dapm_route map[] = { ++ { "Headphones", NULL, "HPOUT1L" }, ++ { "Headphones", NULL, "HPOUT1R" }, ++ ++ /* saltbay uses 2 DMICs, other configs may use more so change below ++ * accordingly ++ */ ++ { "DMIC1DAT", NULL, "DMIC" }, ++ { "DMIC2DAT", NULL, "DMIC" }, ++ /*{ "DMIC3DAT", NULL, "DMIC" },*/ ++ /*{ "DMIC4DAT", NULL, "DMIC" },*/ ++ ++ /* MICBIAS2 is connected as Bias for AMIC so we link it ++ * here. Also AMIC wires up to IN1LP pin. ++ * DMIC is externally connected to 1.8V rail, so no link rqd. ++ */ ++ { "AMIC", NULL, "MICBIAS2" }, ++ { "IN1LP", NULL, "AMIC" }, ++ ++ /* SWM map link the SWM outs to codec AIF */ ++ { "AIF1 Playback", NULL, "codec_out0" }, ++ { "AIF1 Playback", NULL, "codec_out1" }, ++ { "codec_in0", NULL, "AIF1 Capture" }, ++ { "codec_in1", NULL, "AIF1 Capture" }, ++ ++ { "AIF1 Playback", NULL, "VFLEXCNT" }, ++ { "AIF1 Capture", NULL, "VFLEXCNT" }, ++}; ++ ++static const struct wm8958_micd_rate micdet_rates[] = { ++ { 32768, true, 1, 4 }, ++ { 32768, false, 1, 1 }, ++ { 44100 * 256, true, 7, 10 }, ++ { 44100 * 256, false, 7, 10 }, ++}; ++ ++static void wm8958_custom_micd_set_rate(struct snd_soc_codec *codec) ++{ ++ struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); ++ struct wm8994 *control = dev_get_drvdata(codec->dev->parent); ++ int best, i, sysclk, val; ++ bool idle; ++ const struct wm8958_micd_rate *rates; ++ int num_rates; ++ ++ idle = !wm8994->jack_mic; ++ ++ sysclk = snd_soc_read(codec, WM8994_CLOCKING_1); ++ if (sysclk & WM8994_SYSCLK_SRC) ++ sysclk = wm8994->aifclk[1]; ++ else ++ sysclk = wm8994->aifclk[0]; ++ ++ if (control->pdata.micd_rates) { ++ rates = control->pdata.micd_rates; ++ num_rates = control->pdata.num_micd_rates; ++ } else { ++ rates = micdet_rates; ++ num_rates = ARRAY_SIZE(micdet_rates); ++ } ++ ++ best = 0; ++ for (i = 0; i < num_rates; i++) { ++ if (rates[i].idle != idle) ++ continue; ++ if (abs(rates[i].sysclk - sysclk) < ++ abs(rates[best].sysclk - sysclk)) ++ best = i; ++ else if (rates[best].idle != idle) ++ best = i; ++ } ++ ++ val = rates[best].start << WM8958_MICD_BIAS_STARTTIME_SHIFT ++ | rates[best].rate << WM8958_MICD_RATE_SHIFT; ++ ++ dev_dbg(codec->dev, "MICD rate %d,%d for %dHz %s\n", ++ rates[best].start, rates[best].rate, sysclk, ++ idle ? "idle" : "active"); ++ ++ snd_soc_update_bits(codec, WM8958_MIC_DETECT_1, ++ WM8958_MICD_BIAS_STARTTIME_MASK | ++ WM8958_MICD_RATE_MASK, val); ++} ++ ++static void wm8958_custom_mic_id(void *data, u16 status) ++{ ++ struct snd_soc_codec *codec = data; ++ struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); ++ ++ dev_dbg(codec->dev, "wm8958 custom mic id called with status %x\n", ++ status); ++ ++ /* Either nothing present or just starting detection */ ++ if (!(status & WM8958_MICD_STS)) { ++ /* If nothing present then clear our statuses */ ++ dev_dbg(codec->dev, "Detected open circuit\n"); ++ ++ schedule_delayed_work(&wm8994->open_circuit_work, ++ msecs_to_jiffies(2500)); ++ return; ++ } ++ ++ schedule_delayed_work(&wm8994->micd_set_custom_rate_work, ++ msecs_to_jiffies(wm8994->wm8994->pdata.micb_en_delay)); ++ ++ /* If the measurement is showing a high impedence we've got a ++ * microphone. ++ */ ++ if (status & 0x600) { ++ dev_dbg(codec->dev, "Detected microphone\n"); ++ ++ wm8994->mic_detecting = false; ++ wm8994->jack_mic = true; ++ ++ snd_soc_jack_report(wm8994->micdet[0].jack, SND_JACK_HEADSET, ++ SND_JACK_HEADSET); ++ } ++ ++ ++ if (status & 0xfc) { ++ dev_dbg(codec->dev, "Detected headphone\n"); ++ ++ /* Partial inserts of headsets with complete insert ++ * after an indeterminate amount of time require ++ * continouous micdetect enabled (until open circuit ++ * or headset is detected) ++ * */ ++ wm8994->mic_detecting = true; ++ ++ snd_soc_jack_report(wm8994->micdet[0].jack, SND_JACK_HEADPHONE, ++ SND_JACK_HEADSET); ++ } ++} ++ ++static int mrfld_8958_init(struct snd_soc_pcm_runtime *runtime) ++{ ++ int ret; ++ unsigned int fmt; ++ struct snd_soc_codec *codec; ++ struct snd_soc_card *card = runtime->card; ++ struct snd_soc_dai *aif1_dai = find_codec_dai(card, "wm8994-aif1"); ++ struct mrfld_8958_mc_private *ctx = snd_soc_card_get_drvdata(card); ++ ++ if (!aif1_dai) ++ return -ENODEV; ++ ++ pr_debug("Entry %s\n", __func__); ++ ++ ret = snd_soc_dai_set_tdm_slot(aif1_dai, 0, 0, 4, SNDRV_PCM_FORMAT_S24_LE); ++ if (ret < 0) { ++ pr_err("can't set codec pcm format %d\n", ret); ++ return ret; ++ } ++ ++ /* WM8958 slave Mode */ ++ fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF ++ | SND_SOC_DAIFMT_CBS_CFS; ++ ret = snd_soc_dai_set_fmt(aif1_dai, fmt); ++ if (ret < 0) { ++ pr_err("can't set codec DAI configuration %d\n", ret); ++ return ret; ++ } ++ ++ mrfld_8958_set_bias_level(card, &card->dapm, SND_SOC_BIAS_OFF); ++ card->dapm.idle_bias_off = true; ++ ++ /* these pins are not used in SB config so mark as nc ++ * ++ * LINEOUT1, 2 ++ * IN1R ++ * DMICDAT2 ++ */ ++ snd_soc_dapm_nc_pin(&card->dapm, "DMIC2DAT"); ++ snd_soc_dapm_nc_pin(&card->dapm, "LINEOUT1P"); ++ snd_soc_dapm_nc_pin(&card->dapm, "LINEOUT1N"); ++ snd_soc_dapm_nc_pin(&card->dapm, "LINEOUT2P"); ++ snd_soc_dapm_nc_pin(&card->dapm, "LINEOUT2N"); ++ snd_soc_dapm_nc_pin(&card->dapm, "IN1RN"); ++ snd_soc_dapm_nc_pin(&card->dapm, "IN1RP"); ++ ++ snd_soc_dapm_sync(&card->dapm); ++ ++ codec = mrfld_8958_get_codec(card); ++ if (!codec) { ++ pr_err("%s: we didnt find the codec pointer!\n", __func__); ++ return 0; ++ } ++ ++ ctx->jack_retry = 0; ++ ret = snd_soc_jack_new(codec, "Intel MID Audio Jack", ++ SND_JACK_HEADSET | SND_JACK_HEADPHONE | ++ SND_JACK_BTN_0 | SND_JACK_BTN_1, ++ &ctx->jack); ++ if (ret) { ++ pr_err("jack creation failed\n"); ++ return ret; ++ } ++ ++ snd_jack_set_key(ctx->jack.jack, SND_JACK_BTN_1, KEY_MEDIA); ++ snd_jack_set_key(ctx->jack.jack, SND_JACK_BTN_0, KEY_MEDIA); ++ ++ wm8958_mic_detect(codec, &ctx->jack, NULL, NULL, ++ wm8958_custom_mic_id, codec); ++ ++ wm8958_micd_set_custom_rate(codec, wm8958_custom_micd_set_rate, codec); ++ ++ snd_soc_update_bits(codec, WM8994_AIF1_DAC1_FILTERS_1, WM8994_AIF1DAC1_MUTE, 0); ++ snd_soc_update_bits(codec, WM8994_AIF1_DAC2_FILTERS_1, WM8994_AIF1DAC2_MUTE, 0); ++ ++ /* Micbias1 is always off, so for pm optimizations make sure the micbias1 ++ * discharge bit is set to floating to avoid discharge in disable state ++ */ ++ snd_soc_update_bits(codec, WM8958_MICBIAS1, WM8958_MICB1_DISCH, 0); ++ ++ return 0; ++} ++ ++static unsigned int rates_8000_16000[] = { ++ 8000, ++ 16000, ++}; ++ ++static struct snd_pcm_hw_constraint_list constraints_8000_16000 = { ++ .count = ARRAY_SIZE(rates_8000_16000), ++ .list = rates_8000_16000, ++}; ++static unsigned int rates_48000[] = { ++ 48000, ++}; ++ ++static struct snd_pcm_hw_constraint_list constraints_48000 = { ++ .count = ARRAY_SIZE(rates_48000), ++ .list = rates_48000, ++}; ++static int mrfld_8958_startup(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_hw_constraint_list(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_RATE, ++ &constraints_48000); ++} ++ ++static struct snd_soc_ops mrfld_8958_ops = { ++ .startup = mrfld_8958_startup, ++}; ++static int mrfld_8958_8k_16k_startup(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_hw_constraint_list(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_RATE, ++ &constraints_8000_16000); ++} ++ ++static struct snd_soc_ops mrfld_8958_8k_16k_ops = { ++ .startup = mrfld_8958_8k_16k_startup, ++ .hw_params = mrfld_8958_hw_params, ++}; ++ ++static struct snd_soc_ops mrfld_8958_be_ssp2_ops = { ++ .hw_params = mrfld_8958_hw_params, ++}; ++static struct snd_soc_compr_ops mrfld_compr_ops = { ++ .set_params = mrfld_wm8958_compr_set_params, ++}; ++ ++struct snd_soc_dai_link mrfld_8958_msic_dailink[] = { ++ [MERR_DPCM_AUDIO] = { ++ .name = "Merrifield Audio Port", ++ .stream_name = "Saltbay Audio", ++ .cpu_dai_name = "Headset-cpu-dai", ++ .codec_name = "snd-soc-dummy", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .platform_name = "sst-platform", ++ .init = mrfld_8958_init, ++ .ignore_suspend = 1, ++ .dynamic = 1, ++ .ops = &mrfld_8958_ops, ++ }, ++ [MERR_DPCM_DB] = { ++ .name = "Merrifield DB Audio Port", ++ .stream_name = "Deep Buffer Audio", ++ .cpu_dai_name = "Deepbuffer-cpu-dai", ++ .codec_name = "snd-soc-dummy", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .platform_name = "sst-platform", ++ .init = mrfld_8958_init, ++ .ignore_suspend = 1, ++ .dynamic = 1, ++ .ops = &mrfld_8958_ops, ++ }, ++ [MERR_DPCM_LL] = { ++ .name = "Merrifield LL Audio Port", ++ .stream_name = "Low Latency Audio", ++ .cpu_dai_name = "Lowlatency-cpu-dai", ++ .codec_name = "snd-soc-dummy", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .platform_name = "sst-platform", ++ .init = mrfld_8958_init, ++ .ignore_suspend = 1, ++ .dynamic = 1, ++ .ops = &mrfld_8958_ops, ++ }, ++ [MERR_DPCM_COMPR] = { ++ .name = "Merrifield Compress Port", ++ .stream_name = "Saltbay Compress", ++ .platform_name = "sst-platform", ++ .cpu_dai_name = "Compress-cpu-dai", ++ .codec_name = "snd-soc-dummy", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .dynamic = 1, ++ .init = mrfld_8958_init, ++ .compr_ops = &mrfld_compr_ops, ++ }, ++ [MERR_DPCM_VOIP] = { ++ .name = "Merrifield VOIP Port", ++ .stream_name = "Saltbay Voip", ++ .cpu_dai_name = "Voip-cpu-dai", ++ .platform_name = "sst-platform", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .codec_name = "snd-soc-dummy", ++ .init = NULL, ++ .ignore_suspend = 1, ++ .ops = &mrfld_8958_8k_16k_ops, ++ .dynamic = 1, ++ }, ++ [MERR_DPCM_PROBE] = { ++ .name = "Merrifield Probe Port", ++ .stream_name = "Saltbay Probe", ++ .cpu_dai_name = "Probe-cpu-dai", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .codec_name = "snd-soc-dummy", ++ .platform_name = "sst-platform", ++ .playback_count = 8, ++ .capture_count = 8, ++ }, ++ /* CODEC<->CODEC link */ ++ { ++ .name = "Merrifield Codec-Loop Port", ++ .stream_name = "Saltbay Codec-Loop", ++ .cpu_dai_name = "snd-soc-dummy-dai", ++ .codec_dai_name = "wm8994-aif1", ++ .codec_name = "wm8994-codec", ++ .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF ++ | SND_SOC_DAIFMT_CBS_CFS, ++ .params = &mrfld_wm8958_dai_params, ++ }, ++ ++ /* back ends */ ++ { ++ .name = "SSP2-Codec", ++ .be_id = 1, ++ .cpu_dai_name = "ssp2-codec", ++ .platform_name = "sst-platform", ++ .no_pcm = 1, ++ .codec_dai_name = "wm8994-aif1", ++ .codec_name = "wm8994-codec", ++ .be_hw_params_fixup = merr_codec_fixup, ++ .ignore_suspend = 1, ++ .ops = &mrfld_8958_be_ssp2_ops, ++ }, ++ { ++ .name = "SSP1-BTFM", ++ .be_id = 2, ++ .cpu_dai_name = "snd-soc-dummy-dai", ++ .platform_name = "snd-soc-dummy", ++ .no_pcm = 1, ++ .codec_name = "snd-soc-dummy", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .ignore_suspend = 1, ++ }, ++ { ++ .name = "SSP0-Modem", ++ .be_id = 3, ++ .cpu_dai_name = "snd-soc-dummy-dai", ++ .platform_name = "snd-soc-dummy", ++ .no_pcm = 1, ++ .codec_name = "snd-soc-dummy", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .ignore_suspend = 1, ++ }, ++}; ++ ++#ifdef CONFIG_PM_SLEEP ++static int snd_mrfld_8958_prepare(struct device *dev) ++{ ++ pr_debug("In %s device name\n", __func__); ++ snd_soc_suspend(dev); ++ return 0; ++} ++ ++static void snd_mrfld_8958_complete(struct device *dev) ++{ ++ pr_debug("In %s\n", __func__); ++ snd_soc_resume(dev); ++ return; ++} ++ ++static int snd_mrfld_8958_poweroff(struct device *dev) ++{ ++ pr_debug("In %s\n", __func__); ++ snd_soc_poweroff(dev); ++ return 0; ++} ++#else ++#define snd_mrfld_8958_prepare NULL ++#define snd_mrfld_8958_complete NULL ++#define snd_mrfld_8958_poweroff NULL ++#endif ++ ++/* SoC card */ ++static struct snd_soc_card snd_soc_card_mrfld = { ++ .name = "wm8958-audio", ++ .dai_link = mrfld_8958_msic_dailink, ++ .num_links = ARRAY_SIZE(mrfld_8958_msic_dailink), ++ .set_bias_level = mrfld_8958_set_bias_level, ++ .set_bias_level_post = mrfld_8958_set_bias_level_post, ++ .dapm_widgets = widgets, ++ .num_dapm_widgets = ARRAY_SIZE(widgets), ++ .dapm_routes = map, ++ .num_dapm_routes = ARRAY_SIZE(map), ++}; ++ ++static int snd_mrfld_8958_mc_probe(struct platform_device *pdev) ++{ ++ int ret_val = 0; ++ struct mrfld_8958_mc_private *drv; ++ ++ pr_debug("Entry %s\n", __func__); ++ ++ drv = kzalloc(sizeof(*drv), GFP_ATOMIC); ++ if (!drv) { ++ pr_err("allocation failed\n"); ++ return -ENOMEM; ++ } ++ ++ /* ioremap the register */ ++ drv->osc_clk0_reg = devm_ioremap_nocache(&pdev->dev, ++ MERR_OSC_CLKOUT_CTRL0_REG_ADDR, ++ MERR_OSC_CLKOUT_CTRL0_REG_SIZE); ++ if (!drv->osc_clk0_reg) { ++ pr_err("osc clk0 ctrl ioremap failed\n"); ++ ret_val = -1; ++ goto unalloc; ++ } ++ ++ ret_val = intel_scu_ipc_ioread8(PMIC_ID_ADDR, &drv->pmic_id); ++ if (ret_val) { ++ pr_err("Error reading PMIC ID register\n"); ++ goto unalloc; ++ } ++ ++ /* register the soc card */ ++ snd_soc_card_mrfld.dev = &pdev->dev; ++ snd_soc_card_set_drvdata(&snd_soc_card_mrfld, drv); ++ ret_val = snd_soc_register_card(&snd_soc_card_mrfld); ++ if (ret_val) { ++ pr_err("snd_soc_register_card failed %d\n", ret_val); ++ goto unalloc; ++ } ++ platform_set_drvdata(pdev, &snd_soc_card_mrfld); ++ pr_info("%s successful\n", __func__); ++ return ret_val; ++ ++unalloc: ++ kfree(drv); ++ return ret_val; ++} ++ ++static int snd_mrfld_8958_mc_remove(struct platform_device *pdev) ++{ ++ struct snd_soc_card *soc_card = platform_get_drvdata(pdev); ++ struct mrfld_8958_mc_private *drv = snd_soc_card_get_drvdata(soc_card); ++ ++ pr_debug("In %s\n", __func__); ++ kfree(drv); ++ snd_soc_card_set_drvdata(soc_card, NULL); ++ snd_soc_unregister_card(soc_card); ++ platform_set_drvdata(pdev, NULL); ++ return 0; ++} ++ ++const struct dev_pm_ops snd_mrfld_8958_mc_pm_ops = { ++ .prepare = snd_mrfld_8958_prepare, ++ .complete = snd_mrfld_8958_complete, ++ .poweroff = snd_mrfld_8958_poweroff, ++}; ++ ++static struct platform_driver snd_mrfld_8958_mc_driver = { ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = "mrfld_wm8958", ++ .pm = &snd_mrfld_8958_mc_pm_ops, ++ }, ++ .probe = snd_mrfld_8958_mc_probe, ++ .remove = snd_mrfld_8958_mc_remove, ++}; ++ ++static int snd_mrfld_8958_driver_init(void) ++{ ++ pr_info("Merrifield Machine Driver mrfld_wm8958 registerd\n"); ++ return platform_driver_register(&snd_mrfld_8958_mc_driver); ++} ++ ++static void snd_mrfld_8958_driver_exit(void) ++{ ++ pr_debug("In %s\n", __func__); ++ platform_driver_unregister(&snd_mrfld_8958_mc_driver); ++} ++ ++static int snd_mrfld_8958_rpmsg_probe(struct rpmsg_channel *rpdev) ++{ ++ int ret = 0; ++ ++ if (rpdev == NULL) { ++ pr_err("rpmsg channel not created\n"); ++ ret = -ENODEV; ++ goto out; ++ } ++ ++ dev_info(&rpdev->dev, "Probed snd_mrfld wm8958 rpmsg device\n"); ++ ++ ret = snd_mrfld_8958_driver_init(); ++ ++out: ++ return ret; ++} ++ ++static void snd_mrfld_8958_rpmsg_remove(struct rpmsg_channel *rpdev) ++{ ++ snd_mrfld_8958_driver_exit(); ++ dev_info(&rpdev->dev, "Removed snd_mrfld wm8958 rpmsg device\n"); ++} ++ ++static void snd_mrfld_8958_rpmsg_cb(struct rpmsg_channel *rpdev, void *data, ++ int len, void *priv, u32 src) ++{ ++ dev_warn(&rpdev->dev, "unexpected, message\n"); ++ ++ print_hex_dump(KERN_DEBUG, __func__, DUMP_PREFIX_NONE, 16, 1, ++ data, len, true); ++} ++ ++static struct rpmsg_device_id snd_mrfld_8958_rpmsg_id_table[] = { ++ { .name = "rpmsg_mrfld_wm8958_audio" }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(rpmsg, snd_mrfld_8958_rpmsg_id_table); ++ ++static struct rpmsg_driver snd_mrfld_8958_rpmsg = { ++ .drv.name = KBUILD_MODNAME, ++ .drv.owner = THIS_MODULE, ++ .id_table = snd_mrfld_8958_rpmsg_id_table, ++ .probe = snd_mrfld_8958_rpmsg_probe, ++ .callback = snd_mrfld_8958_rpmsg_cb, ++ .remove = snd_mrfld_8958_rpmsg_remove, ++}; ++ ++static int __init snd_mrfld_8958_rpmsg_init(void) ++{ ++ return register_rpmsg_driver(&snd_mrfld_8958_rpmsg); ++} ++late_initcall(snd_mrfld_8958_rpmsg_init); ++ ++static void __exit snd_mrfld_8958_rpmsg_exit(void) ++{ ++ return unregister_rpmsg_driver(&snd_mrfld_8958_rpmsg); ++} ++module_exit(snd_mrfld_8958_rpmsg_exit); ++ ++MODULE_DESCRIPTION("ASoC Intel(R) Merrifield MID Machine driver"); ++MODULE_AUTHOR("Vinod Koul "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:mrfld_wm8958"); +diff --git a/sound/soc/intel/board/merr_saltbay_wm8958.c b/sound/soc/intel/board/merr_saltbay_wm8958.c +new file mode 100644 +index 0000000..ef63154 +--- /dev/null ++++ b/sound/soc/intel/board/merr_saltbay_wm8958.c +@@ -0,0 +1,887 @@ ++/* ++ * merr_saltbay_wm8958.c - ASoc Machine driver for Intel Merrfield MID platform ++ * ++ * Copyright (C) 2013 Intel Corp ++ * Author: Vinod Koul ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ */ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include "../../codecs/wm8994.h" ++ ++/* Codec PLL output clk rate */ ++#define CODEC_SYSCLK_RATE 24576000 ++/* Input clock to codec at MCLK1 PIN */ ++#define CODEC_IN_MCLK1_RATE 19200000 ++/* Input clock to codec at MCLK2 PIN */ ++#define CODEC_IN_MCLK2_RATE 32768 ++/* define to select between MCLK1 and MCLK2 input to codec as its clock */ ++#define CODEC_IN_MCLK1 1 ++#define CODEC_IN_MCLK2 2 ++ ++/* Register address for OSC Clock */ ++#define MERR_OSC_CLKOUT_CTRL0_REG_ADDR 0xFF00BC04 ++/* Size of osc clock register */ ++#define MERR_OSC_CLKOUT_CTRL0_REG_SIZE 4 ++ ++struct mrfld_8958_mc_private { ++ struct snd_soc_jack jack; ++ int jack_retry; ++ u8 pmic_id; ++ void __iomem *osc_clk0_reg; ++}; ++ ++ ++/* set_osc_clk0- enable/disables the osc clock0 ++ * addr: address of the register to write to ++ * enable: bool to enable or disable the clock ++ */ ++static inline void set_soc_osc_clk0(void __iomem *addr, bool enable) ++{ ++ u32 osc_clk_ctrl; ++ ++ osc_clk_ctrl = readl(addr); ++ if (enable) ++ osc_clk_ctrl |= BIT(31); ++ else ++ osc_clk_ctrl &= ~(BIT(31)); ++ ++ pr_debug("%s: enable:%d val 0x%x\n", __func__, enable, osc_clk_ctrl); ++ ++ writel(osc_clk_ctrl, addr); ++} ++ ++ ++static inline struct snd_soc_codec *mrfld_8958_get_codec(struct snd_soc_card *card) ++{ ++ bool found = false; ++ struct snd_soc_codec *codec; ++ ++ list_for_each_entry(codec, &card->codec_dev_list, card_list) { ++ if (!strstr(codec->name, "wm8994-codec")) { ++ pr_debug("codec was %s", codec->name); ++ continue; ++ } else { ++ found = true; ++ break; ++ } ++ } ++ if (found == false) { ++ pr_err("%s: cant find codec", __func__); ++ return NULL; ++ } ++ return codec; ++} ++ ++/* Function to switch the input clock for codec, When audio is in ++ * progress input clock to codec will be through MCLK1 which is 19.2MHz ++ * while in off state input clock to codec will be through 32KHz through ++ * MCLK2 ++ * card : Sound card structure ++ * src : Input clock source to codec ++ */ ++static int mrfld_8958_set_codec_clk(struct snd_soc_card *card, int src) ++{ ++ struct snd_soc_dai *aif1_dai = card->rtd[0].codec_dai; ++ int ret; ++ ++ switch (src) { ++ case CODEC_IN_MCLK1: ++ /* Turn ON the PLL to generate required sysclk rate ++ * from MCLK1 */ ++ ret = snd_soc_dai_set_pll(aif1_dai, ++ WM8994_FLL1, WM8994_FLL_SRC_MCLK1, ++ CODEC_IN_MCLK1_RATE, CODEC_SYSCLK_RATE); ++ if (ret < 0) { ++ pr_err("Failed to start FLL: %d\n", ret); ++ return ret; ++ } ++ /* Switch to MCLK1 input */ ++ ret = snd_soc_dai_set_sysclk(aif1_dai, WM8994_SYSCLK_FLL1, ++ CODEC_SYSCLK_RATE, SND_SOC_CLOCK_IN); ++ if (ret < 0) { ++ pr_err("Failed to set codec sysclk configuration %d\n", ++ ret); ++ return ret; ++ } ++ break; ++ case CODEC_IN_MCLK2: ++ /* Switch to MCLK2 */ ++ ret = snd_soc_dai_set_sysclk(aif1_dai, WM8994_SYSCLK_MCLK2, ++ 32768, SND_SOC_CLOCK_IN); ++ if (ret < 0) { ++ pr_err("Failed to switch to MCLK2: %d", ret); ++ return ret; ++ } ++ /* Turn off PLL for MCLK1 */ ++ ret = snd_soc_dai_set_pll(aif1_dai, WM8994_FLL1, 0, 0, 0); ++ if (ret < 0) { ++ pr_err("Failed to stop the FLL: %d", ret); ++ return ret; ++ } ++ break; ++ default: ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static int mrfld_wm8958_set_clk_fmt(struct snd_soc_dai *codec_dai) ++{ ++ unsigned int fmt; ++ int ret = 0; ++ struct snd_soc_card *card = codec_dai->card; ++ struct mrfld_8958_mc_private *ctx = snd_soc_card_get_drvdata(card); ++ ++ /* Enable the osc clock at start so that it gets settling time */ ++ set_soc_osc_clk0(ctx->osc_clk0_reg, true); ++ ++ ret = snd_soc_dai_set_tdm_slot(codec_dai, 0, 0, 4, SNDRV_PCM_FORMAT_S24_LE); ++ if (ret < 0) { ++ pr_err("can't set codec pcm format %d\n", ret); ++ return ret; ++ } ++ ++ /* WM8958 slave Mode */ ++ fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF ++ | SND_SOC_DAIFMT_CBS_CFS; ++ ret = snd_soc_dai_set_fmt(codec_dai, fmt); ++ if (ret < 0) { ++ pr_err("can't set codec DAI configuration %d\n", ret); ++ return ret; ++ } ++ ++ /* FIXME: move this to SYS_CLOCK event handler when codec driver ++ * dependency is clean. ++ */ ++ /* Switch to 19.2MHz MCLK1 input clock for codec */ ++ ret = mrfld_8958_set_codec_clk(card, CODEC_IN_MCLK1); ++ ++ return ret; ++} ++ ++static int mrfld_8958_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ ++ return mrfld_wm8958_set_clk_fmt(codec_dai); ++} ++ ++static int mrfld_wm8958_compr_set_params(struct snd_compr_stream *cstream) ++{ ++ struct snd_soc_pcm_runtime *rtd = cstream->private_data; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ ++ return mrfld_wm8958_set_clk_fmt(codec_dai); ++} ++static int mrfld_8958_set_bias_level(struct snd_soc_card *card, ++ struct snd_soc_dapm_context *dapm, ++ enum snd_soc_bias_level level) ++{ ++ struct snd_soc_dai *aif1_dai = card->rtd[0].codec_dai; ++ int ret = 0; ++ ++ if (dapm->dev != aif1_dai->dev) ++ return 0; ++ switch (level) { ++ case SND_SOC_BIAS_PREPARE: ++ if (card->dapm.bias_level == SND_SOC_BIAS_STANDBY) ++ ++ ret = mrfld_wm8958_set_clk_fmt(aif1_dai); ++ break; ++ default: ++ break; ++ } ++ pr_debug("%s card(%s)->bias_level %u\n", __func__, card->name, ++ card->dapm.bias_level); ++ return ret; ++} ++static int mrfld_8958_set_bias_level_post(struct snd_soc_card *card, ++ struct snd_soc_dapm_context *dapm, ++ enum snd_soc_bias_level level) ++{ ++ struct snd_soc_dai *aif1_dai = card->rtd[0].codec_dai; ++ struct mrfld_8958_mc_private *ctx = snd_soc_card_get_drvdata(card); ++ int ret = 0; ++ ++ if (dapm->dev != aif1_dai->dev) ++ return 0; ++ ++ switch (level) { ++ case SND_SOC_BIAS_STANDBY: ++ /* We are in stabdba down so */ ++ /* Switch to 32KHz MCLK2 input clock for codec ++ */ ++ ret = mrfld_8958_set_codec_clk(card, CODEC_IN_MCLK2); ++ /* Turn off 19.2MHz soc osc clock */ ++ set_soc_osc_clk0(ctx->osc_clk0_reg, false); ++ break; ++ default: ++ break; ++ } ++ card->dapm.bias_level = level; ++ pr_debug("%s card(%s)->bias_level %u\n", __func__, card->name, ++ card->dapm.bias_level); ++ return ret; ++} ++ ++#define PMIC_ID_ADDR 0x00 ++#define PMIC_CHIP_ID_A0_VAL 0xC0 ++ ++static int mrfld_8958_set_vflex_vsel(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *k, int event) ++{ ++#define VFLEXCNT 0xAB ++#define VFLEXVSEL_5V 0x01 ++#define VFLEXVSEL_B0_VSYS_PT 0x80 /* B0: Vsys pass-through */ ++#define VFLEXVSEL_A0_4P5V 0x41 /* A0: 4.5V */ ++ ++ struct snd_soc_dapm_context *dapm = w->dapm; ++ struct snd_soc_card *card = dapm->card; ++ struct mrfld_8958_mc_private *ctx = snd_soc_card_get_drvdata(card); ++ ++ u8 vflexvsel, pmic_id = ctx->pmic_id; ++ int retval = 0; ++ ++ pr_debug("%s: ON? %d\n", __func__, SND_SOC_DAPM_EVENT_ON(event)); ++ ++ vflexvsel = (pmic_id == PMIC_CHIP_ID_A0_VAL) ? VFLEXVSEL_A0_4P5V : VFLEXVSEL_B0_VSYS_PT; ++ pr_debug("pmic_id %#x vflexvsel %#x\n", pmic_id, ++ SND_SOC_DAPM_EVENT_ON(event) ? VFLEXVSEL_5V : vflexvsel); ++ ++ /*FIXME: seems to be issue with bypass mode in MOOR, for now ++ force the bias off volate as VFLEXVSEL_5V */ ++ if ((INTEL_MID_BOARD(1, PHONE, MOFD)) || ++ (INTEL_MID_BOARD(1, TABLET, MOFD))) ++ vflexvsel = VFLEXVSEL_5V; ++ ++ if (SND_SOC_DAPM_EVENT_ON(event)) ++ retval = intel_scu_ipc_iowrite8(VFLEXCNT, VFLEXVSEL_5V); ++ else if (SND_SOC_DAPM_EVENT_OFF(event)) ++ retval = intel_scu_ipc_iowrite8(VFLEXCNT, vflexvsel); ++ if (retval) ++ pr_err("Error writing to VFLEXCNT register\n"); ++ ++ return retval; ++} ++ ++static const struct snd_soc_dapm_widget widgets[] = { ++ SND_SOC_DAPM_HP("Headphones", NULL), ++ SND_SOC_DAPM_MIC("AMIC", NULL), ++ SND_SOC_DAPM_MIC("DMIC", NULL), ++ SND_SOC_DAPM_SUPPLY("VFLEXCNT", SND_SOC_NOPM, 0, 0, ++ mrfld_8958_set_vflex_vsel, ++ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), ++}; ++ ++static const struct snd_soc_dapm_route map[] = { ++ { "Headphones", NULL, "HPOUT1L" }, ++ { "Headphones", NULL, "HPOUT1R" }, ++ ++ /* saltbay uses 2 DMICs, other configs may use more so change below ++ * accordingly ++ */ ++ { "DMIC1DAT", NULL, "DMIC" }, ++ { "DMIC2DAT", NULL, "DMIC" }, ++ /*{ "DMIC3DAT", NULL, "DMIC" },*/ ++ /*{ "DMIC4DAT", NULL, "DMIC" },*/ ++ ++ /* MICBIAS2 is connected as Bias for AMIC so we link it ++ * here. Also AMIC wires up to IN1LP pin. ++ * DMIC is externally connected to 1.8V rail, so no link rqd. ++ */ ++ { "AMIC", NULL, "MICBIAS2" }, ++ { "IN1LP", NULL, "AMIC" }, ++ ++ /* SWM map link the SWM outs to codec AIF */ ++ { "AIF1DAC1L", NULL, "Codec OUT0" }, ++ { "AIF1DAC1R", NULL, "Codec OUT0" }, ++ { "AIF1DAC2L", NULL, "Codec OUT1" }, ++ { "AIF1DAC2R", NULL, "Codec OUT1" }, ++ { "Codec IN0", NULL, "AIF1ADC1L" }, ++ { "Codec IN0", NULL, "AIF1ADC1R" }, ++ { "Codec IN1", NULL, "AIF1ADC1L" }, ++ { "Codec IN1", NULL, "AIF1ADC1R" }, ++ ++ { "AIF1DAC1L", NULL, "VFLEXCNT" }, ++ { "AIF1DAC1R", NULL, "VFLEXCNT" }, ++ { "AIF1DAC2L", NULL, "VFLEXCNT" }, ++ { "AIF1DAC2R", NULL, "VFLEXCNT" }, ++ ++ { "AIF1ADC1L", NULL, "VFLEXCNT" }, ++ { "AIF1ADC1R", NULL, "VFLEXCNT" }, ++ ++}; ++ ++static const struct wm8958_micd_rate micdet_rates[] = { ++ { 32768, true, 1, 4 }, ++ { 32768, false, 1, 1 }, ++ { 44100 * 256, true, 7, 10 }, ++ { 44100 * 256, false, 7, 10 }, ++}; ++ ++static void wm8958_custom_micd_set_rate(struct snd_soc_codec *codec) ++{ ++ struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); ++ struct wm8994 *control = dev_get_drvdata(codec->dev->parent); ++ int best, i, sysclk, val; ++ bool idle; ++ const struct wm8958_micd_rate *rates; ++ int num_rates; ++ ++ idle = !wm8994->jack_mic; ++ ++ sysclk = snd_soc_read(codec, WM8994_CLOCKING_1); ++ if (sysclk & WM8994_SYSCLK_SRC) ++ sysclk = wm8994->aifclk[1]; ++ else ++ sysclk = wm8994->aifclk[0]; ++ ++ if (control->pdata.micd_rates) { ++ rates = control->pdata.micd_rates; ++ num_rates = control->pdata.num_micd_rates; ++ } else { ++ rates = micdet_rates; ++ num_rates = ARRAY_SIZE(micdet_rates); ++ } ++ ++ best = 0; ++ for (i = 0; i < num_rates; i++) { ++ if (rates[i].idle != idle) ++ continue; ++ if (abs(rates[i].sysclk - sysclk) < ++ abs(rates[best].sysclk - sysclk)) ++ best = i; ++ else if (rates[best].idle != idle) ++ best = i; ++ } ++ ++ val = rates[best].start << WM8958_MICD_BIAS_STARTTIME_SHIFT ++ | rates[best].rate << WM8958_MICD_RATE_SHIFT; ++ ++ dev_dbg(codec->dev, "MICD rate %d,%d for %dHz %s\n", ++ rates[best].start, rates[best].rate, sysclk, ++ idle ? "idle" : "active"); ++ ++ snd_soc_update_bits(codec, WM8958_MIC_DETECT_1, ++ WM8958_MICD_BIAS_STARTTIME_MASK | ++ WM8958_MICD_RATE_MASK, val); ++} ++ ++static void wm8958_custom_mic_id(void *data, u16 status) ++{ ++ struct snd_soc_codec *codec = data; ++ struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); ++ ++ dev_dbg(codec->dev, "wm8958 custom mic id called with status %x\n", ++ status); ++ ++ /* Either nothing present or just starting detection */ ++ if (!(status & WM8958_MICD_STS)) { ++ /* If nothing present then clear our statuses */ ++ dev_dbg(codec->dev, "Detected open circuit\n"); ++ ++ schedule_delayed_work(&wm8994->open_circuit_work, ++ msecs_to_jiffies(2500)); ++ return; ++ } ++ ++ schedule_delayed_work(&wm8994->micd_set_custom_rate_work, ++ msecs_to_jiffies(wm8994->wm8994->pdata.micb_en_delay)); ++ ++ /* If the measurement is showing a high impedence we've got a ++ * microphone. ++ */ ++ if (status & 0x600) { ++ dev_dbg(codec->dev, "Detected microphone\n"); ++ ++ wm8994->mic_detecting = false; ++ wm8994->jack_mic = true; ++ wm8994->headphone_detected = false; ++ ++ snd_soc_jack_report(wm8994->micdet[0].jack, SND_JACK_HEADSET, ++ SND_JACK_HEADSET); ++ } ++ ++ ++ if (status & 0xfc) { ++ dev_dbg(codec->dev, "Detected headphone\n"); ++ ++ /* Partial inserts of headsets with complete insert ++ * after an indeterminate amount of time require ++ * continouous micdetect enabled (until open circuit ++ * or headset is detected) ++ * */ ++ wm8994->mic_detecting = true; ++ ++ wm8994->jack_mic = false; ++ wm8994->headphone_detected = true; ++ ++ snd_soc_jack_report(wm8994->micdet[0].jack, SND_JACK_HEADPHONE, ++ SND_JACK_HEADSET); ++ } ++} ++ ++static int mrfld_8958_init(struct snd_soc_pcm_runtime *runtime) ++{ ++ int ret; ++ unsigned int fmt; ++ struct snd_soc_codec *codec = runtime->codec; ++ struct snd_soc_dapm_context *dapm = &codec->dapm; ++ struct snd_soc_card *card = runtime->card; ++ struct snd_soc_dai *aif1_dai = card->rtd[0].codec_dai; ++ struct mrfld_8958_mc_private *ctx = snd_soc_card_get_drvdata(card); ++ ++ pr_debug("Entry %s\n", __func__); ++ ++ ret = snd_soc_dai_set_tdm_slot(aif1_dai, 0, 0, 4, SNDRV_PCM_FORMAT_S24_LE); ++ if (ret < 0) { ++ pr_err("can't set codec pcm format %d\n", ret); ++ return ret; ++ } ++ ++ /* WM8958 slave Mode */ ++ fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF ++ | SND_SOC_DAIFMT_CBS_CFS; ++ ret = snd_soc_dai_set_fmt(aif1_dai, fmt); ++ if (ret < 0) { ++ pr_err("can't set codec DAI configuration %d\n", ret); ++ return ret; ++ } ++ ++ mrfld_8958_set_bias_level(card, dapm, SND_SOC_BIAS_OFF); ++ card->dapm.idle_bias_off = true; ++ ++ /* these pins are not used in SB config so mark as nc ++ * ++ * LINEOUT1, 2 ++ * IN1R ++ * DMICDAT2 ++ */ ++ snd_soc_dapm_nc_pin(dapm, "DMIC2DAT"); ++ snd_soc_dapm_nc_pin(dapm, "LINEOUT1P"); ++ snd_soc_dapm_nc_pin(dapm, "LINEOUT1N"); ++ snd_soc_dapm_nc_pin(dapm, "LINEOUT2P"); ++ snd_soc_dapm_nc_pin(dapm, "LINEOUT2N"); ++ snd_soc_dapm_nc_pin(dapm, "IN1RN"); ++ snd_soc_dapm_nc_pin(dapm, "IN1RP"); ++ ++ /* Force enable VMID to avoid cold latency constraints */ ++ snd_soc_dapm_force_enable_pin(dapm, "VMID"); ++ snd_soc_dapm_sync(dapm); ++ ++ ctx->jack_retry = 0; ++ ret = snd_soc_jack_new(codec, "Intel MID Audio Jack", ++ SND_JACK_HEADSET | SND_JACK_HEADPHONE | ++ SND_JACK_BTN_0 | SND_JACK_BTN_1, ++ &ctx->jack); ++ if (ret) { ++ pr_err("jack creation failed\n"); ++ return ret; ++ } ++ ++ snd_jack_set_key(ctx->jack.jack, SND_JACK_BTN_1, KEY_MEDIA); ++ snd_jack_set_key(ctx->jack.jack, SND_JACK_BTN_0, KEY_MEDIA); ++ ++ wm8958_mic_detect(codec, &ctx->jack, NULL, NULL, ++ wm8958_custom_mic_id, codec); ++ ++ wm8958_micd_set_custom_rate(codec, wm8958_custom_micd_set_rate, codec); ++ ++ snd_soc_update_bits(codec, WM8994_AIF1_DAC1_FILTERS_1, WM8994_AIF1DAC1_MUTE, 0); ++ snd_soc_update_bits(codec, WM8994_AIF1_DAC2_FILTERS_1, WM8994_AIF1DAC2_MUTE, 0); ++ ++ /* Micbias1 is always off, so for pm optimizations make sure the micbias1 ++ * discharge bit is set to floating to avoid discharge in disable state ++ */ ++ snd_soc_update_bits(codec, WM8958_MICBIAS1, WM8958_MICB1_DISCH, 0); ++ ++ return 0; ++} ++ ++static unsigned int rates_8000_16000[] = { ++ 8000, ++ 16000, ++}; ++ ++static struct snd_pcm_hw_constraint_list constraints_8000_16000 = { ++ .count = ARRAY_SIZE(rates_8000_16000), ++ .list = rates_8000_16000, ++}; ++ ++static unsigned int rates_48000[] = { ++ 48000, ++}; ++ ++static struct snd_pcm_hw_constraint_list constraints_48000 = { ++ .count = ARRAY_SIZE(rates_48000), ++ .list = rates_48000, ++}; ++ ++static int mrfld_8958_startup(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_hw_constraint_list(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_RATE, ++ &constraints_48000); ++} ++ ++static struct snd_soc_ops mrfld_8958_ops = { ++ .startup = mrfld_8958_startup, ++ .hw_params = mrfld_8958_hw_params, ++}; ++ ++static int mrfld_8958_8k_16k_startup(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_hw_constraint_list(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_RATE, ++ &constraints_8000_16000); ++} ++ ++static struct snd_soc_ops mrfld_8958_8k_16k_ops = { ++ .startup = mrfld_8958_8k_16k_startup, ++ .hw_params = mrfld_8958_hw_params, ++}; ++ ++static struct snd_soc_compr_ops mrfld_compr_ops = { ++ .set_params = mrfld_wm8958_compr_set_params, ++}; ++ ++struct snd_soc_dai_link mrfld_8958_msic_dailink[] = { ++ [MERR_SALTBAY_AUDIO] = { ++ .name = "Merrifield Audio Port", ++ .stream_name = "Audio", ++ .cpu_dai_name = "Headset-cpu-dai", ++ .codec_dai_name = "wm8994-aif1", ++ .codec_name = "wm8994-codec", ++ .platform_name = "sst-platform", ++ .init = mrfld_8958_init, ++ .ignore_suspend = 1, ++ .ops = &mrfld_8958_ops, ++ .playback_count = 3, ++ }, ++ [MERR_SALTBAY_COMPR] = { ++ .name = "Merrifield Compress Port", ++ .stream_name = "Compress", ++ .platform_name = "sst-platform", ++ .cpu_dai_name = "Compress-cpu-dai", ++ .codec_dai_name = "wm8994-aif1", ++ .codec_name = "wm8994-codec", ++ .compr_ops = &mrfld_compr_ops, ++ }, ++ [MERR_SALTBAY_VOIP] = { ++ .name = "Merrifield VOIP Port", ++ .stream_name = "Voip", ++ .cpu_dai_name = "Voip-cpu-dai", ++ .codec_dai_name = "wm8994-aif1", ++ .codec_name = "wm8994-codec", ++ .platform_name = "sst-platform", ++ .init = NULL, ++ .ignore_suspend = 1, ++ .ops = &mrfld_8958_8k_16k_ops, ++ }, ++ [MERR_SALTBAY_PROBE] = { ++ .name = "Merrifield Probe Port", ++ .stream_name = "Probe", ++ .cpu_dai_name = "Probe-cpu-dai", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .codec_name = "snd-soc-dummy", ++ .platform_name = "sst-platform", ++ .playback_count = 8, ++ .capture_count = 8, ++ }, ++ [MERR_SALTBAY_AWARE] = { ++ .name = "Merrifield Aware Port", ++ .stream_name = "Aware", ++ .cpu_dai_name = "Loopback-cpu-dai", ++ .codec_dai_name = "wm8994-aif1", ++ .codec_name = "wm8994-codec", ++ .platform_name = "sst-platform", ++ .init = NULL, ++ .ignore_suspend = 1, ++ .ops = &mrfld_8958_8k_16k_ops, ++ }, ++ [MERR_SALTBAY_VAD] = { ++ .name = "Merrifield VAD Port", ++ .stream_name = "Vad", ++ .cpu_dai_name = "Loopback-cpu-dai", ++ .codec_dai_name = "wm8994-aif1", ++ .codec_name = "wm8994-codec", ++ .platform_name = "sst-platform", ++ .init = NULL, ++ .ignore_suspend = 1, ++ .ops = &mrfld_8958_8k_16k_ops, ++ }, ++ [MERR_SALTBAY_POWER] = { ++ .name = "Virtual Power Port", ++ .stream_name = "Power", ++ .cpu_dai_name = "Power-cpu-dai", ++ .platform_name = "sst-platform", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .codec_name = "snd-soc-dummy", ++ }, ++}; ++ ++#ifdef CONFIG_PM_SLEEP ++static int snd_mrfld_8958_prepare(struct device *dev) ++{ ++ struct snd_soc_card *card = dev_get_drvdata(dev); ++ struct snd_soc_codec *codec; ++ struct snd_soc_dapm_context *dapm; ++ ++ pr_debug("In %s\n", __func__); ++ ++ codec = mrfld_8958_get_codec(card); ++ if (!codec) { ++ pr_err("%s: couldn't find the codec pointer!\n", __func__); ++ return -EAGAIN; ++ } ++ ++ pr_debug("found codec %s\n", codec->name); ++ dapm = &codec->dapm; ++ ++ snd_soc_dapm_disable_pin(dapm, "VMID"); ++ snd_soc_dapm_sync(dapm); ++ ++ snd_soc_suspend(dev); ++ return 0; ++} ++ ++static void snd_mrfld_8958_complete(struct device *dev) ++{ ++ struct snd_soc_card *card = dev_get_drvdata(dev); ++ struct snd_soc_codec *codec; ++ struct snd_soc_dapm_context *dapm; ++ ++ pr_debug("In %s\n", __func__); ++ ++ codec = mrfld_8958_get_codec(card); ++ if (!codec) { ++ pr_err("%s: couldn't find the codec pointer!\n", __func__); ++ return; ++ } ++ ++ pr_debug("found codec %s\n", codec->name); ++ dapm = &codec->dapm; ++ ++ snd_soc_dapm_force_enable_pin(dapm, "VMID"); ++ snd_soc_dapm_sync(dapm); ++ ++ snd_soc_resume(dev); ++ return; ++} ++ ++static int snd_mrfld_8958_poweroff(struct device *dev) ++{ ++ pr_debug("In %s\n", __func__); ++ snd_soc_poweroff(dev); ++ return 0; ++} ++#else ++#define snd_mrfld_8958_prepare NULL ++#define snd_mrfld_8958_complete NULL ++#define snd_mrfld_8958_poweroff NULL ++#endif ++ ++/* SoC card */ ++static struct snd_soc_card snd_soc_card_mrfld = { ++ .name = "wm8958-audio", ++ .dai_link = mrfld_8958_msic_dailink, ++ .num_links = ARRAY_SIZE(mrfld_8958_msic_dailink), ++ .set_bias_level = mrfld_8958_set_bias_level, ++ .set_bias_level_post = mrfld_8958_set_bias_level_post, ++ .dapm_widgets = widgets, ++ .num_dapm_widgets = ARRAY_SIZE(widgets), ++ .dapm_routes = map, ++ .num_dapm_routes = ARRAY_SIZE(map), ++}; ++ ++static int snd_mrfld_8958_mc_probe(struct platform_device *pdev) ++{ ++ int ret_val = 0; ++ struct mrfld_8958_mc_private *drv; ++ ++ pr_debug("Entry %s\n", __func__); ++ ++ drv = kzalloc(sizeof(*drv), GFP_ATOMIC); ++ if (!drv) { ++ pr_err("allocation failed\n"); ++ return -ENOMEM; ++ } ++ ++ /* ioremap the register */ ++ drv->osc_clk0_reg = devm_ioremap_nocache(&pdev->dev, ++ MERR_OSC_CLKOUT_CTRL0_REG_ADDR, ++ MERR_OSC_CLKOUT_CTRL0_REG_SIZE); ++ if (!drv->osc_clk0_reg) { ++ pr_err("osc clk0 ctrl ioremap failed\n"); ++ ret_val = -1; ++ goto unalloc; ++ } ++ ++ ret_val = intel_scu_ipc_ioread8(PMIC_ID_ADDR, &drv->pmic_id); ++ if (ret_val) { ++ pr_err("Error reading PMIC ID register\n"); ++ goto unalloc; ++ } ++ ++ /* register the soc card */ ++ snd_soc_card_mrfld.dev = &pdev->dev; ++ snd_soc_card_set_drvdata(&snd_soc_card_mrfld, drv); ++ ret_val = snd_soc_register_card(&snd_soc_card_mrfld); ++ if (ret_val) { ++ pr_err("snd_soc_register_card failed %d\n", ret_val); ++ goto unalloc; ++ } ++ platform_set_drvdata(pdev, &snd_soc_card_mrfld); ++ pr_info("%s successful\n", __func__); ++ return ret_val; ++ ++unalloc: ++ kfree(drv); ++ return ret_val; ++} ++ ++static int snd_mrfld_8958_mc_remove(struct platform_device *pdev) ++{ ++ struct snd_soc_card *soc_card = platform_get_drvdata(pdev); ++ struct mrfld_8958_mc_private *drv = snd_soc_card_get_drvdata(soc_card); ++ ++ pr_debug("In %s\n", __func__); ++ kfree(drv); ++ snd_soc_card_set_drvdata(soc_card, NULL); ++ snd_soc_unregister_card(soc_card); ++ platform_set_drvdata(pdev, NULL); ++ return 0; ++} ++ ++const struct dev_pm_ops snd_mrfld_8958_mc_pm_ops = { ++ .prepare = snd_mrfld_8958_prepare, ++ .complete = snd_mrfld_8958_complete, ++ .poweroff = snd_mrfld_8958_poweroff, ++}; ++ ++static struct platform_driver snd_mrfld_8958_mc_driver = { ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = "mrfld_wm8958", ++ .pm = &snd_mrfld_8958_mc_pm_ops, ++ }, ++ .probe = snd_mrfld_8958_mc_probe, ++ .remove = snd_mrfld_8958_mc_remove, ++}; ++ ++static int snd_mrfld_8958_driver_init(void) ++{ ++ pr_info("Merrifield Machine Driver mrfld_wm8958 registerd\n"); ++ return platform_driver_register(&snd_mrfld_8958_mc_driver); ++} ++ ++static void snd_mrfld_8958_driver_exit(void) ++{ ++ pr_debug("In %s\n", __func__); ++ platform_driver_unregister(&snd_mrfld_8958_mc_driver); ++} ++ ++static int snd_mrfld_8958_rpmsg_probe(struct rpmsg_channel *rpdev) ++{ ++ int ret = 0; ++ ++ if (rpdev == NULL) { ++ pr_err("rpmsg channel not created\n"); ++ ret = -ENODEV; ++ goto out; ++ } ++ ++ dev_info(&rpdev->dev, "Probed snd_mrfld wm8958 rpmsg device\n"); ++ ++ ret = snd_mrfld_8958_driver_init(); ++ ++out: ++ return ret; ++} ++ ++static void snd_mrfld_8958_rpmsg_remove(struct rpmsg_channel *rpdev) ++{ ++ snd_mrfld_8958_driver_exit(); ++ dev_info(&rpdev->dev, "Removed snd_mrfld wm8958 rpmsg device\n"); ++} ++ ++static void snd_mrfld_8958_rpmsg_cb(struct rpmsg_channel *rpdev, void *data, ++ int len, void *priv, u32 src) ++{ ++ dev_warn(&rpdev->dev, "unexpected, message\n"); ++ ++ print_hex_dump(KERN_DEBUG, __func__, DUMP_PREFIX_NONE, 16, 1, ++ data, len, true); ++} ++ ++static struct rpmsg_device_id snd_mrfld_8958_rpmsg_id_table[] = { ++ { .name = "rpmsg_mrfld_wm8958_audio" }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(rpmsg, snd_mrfld_8958_rpmsg_id_table); ++ ++static struct rpmsg_driver snd_mrfld_8958_rpmsg = { ++ .drv.name = KBUILD_MODNAME, ++ .drv.owner = THIS_MODULE, ++ .id_table = snd_mrfld_8958_rpmsg_id_table, ++ .probe = snd_mrfld_8958_rpmsg_probe, ++ .callback = snd_mrfld_8958_rpmsg_cb, ++ .remove = snd_mrfld_8958_rpmsg_remove, ++}; ++ ++static int __init snd_mrfld_8958_rpmsg_init(void) ++{ ++ return register_rpmsg_driver(&snd_mrfld_8958_rpmsg); ++} ++late_initcall(snd_mrfld_8958_rpmsg_init); ++ ++static void __exit snd_mrfld_8958_rpmsg_exit(void) ++{ ++ return unregister_rpmsg_driver(&snd_mrfld_8958_rpmsg); ++} ++module_exit(snd_mrfld_8958_rpmsg_exit); ++ ++MODULE_DESCRIPTION("ASoC Intel(R) Merrifield MID Machine driver"); ++MODULE_AUTHOR("Vinod Koul "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:mrfld_wm8958"); +diff --git a/sound/soc/intel/compress.c b/sound/soc/intel/compress.c +new file mode 100644 +index 0000000..f067468 +--- /dev/null ++++ b/sound/soc/intel/compress.c +@@ -0,0 +1,254 @@ ++/* ++ * compress.c - Intel MID Platform driver for Compress stream operations ++ * ++ * Copyright (C) 2010-2013 Intel Corp ++ * Author: Vinod Koul ++ * Author: Harsha Priya ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * ++ */ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include "platform_ipc_v2.h" ++#include "sst_platform.h" ++#include "sst_platform_pvt.h" ++ ++static void sst_compr_fragment_elapsed(void *arg) ++{ ++ struct snd_compr_stream *cstream = (struct snd_compr_stream *)arg; ++ ++ pr_debug("fragment elapsed by driver\n"); ++ if (cstream) ++ snd_compr_fragment_elapsed(cstream); ++} ++ ++static void sst_drain_notify(void *arg) ++{ ++ struct snd_compr_stream *cstream = (struct snd_compr_stream *)arg; ++ ++ pr_debug("drain notify by driver\n"); ++ if (cstream) ++ snd_compr_drain_notify(cstream); ++} ++ ++static int sst_platform_compr_open(struct snd_compr_stream *cstream) ++{ ++ ++ int ret_val = 0; ++ struct snd_compr_runtime *runtime = cstream->runtime; ++ struct sst_runtime_stream *stream; ++ struct snd_soc_pcm_runtime *rtd = cstream->private_data; ++ struct snd_soc_dai_link *dai_link = rtd->dai_link; ++ ++ pr_debug("%s called:%s\n", __func__, dai_link->cpu_dai_name); ++ ++ stream = kzalloc(sizeof(*stream), GFP_KERNEL); ++ if (!stream) ++ return -ENOMEM; ++ ++ spin_lock_init(&stream->status_lock); ++ ++ /* get the sst ops */ ++ if (!sst_dsp || !try_module_get(sst_dsp->dev->driver->owner)) { ++ pr_err("no device available to run\n"); ++ ret_val = -ENODEV; ++ goto out_ops; ++ } ++ stream->compr_ops = sst_dsp->compr_ops; ++ ++ stream->id = 0; ++ sst_set_stream_status(stream, SST_PLATFORM_INIT); ++ runtime->private_data = stream; ++ return 0; ++out_ops: ++ kfree(stream); ++ return ret_val; ++} ++ ++static int sst_platform_compr_free(struct snd_compr_stream *cstream) ++{ ++ struct sst_runtime_stream *stream; ++ struct snd_soc_pcm_runtime *rtd = cstream->private_data; ++ struct snd_soc_dai_link *dai_link = rtd->dai_link; ++ int ret_val = 0, str_id; ++ ++ stream = cstream->runtime->private_data; ++ /*need to check*/ ++ str_id = stream->id; ++ if (str_id) ++ ret_val = stream->compr_ops->close(str_id); ++ module_put(sst_dsp->dev->driver->owner); ++ kfree(stream); ++ pr_debug("%s called for dai %s: ret = %d\n", __func__, ++ dai_link->cpu_dai_name, ret_val); ++ return 0; ++} ++ ++static int sst_platform_compr_set_params(struct snd_compr_stream *cstream, ++ struct snd_compr_params *params) ++{ ++ struct sst_runtime_stream *stream; ++ int retval = 0; ++ struct snd_sst_params str_params; ++ struct sst_compress_cb cb; ++ struct snd_soc_pcm_runtime *rtd = cstream->private_data; ++ struct snd_soc_platform *platform = rtd->platform; ++ struct sst_data *ctx = snd_soc_platform_get_drvdata(platform); ++ ++ pr_debug("In function %s\n", __func__); ++ stream = cstream->runtime->private_data; ++ /* construct fw structure for this*/ ++ memset(&str_params, 0, sizeof(str_params)); ++ ++ /* fill the device type and stream id to pass to SST driver */ ++ retval = sst_fill_stream_params(cstream, ctx, &str_params, true); ++ pr_debug("compr_set_params: fill stream params ret_val = 0x%x\n", retval); ++ if (retval < 0) ++ return retval; ++ ++ switch (params->codec.id) { ++ case SND_AUDIOCODEC_MP3: { ++ str_params.codec = SST_CODEC_TYPE_MP3; ++ str_params.sparams.uc.mp3_params.num_chan = params->codec.ch_in; ++ str_params.sparams.uc.mp3_params.pcm_wd_sz = 16; ++ break; ++ } ++ ++ case SND_AUDIOCODEC_AAC: { ++ str_params.codec = SST_CODEC_TYPE_AAC; ++ str_params.sparams.uc.aac_params.num_chan = params->codec.ch_in; ++ str_params.sparams.uc.aac_params.pcm_wd_sz = 16; ++ if (params->codec.format == SND_AUDIOSTREAMFORMAT_MP4ADTS) ++ str_params.sparams.uc.aac_params.bs_format = ++ AAC_BIT_STREAM_ADTS; ++ else if (params->codec.format == SND_AUDIOSTREAMFORMAT_RAW) ++ str_params.sparams.uc.aac_params.bs_format = ++ AAC_BIT_STREAM_RAW; ++ else { ++ pr_err("Undefined format%d\n", params->codec.format); ++ return -EINVAL; ++ } ++ str_params.sparams.uc.aac_params.externalsr = ++ params->codec.sample_rate; ++ break; ++ } ++ ++ default: ++ pr_err("codec not supported, id =%d\n", params->codec.id); ++ return -EINVAL; ++ } ++ ++ str_params.aparams.ring_buf_info[0].addr = ++ virt_to_phys(cstream->runtime->buffer); ++ str_params.aparams.ring_buf_info[0].size = ++ cstream->runtime->buffer_size; ++ str_params.aparams.sg_count = 1; ++ str_params.aparams.frag_size = cstream->runtime->fragment_size; ++ ++ cb.param = cstream; ++ cb.compr_cb = sst_compr_fragment_elapsed; ++ cb.drain_cb_param = cstream; ++ cb.drain_notify = sst_drain_notify; ++ ++ retval = stream->compr_ops->open(&str_params, &cb); ++ if (retval < 0) { ++ pr_err("stream allocation failed %d\n", retval); ++ return retval; ++ } ++ ++ stream->id = retval; ++ return 0; ++} ++ ++static int sst_platform_compr_trigger(struct snd_compr_stream *cstream, int cmd) ++{ ++ struct sst_runtime_stream *stream = ++ cstream->runtime->private_data; ++ ++ return stream->compr_ops->control(cmd, stream->id); ++} ++ ++static int sst_platform_compr_pointer(struct snd_compr_stream *cstream, ++ struct snd_compr_tstamp *tstamp) ++{ ++ struct sst_runtime_stream *stream; ++ ++ stream = cstream->runtime->private_data; ++ stream->compr_ops->tstamp(stream->id, tstamp); ++ tstamp->byte_offset = tstamp->copied_total % ++ (u32)cstream->runtime->buffer_size; ++ pr_debug("calc bytes offset/copied bytes as %d\n", tstamp->byte_offset); ++ return 0; ++} ++ ++static int sst_platform_compr_ack(struct snd_compr_stream *cstream, ++ size_t bytes) ++{ ++ struct sst_runtime_stream *stream; ++ ++ stream = cstream->runtime->private_data; ++ stream->compr_ops->ack(stream->id, (unsigned long)bytes); ++ stream->bytes_written += bytes; ++ ++ return 0; ++} ++ ++static int sst_platform_compr_get_caps(struct snd_compr_stream *cstream, ++ struct snd_compr_caps *caps) ++{ ++ struct sst_runtime_stream *stream = ++ cstream->runtime->private_data; ++ ++ return stream->compr_ops->get_caps(caps); ++} ++ ++static int sst_platform_compr_get_codec_caps(struct snd_compr_stream *cstream, ++ struct snd_compr_codec_caps *codec) ++{ ++ struct sst_runtime_stream *stream = ++ cstream->runtime->private_data; ++ ++ return stream->compr_ops->get_codec_caps(codec); ++} ++ ++static int sst_platform_compr_set_metadata(struct snd_compr_stream *cstream, ++ struct snd_compr_metadata *metadata) ++{ ++ struct sst_runtime_stream *stream = ++ cstream->runtime->private_data; ++ ++ return stream->compr_ops->set_metadata(stream->id, metadata); ++} ++ ++struct snd_compr_ops sst_platform_compr_ops = { ++ ++ .open = sst_platform_compr_open, ++ .free = sst_platform_compr_free, ++ .set_params = sst_platform_compr_set_params, ++ .set_metadata = sst_platform_compr_set_metadata, ++ .trigger = sst_platform_compr_trigger, ++ .pointer = sst_platform_compr_pointer, ++ .ack = sst_platform_compr_ack, ++ .get_caps = sst_platform_compr_get_caps, ++ .get_codec_caps = sst_platform_compr_get_codec_caps, ++}; +diff --git a/sound/soc/intel/effects.c b/sound/soc/intel/effects.c +new file mode 100644 +index 0000000..6bb4199 +--- /dev/null ++++ b/sound/soc/intel/effects.c +@@ -0,0 +1,405 @@ ++/* ++ * effects.c - platform file for effects interface ++ * ++ * Copyright (C) 2013 Intel Corporation ++ * Authors: Samreen Nilofer ++ * Vinod Koul ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ */ ++#include ++#include ++#include "platform_ipc_v2.h" ++#include "sst_platform.h" ++#include "sst_platform_pvt.h" ++ ++extern struct sst_device *sst_dsp; ++extern struct device *sst_pdev; ++ ++struct effect_uuid { ++ uint32_t timeLow; ++ uint16_t timeMid; ++ uint16_t timeHiAndVersion; ++ uint16_t clockSeq; ++ uint8_t node[6]; ++}; ++ ++#define EFFECT_STRING_LEN_MAX 64 ++ ++enum sst_effect { ++ EFFECTS_CREATE = 0, ++ EFFECTS_DESTROY, ++ EFFECTS_SET_PARAMS, ++ EFFECTS_GET_PARAMS, ++}; ++ ++enum sst_mixer_output_mode { ++ SST_MEDIA0_OUT, ++ SST_MEDIA1_OUT, ++}; ++ ++static inline void sst_fill_byte_stream(struct snd_sst_bytes_v2 *bytes, u8 type, ++ u8 msg, u8 block, u8 task, u8 pipe_id, u16 len, ++ struct ipc_effect_payload *payload) ++{ ++ u32 size = sizeof(struct ipc_effect_dsp_hdr); ++ ++ bytes->type = type; ++ bytes->ipc_msg = msg; ++ bytes->block = block; ++ bytes->task_id = task; ++ bytes->pipe_id = pipe_id; ++ bytes->len = len; ++ ++ /* Copy the ipc_effect_dsp_hdr followed by the data */ ++ memcpy(bytes->bytes, payload, size); ++ memcpy(bytes->bytes + size, payload->data, len - size); ++} ++ ++static int sst_send_effects(struct ipc_effect_payload *dsp_payload, int data_len, ++ enum sst_effect effect_type) ++{ ++ struct snd_sst_bytes_v2 *bytes; ++ u32 len; ++ int ret; ++ u8 type, msg = IPC_INVALID, pipe, payload_len; ++ struct sst_data *sst; ++ ++ if (!sst_pdev) ++ return -ENODEV; ++ sst = dev_get_drvdata(sst_pdev); ++ ++ len = sizeof(*bytes) + sizeof(struct ipc_effect_dsp_hdr) + data_len; ++ ++ bytes = kzalloc(len, GFP_KERNEL); ++ if (!bytes) { ++ pr_err("kzalloc failed allocate bytes\n"); ++ return -ENOMEM; ++ } ++ ++ switch (effect_type) { ++ case EFFECTS_CREATE: ++ case EFFECTS_DESTROY: ++ type = SND_SST_BYTES_SET; ++ msg = IPC_CMD; ++ break; ++ ++ case EFFECTS_SET_PARAMS: ++ type = SND_SST_BYTES_SET; ++ msg = IPC_SET_PARAMS; ++ break; ++ ++ case EFFECTS_GET_PARAMS: ++ type = SND_SST_BYTES_GET; ++ msg = IPC_GET_PARAMS; ++ break; ++ default: ++ pr_err("No such effect %#x", effect_type); ++ ret = -EINVAL; ++ goto free_bytes; ++ } ++ ++ pipe = dsp_payload->dsp_hdr.pipe_id; ++ payload_len = sizeof(struct ipc_effect_dsp_hdr) + data_len; ++ sst_fill_byte_stream(bytes, type, msg, 1, SST_TASK_ID_MEDIA, ++ pipe, payload_len, dsp_payload); ++ ++ mutex_lock(&sst->lock); ++ ret = sst_dsp->ops->set_generic_params(SST_SET_BYTE_STREAM, bytes); ++ mutex_unlock(&sst->lock); ++ ++ if (ret) { ++ pr_err("byte_stream failed err %d pipe_id %#x\n", ret, ++ dsp_payload->dsp_hdr.pipe_id); ++ goto free_bytes; ++ } ++ ++ /* Copy only the data - skip the dsp header */ ++ if (msg == IPC_GET_PARAMS) ++ memcpy(dsp_payload->data, bytes->bytes, data_len); ++ ++free_bytes: ++ kfree(bytes); ++ return ret; ++} ++ ++static int sst_get_algo_id(const struct sst_dev_effects *pdev_effs, ++ char *uuid, u16 *algo_id) ++{ ++ int i, len; ++ ++ len = pdev_effs->effs_num_map; ++ ++ for (i = 0; i < len; i++) { ++ if (!strncmp(pdev_effs->effs_map[i].uuid, uuid, sizeof(struct effect_uuid))) { ++ *algo_id = pdev_effs->effs_map[i].algo_id; ++ return 0; ++ } ++ } ++ pr_err("no such uuid\n"); ++ return -EINVAL; ++} ++ ++static int sst_fill_effects_info(const struct sst_dev_effects *pdev_effs, ++ char *uuid, u16 pos, ++ struct ipc_dsp_effects_info *effs_info, u16 cmd_id) ++{ ++ int i, len; ++ ++ len = pdev_effs->effs_num_map; ++ ++ for (i = 0; i < len; i++) { ++ if (!strncmp(pdev_effs->effs_map[i].uuid, uuid, sizeof(struct effect_uuid))) { ++ ++ effs_info->cmd_id = cmd_id; ++ effs_info->length = (sizeof(struct ipc_dsp_effects_info) - ++ offsetof(struct ipc_dsp_effects_info, sel_pos)); ++ effs_info->sel_pos = pos; ++ effs_info->sel_algo_id = pdev_effs->effs_map[i].algo_id; ++ effs_info->cpu_load = pdev_effs->effs_res_map[i].cpuLoad; ++ effs_info->memory_usage = pdev_effs->effs_res_map[i].memoryUsage; ++ effs_info->flags = pdev_effs->effs_res_map[i].flags; ++ ++ return 0; ++ } ++ } ++ ++ pr_err("no such uuid\n"); ++ return -EINVAL; ++} ++ ++static inline void sst_fill_dsp_payload(struct ipc_effect_payload *dsp_payload, ++ u8 pipe_id, u16 mod_id, char *data) ++{ ++ dsp_payload->dsp_hdr.mod_index_id = 0xFF; ++ dsp_payload->dsp_hdr.pipe_id = pipe_id; ++ dsp_payload->dsp_hdr.mod_id = mod_id; ++ dsp_payload->data = data; ++} ++ ++static int sst_get_pipe_id(struct sst_dev_stream_map *map, int map_size, ++ int dev, int mode, u8 *pipe_id) ++{ ++ int index; ++ ++ if (map == NULL) ++ return -EINVAL; ++ ++ /* In case of global effects, dev will be 0xff */ ++ if (dev == 0xFF) { ++ *pipe_id = (mode == SST_MEDIA0_OUT) ? PIPE_MEDIA0_OUT : PIPE_MEDIA1_OUT; ++ return 0; ++ } ++ ++ for (index = 1; index < map_size; index++) { ++ if (map[index].dev_num == dev) { ++ *pipe_id = map[index].device_id; ++ break; ++ } ++ } ++ ++ if (index == map_size) { ++ pr_err("no such device %d\n", dev); ++ return -ENODEV; ++ } ++ return 0; ++} ++ ++static int sst_effects_create(struct snd_card *card, struct snd_effect *effect) ++{ ++ int ret = 0; ++ u8 pipe_id; ++ struct ipc_effect_payload dsp_payload; ++ struct ipc_dsp_effects_info effects_info; ++ struct sst_data *sst; ++ ++ if (!sst_pdev) ++ return -ENODEV; ++ sst = dev_get_drvdata(sst_pdev); ++ ++ ret = sst_fill_effects_info(&sst->pdata->pdev_effs, effect->uuid, effect->pos, ++ &effects_info, IPC_EFFECTS_CREATE); ++ if (ret < 0) ++ return ret; ++ ++ ret = sst_get_pipe_id(sst->pdata->pdev_strm_map, ++ sst->pdata->strm_map_size, ++ effect->device, effect->mode, &pipe_id); ++ if (ret < 0) ++ return ret; ++ ++ sst_fill_dsp_payload(&dsp_payload, pipe_id, 0xFF, (char *)&effects_info); ++ ++ ret = sst_send_effects(&dsp_payload, sizeof(effects_info), EFFECTS_CREATE); ++ ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int sst_effects_destroy(struct snd_card *card, struct snd_effect *effect) ++{ ++ int ret = 0; ++ u8 pipe_id; ++ struct ipc_effect_payload dsp_payload; ++ struct ipc_dsp_effects_info effects_info; ++ struct sst_data *sst; ++ ++ if (!sst_pdev) ++ return -ENODEV; ++ sst = dev_get_drvdata(sst_pdev); ++ ++ ret = sst_fill_effects_info(&sst->pdata->pdev_effs, effect->uuid, effect->pos, ++ &effects_info, IPC_EFFECTS_DESTROY); ++ if (ret < 0) ++ return ret; ++ ++ ret = sst_get_pipe_id(sst->pdata->pdev_strm_map, ++ sst->pdata->strm_map_size, ++ effect->device, effect->mode, &pipe_id); ++ if (ret < 0) ++ return ret; ++ ++ sst_fill_dsp_payload(&dsp_payload, pipe_id, 0xFF, (char *)&effects_info); ++ ++ ret = sst_send_effects(&dsp_payload, sizeof(effects_info), EFFECTS_DESTROY); ++ ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int sst_effects_set_params(struct snd_card *card, ++ struct snd_effect_params *params) ++{ ++ int ret = 0; ++ u8 pipe_id; ++ u16 algo_id; ++ struct ipc_effect_payload dsp_payload; ++ struct sst_data *sst; ++ ++ if (!sst_pdev) ++ return -ENODEV; ++ sst = dev_get_drvdata(sst_pdev); ++ ++ ret = sst_get_algo_id(&sst->pdata->pdev_effs, params->uuid, &algo_id); ++ if (ret < 0) ++ return ret; ++ ++ ret = sst_get_pipe_id(sst->pdata->pdev_strm_map, ++ sst->pdata->strm_map_size, ++ params->device, SST_MEDIA0_OUT, &pipe_id); ++ if (ret < 0) ++ return ret; ++ ++ sst_fill_dsp_payload(&dsp_payload, pipe_id, algo_id, params->buffer); ++ ++ ret = sst_send_effects(&dsp_payload, params->size, EFFECTS_SET_PARAMS); ++ ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int sst_effects_get_params(struct snd_card *card, ++ struct snd_effect_params *params) ++{ ++ int ret = 0; ++ u8 pipe_id; ++ u16 algo_id; ++ struct ipc_effect_payload dsp_payload; ++ struct sst_data *sst; ++ ++ if (!sst_pdev) ++ return -ENODEV; ++ sst = dev_get_drvdata(sst_pdev); ++ ++ ret = sst_get_algo_id(&sst->pdata->pdev_effs, params->uuid, &algo_id); ++ if (ret < 0) ++ return ret; ++ ++ ret = sst_get_pipe_id(sst->pdata->pdev_strm_map, ++ sst->pdata->strm_map_size, ++ params->device, SST_MEDIA0_OUT, &pipe_id); ++ if (ret < 0) ++ return ret; ++ ++ sst_fill_dsp_payload(&dsp_payload, pipe_id, algo_id, params->buffer); ++ ++ ret = sst_send_effects(&dsp_payload, params->size, EFFECTS_GET_PARAMS); ++ ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static int sst_query_num_effects(struct snd_card *card) ++{ ++ struct sst_data *sst; ++ ++ if (!sst_pdev) ++ return -ENODEV; ++ sst = dev_get_drvdata(sst_pdev); ++ ++ return sst->pdata->pdev_effs.effs_num_map; ++} ++ ++static int sst_query_effects_caps(struct snd_card *card, ++ struct snd_effect_caps *caps) ++{ ++ struct sst_data *sst; ++ struct sst_dev_effects_map *effs_map; ++ unsigned int num_effects, offset = 0; ++ char *dstn; ++ int i; ++ ++ if (!sst_pdev) ++ return -ENODEV; ++ sst = dev_get_drvdata(sst_pdev); ++ ++ effs_map = sst->pdata->pdev_effs.effs_map; ++ num_effects = sst->pdata->pdev_effs.effs_num_map; ++ ++ if (caps->size < (num_effects * MAX_DESCRIPTOR_SIZE)) { ++ pr_err("buffer size is insufficient\n"); ++ return -ENOMEM; ++ } ++ ++ dstn = caps->buffer; ++ for (i = 0; i < num_effects; i++) { ++ memcpy(dstn + offset, effs_map[i].descriptor, MAX_DESCRIPTOR_SIZE); ++ offset += MAX_DESCRIPTOR_SIZE; ++ } ++ caps->size = offset; ++ ++ return 0; ++} ++ ++struct snd_effect_ops effects_ops = { ++ .create = sst_effects_create, ++ .destroy = sst_effects_destroy, ++ .set_params = sst_effects_set_params, ++ .get_params = sst_effects_get_params, ++ .query_num_effects = sst_query_num_effects, ++ .query_effect_caps = sst_query_effects_caps, ++}; +diff --git a/sound/soc/intel/pcm.c b/sound/soc/intel/pcm.c +new file mode 100644 +index 0000000..8600147 +--- /dev/null ++++ b/sound/soc/intel/pcm.c +@@ -0,0 +1,1021 @@ ++/* ++ * pcm.c - Intel MID Platform driver file implementing PCM functionality ++ * ++ * Copyright (C) 2010-2013 Intel Corp ++ * Author: Vinod Koul ++ * Author: Harsha Priya ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * ++ */ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "platform_ipc_v2.h" ++#include "sst_platform.h" ++#include "sst_platform_pvt.h" ++ ++struct device *sst_pdev; ++struct sst_device *sst_dsp; ++extern struct snd_compr_ops sst_platform_compr_ops; ++extern struct snd_effect_ops effects_ops; ++ ++static DEFINE_MUTEX(sst_dsp_lock); ++ ++static struct snd_pcm_hardware sst_platform_pcm_hw = { ++ .info = (SNDRV_PCM_INFO_INTERLEAVED | ++ SNDRV_PCM_INFO_DOUBLE | ++ SNDRV_PCM_INFO_PAUSE | ++ SNDRV_PCM_INFO_RESUME | ++ SNDRV_PCM_INFO_MMAP| ++ SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_BLOCK_TRANSFER | ++ SNDRV_PCM_INFO_SYNC_START), ++ .formats = (SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_U16 | ++ SNDRV_PCM_FMTBIT_S24 | SNDRV_PCM_FMTBIT_U24 | ++ SNDRV_PCM_FMTBIT_S32 | SNDRV_PCM_FMTBIT_U32), ++ .rates = (SNDRV_PCM_RATE_8000| ++ SNDRV_PCM_RATE_16000 | ++ SNDRV_PCM_RATE_44100 | ++ SNDRV_PCM_RATE_48000), ++ .rate_min = SST_MIN_RATE, ++ .rate_max = SST_MAX_RATE, ++ .channels_min = SST_MIN_CHANNEL, ++ .channels_max = SST_MAX_CHANNEL, ++ .buffer_bytes_max = SST_MAX_BUFFER, ++ .period_bytes_min = SST_MIN_PERIOD_BYTES, ++ .period_bytes_max = SST_MAX_PERIOD_BYTES, ++ .periods_min = SST_MIN_PERIODS, ++ .periods_max = SST_MAX_PERIODS, ++ .fifo_size = SST_FIFO_SIZE, ++}; ++ ++static int sst_platform_ihf_set_tdm_slot(struct snd_soc_dai *dai, ++ unsigned int tx_mask, unsigned int rx_mask, ++ int slots, int slot_width) { ++ struct snd_sst_runtime_params params_data; ++ int channels = slots; ++ ++ /* registering with SST driver to get access to SST APIs to use */ ++ if (!sst_dsp) { ++ pr_err("sst: DSP not registered\n"); ++ return -EIO; ++ } ++ params_data.type = SST_SET_CHANNEL_INFO; ++ params_data.str_id = SND_SST_DEVICE_IHF; ++ params_data.size = sizeof(channels); ++ params_data.addr = &channels; ++ return sst_dsp->ops->set_generic_params(SST_SET_RUNTIME_PARAMS, ++ (void *)¶ms_data); ++} ++ ++static int sst_media_digital_mute(struct snd_soc_dai *dai, int mute, int stream) ++{ ++ ++ pr_debug("%s: enter, mute=%d dai-name=%s dir=%d\n", __func__, mute, dai->name, stream); ++ ++#if IS_BUILTIN(CONFIG_SST_MRFLD_DPCM) ++ sst_send_pipe_gains(dai, stream, mute); ++#endif ++ ++ return 0; ++} ++ ++/* helper functions */ ++void sst_set_stream_status(struct sst_runtime_stream *stream, ++ int state) ++{ ++ unsigned long flags; ++ spin_lock_irqsave(&stream->status_lock, flags); ++ stream->stream_status = state; ++ spin_unlock_irqrestore(&stream->status_lock, flags); ++} ++ ++static inline int sst_get_stream_status(struct sst_runtime_stream *stream) ++{ ++ int state; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&stream->status_lock, flags); ++ state = stream->stream_status; ++ spin_unlock_irqrestore(&stream->status_lock, flags); ++ return state; ++} ++ ++static void sst_fill_alloc_params(struct snd_pcm_substream *substream, ++ struct snd_sst_alloc_params_ext *alloc_param) ++{ ++ unsigned int channels; ++ snd_pcm_uframes_t period_size; ++ ssize_t periodbytes; ++ ssize_t buffer_bytes = snd_pcm_lib_buffer_bytes(substream); ++ u32 buffer_addr = virt_to_phys(substream->dma_buffer.area); ++ ++ channels = substream->runtime->channels; ++ period_size = substream->runtime->period_size; ++ periodbytes = samples_to_bytes(substream->runtime, period_size); ++ alloc_param->ring_buf_info[0].addr = buffer_addr; ++ alloc_param->ring_buf_info[0].size = buffer_bytes; ++ alloc_param->sg_count = 1; ++ alloc_param->reserved = 0; ++ alloc_param->frag_size = periodbytes * channels; ++ ++ pr_debug("period_size = %d\n", alloc_param->frag_size); ++ pr_debug("ring_buf_addr = 0x%x\n", alloc_param->ring_buf_info[0].addr); ++} ++static void sst_fill_pcm_params(struct snd_pcm_substream *substream, ++ struct snd_sst_stream_params *param) ++{ ++ param->uc.pcm_params.num_chan = (u8) substream->runtime->channels; ++ param->uc.pcm_params.pcm_wd_sz = substream->runtime->sample_bits; ++ param->uc.pcm_params.sfreq = substream->runtime->rate; ++ ++ /* PCM stream via ALSA interface */ ++ param->uc.pcm_params.use_offload_path = 0; ++ param->uc.pcm_params.reserved2 = 0; ++ memset(param->uc.pcm_params.channel_map, 0, sizeof(u8)); ++ pr_debug("sfreq= %d, wd_sz = %d\n", ++ param->uc.pcm_params.sfreq, param->uc.pcm_params.pcm_wd_sz); ++ ++} ++ ++#define ASSIGN_PIPE_ID(periodtime, lowlatency, deepbuffer) \ ++ ((periodtime) <= (lowlatency) ? PIPE_LOW_PCM0_IN : \ ++ ((periodtime) >= (deepbuffer) ? PIPE_MEDIA3_IN : PIPE_MEDIA1_IN)) ++ ++static int sst_get_stream_mapping(int dev, int sdev, int dir, ++ struct sst_dev_stream_map *map, int size, u8 pipe_id, ++ const struct sst_lowlatency_deepbuff *ll_db) ++{ ++ int index; ++ unsigned long pt = 0, ll = 0, db = 0; ++ ++ if (map == NULL) ++ return -EINVAL; ++ ++ pr_debug("dev %d sdev %d dir %d\n", dev, sdev, dir); ++ ++ /* index 0 is not used in stream map */ ++ for (index = 1; index < size; index++) { ++ if ((map[index].dev_num == dev) && ++ (map[index].subdev_num == sdev) && ++ (map[index].direction == dir)) { ++ /* device id for the probe is assigned dynamically */ ++ if (map[index].status == SST_DEV_MAP_IN_USE) { ++ return index; ++ } else if (map[index].status == SST_DEV_MAP_FREE) { ++ map[index].status = SST_DEV_MAP_IN_USE; ++ ++ if (map[index].dev_num == MERR_SALTBAY_PROBE) { ++ map[index].device_id = pipe_id; ++ ++ } else if (map[index].dev_num == MERR_SALTBAY_AUDIO) { ++ if (!ll_db->low_latency || !ll_db->deep_buffer) ++ return -EINVAL; ++ ++ pt = ll_db->period_time; ++ ll = *(ll_db->low_latency); ++ db = *(ll_db->deep_buffer); ++ ++ pr_debug("PT %lu LL %lu DB %lu\n", pt, ll, db); ++ ++ map[index].device_id = ASSIGN_PIPE_ID(pt, ++ ll, db); ++ } ++ pr_debug("%s: pipe_id 0%x index %d", __func__, ++ map[index].device_id, index); ++ ++ return index; ++ } ++ } ++ } ++ return 0; ++} ++ ++int sst_fill_stream_params(void *substream, ++ const struct sst_data *ctx, struct snd_sst_params *str_params, bool is_compress) ++{ ++ int map_size; ++ int index; ++ struct sst_dev_stream_map *map; ++ struct snd_pcm_substream *pstream = NULL; ++ struct snd_compr_stream *cstream = NULL; ++ ++ map = ctx->pdata->pdev_strm_map; ++ map_size = ctx->pdata->strm_map_size; ++ ++ if (is_compress == true) ++ cstream = (struct snd_compr_stream *)substream; ++ else ++ pstream = (struct snd_pcm_substream *)substream; ++ ++ str_params->stream_type = SST_STREAM_TYPE_MUSIC; ++ ++ /* For pcm streams */ ++ if (pstream) { ++ index = sst_get_stream_mapping(pstream->pcm->device, ++ pstream->number, pstream->stream, ++ map, map_size, ctx->pipe_id, &ctx->ll_db); ++ if (index <= 0) ++ return -EINVAL; ++ ++ str_params->stream_id = index; ++ str_params->device_type = map[index].device_id; ++ str_params->task = map[index].task_id; ++ ++ if (str_params->device_type == SST_PROBE_IN) ++ str_params->stream_type = SST_STREAM_TYPE_PROBE; ++ ++ pr_debug("str_id = %d, device_type = 0x%x, task = %d", ++ str_params->stream_id, str_params->device_type, ++ str_params->task); ++ ++ str_params->ops = (u8)pstream->stream; ++ } ++ ++ if (cstream) { ++ /* FIXME: Add support for subdevice number in ++ * snd_compr_stream */ ++ index = sst_get_stream_mapping(cstream->device->device, ++ 0, cstream->direction, ++ map, map_size, ctx->pipe_id, &ctx->ll_db); ++ if (index <= 0) ++ return -EINVAL; ++ str_params->stream_id = index; ++ str_params->device_type = map[index].device_id; ++ str_params->task = map[index].task_id; ++ pr_debug("compress str_id = %d, device_type = 0x%x, task = %d", ++ str_params->stream_id, str_params->device_type, ++ str_params->task); ++ ++ str_params->ops = (u8)cstream->direction; ++ } ++ return 0; ++} ++ ++#define CALC_PERIODTIME(period_size, rate) (((period_size) * 1000) / (rate)) ++ ++static int sst_platform_alloc_stream(struct snd_pcm_substream *substream, ++ struct snd_soc_platform *platform) ++{ ++ struct sst_runtime_stream *stream = ++ substream->runtime->private_data; ++ struct snd_sst_stream_params param = {{{0,},},}; ++ struct snd_sst_params str_params = {0}; ++ struct snd_sst_alloc_params_ext alloc_params = {0}; ++ int ret_val = 0; ++ struct sst_data *ctx = snd_soc_platform_get_drvdata(platform); ++ ++ /* set codec params and inform SST driver the same */ ++ sst_fill_pcm_params(substream, ¶m); ++ sst_fill_alloc_params(substream, &alloc_params); ++ substream->runtime->dma_area = substream->dma_buffer.area; ++ str_params.sparams = param; ++ str_params.aparams = alloc_params; ++ str_params.codec = SST_CODEC_TYPE_PCM; ++ ++ ctx->ll_db.period_time = CALC_PERIODTIME(substream->runtime->period_size, ++ substream->runtime->rate); ++ ++ /* fill the device type and stream id to pass to SST driver */ ++ ret_val = sst_fill_stream_params(substream, ctx, &str_params, false); ++ pr_debug("platform prepare: fill stream params ret_val = 0x%x\n", ret_val); ++ if (ret_val < 0) ++ return ret_val; ++ ++ stream->stream_info.str_id = str_params.stream_id; ++ ++ ret_val = stream->ops->open(&str_params); ++ pr_debug("platform prepare: stream open ret_val = 0x%x\n", ret_val); ++ if (ret_val <= 0) ++ return ret_val; ++ ++ pr_debug("platform allocated strid: %d\n", stream->stream_info.str_id); ++ ++ return ret_val; ++} ++ ++static void sst_period_elapsed(void *mad_substream) ++{ ++ struct snd_pcm_substream *substream = mad_substream; ++ struct sst_runtime_stream *stream; ++ int status; ++ ++ if (!substream || !substream->runtime) { ++ pr_debug("In %s : Null Substream pointer\n", __func__); ++ return; ++ } ++ stream = substream->runtime->private_data; ++ if (!stream) { ++ pr_debug("In %s : Null Stream pointer\n", __func__); ++ return; ++ } ++ status = sst_get_stream_status(stream); ++ if (status != SST_PLATFORM_RUNNING) { ++ pr_debug("In %s : Stream Status=%d\n", __func__, status); ++ return; ++ } ++ snd_pcm_period_elapsed(substream); ++} ++ ++static int sst_platform_init_stream(struct snd_pcm_substream *substream) ++{ ++ struct sst_runtime_stream *stream = ++ substream->runtime->private_data; ++ int ret_val; ++ ++ pr_debug("setting buffer ptr param\n"); ++ sst_set_stream_status(stream, SST_PLATFORM_INIT); ++ stream->stream_info.period_elapsed = sst_period_elapsed; ++ stream->stream_info.mad_substream = substream; ++ stream->stream_info.buffer_ptr = 0; ++ stream->stream_info.sfreq = substream->runtime->rate; ++ pr_debug("pcm_substream %p, period_elapsed %p\n", ++ stream->stream_info.mad_substream, stream->stream_info.period_elapsed); ++ ret_val = stream->ops->device_control( ++ SST_SND_STREAM_INIT, &stream->stream_info); ++ if (ret_val) ++ pr_err("control_set ret error %d\n", ret_val); ++ return ret_val; ++ ++} ++ ++static inline int power_up_sst(struct sst_runtime_stream *sst) ++{ ++ return sst->ops->power(true); ++} ++ ++static inline int power_down_sst(struct sst_runtime_stream *sst) ++{ ++ return sst->ops->power(false); ++} ++/* end -- helper functions */ ++ ++static int sst_media_open(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ int ret_val = 0; ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ struct sst_runtime_stream *stream; ++ ++ stream = kzalloc(sizeof(*stream), GFP_KERNEL); ++ if (!stream) ++ return -ENOMEM; ++ ++ spin_lock_init(&stream->status_lock); ++ ++ /* get the sst ops */ ++ mutex_lock(&sst_dsp_lock); ++ if (!sst_dsp || ++ !try_module_get(sst_dsp->dev->driver->owner)) { ++ pr_err("no device available to run\n"); ++ ret_val = -ENODEV; ++ goto out_ops; ++ } ++ stream->ops = sst_dsp->ops; ++ mutex_unlock(&sst_dsp_lock); ++ ++ stream->stream_info.str_id = 0; ++ sst_set_stream_status(stream, SST_PLATFORM_UNINIT); ++ stream->stream_info.mad_substream = substream; ++ runtime->private_data = stream; ++ ++ if (strstr(dai->name, "Power-cpu-dai")) ++ return power_up_sst(stream); ++ ++ /* Make sure, that the period size is always even */ ++ snd_pcm_hw_constraint_step(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_PERIODS, 2); ++ ++ pr_debug("buf_ptr %llu\n", stream->stream_info.buffer_ptr); ++ return snd_pcm_hw_constraint_integer(runtime, ++ SNDRV_PCM_HW_PARAM_PERIODS); ++out_ops: ++ kfree(stream); ++ mutex_unlock(&sst_dsp_lock); ++ return ret_val; ++} ++ ++static void sst_free_stream_in_use(struct sst_dev_stream_map *map, int str_id) ++{ ++#if IS_BUILTIN(CONFIG_SST_MRFLD_DPCM) ++ return; ++#else ++ if ((map[str_id].dev_num == MERR_SALTBAY_AUDIO) || ++ (map[str_id].dev_num == MERR_SALTBAY_PROBE)) { ++ ++ /* Do nothing in capture for audio device */ ++ if ((map[str_id].dev_num == MERR_SALTBAY_AUDIO) && ++ (map[str_id].direction == SNDRV_PCM_STREAM_CAPTURE)) ++ return; ++ if ((map[str_id].task_id == SST_TASK_ID_MEDIA) && ++ (map[str_id].status == SST_DEV_MAP_IN_USE)) { ++ pr_debug("str_id %d device_id 0x%x\n", str_id, map[str_id].device_id); ++ map[str_id].status = SST_DEV_MAP_FREE; ++ map[str_id].device_id = PIPE_RSVD; ++ } ++ } ++ return; ++#endif ++} ++ ++static void sst_media_close(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct sst_runtime_stream *stream; ++ int ret_val = 0, str_id; ++ struct sst_data *ctx = snd_soc_platform_get_drvdata(dai->platform); ++ ++ stream = substream->runtime->private_data; ++ if (strstr(dai->name, "Power-cpu-dai")) ++ ret_val = power_down_sst(stream); ++ ++ str_id = stream->stream_info.str_id; ++ if (str_id) ++ ret_val = stream->ops->close(str_id); ++ sst_free_stream_in_use(ctx->pdata->pdev_strm_map, str_id); ++ module_put(sst_dsp->dev->driver->owner); ++ kfree(stream); ++ pr_debug("%s: %d\n", __func__, ret_val); ++} ++ ++static int sst_dpcm_probe_cmd(struct snd_soc_platform *platform, ++ struct snd_pcm_substream *substream, u16 pipe_id, bool on) ++{ ++ int ret = 0; ++#if IS_BUILTIN(CONFIG_SST_MRFLD_DPCM) ++ if (substream->pcm->device == MERR_DPCM_PROBE) ++ ret = sst_dpcm_probe_send(platform, pipe_id, substream->number, ++ substream->stream, on); ++#endif ++ return ret; ++} ++ ++static inline unsigned int get_current_pipe_id(struct snd_soc_platform *platform, ++ struct snd_pcm_substream *substream) ++{ ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ struct sst_dev_stream_map *map = sst->pdata->pdev_strm_map; ++ struct sst_runtime_stream *stream = ++ substream->runtime->private_data; ++ u32 str_id = stream->stream_info.str_id; ++ unsigned int pipe_id; ++ pipe_id = map[str_id].device_id; ++ ++ pr_debug("%s: got pipe_id = %#x for str_id = %d\n", ++ __func__, pipe_id, str_id); ++ return pipe_id; ++} ++ ++static void sst_probe_close(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ u16 probe_pipe_id = get_current_pipe_id(dai->platform, substream); ++ ++ sst_dpcm_probe_cmd(dai->platform, substream, probe_pipe_id, false); ++ sst_media_close(substream, dai); ++} ++ ++static int sst_media_prepare(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct sst_runtime_stream *stream; ++ int ret_val = 0, str_id; ++ ++ pr_debug("%s\n", __func__); ++ ++ stream = substream->runtime->private_data; ++ str_id = stream->stream_info.str_id; ++ if (stream->stream_info.str_id) ++ return ret_val; ++ ++ ret_val = sst_platform_alloc_stream(substream, dai->platform); ++ if (ret_val <= 0) ++ return ret_val; ++ snprintf(substream->pcm->id, sizeof(substream->pcm->id), ++ "%d", stream->stream_info.str_id); ++ ++ ret_val = sst_platform_init_stream(substream); ++ if (ret_val) ++ return ret_val; ++ substream->runtime->hw.info = SNDRV_PCM_INFO_BLOCK_TRANSFER; ++ ++ return ret_val; ++} ++ ++static int sst_probe_prepare(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ u16 probe_pipe_id; ++ ++ sst_media_prepare(substream, dai); ++ probe_pipe_id = get_current_pipe_id(dai->platform, substream); ++ ++ return sst_dpcm_probe_cmd(dai->platform, substream, probe_pipe_id, true); ++} ++ ++static int sst_media_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, ++ struct snd_soc_dai *dai) ++{ ++ pr_debug("%s\n", __func__); ++ ++ snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); ++ memset(substream->runtime->dma_area, 0, params_buffer_bytes(params)); ++ return 0; ++} ++ ++static int sst_media_hw_free(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ return snd_pcm_lib_free_pages(substream); ++} ++ ++static struct snd_soc_dai_ops sst_media_dai_ops = { ++ .startup = sst_media_open, ++ .shutdown = sst_media_close, ++ .prepare = sst_media_prepare, ++ .hw_params = sst_media_hw_params, ++ .hw_free = sst_media_hw_free, ++ .set_tdm_slot = sst_platform_ihf_set_tdm_slot, ++ .mute_stream = sst_media_digital_mute, ++}; ++ ++static struct snd_soc_dai_ops sst_probe_dai_ops = { ++ .startup = sst_media_open, ++ .hw_params = sst_media_hw_params, ++ .hw_free = sst_media_hw_free, ++ .shutdown = sst_probe_close, ++ .prepare = sst_probe_prepare, ++}; ++ ++static struct snd_soc_dai_ops sst_loopback_dai_ops = { ++ .startup = sst_media_open, ++ .shutdown = sst_media_close, ++ .prepare = sst_media_prepare, ++}; ++ ++static struct snd_soc_dai_ops sst_compr_dai_ops = { ++ .mute_stream = sst_media_digital_mute, ++}; ++ ++static struct snd_soc_dai_driver sst_platform_dai[] = { ++{ ++ .name = SST_HEADSET_DAI, ++ .ops = &sst_media_dai_ops, ++ .playback = { ++ .stream_name = "Headset Playback", ++ .channels_min = SST_STEREO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++ .capture = { ++ .stream_name = "Headset Capture", ++ .channels_min = 1, ++ .channels_max = 2, ++ .rates = SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++}, ++{ ++ .name = SST_DEEPBUFFER_DAI, ++ .ops = &sst_media_dai_ops, ++ .playback = { ++ .stream_name = "Deepbuffer Playback", ++ .channels_min = SST_STEREO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++}, ++{ ++ .name = SST_LOWLATENCY_DAI, ++ .ops = &sst_media_dai_ops, ++ .playback = { ++ .stream_name = "Low Latency Playback", ++ .channels_min = SST_STEREO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++}, ++{ ++ .name = SST_SPEAKER_DAI, ++ .ops = &sst_media_dai_ops, ++ .playback = { ++ .stream_name = "Speaker Playback", ++ .channels_min = SST_MONO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++}, ++{ ++ .name = SST_VOICE_DAI, ++ .playback = { ++ .stream_name = "Voice Downlink", ++ .channels_min = SST_MONO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++ .capture = { ++ .stream_name = "Voice Uplink", ++ .channels_min = SST_MONO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++}, ++{ ++ .name = SST_COMPRESS_DAI, ++ .compress_dai = 1, ++ .ops = &sst_compr_dai_ops, ++ .playback = { ++ .stream_name = "Compress Playback", ++ .channels_min = SST_STEREO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++}, ++{ ++ .name = SST_VIRTUAL_DAI, ++ .playback = { ++ .stream_name = "Virtual Playback", ++ .channels_min = SST_STEREO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++}, ++{ ++ .name = SST_POWER_DAI, ++ .ops = &sst_media_dai_ops, ++ .playback = { ++ .stream_name = "Dummy Power Stream", ++ .channels_min = SST_MONO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_8000_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, ++ }, ++}, ++{ ++ .name = SST_PROBE_DAI, ++ .ops = &sst_probe_dai_ops, ++ .playback = { ++ .stream_name = "Probe Playback", ++ .channels_min = SST_MONO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_8000 | ++ SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, ++ }, ++ .capture = { ++ .stream_name = "Probe Capture", ++ .channels_min = SST_MONO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_8000 | ++ SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, ++ }, ++}, ++{ ++ .name = SST_VOIP_DAI, ++ .ops = &sst_media_dai_ops, ++ .playback = { ++ .stream_name = "VOIP Playback", ++ .channels_min = SST_MONO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++ .capture = { ++ .stream_name = "VOIP Capture", ++ .channels_min = SST_MONO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++}, ++{ ++ .name = SST_LOOPBACK_DAI, ++ .ops = &sst_loopback_dai_ops, ++ .capture = { ++ .stream_name = "Loopback Capture", ++ .channels_min = SST_MONO, ++ .channels_max = SST_MONO, ++ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++}, ++/*BE CPU Dais */ ++{ ++ .name = "ssp2-codec", ++ .playback = { ++ .stream_name = "ssp2 playback", ++ .channels_min = SST_STEREO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++ .capture = { ++ .stream_name = "ssp2 Capture", ++ .channels_min = SST_STEREO, ++ .channels_max = SST_STEREO, ++ .rates = SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE, ++ }, ++}, ++}; ++ ++static int sst_platform_open(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime; ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai_link *dai_link = rtd->dai_link; ++ ++ pr_debug("sst_platform_open called:%s\n", dai_link->cpu_dai_name); ++ if (substream->pcm->internal) ++ return 0; ++ runtime = substream->runtime; ++ runtime->hw = sst_platform_pcm_hw; ++ return 0; ++} ++ ++static int sst_platform_close(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai_link *dai_link = rtd->dai_link; ++ pr_debug("sst_platform_close called:%s\n", dai_link->cpu_dai_name); ++ return 0; ++} ++ ++static int sst_platform_pcm_trigger(struct snd_pcm_substream *substream, ++ int cmd) ++{ ++ int ret_val = 0, str_id; ++ struct sst_runtime_stream *stream; ++ int str_cmd, status, alsa_state; ++ ++ if (substream->pcm->internal) ++ return 0; ++ pr_debug("sst_platform_pcm_trigger called\n"); ++ stream = substream->runtime->private_data; ++ str_id = stream->stream_info.str_id; ++ alsa_state = substream->runtime->status->state; ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ pr_debug("Trigger Start\n"); ++ str_cmd = SST_SND_START; ++ status = SST_PLATFORM_RUNNING; ++ stream->stream_info.mad_substream = substream; ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ pr_debug("Trigger stop\n"); ++ str_cmd = SST_SND_DROP; ++ status = SST_PLATFORM_DROPPED; ++ break; ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ pr_debug("Trigger pause\n"); ++ str_cmd = SST_SND_PAUSE; ++ status = SST_PLATFORM_PAUSED; ++ break; ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ pr_debug("Trigger pause release\n"); ++ str_cmd = SST_SND_RESUME; ++ status = SST_PLATFORM_RUNNING; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ret_val = stream->ops->device_control(str_cmd, &str_id); ++ if (!ret_val) ++ sst_set_stream_status(stream, status); ++ ++ return ret_val; ++} ++ ++ ++static snd_pcm_uframes_t sst_platform_pcm_pointer ++ (struct snd_pcm_substream *substream) ++{ ++ struct sst_runtime_stream *stream; ++ int ret_val, status; ++ struct pcm_stream_info *str_info; ++ ++ stream = substream->runtime->private_data; ++ status = sst_get_stream_status(stream); ++ if (status == SST_PLATFORM_INIT) ++ return 0; ++ str_info = &stream->stream_info; ++ ret_val = stream->ops->device_control( ++ SST_SND_BUFFER_POINTER, str_info); ++ if (ret_val) { ++ pr_err("sst: error code = %d\n", ret_val); ++ return ret_val; ++ } ++ substream->runtime->soc_delay = str_info->pcm_delay; ++ return str_info->buffer_ptr; ++} ++ ++static struct snd_pcm_ops sst_platform_ops = { ++ .open = sst_platform_open, ++ .close = sst_platform_close, ++ .ioctl = snd_pcm_lib_ioctl, ++ .trigger = sst_platform_pcm_trigger, ++ .pointer = sst_platform_pcm_pointer, ++}; ++ ++static void sst_pcm_free(struct snd_pcm *pcm) ++{ ++ pr_debug("sst_pcm_free called\n"); ++ snd_pcm_lib_preallocate_free_for_all(pcm); ++} ++ ++static int sst_pcm_new(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_dai *dai = rtd->cpu_dai; ++ struct snd_pcm *pcm = rtd->pcm; ++ int retval = 0; ++ ++ pr_debug("sst_pcm_new called\n"); ++ if (dai->driver->playback.channels_min || ++ dai->driver->capture.channels_min) { ++ retval = snd_pcm_lib_preallocate_pages_for_all(pcm, ++ SNDRV_DMA_TYPE_CONTINUOUS, ++ snd_dma_continuous_data(GFP_DMA), ++ SST_MAX_BUFFER, SST_MAX_BUFFER); ++ if (retval) { ++ pr_err("dma buffer allocationf fail\n"); ++ return retval; ++ } ++ } ++ return retval; ++} ++ ++static int sst_soc_probe(struct snd_soc_platform *platform) ++{ ++ struct sst_data *ctx = snd_soc_platform_get_drvdata(platform); ++ struct soft_platform_id spid; ++ int ret = 0; ++ ++ memcpy(&spid, ctx->pdata->spid, sizeof(spid)); ++ pr_err("Enter:%s\n", __func__); ++ ++#if IS_BUILTIN(CONFIG_SST_MRFLD_DPCM) ++ ret = sst_dsp_init_v2_dpcm(platform); ++#else ++ ret = sst_dsp_init(platform); ++#endif ++// if (ret) ++// return ret; ++// ret = snd_soc_register_effect(platform->card, &effects_ops); ++ ++ return ret; ++} ++ ++static int sst_soc_remove(struct snd_soc_platform *platform) ++{ ++ pr_debug("%s called\n", __func__); ++ return 0; ++} ++ ++static struct snd_soc_platform_driver sst_soc_platform_drv = { ++ .probe = sst_soc_probe, ++ .remove = sst_soc_remove, ++ .ops = &sst_platform_ops, ++ .compr_ops = &sst_platform_compr_ops, ++ .pcm_new = sst_pcm_new, ++ .pcm_free = sst_pcm_free, ++ .read = sst_soc_read, ++ .write = sst_soc_write, ++}; ++ ++int sst_register_dsp(struct sst_device *sst_dev) ++{ ++ if (!sst_dev) ++ return -ENODEV; ++ mutex_lock(&sst_dsp_lock); ++ if (sst_dsp) { ++ pr_err("we already have a device %s\n", sst_dsp->name); ++ mutex_unlock(&sst_dsp_lock); ++ return -EEXIST; ++ } ++ pr_debug("registering device %s\n", sst_dev->name); ++ ++ sst_dsp = sst_dev; ++ mutex_unlock(&sst_dsp_lock); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(sst_register_dsp); ++ ++int sst_unregister_dsp(struct sst_device *dev) ++{ ++ if (dev != sst_dsp) ++ return -EINVAL; ++ ++ mutex_lock(&sst_dsp_lock); ++ if (sst_dsp) { ++ pr_debug("unregister %s\n", sst_dsp->name); ++ mutex_unlock(&sst_dsp_lock); ++ return -EIO; ++ } ++ ++ sst_dsp = NULL; ++ mutex_unlock(&sst_dsp_lock); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(sst_unregister_dsp); ++ ++static const struct snd_soc_component_driver pcm_component = { ++ .name = "pcm", ++}; ++ ++static int sst_platform_probe(struct platform_device *pdev) ++{ ++ struct sst_data *sst; ++ int ret; ++ struct sst_platform_data *pdata = pdev->dev.platform_data; ++ ++ pr_debug("sst_platform_probe called\n"); ++ sst = devm_kzalloc(&pdev->dev, sizeof(*sst), GFP_KERNEL); ++ if (sst == NULL) { ++ pr_err("kzalloc failed\n"); ++ return -ENOMEM; ++ } ++ ++ sst_pdev = &pdev->dev; ++ sst->pdata = pdata; ++ mutex_init(&sst->lock); ++ dev_set_drvdata(&pdev->dev, sst); ++ ++ ret = snd_soc_register_platform(&pdev->dev, ++ &sst_soc_platform_drv); ++ if (ret) { ++ pr_err("registering soc platform failed\n"); ++ return ret; ++ } ++ ret = snd_soc_register_component(&pdev->dev, &pcm_component, ++ sst_platform_dai, ARRAY_SIZE(sst_platform_dai)); ++ if (ret) { ++ pr_err("registering cpu dais failed\n"); ++ snd_soc_unregister_platform(&pdev->dev); ++ } ++ ++ return ret; ++} ++ ++static int sst_platform_remove(struct platform_device *pdev) ++{ ++ ++ snd_soc_unregister_component(&pdev->dev); ++ snd_soc_unregister_platform(&pdev->dev); ++ pr_debug("sst_platform_remove success\n"); ++ return 0; ++} ++ ++static struct platform_driver sst_platform_driver = { ++ .driver = { ++ .name = "sst-platform", ++ .owner = THIS_MODULE, ++ }, ++ .probe = sst_platform_probe, ++ .remove = sst_platform_remove, ++}; ++ ++module_platform_driver(sst_platform_driver); ++ ++MODULE_DESCRIPTION("ASoC Intel(R) MID Platform driver"); ++MODULE_AUTHOR("Vinod Koul "); ++MODULE_AUTHOR("Harsha Priya "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:sst-platform"); +diff --git a/sound/soc/intel/platform-libs/controls_v1.c b/sound/soc/intel/platform-libs/controls_v1.c +new file mode 100644 +index 0000000..b6a5fa7 +--- /dev/null ++++ b/sound/soc/intel/platform-libs/controls_v1.c +@@ -0,0 +1,184 @@ ++/* ++ * controls_v1.c - Intel MID Platform driver ALSA controls for CTP ++ * ++ * Copyright (C) 2012 Intel Corp ++ * Author: Jeeja KP ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ */ ++#include ++#include ++#include ++#include "../sst_platform.h" ++#include "../sst_platform_pvt.h" ++ ++ ++static int sst_set_mixer_param(unsigned int device_input_mixer) ++{ ++ if (!sst_dsp) { ++ pr_err("sst: DSP not registered\n"); ++ return -ENODEV; ++ } ++ ++ /*allocate memory for params*/ ++ return sst_dsp->ops->set_generic_params(SST_SET_ALGO_PARAMS, ++ (void *)&device_input_mixer); ++} ++static int lpe_mixer_ihf_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ ++ ucontrol->value.integer.value[0] = sst->lpe_mixer_input_ihf; ++ return 0; ++} ++ ++static int lpe_mixer_ihf_set(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ int device_input_mixer; ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ ++ switch (ucontrol->value.integer.value[0]) { ++ case 0: ++ pr_debug("input is None\n"); ++ device_input_mixer = SST_STREAM_DEVICE_IHF ++ | SST_INPUT_STREAM_NONE; ++ break; ++ case 1: ++ pr_debug("input is PCM stream\n"); ++ device_input_mixer = SST_STREAM_DEVICE_IHF ++ | SST_INPUT_STREAM_PCM; ++ break; ++ case 2: ++ pr_debug("input is Compress stream\n"); ++ device_input_mixer = SST_STREAM_DEVICE_IHF ++ | SST_INPUT_STREAM_COMPRESS; ++ break; ++ case 3: ++ pr_debug("input is Mixed stream\n"); ++ device_input_mixer = SST_STREAM_DEVICE_IHF ++ | SST_INPUT_STREAM_MIXED; ++ break; ++ default: ++ pr_err("Invalid Input:%ld\n", ucontrol->value.integer.value[0]); ++ return -EINVAL; ++ } ++ sst->lpe_mixer_input_ihf = ucontrol->value.integer.value[0]; ++ return sst_set_mixer_param(device_input_mixer); ++} ++ ++static int lpe_mixer_headset_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ ++ ucontrol->value.integer.value[0] = sst->lpe_mixer_input_hs; ++ return 0; ++} ++ ++static int lpe_mixer_headset_set(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ int mixer_input_stream; ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ ++ switch (ucontrol->value.integer.value[0]) { ++ case 0: ++ pr_debug("input is None\n"); ++ mixer_input_stream = SST_STREAM_DEVICE_HS ++ | SST_INPUT_STREAM_NONE; ++ break; ++ case 1: ++ pr_debug("input is PCM stream\n"); ++ mixer_input_stream = SST_STREAM_DEVICE_HS ++ | SST_INPUT_STREAM_PCM; ++ break; ++ case 2: ++ pr_debug("input is Compress stream\n"); ++ mixer_input_stream = SST_STREAM_DEVICE_HS ++ | SST_INPUT_STREAM_COMPRESS; ++ break; ++ case 3: ++ pr_debug("input is Mixed stream\n"); ++ mixer_input_stream = SST_STREAM_DEVICE_HS ++ | SST_INPUT_STREAM_MIXED; ++ break; ++ default: ++ pr_err("Invalid Input:%ld\n", ucontrol->value.integer.value[0]); ++ return -EINVAL; ++ } ++ sst->lpe_mixer_input_hs = ucontrol->value.integer.value[0]; ++ return sst_set_mixer_param(mixer_input_stream); ++} ++ ++static int sst_probe_byte_control_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ ++ if (!sst_dsp) { ++ pr_err("sst: DSP not registered\n"); ++ return -ENODEV; ++ } ++ ++ return sst_dsp->ops->set_generic_params(SST_GET_PROBE_BYTE_STREAM, ++ ucontrol->value.bytes.data); ++} ++ ++static int sst_probe_byte_control_set(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ ++ if (!sst_dsp) { ++ pr_err("sst: DSP not registered\n"); ++ return -ENODEV; ++ } ++ ++ return sst_dsp->ops->set_generic_params(SST_SET_PROBE_BYTE_STREAM, ++ ucontrol->value.bytes.data); ++} ++ ++static const char *lpe_mixer_text[] = { ++ "None", "PCM", "Compressed", "Mixed", ++}; ++ ++static const struct soc_enum lpe_mixer_enum = ++ SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(lpe_mixer_text), lpe_mixer_text); ++ ++static const struct snd_kcontrol_new sst_controls_clv[] = { ++ SOC_ENUM_EXT("LPE IHF mixer", lpe_mixer_enum, ++ lpe_mixer_ihf_get, lpe_mixer_ihf_set), ++ SOC_ENUM_EXT("LPE headset mixer", lpe_mixer_enum, ++ lpe_mixer_headset_get, lpe_mixer_headset_set), ++ SND_SOC_BYTES_EXT("SST Probe Byte Control", SST_MAX_BIN_BYTES, ++ sst_probe_byte_control_get, ++ sst_probe_byte_control_set), ++}; ++ ++int sst_platform_clv_init(struct snd_soc_platform *platform) ++{ ++ struct sst_data *ctx = snd_soc_platform_get_drvdata(platform); ++ ctx->lpe_mixer_input_hs = 0; ++ ctx->lpe_mixer_input_ihf = 0; ++ snd_soc_add_platform_controls(platform, sst_controls_clv, ++ ARRAY_SIZE(sst_controls_clv)); ++ return 0; ++} +diff --git a/sound/soc/intel/platform-libs/controls_v2.c b/sound/soc/intel/platform-libs/controls_v2.c +new file mode 100644 +index 0000000..3e80276 +--- /dev/null ++++ b/sound/soc/intel/platform-libs/controls_v2.c +@@ -0,0 +1,1770 @@ ++/* ++ * controls_v2.c - Intel MID Platform driver ALSA controls for Mrfld ++ * ++ * Copyright (C) 2012 Intel Corp ++ * Author: Vinod Koul ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * ++ */ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include "../platform_ipc_v2.h" ++#include "../sst_platform.h" ++#include "../sst_platform_pvt.h" ++#include "ipc_lib.h" ++#include "controls_v2.h" ++ ++ ++#define SST_ALGO_KCONTROL_INT(xname, xreg, xshift, xmax, xinvert,\ ++ xhandler_get, xhandler_put, xmod, xpipe, xinstance, default_val) \ ++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ ++ .info = sst_algo_int_ctl_info, \ ++ .get = xhandler_get, .put = xhandler_put, \ ++ .private_value = (unsigned long)&(struct sst_algo_int_control_v2) \ ++ {.mc.reg = xreg, .mc.rreg = xreg, .mc.shift = xshift, \ ++ .mc.rshift = xshift, .mc.max = xmax, .mc.platform_max = xmax, \ ++ .mc.invert = xinvert, .module_id = xmod, .pipe_id = xpipe, \ ++ .instance_id = xinstance, .value = default_val } } ++/* Thresholds for Low Latency & Deep Buffer*/ ++#define DEFAULT_LOW_LATENCY 10 /* In Ms */ ++#define DEFAULT_DEEP_BUFFER 96 ++ ++unsigned long ll_threshold = DEFAULT_LOW_LATENCY; ++unsigned long db_threshold = DEFAULT_DEEP_BUFFER; ++ ++int sst_algo_int_ctl_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ struct sst_algo_int_control_v2 *amc = (void *)kcontrol->private_value; ++ struct soc_mixer_control *mc = &amc->mc; ++ int platform_max; ++ ++ if (!mc->platform_max) ++ mc->platform_max = mc->max; ++ platform_max = mc->platform_max; ++ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = platform_max; ++ return 0; ++} ++ ++unsigned int sst_soc_read(struct snd_soc_platform *platform, ++ unsigned int reg) ++{ ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ ++ pr_debug("%s for reg %d val=%d\n", __func__, reg, sst->widget[reg]); ++ BUG_ON(reg > (SST_NUM_WIDGETS - 1)); ++ return sst->widget[reg]; ++} ++ ++int sst_soc_write(struct snd_soc_platform *platform, ++ unsigned int reg, unsigned int val) ++{ ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ ++ pr_debug("%s for reg %d val %d\n", __func__, reg, val); ++ BUG_ON(reg > (SST_NUM_WIDGETS - 1)); ++ sst->widget[reg] = val; ++ return 0; ++} ++ ++unsigned int sst_reg_read(struct sst_data *sst, unsigned int reg, ++ unsigned int shift, unsigned int max) ++{ ++ unsigned int mask = (1 << fls(max)) - 1; ++ ++ return (sst->widget[reg] >> shift) & mask; ++} ++ ++unsigned int sst_reg_write(struct sst_data *sst, unsigned int reg, ++ unsigned int shift, unsigned int max, unsigned int val) ++{ ++ unsigned int mask = (1 << fls(max)) - 1; ++ ++ val &= mask; ++ val <<= shift; ++ sst->widget[reg] &= ~(mask << shift); ++ sst->widget[reg] |= val; ++ return val; ++} ++ ++int sst_mix_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); ++ struct snd_soc_dapm_widget *widget = wlist->widgets[0]; ++ struct soc_mixer_control *mc = ++ (struct soc_mixer_control *)kcontrol->private_value; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(widget->platform); ++ unsigned int mask = (1 << fls(mc->max)) - 1; ++ unsigned int val; ++ int connect; ++ struct snd_soc_dapm_update update; ++ ++ pr_debug("%s called set %ld for %s\n", __func__, ++ ucontrol->value.integer.value[0], widget->name); ++ val = sst_reg_write(sst, mc->reg, mc->shift, mc->max, ucontrol->value.integer.value[0]); ++ connect = !!val; ++ ++ widget->value = val; ++ update.kcontrol = kcontrol; ++ update.widget = widget; ++ update.reg = mc->reg; ++ update.mask = mask; ++ update.val = val; ++ ++ widget->dapm->update = &update; ++ snd_soc_dapm_mixer_update_power(widget, kcontrol, connect); ++ widget->dapm->update = NULL; ++ return 0; ++} ++ ++int sst_mix_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); ++ struct snd_soc_dapm_widget *w = wlist->widgets[0]; ++ struct soc_mixer_control *mc = ++ (struct soc_mixer_control *)kcontrol->private_value; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(w->platform); ++ ++ pr_debug("%s called for %s\n", __func__, w->name); ++ ucontrol->value.integer.value[0] = !!sst_reg_read(sst, mc->reg, mc->shift, mc->max); ++ return 0; ++} ++ ++static const struct snd_kcontrol_new sst_mix_modem_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_MODEM, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_MODEM, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_MODEM, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_MODEM, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_MODEM, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_MODEM, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_MODEM, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_MODEM, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_MODEM, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_MODEM, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_MODEM, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_MODEM, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_MODEM, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_MODEM, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_MODEM, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_MODEM, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_MODEM, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_MODEM, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_MODEM, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_codec0_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_CODEC0, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_CODEC0, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_CODEC0, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_CODEC0, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_CODEC0, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_CODEC0, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_CODEC0, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_CODEC0, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_CODEC0, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_CODEC0, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_CODEC0, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_CODEC0, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_CODEC0, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_CODEC0, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_CODEC0, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_CODEC0, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_CODEC0, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_CODEC0, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_CODEC0, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_codec1_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_CODEC1, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_CODEC1, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_CODEC1, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_CODEC1, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_CODEC1, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_CODEC1, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_CODEC1, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_CODEC1, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_CODEC1, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_CODEC1, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_CODEC1, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_CODEC1, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_CODEC1, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_CODEC1, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_CODEC1, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_CODEC1, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_CODEC1, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_CODEC1, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_CODEC1, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_sprot_l0_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_LOOP0, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_LOOP0, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_LOOP0, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_LOOP0, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_LOOP0, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_LOOP0, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_LOOP0, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_LOOP0, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_LOOP0, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_LOOP0, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_LOOP0, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_LOOP0, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_LOOP0, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_LOOP0, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_LOOP0, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_LOOP0, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_LOOP0, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_LOOP0, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_LOOP0, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_media_l1_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_LOOP1, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_LOOP1, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_LOOP1, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_LOOP1, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_LOOP1, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_LOOP1, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_LOOP1, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_LOOP1, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_LOOP1, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_LOOP1, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_LOOP1, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_LOOP1, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_LOOP1, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_LOOP1, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_LOOP1, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_LOOP1, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_LOOP1, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_LOOP1, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_LOOP1, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_media_l2_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_LOOP2, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_LOOP2, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_LOOP2, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_LOOP2, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_LOOP2, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_LOOP2, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_LOOP2, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_LOOP2, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_LOOP2, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_LOOP2, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_LOOP2, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_LOOP2, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_LOOP2, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_LOOP2, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_LOOP2, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_LOOP2, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_LOOP2, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_LOOP2, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_LOOP2, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_speech_tx_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_SPEECH, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_SPEECH, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_SPEECH, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_SPEECH, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_SPEECH, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_SPEECH, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_SPEECH, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_SPEECH, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_SPEECH, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_SPEECH, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_SPEECH, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_SPEECH, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_SPEECH, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_SPEECH, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_SPEECH, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_SPEECH, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_SPEECH, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_SPEECH, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_SPEECH, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_speech_rx_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_RXSPEECH, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_RXSPEECH, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_RXSPEECH, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_RXSPEECH, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_RXSPEECH, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_RXSPEECH, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_RXSPEECH, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_RXSPEECH, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_RXSPEECH, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_RXSPEECH, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_RXSPEECH, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_RXSPEECH, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_RXSPEECH, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_RXSPEECH, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_RXSPEECH, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_RXSPEECH, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_RXSPEECH, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_RXSPEECH, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_RXSPEECH, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_voip_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_VOIP, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_VOIP, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_VOIP, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_VOIP, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_VOIP, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_VOIP, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_VOIP, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_VOIP, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_VOIP, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_VOIP, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_VOIP, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_VOIP, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_VOIP, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_VOIP, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_VOIP, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_VOIP, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_VOIP, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_VOIP, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_VOIP, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_pcm0_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_PCM0, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_PCM0, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_PCM0, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_PCM0, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_PCM0, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_PCM0, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_PCM0, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_PCM0, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_PCM0, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_PCM0, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_PCM0, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_PCM0, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_PCM0, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_PCM0, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_PCM0, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_PCM0, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_PCM0, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_PCM0, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_PCM0, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_pcm1_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_PCM1, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_PCM1, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_PCM1, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_PCM1, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_PCM1, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_PCM1, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_PCM1, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_PCM1, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_PCM1, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_PCM1, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_PCM1, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_PCM1, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_PCM1, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_PCM1, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_PCM1, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_PCM1, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_PCM1, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_PCM1, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_PCM1, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_pcm2_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_PCM2, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_PCM2, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_PCM2, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_PCM2, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_PCM2, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_PCM2, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_PCM2, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_PCM2, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_PCM2, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_PCM2, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_PCM2, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_PCM2, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_PCM2, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_PCM2, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_PCM2, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_PCM2, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_PCM2, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_PCM2, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_PCM2, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_aware_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_AWARE, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_AWARE, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_AWARE, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_AWARE, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_AWARE, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_AWARE, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_AWARE, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_AWARE, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_AWARE, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_AWARE, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_AWARE, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_AWARE, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_AWARE, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_AWARE, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_AWARE, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_AWARE, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_AWARE, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_AWARE, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_AWARE, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_vad_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_VAD, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_VAD, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_VAD, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_VAD, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_VAD, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_VAD, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_VAD, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_VAD, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_VAD, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_VAD, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_VAD, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_VAD, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_VAD, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_VAD, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_VAD, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_VAD, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_VAD, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_VAD, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_VAD, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_media0_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_MEDIA0, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_MEDIA0, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_MEDIA0, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_MEDIA0, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_MEDIA0, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_MEDIA0, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_MEDIA0, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_MEDIA0, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_MEDIA0, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_MEDIA0, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_MEDIA0, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_MEDIA0, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_MEDIA0, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_MEDIA0, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_MEDIA0, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_MEDIA0, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_MEDIA0, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_MEDIA0, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_MEDIA0, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_media1_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_MEDIA1, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_MEDIA1, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_MEDIA1, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_MEDIA1, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_MEDIA1, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_MEDIA1, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_MEDIA1, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_MEDIA1, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_MEDIA1, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_MEDIA1, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_MEDIA1, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_MEDIA1, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_MEDIA1, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_MEDIA1, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_MEDIA1, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_MEDIA1, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_MEDIA1, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_MEDIA1, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_MEDIA1, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_fm_controls[] = { ++ SOC_SINGLE_EXT("Modem", SST_MIX_FM, 0, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("BT", SST_MIX_FM, 1, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec0", SST_MIX_FM, 2, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Codec1", SST_MIX_FM, 3, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sprot_L0", SST_MIX_FM, 4, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L1", SST_MIX_FM, 5, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media_L2", SST_MIX_FM, 6, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Probe", SST_MIX_FM, 7, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Sidetone", SST_MIX_FM, 8, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Tx", SST_MIX_FM, 9, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Speech_Rx", SST_MIX_FM, 10, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Tone", SST_MIX_FM, 11, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Voip", SST_MIX_FM, 12, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM0", SST_MIX_FM, 13, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("PCM1", SST_MIX_FM, 14, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media0", SST_MIX_FM, 15, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media1", SST_MIX_FM, 16, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("Media2", SST_MIX_FM, 17, 1, 0, ++ sst_mix_get, sst_mix_put), ++ SOC_SINGLE_EXT("FM", SST_MIX_FM, 18, 1, 0, ++ sst_mix_get, sst_mix_put), ++}; ++ ++static const struct snd_kcontrol_new sst_mix_sw_modem = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 0, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_codec0 = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 1, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_codec1 = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 2, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_sprot_l0 = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 3, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_media_l1 = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 4, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_media_l2 = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 5, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_speech_tx = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 6, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_speech_rx = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 7, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_voip = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 8, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_pcm0 = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 9, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_pcm1 = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 10, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_pcm2 = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 11, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_aware = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 12, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_vad = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 13, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_media0 = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 14, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_media1 = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 15, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_mix_sw_fm = ++ SOC_SINGLE_EXT("Switch", SST_MIX_SWITCH, 16, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_modem = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 0, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_codec0 = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 1, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_codec1 = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 2, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_speech_tx = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 6, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_speech_rx = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 7, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_voip = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 8, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_pcm0 = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 9, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_pcm1 = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 10, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_pcm2 = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 11, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_aware = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 12, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_vad = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 13, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_media0 = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 14, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_media1 = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 15, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_out_sw_fm = ++ SOC_SINGLE_EXT("Switch", SST_OUT_SWITCH, 16, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_modem = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 0, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_codec0 = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 1, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_codec1 = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 2, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_sidetone = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 3, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_speech_tx = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 4, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_speech_rx = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 5, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_tone = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 6, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_voip = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 7, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_pcm0 = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 8, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_pcm1 = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 9, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_media0 = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 10, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_media1 = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 11, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_media2 = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 12, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_kcontrol_new sst_in_sw_fm = ++ SOC_SINGLE_EXT("Switch", SST_IN_SWITCH, 13, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const struct snd_soc_dapm_widget sst_dapm_widgets[] = { ++ SND_SOC_DAPM_INPUT("Modem IN"), ++ SND_SOC_DAPM_INPUT("Codec IN0"), ++ SND_SOC_DAPM_INPUT("Codec IN1"), ++ SND_SOC_DAPM_INPUT("Tone IN"), ++ SND_SOC_DAPM_INPUT("FM IN"), ++ SND_SOC_DAPM_OUTPUT("Modem OUT"), ++ SND_SOC_DAPM_OUTPUT("Codec OUT0"), ++ SND_SOC_DAPM_OUTPUT("Codec OUT1"), ++ SND_SOC_DAPM_OUTPUT("FM OUT"), ++ SND_SOC_DAPM_AIF_IN("Voip IN", "VoIP", 0, SND_SOC_NOPM, 0, 0), ++ SND_SOC_DAPM_AIF_IN("Media IN0", "Compress", 0, SND_SOC_NOPM, 0, 0), ++ SND_SOC_DAPM_AIF_IN("Media IN1", "PCM", 0, SND_SOC_NOPM, 0, 0), ++ SND_SOC_DAPM_AIF_OUT("Voip OUT", "VoIP", 0, SND_SOC_NOPM, 0, 0), ++ SND_SOC_DAPM_AIF_OUT("PCM1 OUT", "Capture", 0, SND_SOC_NOPM, 0, 0), ++ SND_SOC_DAPM_AIF_OUT("Aware OUT", "Aware", 0, SND_SOC_NOPM, 0, 0), ++ SND_SOC_DAPM_AIF_OUT("VAD OUT", "VAD", 0, SND_SOC_NOPM, 0, 0), ++ ++ /* output mixers */ ++ SND_SOC_DAPM_MIXER("MIX Modem", SND_SOC_NOPM, 0, 0, ++ sst_mix_modem_controls, ARRAY_SIZE(sst_mix_modem_controls)), ++ SND_SOC_DAPM_MIXER("MIX Codec0", SND_SOC_NOPM, 0, 0, ++ sst_mix_codec0_controls , ARRAY_SIZE(sst_mix_codec0_controls)), ++ SND_SOC_DAPM_MIXER("MIX Codec1", SND_SOC_NOPM, 0, 0, ++ sst_mix_codec1_controls, ARRAY_SIZE(sst_mix_codec1_controls)), ++ SND_SOC_DAPM_MIXER("MIX Sprot L0", SND_SOC_NOPM, 0, 0, ++ sst_mix_sprot_l0_controls, ARRAY_SIZE(sst_mix_sprot_l0_controls)), ++ SND_SOC_DAPM_MIXER("MIX Media L1", SND_SOC_NOPM, 0, 0, ++ sst_mix_media_l1_controls, ARRAY_SIZE(sst_mix_media_l1_controls)), ++ SND_SOC_DAPM_MIXER("MIX Media L2", SND_SOC_NOPM, 0, 0, ++ sst_mix_media_l2_controls, ARRAY_SIZE(sst_mix_media_l2_controls)), ++ SND_SOC_DAPM_MIXER("MIX Speech Tx", SND_SOC_NOPM, 0, 0, ++ sst_mix_speech_tx_controls, ARRAY_SIZE(sst_mix_speech_tx_controls)), ++ SND_SOC_DAPM_MIXER("MIX Speech Rx", SND_SOC_NOPM, 0, 0, ++ sst_mix_speech_rx_controls, ARRAY_SIZE(sst_mix_speech_rx_controls)), ++ SND_SOC_DAPM_MIXER("MIX Voip", SND_SOC_NOPM, 0, 0, ++ sst_mix_voip_controls, ARRAY_SIZE(sst_mix_voip_controls)), ++ SND_SOC_DAPM_MIXER("MIX PCM0", SND_SOC_NOPM, 0, 0, ++ sst_mix_pcm0_controls, ARRAY_SIZE(sst_mix_pcm0_controls)), ++ SND_SOC_DAPM_MIXER("MIX PCM1", SND_SOC_NOPM, 0, 0, ++ sst_mix_pcm1_controls, ARRAY_SIZE(sst_mix_pcm1_controls)), ++ SND_SOC_DAPM_MIXER("MIX PCM2", SND_SOC_NOPM, 0, 0, ++ sst_mix_pcm2_controls, ARRAY_SIZE(sst_mix_pcm2_controls)), ++ SND_SOC_DAPM_MIXER("MIX Aware", SND_SOC_NOPM, 0, 0, ++ sst_mix_aware_controls, ARRAY_SIZE(sst_mix_aware_controls)), ++ SND_SOC_DAPM_MIXER("MIX VAD", SND_SOC_NOPM, 0, 0, ++ sst_mix_vad_controls, ARRAY_SIZE(sst_mix_vad_controls)), ++ SND_SOC_DAPM_MIXER("MIX Media0", SND_SOC_NOPM, 0, 0, ++ sst_mix_media0_controls, ARRAY_SIZE(sst_mix_media0_controls)), ++ SND_SOC_DAPM_MIXER("MIX Media1", SND_SOC_NOPM, 0, 0, ++ sst_mix_media1_controls, ARRAY_SIZE(sst_mix_media1_controls)), ++ SND_SOC_DAPM_MIXER("MIX FM", SND_SOC_NOPM, 0, 0, ++ sst_mix_fm_controls, ARRAY_SIZE(sst_mix_fm_controls)), ++ ++ /* switches for mixer outputs */ ++ SND_SOC_DAPM_SWITCH("Mix Modem Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_modem), ++ SND_SOC_DAPM_SWITCH("Mix Codec0 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_codec0), ++ SND_SOC_DAPM_SWITCH("Mix Codec1 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_codec1), ++ SND_SOC_DAPM_SWITCH("Mix Sprot L0 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_sprot_l0), ++ SND_SOC_DAPM_SWITCH("Mix Media L1 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_media_l1), ++ SND_SOC_DAPM_SWITCH("Mix Media L2 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_media_l2), ++ SND_SOC_DAPM_SWITCH("Mix Speech Tx Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_speech_tx), ++ SND_SOC_DAPM_SWITCH("Mix Speech Rx Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_speech_rx), ++ SND_SOC_DAPM_SWITCH("Mix Voip Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_voip), ++ SND_SOC_DAPM_SWITCH("Mix PCM0 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_pcm0), ++ SND_SOC_DAPM_SWITCH("Mix PCM1 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_pcm1), ++ SND_SOC_DAPM_SWITCH("Mix PCM2 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_pcm2), ++ SND_SOC_DAPM_SWITCH("Mix Aware Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_aware), ++ SND_SOC_DAPM_SWITCH("Mix VAD Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_vad), ++ SND_SOC_DAPM_SWITCH("Mix Media0 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_media0), ++ SND_SOC_DAPM_SWITCH("Mix Media1 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_media1), ++ SND_SOC_DAPM_SWITCH("Mix FM Switch", SND_SOC_NOPM, 0, 0, ++ &sst_mix_sw_fm), ++ ++ /* output pipeline switches */ ++ SND_SOC_DAPM_SWITCH("Out Modem Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_modem), ++ SND_SOC_DAPM_SWITCH("Out Codec0 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_codec0), ++ SND_SOC_DAPM_SWITCH("Out Codec1 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_codec1), ++ SND_SOC_DAPM_SWITCH("Out Speech Tx Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_speech_tx), ++ SND_SOC_DAPM_SWITCH("Out Speech Rx Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_speech_rx), ++ SND_SOC_DAPM_SWITCH("Out Voip Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_voip), ++ SND_SOC_DAPM_SWITCH("Out PCM0 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_pcm0), ++ SND_SOC_DAPM_SWITCH("Out PCM1 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_pcm1), ++ SND_SOC_DAPM_SWITCH("Out PCM2 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_pcm2), ++ SND_SOC_DAPM_SWITCH("Out Aware Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_aware), ++ SND_SOC_DAPM_SWITCH("Out VAD Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_vad), ++ SND_SOC_DAPM_SWITCH("Out Media0 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_media0), ++ SND_SOC_DAPM_SWITCH("Out Media1 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_media1), ++ SND_SOC_DAPM_SWITCH("Out FM Switch", SND_SOC_NOPM, 0, 0, ++ &sst_out_sw_fm), ++ ++ /* Input pipeline switches */ ++ SND_SOC_DAPM_SWITCH("In Modem Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_modem), ++ SND_SOC_DAPM_SWITCH("In Codec0 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_codec0), ++ SND_SOC_DAPM_SWITCH("In Codec1 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_codec1), ++ SND_SOC_DAPM_SWITCH("In Speech Tx Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_speech_tx), ++ SND_SOC_DAPM_SWITCH("In Speech Rx Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_speech_rx), ++ SND_SOC_DAPM_SWITCH("In Tone Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_tone), ++ SND_SOC_DAPM_SWITCH("In Voip Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_voip), ++ SND_SOC_DAPM_SWITCH("In PCM0 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_pcm0), ++ SND_SOC_DAPM_SWITCH("In PCM1 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_pcm1), ++ SND_SOC_DAPM_SWITCH("In Media0 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_media0), ++ SND_SOC_DAPM_SWITCH("In Media1 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_media1), ++ SND_SOC_DAPM_SWITCH("In Media2 Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_media2), ++ SND_SOC_DAPM_SWITCH("In FM Switch", SND_SOC_NOPM, 0, 0, ++ &sst_in_sw_fm), ++}; ++ ++static const struct snd_soc_dapm_route intercon[] = { ++ /* media mixer settings */ ++ { "In Media0 Switch", "Switch", "Media IN0"}, ++ { "In Media1 Switch", "Switch", "Media IN1"}, ++ { "MIX Media0", "Media0", "In Media0 Switch"}, ++ { "MIX Media0", "Media1", "In Media1 Switch"}, ++ { "MIX Media0", "Media2", "In Media2 Switch"}, ++ { "MIX Media1", "Media0", "In Media0 Switch"}, ++ { "MIX Media1", "Media1", "In Media1 Switch"}, ++ { "MIX Media1", "Media2", "In Media2 Switch"}, ++ ++ /* media to main mixer intercon */ ++ /* two media paths from media to main */ ++ { "Mix Media0 Switch", "Switch", "MIX Media0"}, ++ { "Out Media0 Switch", "Switch", "Mix Media0 Switch"}, ++ { "In PCM0 Switch", "Switch", "Out Media0 Switch"}, ++ { "Mix Media1 Switch", "Switch", "MIX Media1"}, ++ { "Out Media1 Switch", "Switch", "Mix Media1 Switch"}, ++ { "In PCM1 Switch", "Switch", "Out Media1 Switch"}, ++ /* one back from main to media */ ++ { "Mix PCM0 Switch", "Switch", "MIX PCM0"}, ++ { "Out PCM0 Switch", "Switch", "Mix PCM0 Switch"}, ++ { "In Media2 Switch", "Switch", "Out PCM0 Switch"}, ++ ++ /* main mixer inputs - all inputs connect to mixer */ ++ { "MIX Modem", "Modem", "In Modem Switch"}, ++ { "MIX Modem", "Codec0", "In Codec0 Switch"}, ++ { "MIX Modem", "Codec1", "In Codec1 Switch"}, ++ { "MIX Modem", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX Modem", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX Modem", "Tone", "In Tone Switch"}, ++ { "MIX Modem", "Voip", "In Voip Switch"}, ++ { "MIX Modem", "PCM0", "In PCM0 Switch"}, ++ { "MIX Modem", "PCM1", "In PCM1 Switch"}, ++ { "MIX Modem", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX Modem", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX Modem", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX Modem", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX Modem", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX Codec0", "Modem", "In Modem Switch"}, ++ { "MIX Codec0", "Codec0", "In Codec0 Switch"}, ++ { "MIX Codec0", "Codec1", "In Codec1 Switch"}, ++ { "MIX Codec0", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX Codec0", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX Codec0", "Tone", "In Tone Switch"}, ++ { "MIX Codec0", "Voip", "In Voip Switch"}, ++ { "MIX Codec0", "PCM0", "In PCM0 Switch"}, ++ { "MIX Codec0", "PCM1", "In PCM1 Switch"}, ++ { "MIX Codec0", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX Codec0", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX Codec0", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX Codec0", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX Codec0", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX Codec1", "Modem", "In Modem Switch"}, ++ { "MIX Codec1", "Codec0", "In Codec0 Switch"}, ++ { "MIX Codec1", "Codec1", "In Codec1 Switch"}, ++ { "MIX Codec1", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX Codec1", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX Codec1", "Tone", "In Tone Switch"}, ++ { "MIX Codec1", "Voip", "In Voip Switch"}, ++ { "MIX Codec1", "PCM0", "In PCM0 Switch"}, ++ { "MIX Codec1", "PCM1", "In PCM1 Switch"}, ++ { "MIX Codec1", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX Codec1", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX Codec1", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX Codec1", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX Codec1", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX Sprot L0", "Modem", "In Modem Switch"}, ++ { "MIX Sprot L0", "Codec0", "In Codec0 Switch"}, ++ { "MIX Sprot L0", "Codec1", "In Codec1 Switch"}, ++ { "MIX Sprot L0", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX Sprot L0", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX Sprot L0", "Tone", "In Tone Switch"}, ++ { "MIX Sprot L0", "Voip", "In Voip Switch"}, ++ { "MIX Sprot L0", "PCM0", "In PCM0 Switch"}, ++ { "MIX Sprot L0", "PCM1", "In PCM1 Switch"}, ++ { "MIX Sprot L0", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX Sprot L0", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX Sprot L0", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX Sprot L0", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX Sprot L0", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX Media L1", "Modem", "In Modem Switch"}, ++ { "MIX Media L1", "Codec0", "In Codec0 Switch"}, ++ { "MIX Media L1", "Codec1", "In Codec1 Switch"}, ++ { "MIX Media L1", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX Media L1", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX Media L1", "Tone", "In Tone Switch"}, ++ { "MIX Media L1", "Voip", "In Voip Switch"}, ++ { "MIX Media L1", "PCM0", "In PCM0 Switch"}, ++ { "MIX Media L1", "PCM1", "In PCM1 Switch"}, ++ { "MIX Media L1", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX Media L1", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX Media L1", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX Media L1", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX Media L1", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX Media L2", "Modem", "In Modem Switch"}, ++ { "MIX Media L2", "Codec0", "In Codec0 Switch"}, ++ { "MIX Media L2", "Codec1", "In Codec1 Switch"}, ++ { "MIX Media L2", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX Media L2", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX Media L2", "Tone", "In Tone Switch"}, ++ { "MIX Media L2", "Voip", "In Voip Switch"}, ++ { "MIX Media L2", "PCM0", "In PCM0 Switch"}, ++ { "MIX Media L2", "PCM1", "In PCM1 Switch"}, ++ { "MIX Media L2", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX Media L2", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX Media L2", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX Media L2", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX Media L2", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX Speech Rx", "Modem", "In Modem Switch"}, ++ { "MIX Speech Rx", "Codec0", "In Codec0 Switch"}, ++ { "MIX Speech Rx", "Codec1", "In Codec1 Switch"}, ++ { "MIX Speech Rx", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX Speech Rx", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX Speech Rx", "Tone", "In Tone Switch"}, ++ { "MIX Speech Rx", "Voip", "In Voip Switch"}, ++ { "MIX Speech Rx", "PCM0", "In PCM0 Switch"}, ++ { "MIX Speech Rx", "PCM1", "In PCM1 Switch"}, ++ { "MIX Speech Rx", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX Speech Rx", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX Speech Rx", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX Speech Rx", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX Speech Rx", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX Speech Tx", "Modem", "In Modem Switch"}, ++ { "MIX Speech Tx", "Codec0", "In Codec0 Switch"}, ++ { "MIX Speech Tx", "Codec1", "In Codec1 Switch"}, ++ { "MIX Speech Tx", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX Speech Tx", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX Speech Tx", "Tone", "In Tone Switch"}, ++ { "MIX Speech Tx", "Voip", "In Voip Switch"}, ++ { "MIX Speech Tx", "PCM0", "In PCM0 Switch"}, ++ { "MIX Speech Tx", "PCM1", "In PCM1 Switch"}, ++ { "MIX Speech Tx", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX Speech Tx", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX Speech Tx", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX Speech Tx", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX Speech Tx", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX Voip", "Modem", "In Modem Switch"}, ++ { "MIX Voip", "Codec0", "In Codec0 Switch"}, ++ { "MIX Voip", "Codec1", "In Codec1 Switch"}, ++ { "MIX Voip", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX Voip", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX Voip", "Tone", "In Tone Switch"}, ++ { "MIX Voip", "Voip", "In Voip Switch"}, ++ { "MIX Voip", "PCM0", "In PCM0 Switch"}, ++ { "MIX Voip", "PCM1", "In PCM1 Switch"}, ++ { "MIX Voip", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX Voip", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX Voip", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX Voip", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX Voip", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX PCM0", "Modem", "In Modem Switch"}, ++ { "MIX PCM0", "Codec0", "In Codec0 Switch"}, ++ { "MIX PCM0", "Codec1", "In Codec1 Switch"}, ++ { "MIX PCM0", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX PCM0", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX PCM0", "Tone", "In Tone Switch"}, ++ { "MIX PCM0", "Voip", "In Voip Switch"}, ++ { "MIX PCM0", "PCM0", "In PCM0 Switch"}, ++ { "MIX PCM0", "PCM1", "In PCM1 Switch"}, ++ { "MIX PCM0", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX PCM0", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX PCM0", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX PCM0", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX PCM0", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX PCM1", "Modem", "In Modem Switch"}, ++ { "MIX PCM1", "Codec0", "In Codec0 Switch"}, ++ { "MIX PCM1", "Codec1", "In Codec1 Switch"}, ++ { "MIX PCM1", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX PCM1", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX PCM1", "Tone", "In Tone Switch"}, ++ { "MIX PCM1", "Voip", "In Voip Switch"}, ++ { "MIX PCM1", "PCM0", "In PCM0 Switch"}, ++ { "MIX PCM1", "PCM1", "In PCM1 Switch"}, ++ { "MIX PCM1", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX PCM1", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX PCM1", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX PCM1", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX PCM1", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX PCM2", "Modem", "In Modem Switch"}, ++ { "MIX PCM2", "Codec0", "In Codec0 Switch"}, ++ { "MIX PCM2", "Codec1", "In Codec1 Switch"}, ++ { "MIX PCM2", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX PCM2", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX PCM2", "Tone", "In Tone Switch"}, ++ { "MIX PCM2", "Voip", "In Voip Switch"}, ++ { "MIX PCM2", "PCM0", "In PCM0 Switch"}, ++ { "MIX PCM2", "PCM1", "In PCM1 Switch"}, ++ { "MIX PCM2", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX PCM2", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX PCM2", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX PCM2", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX PCM2", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX Aware", "Modem", "In Modem Switch"}, ++ { "MIX Aware", "Codec0", "In Codec0 Switch"}, ++ { "MIX Aware", "Codec1", "In Codec1 Switch"}, ++ { "MIX Aware", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX Aware", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX Aware", "Tone", "In Tone Switch"}, ++ { "MIX Aware", "Voip", "In Voip Switch"}, ++ { "MIX Aware", "PCM0", "In PCM0 Switch"}, ++ { "MIX Aware", "PCM1", "In PCM1 Switch"}, ++ { "MIX Aware", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX Aware", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX Aware", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX Aware", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX Aware", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX VAD", "Modem", "In Modem Switch"}, ++ { "MIX VAD", "Codec0", "In Codec0 Switch"}, ++ { "MIX VAD", "Codec1", "In Codec1 Switch"}, ++ { "MIX VAD", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX VAD", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX VAD", "Tone", "In Tone Switch"}, ++ { "MIX VAD", "Voip", "In Voip Switch"}, ++ { "MIX VAD", "PCM0", "In PCM0 Switch"}, ++ { "MIX VAD", "PCM1", "In PCM1 Switch"}, ++ { "MIX VAD", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX VAD", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX VAD", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX VAD", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX VAD", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ { "MIX FM", "Modem", "In Modem Switch"}, ++ { "MIX FM", "Codec0", "In Codec0 Switch"}, ++ { "MIX FM", "Codec1", "In Codec1 Switch"}, ++ { "MIX FM", "Speech_Tx", "In Speech Tx Switch"}, ++ { "MIX FM", "Speech_Rx", "In Speech Rx Switch"}, ++ { "MIX FM", "Tone", "In Tone Switch"}, ++ { "MIX FM", "Voip", "In Voip Switch"}, ++ { "MIX FM", "PCM0", "In PCM0 Switch"}, ++ { "MIX FM", "PCM1", "In PCM1 Switch"}, ++ { "MIX FM", "FM", "In FM Switch"}, ++ /* loops have output switches coming back to mixers */ ++ { "MIX FM", "Sprot_L0", "Mix Sprot L0 Switch"}, ++ { "MIX FM", "Media_L1", "Mix Media L1 Switch"}, ++ { "MIX FM", "Media_L2", "Mix Media L2 Switch"}, ++ /* sidetone comes from speech out */ ++ { "MIX FM", "Sidetone", "Mix Speech Tx Switch"}, ++ ++ /* now connect the mixers to output switches */ ++ { "Mix Modem Switch", "Switch", "MIX Modem"}, ++ { "Out Modem Switch", "Switch", "Mix Modem Switch"}, ++ { "Mix Codec0 Switch", "Switch", "MIX Codec0"}, ++ { "Out Codec0 Switch", "Switch", "Mix Codec0 Switch"}, ++ { "Mix Codec1 Switch", "Switch", "MIX Codec1"}, ++ { "Out Codec1 Switch", "Switch", "Mix Codec1 Switch"}, ++ { "Mix Speech Tx Switch", "Switch", "MIX Speech Tx"}, ++ { "Out Speech Tx Switch", "Switch", "Mix Speech Tx Switch"}, ++ { "Mix Speech Rx Switch", "Switch", "MIX Speech Rx"}, ++ { "Out Speech Rx Switch", "Switch", "Mix Speech Rx Switch"}, ++ { "Mix Voip Switch", "Switch", "MIX Voip"}, ++ { "Out Voip Switch", "Switch", "Mix Voip Switch"}, ++ { "Mix Aware Switch", "Switch", "MIX Aware"}, ++ { "Out Aware Switch", "Switch", "Mix Aware Switch"}, ++ { "Mix VAD Switch", "Switch", "MIX VAD"}, ++ { "Out VAD Switch", "Switch", "Mix VAD Switch"}, ++ { "Mix FM Switch", "Switch", "MIX FM"}, ++ { "Out FM Switch", "Switch", "Mix FM Switch"}, ++ { "Mix PCM1 Switch", "Switch", "MIX PCM1"}, ++ { "Out PCM1 Switch", "Switch", "Mix PCM1 Switch"}, ++ { "Mix PCM2 Switch", "Switch", "MIX PCM2"}, ++ { "Out PCM2 Switch", "Switch", "Mix PCM2 Switch"}, ++ ++ /* the loops ++ * media loops dont have i/p o/p switches, just mixer enable ++ */ ++ { "Mix Sprot L0 Switch", "Switch", "MIX Sprot L0"}, ++ { "Mix Media L1 Switch", "Switch", "MIX Media L1"}, ++ { "Mix Media L2 Switch", "Switch", "MIX Media L2"}, ++ /* so no need as mixer switches are ++ * inputs to all mixers ++ * need to connect speech loops here ++ */ ++ { "In Speech Rx Switch", "Switch", "Out Speech Rx Switch"}, ++ { "In Speech Tx Switch", "Switch", "Out Speech Tx Switch"}, ++ /* last one, connect the output switches to ip's ++ * and op's. Also connect the AIFs ++ */ ++ { "In Modem Switch", "Switch", "Modem IN"}, ++ { "In Codec0 Switch", "Switch", "Codec IN0"}, ++ { "In Codec1 Switch", "Switch", "Codec IN1"}, ++ { "In Tone Switch", "Switch", "Tone IN"}, ++ { "In FM Switch", "Switch", "FM IN"}, ++ ++ { "Modem OUT", NULL, "Out Modem Switch"}, ++ { "Codec OUT0", NULL, "Out Codec0 Switch"}, ++ { "Codec OUT1", NULL, "Out Codec1 Switch"}, ++ { "FM OUT", NULL, "Out FM Switch"}, ++ ++ { "In Voip Switch", "Switch", "Voip IN"}, ++ ++ { "Voip OUT", NULL, "Out Voip Switch"}, ++ { "PCM1 OUT", NULL, "Out PCM1 Switch"}, ++ { "Aware OUT", NULL, "Out Aware Switch"}, ++ { "VAD OUT", NULL, "Out VAD Switch"}, ++}; ++ ++int sst_byte_control_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ ++ pr_debug("in %s\n", __func__); ++ memcpy(ucontrol->value.bytes.data, sst->byte_stream, SST_MAX_BIN_BYTES); ++ print_hex_dump_bytes(__func__, DUMP_PREFIX_OFFSET, ++ (const void *)sst->byte_stream, 32); ++ return 0; ++} ++ ++static int sst_check_binary_input(char *stream) ++{ ++ struct snd_sst_bytes_v2 *bytes = (struct snd_sst_bytes_v2 *)stream; ++ ++ if (bytes->len == 0 || bytes->len > 1000) { ++ pr_err("length out of bounds %d\n", bytes->len); ++ return -EINVAL; ++ } ++ if (bytes->type == 0 || bytes->type > SND_SST_BYTES_GET) { ++ pr_err("type out of bounds: %d\n", bytes->type); ++ return -EINVAL; ++ } ++ if (bytes->block > 1) { ++ pr_err("block invalid %d\n", bytes->block); ++ return -EINVAL; ++ } ++ if (bytes->task_id == SST_TASK_ID_NONE || bytes->task_id > SST_TASK_ID_MAX) { ++ pr_err("taskid invalid %d\n", bytes->task_id); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++int sst_byte_control_set(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ int ret = 0; ++ ++ pr_debug("in %s\n", __func__); ++ mutex_lock(&sst->lock); ++ memcpy(sst->byte_stream, ucontrol->value.bytes.data, SST_MAX_BIN_BYTES); ++ if (0 != sst_check_binary_input(sst->byte_stream)) { ++ mutex_unlock(&sst->lock); ++ return -EINVAL; ++ } ++ print_hex_dump_bytes(__func__, DUMP_PREFIX_OFFSET, ++ (const void *)sst->byte_stream, 32); ++ ret = sst_dsp->ops->set_generic_params(SST_SET_BYTE_STREAM, sst->byte_stream); ++ mutex_unlock(&sst->lock); ++ ++ return ret; ++} ++ ++static int sst_pipe_id_control_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ int ret = 0; ++ ++ ucontrol->value.integer.value[0] = sst->pipe_id; ++ ++ return ret; ++} ++ ++static int sst_pipe_id_control_set(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ int ret = 0; ++ ++ sst->pipe_id = ucontrol->value.integer.value[0]; ++ pr_debug("%s: pipe_id %d", __func__, sst->pipe_id); ++ ++ return ret; ++} ++ ++/* dB range for mrfld compress volume is -144dB to +36dB. ++ * Gain library expects user input in terms of 0.1dB, for example, ++ * 60 (in decimal) represents 6dB. ++ * MW will pass 2's complement value for negative dB values. ++ */ ++static int sst_compr_vol_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ struct sst_algo_int_control_v2 *amc = (void *)kcontrol->private_value; ++ u16 gain; ++ unsigned int gain_offset, ret; ++ ++ sst_create_compr_vol_ipc(sst->byte_stream, SND_SST_BYTES_GET, amc); ++ mutex_lock(&sst->lock); ++ ret = sst_dsp->ops->set_generic_params(SST_SET_BYTE_STREAM, ++ sst->byte_stream); ++ mutex_unlock(&sst->lock); ++ if (ret) { ++ pr_err("failed to get compress vol from fw: %d\n", ret); ++ return ret; ++ } ++ gain_offset = sizeof(struct snd_sst_bytes_v2) + ++ sizeof(struct ipc_dsp_hdr); ++ ++ /* Get params format for vol ctrl lib, size 6 bytes : ++ * u16 left_gain, u16 right_gain, u16 ramp ++ */ ++ memcpy(&gain, ++ (unsigned int *)(sst->byte_stream + gain_offset), ++ sizeof(u16)); ++ pr_debug("%s: cell_gain = %d\n", __func__, gain); ++ amc->value = gain; ++ ucontrol->value.integer.value[0] = gain; ++ return 0; ++} ++ ++static int sst_compr_vol_set(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ struct sst_algo_int_control_v2 *amc = (void *)kcontrol->private_value; ++ int ret = 0; ++ unsigned int old_val; ++ ++ pr_debug("%s: cell_gain = %ld\n", __func__,\ ++ ucontrol->value.integer.value[0]); ++ old_val = amc->value; ++ amc->value = ucontrol->value.integer.value[0]; ++ sst_create_compr_vol_ipc(sst->byte_stream, SND_SST_BYTES_SET, ++ amc); ++ ++ mutex_lock(&sst->lock); ++ ret = sst_dsp->ops->set_generic_params(SST_SET_BYTE_STREAM, ++ sst->byte_stream); ++ mutex_unlock(&sst->lock); ++ if (ret) { ++ pr_err("failed to set compress vol in fw: %d\n", ret); ++ amc->value = old_val; ++ return ret; ++ } ++ return 0; ++} ++ ++static int sst_vtsv_enroll_set(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ int ret = 0; ++ ++ sst->vtsv_enroll = ucontrol->value.integer.value[0]; ++ mutex_lock(&sst->lock); ++ if (sst->vtsv_enroll) ++ ret = sst_dsp->ops->set_generic_params(SST_SET_VTSV_INFO, ++ (void *)&sst->vtsv_enroll); ++ mutex_unlock(&sst->lock); ++ return ret; ++} ++ ++static int sst_vtsv_enroll_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ ++ ucontrol->value.integer.value[0] = sst->vtsv_enroll; ++ return 0; ++} ++ ++/* This value corresponds to two's complement value of -10 or -1dB */ ++#define SST_COMPR_VOL_MAX_INTEG_GAIN 0xFFF6 ++#define SST_COMPR_VOL_MUTE 0xFA60 /* 2's complement of -1440 or -144dB*/ ++ ++ ++static const struct snd_kcontrol_new sst_mrfld_controls[] = { ++ SND_SOC_BYTES_EXT("SST Byte control", SST_MAX_BIN_BYTES, ++ sst_byte_control_get, sst_byte_control_set), ++ SOC_SINGLE_EXT("SST Pipe_id control", SST_PIPE_CONTROL, 0, 0x9A, 0, ++ sst_pipe_id_control_get, sst_pipe_id_control_set), ++ SST_ALGO_KCONTROL_INT("Compress Volume", SST_COMPRESS_VOL, ++ 0, SST_COMPR_VOL_MAX_INTEG_GAIN, 0, ++ sst_compr_vol_get, sst_compr_vol_set, ++ SST_ALGO_VOLUME_CONTROL, PIPE_MEDIA0_IN, 0, ++ SST_COMPR_VOL_MUTE), ++ SOC_SINGLE_BOOL_EXT("SST VTSV Enroll", 0, sst_vtsv_enroll_get, ++ sst_vtsv_enroll_set), ++}; ++ ++static DEVICE_ULONG_ATTR(low_latency_threshold, 0644, ll_threshold); ++static DEVICE_ULONG_ATTR(deep_buffer_threshold, 0644, db_threshold); ++ ++static struct attribute *device_sysfs_attrs[] = { ++ &dev_attr_low_latency_threshold.attr.attr, ++ &dev_attr_deep_buffer_threshold.attr.attr, ++ NULL, ++}; ++ ++static struct attribute_group attr_group = { ++ .attrs = device_sysfs_attrs, ++}; ++ ++int sst_dsp_init(struct snd_soc_platform *platform) ++{ ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ int error = 0; ++ ++ sst->byte_stream = devm_kzalloc(platform->dev, ++ SST_MAX_BIN_BYTES, GFP_KERNEL); ++ if (sst->byte_stream == NULL) { ++ pr_err("kzalloc failed\n"); ++ return -ENOMEM; ++ } ++ ++ sst->widget = devm_kzalloc(platform->dev, ++ SST_NUM_WIDGETS * sizeof(*sst->widget), ++ GFP_KERNEL); ++ if (sst->widget == NULL) { ++ pr_err("kzalloc failed\n"); ++ return -ENOMEM; ++ } ++ ++ sst->vtsv_enroll = false; ++ /* Assign the pointer variables */ ++ sst->ll_db.low_latency = &ll_threshold; ++ sst->ll_db.deep_buffer = &db_threshold; ++ ++ pr_debug("Default ll thres %lu db thres %lu\n", ll_threshold, db_threshold); ++ ++ snd_soc_dapm_new_controls(&platform->dapm, sst_dapm_widgets, ++ ARRAY_SIZE(sst_dapm_widgets)); ++ snd_soc_dapm_add_routes(&platform->dapm, intercon, ++ ARRAY_SIZE(intercon)); ++ snd_soc_dapm_new_widgets(&platform->dapm); ++ snd_soc_add_platform_controls(platform, sst_mrfld_controls, ++ ARRAY_SIZE(sst_mrfld_controls)); ++ ++ error = sysfs_create_group(&platform->dev->kobj, &attr_group); ++ if (error) ++ pr_err("failed to create sysfs files %d\n", error); ++ ++ return error; ++} +diff --git a/sound/soc/intel/platform-libs/controls_v2.h b/sound/soc/intel/platform-libs/controls_v2.h +new file mode 100644 +index 0000000..b54c947 +--- /dev/null ++++ b/sound/soc/intel/platform-libs/controls_v2.h +@@ -0,0 +1,708 @@ ++/* ++ * controls_v2.h - Intel MID Platform driver header file ++ * ++ * Copyright (C) 2013 Intel Corp ++ * Author: Ramesh Babu ++ * Author: Omair M Abdullah ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ */ ++ ++#ifndef __SST_CONTROLS_V2_H__ ++#define __SST_CONTROLS_V2_H__ ++ ++/* ++ * This section defines the map for the mixer widgets. ++ * ++ * Each mixer will be represented by single value and that value will have each ++ * bit corresponding to one input ++ * ++ * Each out_id will correspond to one mixer and one path. Each input will be ++ * represented by single bit in the register. ++ */ ++ ++/* mixer register ids here */ ++#define SST_MIX(x) (x) ++ ++#define SST_MIX_MODEM SST_MIX(0) ++#define SST_MIX_BT SST_MIX(1) ++#define SST_MIX_CODEC0 SST_MIX(2) ++#define SST_MIX_CODEC1 SST_MIX(3) ++#define SST_MIX_LOOP0 SST_MIX(4) ++#define SST_MIX_LOOP1 SST_MIX(5) ++#define SST_MIX_LOOP2 SST_MIX(6) ++#define SST_MIX_PROBE SST_MIX(7) ++#define SST_MIX_HF_SNS SST_MIX(8) ++#define SST_MIX_HF SST_MIX(9) ++#define SST_MIX_SPEECH SST_MIX(10) ++#define SST_MIX_RXSPEECH SST_MIX(11) ++#define SST_MIX_VOIP SST_MIX(12) ++#define SST_MIX_PCM0 SST_MIX(13) ++#define SST_MIX_PCM1 SST_MIX(14) ++#define SST_MIX_PCM2 SST_MIX(15) ++#define SST_MIX_AWARE SST_MIX(16) ++#define SST_MIX_VAD SST_MIX(17) ++#define SST_MIX_FM SST_MIX(18) ++ ++#define SST_MIX_MEDIA0 SST_MIX(19) ++#define SST_MIX_MEDIA1 SST_MIX(20) ++ ++#define SST_NUM_MIX (SST_MIX_MEDIA1 + 1) ++ ++#define SST_MIX_SWITCH (SST_NUM_MIX + 1) ++#define SST_OUT_SWITCH (SST_NUM_MIX + 2) ++#define SST_IN_SWITCH (SST_NUM_MIX + 3) ++#define SST_MUX_REG (SST_NUM_MIX + 4) ++#define SST_REG_LAST (SST_MUX_REG) ++ ++/* last entry defines array size */ ++#define SST_NUM_WIDGETS (SST_REG_LAST + 1) ++ ++#define SST_BT_FM_MUX_SHIFT 0 ++#define SST_VOICE_MODE_SHIFT 1 ++#define SST_BT_MODE_SHIFT 2 ++ ++/* in each mixer register we will define one bit for each input */ ++#define SST_MIX_IP(x) (x) ++ ++#define SST_IP_MODEM SST_MIX_IP(0) ++#define SST_IP_BT SST_MIX_IP(1) ++#define SST_IP_CODEC0 SST_MIX_IP(2) ++#define SST_IP_CODEC1 SST_MIX_IP(3) ++#define SST_IP_LOOP0 SST_MIX_IP(4) ++#define SST_IP_LOOP1 SST_MIX_IP(5) ++#define SST_IP_LOOP2 SST_MIX_IP(6) ++#define SST_IP_PROBE SST_MIX_IP(7) ++#define SST_IP_SIDETONE SST_MIX_IP(8) ++#define SST_IP_TXSPEECH SST_MIX_IP(9) ++#define SST_IP_SPEECH SST_MIX_IP(10) ++#define SST_IP_TONE SST_MIX_IP(11) ++#define SST_IP_VOIP SST_MIX_IP(12) ++#define SST_IP_PCM0 SST_MIX_IP(13) ++#define SST_IP_PCM1 SST_MIX_IP(14) ++#define SST_IP_LOW_PCM0 SST_MIX_IP(15) ++#define SST_IP_FM SST_MIX_IP(16) ++#define SST_IP_MEDIA0 SST_MIX_IP(17) ++#define SST_IP_MEDIA1 SST_MIX_IP(18) ++#define SST_IP_MEDIA2 SST_MIX_IP(19) ++#define SST_IP_MEDIA3 SST_MIX_IP(20) ++ ++#define SST_IP_LAST SST_IP_MEDIA3 ++ ++#define SST_SWM_INPUT_COUNT (SST_IP_LAST + 1) ++#define SST_CMD_SWM_MAX_INPUTS 6 ++ ++#define SST_PATH_ID_SHIFT 8 ++#define SST_DEFAULT_LOCATION_ID 0xFFFF ++#define SST_DEFAULT_CELL_NBR 0xFF ++#define SST_DEFAULT_MODULE_ID 0xFFFF ++ ++/* ++ * Audio DSP Path Ids. Specified by the audio DSP FW ++ */ ++enum sst_path_index { ++ SST_PATH_INDEX_MODEM_OUT = (0x00 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_BT_OUT = (0x01 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_CODEC_OUT0 = (0x02 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_CODEC_OUT1 = (0x03 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_SPROT_LOOP_OUT = (0x04 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_MEDIA_LOOP1_OUT = (0x05 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_MEDIA_LOOP2_OUT = (0x06 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE_OUT = (0x07 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_HF_SNS_OUT = (0x08 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_VOICE_UPLINK_REF2 = (0x08 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_HF_OUT = (0x09 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_VOICE_UPLINK_REF1 = (0x09 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_SPEECH_OUT = (0x0A << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_VOICE_UPLINK = (0x0A << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_RX_SPEECH_OUT = (0x0B << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_VOICE_DOWNLINK = (0x0B << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_VOIP_OUT = (0x0C << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PCM0_OUT = (0x0D << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PCM1_OUT = (0x0E << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PCM2_OUT = (0x0F << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_AWARE_OUT = (0x10 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_VAD_OUT = (0x11 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_MEDIA0_OUT = (0x12 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_MEDIA1_OUT = (0x13 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_FM_OUT = (0x14 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_PROBE1_PIPE_OUT = (0x15 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE2_PIPE_OUT = (0x16 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE3_PIPE_OUT = (0x17 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE4_PIPE_OUT = (0x18 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE5_PIPE_OUT = (0x19 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE6_PIPE_OUT = (0x1A << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE7_PIPE_OUT = (0x1B << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE8_PIPE_OUT = (0x1C << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_SIDETONE_OUT = (0x1D << SST_PATH_ID_SHIFT), ++ ++ /* Start of input paths */ ++ SST_PATH_INDEX_MODEM_IN = (0x80 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_BT_IN = (0x81 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_CODEC_IN0 = (0x82 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_CODEC_IN1 = (0x83 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_SPROT_LOOP_IN = (0x84 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_MEDIA_LOOP1_IN = (0x85 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_MEDIA_LOOP2_IN = (0x86 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_PROBE_IN = (0x87 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_SIDETONE_IN = (0x88 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_TX_SPEECH_IN = (0x89 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_SPEECH_IN = (0x8A << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_TONE_IN = (0x8B << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_VOIP_IN = (0x8C << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_PCM0_IN = (0x8D << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PCM1_IN = (0x8E << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_MEDIA0_IN = (0x8F << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_MEDIA1_IN = (0x90 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_MEDIA2_IN = (0x91 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_FM_IN = (0x92 << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_PROBE1_PIPE_IN = (0x93 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE2_PIPE_IN = (0x94 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE3_PIPE_IN = (0x95 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE4_PIPE_IN = (0x96 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE5_PIPE_IN = (0x97 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE6_PIPE_IN = (0x98 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE7_PIPE_IN = (0x99 << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_PROBE8_PIPE_IN = (0x9A << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_MEDIA3_IN = (0x9C << SST_PATH_ID_SHIFT), ++ SST_PATH_INDEX_LOW_PCM0_IN = (0x9D << SST_PATH_ID_SHIFT), ++ ++ SST_PATH_INDEX_RESERVED = (0xFF << SST_PATH_ID_SHIFT), ++}; ++ ++/* ++ * switch matrix input path IDs ++ */ ++enum sst_swm_inputs { ++ SST_SWM_IN_MODEM = (SST_PATH_INDEX_MODEM_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_BT = (SST_PATH_INDEX_BT_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_CODEC0 = (SST_PATH_INDEX_CODEC_IN0 | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_CODEC1 = (SST_PATH_INDEX_CODEC_IN1 | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_SPROT_LOOP = (SST_PATH_INDEX_SPROT_LOOP_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_MEDIA_LOOP1 = (SST_PATH_INDEX_MEDIA_LOOP1_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_MEDIA_LOOP2 = (SST_PATH_INDEX_MEDIA_LOOP2_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_PROBE = (SST_PATH_INDEX_PROBE_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_SIDETONE = (SST_PATH_INDEX_SIDETONE_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_TXSPEECH = (SST_PATH_INDEX_TX_SPEECH_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_SPEECH = (SST_PATH_INDEX_SPEECH_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_TONE = (SST_PATH_INDEX_TONE_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_VOIP = (SST_PATH_INDEX_VOIP_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_PCM0 = (SST_PATH_INDEX_PCM0_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_PCM1 = (SST_PATH_INDEX_PCM1_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_MEDIA0 = (SST_PATH_INDEX_MEDIA0_IN | SST_DEFAULT_CELL_NBR), /* Part of Media Mixer */ ++ SST_SWM_IN_MEDIA1 = (SST_PATH_INDEX_MEDIA1_IN | SST_DEFAULT_CELL_NBR), /* Part of Media Mixer */ ++ SST_SWM_IN_MEDIA2 = (SST_PATH_INDEX_MEDIA2_IN | SST_DEFAULT_CELL_NBR), /* Part of Media Mixer */ ++ SST_SWM_IN_FM = (SST_PATH_INDEX_FM_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_MEDIA3 = (SST_PATH_INDEX_MEDIA3_IN | SST_DEFAULT_CELL_NBR), /* Part of Media Mixer */ ++ SST_SWM_IN_LOW_PCM0 = (SST_PATH_INDEX_LOW_PCM0_IN | SST_DEFAULT_CELL_NBR), ++ SST_SWM_IN_END = (SST_PATH_INDEX_RESERVED | SST_DEFAULT_CELL_NBR) ++}; ++ ++/* ++ * switch matrix output path IDs ++ */ ++enum sst_swm_outputs { ++ SST_SWM_OUT_MODEM = (SST_PATH_INDEX_MODEM_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_BT = (SST_PATH_INDEX_BT_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_CODEC0 = (SST_PATH_INDEX_CODEC_OUT0 | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_CODEC1 = (SST_PATH_INDEX_CODEC_OUT1 | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_SPROT_LOOP = (SST_PATH_INDEX_SPROT_LOOP_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_MEDIA_LOOP1 = (SST_PATH_INDEX_MEDIA_LOOP1_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_MEDIA_LOOP2 = (SST_PATH_INDEX_MEDIA_LOOP2_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_PROBE = (SST_PATH_INDEX_PROBE_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_HF_SNS = (SST_PATH_INDEX_HF_SNS_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_HF = (SST_PATH_INDEX_HF_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_SPEECH = (SST_PATH_INDEX_SPEECH_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_RXSPEECH = (SST_PATH_INDEX_RX_SPEECH_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_VOIP = (SST_PATH_INDEX_VOIP_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_PCM0 = (SST_PATH_INDEX_PCM0_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_PCM1 = (SST_PATH_INDEX_PCM1_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_PCM2 = (SST_PATH_INDEX_PCM2_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_AWARE = (SST_PATH_INDEX_AWARE_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_VAD = (SST_PATH_INDEX_VAD_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_MEDIA0 = (SST_PATH_INDEX_MEDIA0_OUT | SST_DEFAULT_CELL_NBR), /* Part of Media Mixer */ ++ SST_SWM_OUT_MEDIA1 = (SST_PATH_INDEX_MEDIA1_OUT | SST_DEFAULT_CELL_NBR), /* Part of Media Mixer */ ++ SST_SWM_OUT_FM = (SST_PATH_INDEX_FM_OUT | SST_DEFAULT_CELL_NBR), ++ SST_SWM_OUT_END = (SST_PATH_INDEX_RESERVED | SST_DEFAULT_CELL_NBR), ++}; ++ ++enum sst_ipc_msg { ++ SST_IPC_IA_CMD = 1, ++ SST_IPC_IA_SET_PARAMS, ++ SST_IPC_IA_GET_PARAMS, ++}; ++ ++enum sst_cmd_type { ++ SST_CMD_BYTES_SET = 1, ++ SST_CMD_BYTES_GET = 2, ++}; ++ ++enum sst_task { ++ SST_TASK_SBA = 1, ++ SST_TASK_FBA_UL, ++ SST_TASK_MMX, ++ SST_TASK_AWARE, ++ SST_TASK_FBA_DL, ++}; ++ ++enum sst_type { ++ SST_TYPE_CMD = 1, ++ SST_TYPE_PARAMS, ++}; ++ ++enum sst_flag { ++ SST_FLAG_BLOCKED = 1, ++ SST_FLAG_NONBLOCK, ++}; ++ ++/* ++ * Enumeration for indexing the gain cells in VB_SET_GAIN DSP command ++ */ ++enum sst_gain_index { ++ /* GAIN IDs for SB task start here */ ++ SST_GAIN_INDEX_MODEM_OUT, ++ SST_GAIN_INDEX_MODEM_IN, ++ SST_GAIN_INDEX_BT_OUT, ++ SST_GAIN_INDEX_BT_IN, ++ SST_GAIN_INDEX_FM_OUT, ++ ++ SST_GAIN_INDEX_FM_IN, ++ SST_GAIN_INDEX_CODEC_OUT0, ++ SST_GAIN_INDEX_CODEC_OUT1, ++ SST_GAIN_INDEX_CODEC_IN0, ++ SST_GAIN_INDEX_CODEC_IN1, ++ ++ SST_GAIN_INDEX_SPROT_LOOP_OUT, ++ SST_GAIN_INDEX_MEDIA_LOOP1_OUT, ++ SST_GAIN_INDEX_MEDIA_LOOP2_OUT, ++ SST_GAIN_INDEX_RX_SPEECH_OUT, ++ SST_GAIN_INDEX_TX_SPEECH_IN, ++ ++ SST_GAIN_INDEX_SPEECH_OUT, ++ SST_GAIN_INDEX_SPEECH_IN, ++ SST_GAIN_INDEX_HF_OUT, ++ SST_GAIN_INDEX_HF_SNS_OUT, ++ SST_GAIN_INDEX_TONE_IN, ++ ++ SST_GAIN_INDEX_SIDETONE_IN, ++ SST_GAIN_INDEX_PROBE_OUT, ++ SST_GAIN_INDEX_PROBE_IN, ++ SST_GAIN_INDEX_PCM0_IN_LEFT, ++ SST_GAIN_INDEX_PCM0_IN_RIGHT, ++ ++ SST_GAIN_INDEX_PCM1_OUT_LEFT, ++ SST_GAIN_INDEX_PCM1_OUT_RIGHT, ++ SST_GAIN_INDEX_PCM1_IN_LEFT, ++ SST_GAIN_INDEX_PCM1_IN_RIGHT, ++ SST_GAIN_INDEX_PCM2_OUT_LEFT, ++ ++ SST_GAIN_INDEX_PCM2_OUT_RIGHT, ++ SST_GAIN_INDEX_VOIP_OUT, ++ SST_GAIN_INDEX_VOIP_IN, ++ SST_GAIN_INDEX_AWARE_OUT, ++ SST_GAIN_INDEX_VAD_OUT, ++ ++ /* Gain IDs for FBA task start here */ ++ SST_GAIN_INDEX_VOICE_UL, ++ ++ /* Gain IDs for MMX task start here */ ++ SST_GAIN_INDEX_MEDIA0_IN_LEFT, ++ SST_GAIN_INDEX_MEDIA0_IN_RIGHT, ++ SST_GAIN_INDEX_MEDIA1_IN_LEFT, ++ SST_GAIN_INDEX_MEDIA1_IN_RIGHT, ++ ++ SST_GAIN_INDEX_MEDIA2_IN_LEFT, ++ SST_GAIN_INDEX_MEDIA2_IN_RIGHT, ++ ++ SST_GAIN_INDEX_GAIN_END ++}; ++ ++/* ++ * Audio DSP module IDs specified by FW spec ++ * TODO: Update with all modules ++ */ ++enum sst_module_id { ++ SST_MODULE_ID_GAIN_CELL = 0x0067, ++ SST_MODULE_ID_SPROT = 0x006D, ++ SST_MODULE_ID_NR = 0x0076, ++ SST_MODULE_ID_BWX = 0x0077, ++ SST_MODULE_ID_DRP = 0x0078, ++ SST_MODULE_ID_MDRP = 0x0079, ++ ++ SST_MODULE_ID_ANA = 0x007A, ++ SST_MODULE_ID_AEC = 0x007B, ++ SST_MODULE_ID_NR_SNS = 0x007C, ++ SST_MODULE_ID_SER = 0x007D, ++ SST_MODULE_ID_AGC = 0x007E, ++ ++ SST_MODULE_ID_CNI = 0x007F, ++ SST_MODULE_ID_CONTEXT_ALGO_AWARE = 0x0080, ++ SST_MODULE_ID_FIR_24 = 0x0081, ++ SST_MODULE_ID_IIR_24 = 0x0082, ++ SST_MODULE_ID_FILT_DCR = 0x0082, ++ ++ SST_MODULE_ID_ASRC = 0x0083, ++ SST_MODULE_ID_TONE_GEN = 0x0084, ++ SST_MODULE_ID_BMF = 0x0086, ++ SST_MODULE_ID_EDL = 0x0087, ++ SST_MODULE_ID_GLC = 0x0088, ++ ++ SST_MODULE_ID_FIR_16 = 0x0089, ++ SST_MODULE_ID_IIR_16 = 0x008A, ++ SST_MODULE_ID_DNR = 0x008B, ++ ++ SST_MODULE_ID_CNI_TX = 0x0090, ++ SST_MODULE_ID_REF_LINE = 0x0091, ++ SST_MODULE_ID_VOLUME = 0x0092, ++ ++ SST_MODULE_ID_TASK = 0xFFFF ++}; ++ ++enum sst_cmd { ++ SBA_IDLE = 14, ++ SBA_VB_SET_SPEECH_PATH = 26, ++ MMX_SET_GAIN = 33, ++ SBA_VB_SET_GAIN = 33, ++ FBA_VB_RX_CNI = 35, ++ MMX_SET_GAIN_TIMECONST = 36, ++ SBA_VB_SET_TIMECONST = 36, ++ FBA_VB_ANA = 37, ++ FBA_VB_SET_FIR = 38, ++ FBA_VB_SET_IIR = 39, ++ FBA_VB_AEC = 47, ++ FBA_VB_NR_UL = 48, ++ FBA_VB_AGC = 49, ++ FBA_VB_NR_DL = 55, ++ SBA_PROBE = 66, ++ MMX_PROBE = 66, ++ FBA_VB_SET_BIQUAD_D_C = 69, ++ FBA_VB_DUAL_BAND_COMP = 70, ++ FBA_VB_SNS = 72, ++ FBA_VB_SER = 78, ++ FBA_VB_TX_CNI = 80, ++ SBA_VB_START = 85, ++ FBA_VB_SET_REF_LINE = 94, ++ FBA_VB_SET_DELAY_LINE = 95, ++ FBA_VB_BWX = 104, ++ FBA_VB_GMM = 105, ++ FBA_VB_GLC = 107, ++ FBA_VB_BMF = 111, ++ FBA_VB_DNR = 113, ++ MMX_SET_SWM = 114, ++ SBA_SET_SWM = 114, ++ SBA_SET_MDRP = 116, ++ SBA_HW_SET_SSP = 117, ++ SBA_SET_MEDIA_LOOP_MAP = 118, ++ SBA_SET_MEDIA_PATH = 119, ++ MMX_SET_MEDIA_PATH = 119, ++ SBA_VB_LPRO = 126, ++ SBA_VB_SET_FIR = 128, ++ SBA_VB_SET_IIR = 129, ++ SBA_SET_SSP_SLOT_MAP = 130, ++ AWARE_ENV_CLASS_PARAMS = 130, ++}; ++ ++enum sst_dsp_switch { ++ SST_SWITCH_OFF = 0, ++ SST_SWITCH_ON = 3, ++}; ++ ++enum sst_path_switch { ++ SST_PATH_OFF = 0, ++ SST_PATH_ON = 1, ++}; ++ ++enum sst_swm_state { ++ SST_SWM_OFF = 0, ++ SST_SWM_ON = 3, ++}; ++ ++#define SST_FILL_LOCATION_IDS(dst, cell_idx, pipe_id) do { \ ++ dst.location_id.p.cell_nbr_idx = (cell_idx); \ ++ dst.location_id.p.path_id = (pipe_id); \ ++ } while (0) ++#define SST_FILL_LOCATION_ID(dst, loc_id) (\ ++ dst.location_id.f = (loc_id)) ++#define SST_FILL_MODULE_ID(dst, mod_id) (\ ++ dst.module_id = (mod_id)) ++ ++#define SST_FILL_DESTINATION1(dst, id) do { \ ++ SST_FILL_LOCATION_ID(dst, (id) & 0xFFFF); \ ++ SST_FILL_MODULE_ID(dst, ((id) & 0xFFFF0000) >> 16); \ ++ } while (0) ++#define SST_FILL_DESTINATION2(dst, loc_id, mod_id) do { \ ++ SST_FILL_LOCATION_ID(dst, loc_id); \ ++ SST_FILL_MODULE_ID(dst, mod_id); \ ++ } while (0) ++#define SST_FILL_DESTINATION3(dst, cell_idx, path_id, mod_id) do { \ ++ SST_FILL_LOCATION_IDS(dst, cell_idx, path_id); \ ++ SST_FILL_MODULE_ID(dst, mod_id); \ ++ } while (0) ++ ++#define SST_FILL_DESTINATION(level, dst, ...) \ ++ SST_FILL_DESTINATION##level(dst, __VA_ARGS__) ++#define SST_FILL_DEFAULT_DESTINATION(dst) \ ++ SST_FILL_DESTINATION(2, dst, SST_DEFAULT_LOCATION_ID, SST_DEFAULT_MODULE_ID) ++ ++struct sst_destination_id { ++ union sst_location_id { ++ struct { ++ u8 cell_nbr_idx; /* module index */ ++ u8 path_id; /* pipe_id */ ++ } __packed p; /* part */ ++ u16 f; /* full */ ++ } __packed location_id; ++ u16 module_id; ++} __packed; ++ ++struct sst_dsp_header { ++ struct sst_destination_id dst; ++ u16 command_id; ++ u16 length; ++} __packed; ++ ++/* ++ * ++ * Common Commands ++ * ++ */ ++struct sst_cmd_generic { ++ struct sst_dsp_header header; ++} __packed; ++ ++struct swm_input_ids { ++ struct sst_destination_id input_id; ++} __packed; ++ ++struct sst_cmd_set_swm { ++ struct sst_dsp_header header; ++ struct sst_destination_id output_id; ++ u16 switch_state; ++ u16 nb_inputs; ++ struct swm_input_ids input[SST_CMD_SWM_MAX_INPUTS]; ++} __packed; ++ ++struct sst_cmd_set_media_path { ++ struct sst_dsp_header header; ++ u16 switch_state; ++} __packed; ++ ++struct sst_cmd_set_speech_path { ++ struct sst_dsp_header header; ++ u16 switch_state; ++ struct { ++ u16 rsvd:8; ++ u16 sample_length:2; ++ u16 rate:3; ++ u16 format:3; ++ } config; ++} __packed; ++ ++struct gain_cell { ++ struct sst_destination_id dest; ++ s16 cell_gain_left; ++ s16 cell_gain_right; ++ u16 gain_time_constant; ++} __packed; ++ ++#define NUM_GAIN_CELLS 1 ++struct sst_cmd_set_gain_dual { ++ struct sst_dsp_header header; ++ u16 gain_cell_num; ++ struct gain_cell cell_gains[NUM_GAIN_CELLS]; ++} __packed; ++ ++struct sst_cmd_set_params { ++ struct sst_destination_id dst; ++ u16 command_id; ++ char params[0]; ++} __packed; ++ ++/* ++ * ++ * Media (MMX) commands ++ * ++ */ ++ ++/* ++ * ++ * SBA commands ++ * ++ */ ++struct sst_cmd_sba_vb_start { ++ struct sst_dsp_header header; ++} __packed; ++ ++union sba_media_loop_params { ++ struct { ++ u16 rsvd:8; ++ u16 sample_length:2; ++ u16 rate:3; ++ u16 format:3; ++ } part; ++ u16 full; ++} __packed; ++ ++struct sst_cmd_sba_set_media_loop_map { ++ struct sst_dsp_header header; ++ u16 switch_state; ++ union sba_media_loop_params param; ++ u16 map; ++} __packed; ++ ++enum sst_ssp_mode { ++ SSP_MODE_MASTER = 0, ++ SSP_MODE_SLAVE = 1, ++}; ++ ++enum sst_ssp_pcm_mode { ++ SSP_PCM_MODE_NORMAL = 0, ++ SSP_PCM_MODE_NETWORK = 1, ++}; ++ ++enum sst_ssp_duplex { ++ SSP_DUPLEX = 0, ++ SSP_RX = 1, ++ SSP_TX = 2, ++}; ++ ++enum sst_ssp_fs_frequency { ++ SSP_FS_8_KHZ = 0, ++ SSP_FS_16_KHZ = 1, ++ SSP_FS_44_1_KHZ = 2, ++ SSP_FS_48_KHZ = 3, ++}; ++ ++enum sst_ssp_fs_polarity { ++ SSP_FS_ACTIVE_LOW = 0, ++ SSP_FS_ACTIVE_HIGH = 1, ++}; ++ ++enum sst_ssp_protocol { ++ SSP_MODE_PCM = 0, ++ SSP_MODE_I2S = 1, ++}; ++ ++enum sst_ssp_port_id { ++ SSP_MODEM = 0, ++ SSP_BT = 1, ++ SSP_FM = 2, ++ SSP_CODEC = 3, ++}; ++ ++struct sst_cmd_sba_hw_set_ssp { ++ struct sst_dsp_header header; ++ u16 selection; /* 0:SSP0(def), 1:SSP1, 2:SSP2 */ ++ ++ u16 switch_state; ++ ++ u16 nb_bits_per_slots:6; /* 0-32 bits, 24 (def) */ ++ u16 nb_slots:4; /* 0-8: slots per frame */ ++ u16 mode:3; /* 0:Master, 1: Slave */ ++ u16 duplex:3; ++ ++ u16 active_tx_slot_map:8; /* Bit map, 0:off, 1:on */ ++ u16 reserved1:8; ++ ++ u16 active_rx_slot_map:8; /* Bit map 0: Off, 1:On */ ++ u16 reserved2:8; ++ ++ u16 frame_sync_frequency; ++ ++ u16 frame_sync_polarity:8; ++ u16 data_polarity:8; ++ ++ u16 frame_sync_width; /* 1 to N clocks */ ++ u16 ssp_protocol:8; ++ u16 start_delay:8; /* Start delay in terms of clock ticks */ ++} __packed; ++ ++#define SST_MAX_TDM_SLOTS 8 ++ ++struct sst_param_sba_ssp_slot_map { ++ struct sst_dsp_header header; ++ ++ u16 param_id; ++ u16 param_len; ++ u16 ssp_index; ++ ++ u8 rx_slot_map[SST_MAX_TDM_SLOTS]; ++ u8 tx_slot_map[SST_MAX_TDM_SLOTS]; ++} __packed; ++ ++enum { ++ SST_PROBE_EXTRACTOR = 0, ++ SST_PROBE_INJECTOR = 1, ++}; ++ ++struct sst_cmd_probe { ++ struct sst_dsp_header header; ++ ++ u16 switch_state; ++ struct sst_destination_id probe_dst; ++ ++ u16 shared_mem:1; ++ u16 probe_in:1; ++ u16 probe_out:1; ++ u16 rsvd_1:13; ++ ++ u16 rsvd_2:5; ++ u16 probe_mode:2; ++ u16 rsvd_3:1; ++ u16 sample_length:2; ++ u16 rate:3; ++ u16 format:3; ++ ++ u16 sm_buf_id; ++ ++ u16 gain[6]; ++ u16 rsvd_4[9]; ++} __packed; ++ ++struct sst_probe_config { ++ const char *name; ++ u16 loc_id; ++ u16 mod_id; ++ u8 task_id; ++ struct pcm_cfg { ++ u8 s_length:2; ++ u8 rate:3; ++ u8 format:3; ++ } cfg; ++}; ++ ++int sst_mix_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); ++int sst_mix_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); ++#endif +diff --git a/sound/soc/intel/platform-libs/controls_v2_dpcm.c b/sound/soc/intel/platform-libs/controls_v2_dpcm.c +new file mode 100644 +index 0000000..311c043 +--- /dev/null ++++ b/sound/soc/intel/platform-libs/controls_v2_dpcm.c +@@ -0,0 +1,1803 @@ ++/* ++ * controls_v2_dpcm.c - Intel MID Platform driver DPCM ALSA controls for Mrfld ++ * ++ * Copyright (C) 2013 Intel Corp ++ * Author: Omair Mohammed Abdullah ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ */ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include "../platform_ipc_v2.h" ++#include "../sst_platform.h" ++#include "../sst_platform_pvt.h" ++#include "controls_v2.h" ++#include "sst_widgets.h" ++ ++static inline void sst_fill_byte_control(char *param, ++ u8 ipc_msg, u8 block, ++ u8 task_id, u8 pipe_id, ++ u16 len, void *cmd_data) ++{ ++ ++ struct snd_sst_bytes_v2 *byte_data = (struct snd_sst_bytes_v2 *)param; ++ byte_data->type = SST_CMD_BYTES_SET; ++ byte_data->ipc_msg = ipc_msg; ++ byte_data->block = block; ++ byte_data->task_id = task_id; ++ byte_data->pipe_id = pipe_id; ++ ++ if (len > SST_MAX_BIN_BYTES - sizeof(*byte_data)) { ++ pr_err("%s: command length too big (%u)", __func__, len); ++ len = SST_MAX_BIN_BYTES - sizeof(*byte_data); ++ WARN_ON(1); /* this happens only if code is wrong */ ++ } ++ byte_data->len = len; ++ memcpy(byte_data->bytes, cmd_data, len); ++ print_hex_dump_bytes("writing to lpe: ", DUMP_PREFIX_OFFSET, ++ byte_data, len + sizeof(*byte_data)); ++} ++ ++static int sst_fill_and_send_cmd(struct sst_data *sst, ++ u8 ipc_msg, u8 block, u8 task_id, u8 pipe_id, ++ void *cmd_data, u16 len) ++{ ++ int ret = 0; ++ ++ mutex_lock(&sst->lock); ++ sst_fill_byte_control(sst->byte_stream, ipc_msg, block, task_id, pipe_id, ++ len, cmd_data); ++ ret = sst_dsp->ops->set_generic_params(SST_SET_BYTE_STREAM, ++ sst->byte_stream); ++ mutex_unlock(&sst->lock); ++ ++ return ret; ++} ++ ++static int sst_probe_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct sst_probe_value *v = (void *)kcontrol->private_value; ++ ++ ucontrol->value.enumerated.item[0] = v->val; ++ return 0; ++} ++ ++static int sst_probe_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct sst_probe_value *v = (void *)kcontrol->private_value; ++ const struct soc_enum *e = v->p_enum; ++ ++ if (ucontrol->value.enumerated.item[0] > e->max - 1) ++ return -EINVAL; ++ v->val = ucontrol->value.enumerated.item[0]; ++ return 0; ++} ++ ++int sst_probe_enum_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ struct sst_probe_value *v = (void *)kcontrol->private_value; ++ const struct soc_enum *e = v->p_enum; ++ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; ++ uinfo->count = 1; ++ uinfo->value.enumerated.items = e->max; ++ ++ if (uinfo->value.enumerated.item > e->max - 1) ++ uinfo->value.enumerated.item = e->max - 1; ++ strcpy(uinfo->value.enumerated.name, ++ e->texts[uinfo->value.enumerated.item]); ++ return 0; ++} ++ ++/* ++ * slot map value is a bitfield where each bit represents a FW channel ++ * ++ * 3 2 1 0 # 0 = codec0, 1 = codec1 ++ * RLRLRLRL # 3, 4 = reserved ++ * ++ * e.g. slot 0 rx map = 00001100b -> data from slot 0 goes into codec_in1 L,R ++ */ ++static u8 sst_ssp_slot_map[SST_MAX_TDM_SLOTS] = { ++ 0x1, 0x2, 0x4, 0x8, 0x10, 0x20, 0x40, 0x80, /* default rx map */ ++}; ++ ++/* ++ * channel map value is a bitfield where each bit represents a slot ++ * ++ * 76543210 # 0 = slot 0, 1 = slot 1 ++ * ++ * e.g. codec1_0 tx map = 00000101b -> data from codec_out1_0 goes into slot 0, 2 ++ */ ++static u8 sst_ssp_channel_map[SST_MAX_TDM_SLOTS] = { ++ 0x1, 0x2, 0x4, 0x8, 0x10, 0x20, 0x40, 0x80, /* default tx map */ ++}; ++ ++static int sst_slot_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct soc_enum *e = (void *)kcontrol->private_value; ++ unsigned int ctl_no = e->reg; ++ unsigned int is_tx = e->reg2; ++ unsigned int val, mux; ++ u8 *map = is_tx ? sst_ssp_channel_map : sst_ssp_slot_map; ++ ++ val = 1 << ctl_no; ++ /* search which slot/channel has this bit set - there should be only one */ ++ for (mux = e->max; mux > 0; mux--) ++ if (map[mux - 1] & val) ++ break; ++ ++ ucontrol->value.enumerated.item[0] = mux; ++ pr_debug("%s: %s - %s map = %#x\n", __func__, is_tx ? "tx channel" : "rx slot", ++ e->texts[mux], mux ? map[mux - 1] : -1); ++ return 0; ++} ++ ++/* ++ * (de)interleaver controls are defined in opposite sense to be user-friendly ++ * ++ * Instead of the enum value being the value set to the register, it is the ++ * register address; and the kcontrol_no is the value written to the register. ++ * ++ * This means that whenever an enum is set, we need to clear the bit ++ * for that kcontrol_no for all the interleaver OR deinterleaver registers ++ */ ++static int sst_slot_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct soc_enum *e = (void *)kcontrol->private_value; ++ int i; ++ unsigned int ctl_no = e->reg; ++ unsigned int is_tx = e->reg2; ++ unsigned int slot_channel_no; ++ unsigned int val, mux; ++ u8 *map = is_tx ? sst_ssp_channel_map : sst_ssp_slot_map; ++ ++ val = 1 << ctl_no; ++ mux = ucontrol->value.enumerated.item[0]; ++ if (mux > e->max - 1) ++ return -EINVAL; ++ ++ /* first clear all registers of this bit */ ++ for (i = 0; i < e->max; i++) ++ map[i] &= ~val; ++ ++ if (mux == 0) /* kctl set to 'none' */ ++ return 0; ++ ++ /* offset by one to take "None" into account */ ++ slot_channel_no = mux - 1; ++ map[slot_channel_no] |= val; ++ ++ pr_debug("%s: %s %s map = %#x\n", __func__, is_tx ? "tx channel" : "rx slot", ++ e->texts[mux], map[slot_channel_no]); ++ return 0; ++} ++ ++/* assumes a boolean mux */ ++static inline bool get_mux_state(struct sst_data *sst, unsigned int reg, unsigned int shift) ++{ ++ return (sst_reg_read(sst, reg, shift, 1) == 1); ++} ++ ++static int sst_mux_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); ++ struct snd_soc_dapm_widget *widget = wlist->widgets[0]; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(widget->platform); ++ struct soc_enum *e = (void *)kcontrol->private_value; ++ unsigned int max = e->max - 1; ++ ++ ucontrol->value.enumerated.item[0] = sst_reg_read(sst, e->reg, e->shift_l, max); ++ return 0; ++} ++ ++static int sst_mux_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); ++ struct snd_soc_dapm_widget *widget = wlist->widgets[0]; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(widget->platform); ++ struct soc_enum *e = (void *)kcontrol->private_value; ++ struct snd_soc_dapm_update update; ++ unsigned int max = e->max - 1; ++ unsigned int mask = (1 << fls(max)) - 1; ++ unsigned int mux, val; ++ ++ if (ucontrol->value.enumerated.item[0] > e->max - 1) ++ return -EINVAL; ++ ++ mux = ucontrol->value.enumerated.item[0]; ++ val = sst_reg_write(sst, e->reg, e->shift_l, max, mux); ++ ++ pr_debug("%s: reg[%d] = %#x\n", __func__, e->reg, val); ++ ++ widget->value = val; ++ update.kcontrol = kcontrol; ++ update.widget = widget; ++ update.reg = e->reg; ++ update.mask = mask; ++ update.val = val; ++ ++ widget->dapm->update = &update; ++ snd_soc_dapm_mux_update_power(widget, kcontrol, mux, e); ++ widget->dapm->update = NULL; ++ return 0; ++} ++ ++static int sst_mode_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ struct soc_enum *e = (void *)kcontrol->private_value; ++ unsigned int max = e->max - 1; ++ ++ ucontrol->value.enumerated.item[0] = sst_reg_read(sst, e->reg, e->shift_l, max); ++ return 0; ++} ++ ++static int sst_mode_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ struct soc_enum *e = (void *)kcontrol->private_value; ++ unsigned int max = e->max - 1; ++ unsigned int val; ++ ++ if (ucontrol->value.enumerated.item[0] > e->max - 1) ++ return -EINVAL; ++ ++ val = sst_reg_write(sst, e->reg, e->shift_l, max, ucontrol->value.enumerated.item[0]); ++ pr_debug("%s: reg[%d] - %#x\n", __func__, e->reg, val); ++ return 0; ++} ++ ++static void sst_send_algo_cmd(struct sst_data *sst, ++ struct sst_algo_control *bc) ++{ ++ int len; ++ struct sst_cmd_set_params *cmd; ++ ++ if (bc->params == NULL) ++ return; ++ ++ len = sizeof(cmd->dst) + sizeof(cmd->command_id) + bc->max; ++ ++ cmd = kzalloc(len + bc->max, GFP_KERNEL); ++ if (cmd == NULL) { ++ pr_err("Failed to send cmd, kzalloc failed\n"); ++ return; ++ } ++ ++ SST_FILL_DESTINATION(2, cmd->dst, bc->pipe_id, bc->module_id); ++ cmd->command_id = bc->cmd_id; ++ memcpy(cmd->params, bc->params, bc->max); ++ ++ sst_fill_and_send_cmd(sst, SST_IPC_IA_SET_PARAMS, SST_FLAG_BLOCKED, ++ bc->task_id, 0, cmd, len); ++ kfree(cmd); ++ ++} ++ ++static void sst_find_and_send_pipe_algo(struct snd_soc_platform *platform, ++ struct snd_soc_dapm_widget *w) ++{ ++ struct sst_algo_control *bc; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ struct sst_ids *ids = w->priv; ++ struct module *algo = NULL; ++ ++ pr_debug("Enter:%s, widget=%s\n", __func__, w->name); ++ ++ list_for_each_entry(algo, &ids->algo_list, node) { ++ bc = (void *)algo->kctl->private_value; ++ ++ pr_debug("Found algo control name =%s pipe=%s\n", algo->kctl->id.name, w->name); ++ sst_send_algo_cmd(sst, bc); ++ } ++} ++ ++int sst_algo_bytes_ctl_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ struct sst_algo_control *bc = (void *)kcontrol->private_value; ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; ++ uinfo->count = bc->max; ++ ++ if (bc->params == NULL) { ++ bc->params = devm_kzalloc(platform->dev, bc->max, GFP_KERNEL); ++ if (bc->params == NULL) { ++ pr_err("kzalloc failed\n"); ++ return -ENOMEM; ++ } ++ } ++ return 0; ++} ++ ++static int sst_algo_control_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct sst_algo_control *bc = (void *)kcontrol->private_value; ++ ++ pr_debug("in %s\n", __func__); ++ switch (bc->type) { ++ case SST_ALGO_PARAMS: ++ if (bc->params) ++ memcpy(ucontrol->value.bytes.data, bc->params, bc->max); ++ break; ++ case SST_ALGO_BYPASS: ++ ucontrol->value.integer.value[0] = bc->bypass ? 1 : 0; ++ pr_debug("%s: bypass %d\n", __func__, bc->bypass); ++ break; ++ default: ++ pr_err("Invalid Input- algo type:%d\n", bc->type); ++ return -EINVAL; ++ ++ } ++ return 0; ++} ++ ++static int sst_algo_control_set(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ struct sst_algo_control *bc = (void *)kcontrol->private_value; ++ ++ pr_debug("in %s control_name=%s\n", __func__, kcontrol->id.name); ++ switch (bc->type) { ++ case SST_ALGO_PARAMS: ++ if (bc->params) ++ memcpy(bc->params, ucontrol->value.bytes.data, bc->max); ++ break; ++ case SST_ALGO_BYPASS: ++ bc->bypass = !!ucontrol->value.integer.value[0]; ++ pr_debug("%s: Mute %d\n", __func__, bc->bypass); ++ break; ++ default: ++ pr_err("Invalid Input- algo type:%ld\n", ucontrol->value.integer.value[0]); ++ return -EINVAL; ++ } ++ /*if pipe is enabled, need to send the algo params from here */ ++ if (bc->w && bc->w->power) ++ sst_send_algo_cmd(sst, bc); ++ ++ return 0; ++} ++ ++static int sst_gain_ctl_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ struct sst_gain_mixer_control *mc = (void *)kcontrol->private_value; ++ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = mc->stereo ? 2 : 1; ++ uinfo->value.integer.min = mc->min; ++ uinfo->value.integer.max = mc->max; ++ return 0; ++} ++ ++static void sst_send_gain_cmd(struct sst_data *sst, struct sst_gain_value *gv, ++ u16 task_id, u16 loc_id, u16 module_id, int mute) ++{ ++ struct sst_cmd_set_gain_dual cmd; ++ pr_debug("%s", __func__); ++ ++ cmd.header.command_id = MMX_SET_GAIN; ++ SST_FILL_DEFAULT_DESTINATION(cmd.header.dst); ++ cmd.gain_cell_num = 1; ++ ++ if (mute || gv->mute) { ++ cmd.cell_gains[0].cell_gain_left = SST_GAIN_MIN_VALUE; ++ cmd.cell_gains[0].cell_gain_right = SST_GAIN_MIN_VALUE; ++ } else { ++ cmd.cell_gains[0].cell_gain_left = gv->l_gain; ++ cmd.cell_gains[0].cell_gain_right = gv->r_gain; ++ } ++ SST_FILL_DESTINATION(2, cmd.cell_gains[0].dest, ++ loc_id, module_id); ++ cmd.cell_gains[0].gain_time_constant = gv->ramp_duration; ++ ++ cmd.header.length = sizeof(struct sst_cmd_set_gain_dual) ++ - sizeof(struct sst_dsp_header); ++ ++ sst_fill_and_send_cmd(sst, SST_IPC_IA_SET_PARAMS, SST_FLAG_BLOCKED, ++ task_id, 0, &cmd, ++ sizeof(cmd.header) + cmd.header.length); ++} ++ ++static int sst_gain_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct sst_gain_mixer_control *mc = (void *)kcontrol->private_value; ++ struct sst_gain_value *gv = mc->gain_val; ++ ++ switch (mc->type) { ++ case SST_GAIN_TLV: ++ ucontrol->value.integer.value[0] = gv->l_gain; ++ ucontrol->value.integer.value[1] = gv->r_gain; ++ pr_debug("%s: Volume %d, %d\n", __func__, gv->l_gain, gv->r_gain); ++ break; ++ case SST_GAIN_MUTE: ++ ucontrol->value.integer.value[0] = gv->mute ? 1 : 0; ++ pr_debug("%s: Mute %d\n", __func__, gv->mute); ++ break; ++ case SST_GAIN_RAMP_DURATION: ++ ucontrol->value.integer.value[0] = gv->ramp_duration; ++ pr_debug("%s: RampDuration %d\n", __func__, gv->ramp_duration); ++ break; ++ default: ++ pr_err("Invalid Input- gain type:%d\n", mc->type); ++ return -EINVAL; ++ }; ++ return 0; ++} ++ ++static int sst_gain_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_platform *platform = snd_kcontrol_chip(kcontrol); ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ struct sst_gain_mixer_control *mc = (void *)kcontrol->private_value; ++ struct sst_gain_value *gv = mc->gain_val; ++ ++ switch (mc->type) { ++ case SST_GAIN_TLV: ++ gv->l_gain = ucontrol->value.integer.value[0]; ++ gv->r_gain = ucontrol->value.integer.value[1]; ++ pr_debug("%s: Volume %d, %d\n", __func__, gv->l_gain, gv->r_gain); ++ break; ++ case SST_GAIN_MUTE: ++ gv->mute = !!ucontrol->value.integer.value[0]; ++ pr_debug("%s: Mute %d\n", __func__, gv->mute); ++ break; ++ case SST_GAIN_RAMP_DURATION: ++ gv->ramp_duration = ucontrol->value.integer.value[0]; ++ pr_debug("%s: RampDuration %d\n", __func__, gv->ramp_duration); ++ break; ++ default: ++ pr_err("Invalid Input- gain type:%d\n", mc->type); ++ return -EINVAL; ++ }; ++ ++ if (mc->w && mc->w->power) ++ sst_send_gain_cmd(sst, gv, mc->task_id, ++ mc->pipe_id | mc->instance_id, mc->module_id, 0); ++ return 0; ++} ++ ++static const DECLARE_TLV_DB_SCALE(sst_gain_tlv_common, SST_GAIN_MIN_VALUE * 10, 10, 0); ++ ++/* Look up table to convert MIXER SW bit regs to SWM inputs */ ++static const uint swm_mixer_input_ids[SST_SWM_INPUT_COUNT] = { ++ [SST_IP_MODEM] = SST_SWM_IN_MODEM, ++ [SST_IP_BT] = SST_SWM_IN_BT, ++ [SST_IP_CODEC0] = SST_SWM_IN_CODEC0, ++ [SST_IP_CODEC1] = SST_SWM_IN_CODEC1, ++ [SST_IP_LOOP0] = SST_SWM_IN_SPROT_LOOP, ++ [SST_IP_LOOP1] = SST_SWM_IN_MEDIA_LOOP1, ++ [SST_IP_LOOP2] = SST_SWM_IN_MEDIA_LOOP2, ++ [SST_IP_SIDETONE] = SST_SWM_IN_SIDETONE, ++ [SST_IP_TXSPEECH] = SST_SWM_IN_TXSPEECH, ++ [SST_IP_SPEECH] = SST_SWM_IN_SPEECH, ++ [SST_IP_TONE] = SST_SWM_IN_TONE, ++ [SST_IP_VOIP] = SST_SWM_IN_VOIP, ++ [SST_IP_PCM0] = SST_SWM_IN_PCM0, ++ [SST_IP_PCM1] = SST_SWM_IN_PCM1, ++ [SST_IP_LOW_PCM0] = SST_SWM_IN_LOW_PCM0, ++ [SST_IP_FM] = SST_SWM_IN_FM, ++ [SST_IP_MEDIA0] = SST_SWM_IN_MEDIA0, ++ [SST_IP_MEDIA1] = SST_SWM_IN_MEDIA1, ++ [SST_IP_MEDIA2] = SST_SWM_IN_MEDIA2, ++ [SST_IP_MEDIA3] = SST_SWM_IN_MEDIA3, ++}; ++ ++static int fill_swm_input(struct swm_input_ids *swm_input, unsigned int reg) ++{ ++ uint i, is_set, nb_inputs = 0; ++ u16 input_loc_id; ++ ++ pr_debug("%s:reg value:%#x\n", __func__, reg); ++ for (i = 0; i < SST_SWM_INPUT_COUNT; i++) { ++ is_set = reg & BIT(i); ++ if (!is_set) ++ continue; ++ ++ input_loc_id = swm_mixer_input_ids[i]; ++ SST_FILL_DESTINATION(2, swm_input->input_id, ++ input_loc_id, SST_DEFAULT_MODULE_ID); ++ nb_inputs++; ++ swm_input++; ++ pr_debug("input id:%#x, nb_inputs:%d\n", input_loc_id, nb_inputs); ++ ++ if (nb_inputs == SST_CMD_SWM_MAX_INPUTS) { ++ pr_warn("%s: SET_SWM cmd max inputs reached", __func__); ++ break; ++ } ++ } ++ return nb_inputs; ++} ++ ++static void sst_set_pipe_gain(struct sst_ids *ids, struct sst_data *sst, int mute) ++{ ++ struct sst_gain_mixer_control *mc; ++ struct sst_gain_value *gv; ++ struct module *gain = NULL; ++ ++ list_for_each_entry(gain, &ids->gain_list, node) { ++ struct snd_kcontrol *kctl = gain->kctl; ++ ++ pr_debug("control name=%s", kctl->id.name); ++ mc = (void *)kctl->private_value; ++ gv = mc->gain_val; ++ ++ sst_send_gain_cmd(sst, gv, mc->task_id, ++ mc->pipe_id | mc->instance_id, mc->module_id, mute); ++ } ++} ++ ++static int sst_swm_mixer_event(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *k, int event) ++{ ++ struct sst_cmd_set_swm cmd; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(w->platform); ++ struct sst_ids *ids = w->priv; ++ bool set_mixer = false; ++ int val = sst->widget[ids->reg]; ++ ++ pr_debug("%s: widget=%s\n", __func__, w->name); ++ pr_debug("%s: reg[%d] = %#x\n", __func__, ids->reg, val); ++ ++ switch (event) { ++ case SND_SOC_DAPM_PRE_PMU: ++ case SND_SOC_DAPM_POST_PMD: ++ set_mixer = true; ++ break; ++ case SND_SOC_DAPM_POST_REG: ++ if (w->power) ++ set_mixer = true; ++ break; ++ default: ++ set_mixer = false; ++ } ++ ++ if (set_mixer == false) ++ return 0; ++ ++ if (SND_SOC_DAPM_EVENT_ON(event) || ++ event == SND_SOC_DAPM_POST_REG) ++ cmd.switch_state = SST_SWM_ON; ++ else ++ cmd.switch_state = SST_SWM_OFF; ++ ++ SST_FILL_DEFAULT_DESTINATION(cmd.header.dst); ++ /* MMX_SET_SWM == SBA_SET_SWM */ ++ cmd.header.command_id = SBA_SET_SWM; ++ ++ SST_FILL_DESTINATION(2, cmd.output_id, ++ ids->location_id, SST_DEFAULT_MODULE_ID); ++ cmd.nb_inputs = fill_swm_input(&cmd.input[0], val); ++ cmd.header.length = offsetof(struct sst_cmd_set_swm, input) - sizeof(struct sst_dsp_header) ++ + (cmd.nb_inputs * sizeof(cmd.input[0])); ++ ++ sst_fill_and_send_cmd(sst, SST_IPC_IA_CMD, SST_FLAG_BLOCKED, ++ ids->task_id, 0, &cmd, ++ sizeof(cmd.header) + cmd.header.length); ++ return 0; ++} ++ ++/* SBA mixers - 16 inputs */ ++#define SST_SBA_DECLARE_MIX_CONTROLS(kctl_name, mixer_reg) \ ++ static const struct snd_kcontrol_new kctl_name[] = { \ ++ SOC_SINGLE_EXT("modem_in", mixer_reg, SST_IP_MODEM, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("bt_in", mixer_reg, SST_IP_BT, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("codec_in0", mixer_reg, SST_IP_CODEC0, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("codec_in1", mixer_reg, SST_IP_CODEC1, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("sprot_loop_in", mixer_reg, SST_IP_LOOP0, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("media_loop1_in", mixer_reg, SST_IP_LOOP1, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("media_loop2_in", mixer_reg, SST_IP_LOOP2, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("sidetone_in", mixer_reg, SST_IP_SIDETONE, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("txspeech_in", mixer_reg, SST_IP_TXSPEECH, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("speech_in", mixer_reg, SST_IP_SPEECH, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("tone_in", mixer_reg, SST_IP_TONE, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("voip_in", mixer_reg, SST_IP_VOIP, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("pcm0_in", mixer_reg, SST_IP_PCM0, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("pcm1_in", mixer_reg, SST_IP_PCM1, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("low_pcm0_in", mixer_reg, SST_IP_LOW_PCM0, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("fm_in", mixer_reg, SST_IP_FM, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ } ++ ++#define SST_SBA_MIXER_GRAPH_MAP(mix_name) \ ++ { mix_name, "modem_in", "modem_in" }, \ ++ { mix_name, "bt_in", "bt_in" }, \ ++ { mix_name, "codec_in0", "codec_in0" }, \ ++ { mix_name, "codec_in1", "codec_in1" }, \ ++ { mix_name, "sprot_loop_in", "sprot_loop_in" }, \ ++ { mix_name, "media_loop1_in", "media_loop1_in" }, \ ++ { mix_name, "media_loop2_in", "media_loop2_in" }, \ ++ { mix_name, "sidetone_in", "sidetone_in" }, \ ++ { mix_name, "txspeech_in", "txspeech_in" }, \ ++ { mix_name, "speech_in", "speech_in" }, \ ++ { mix_name, "tone_in", "tone_in" }, \ ++ { mix_name, "voip_in", "voip_in" }, \ ++ { mix_name, "pcm0_in", "pcm0_in" }, \ ++ { mix_name, "pcm1_in", "pcm1_in" }, \ ++ { mix_name, "low_pcm0_in", "low_pcm0_in" }, \ ++ { mix_name, "fm_in", "fm_in" } ++ ++#define SST_MMX_DECLARE_MIX_CONTROLS(kctl_name, mixer_reg) \ ++ static const struct snd_kcontrol_new kctl_name[] = { \ ++ SOC_SINGLE_EXT("media0_in", mixer_reg, SST_IP_MEDIA0, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("media1_in", mixer_reg, SST_IP_MEDIA1, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("media2_in", mixer_reg, SST_IP_MEDIA2, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ SOC_SINGLE_EXT("media3_in", mixer_reg, SST_IP_MEDIA3, 1, 0, \ ++ sst_mix_get, sst_mix_put), \ ++ } ++ ++SST_MMX_DECLARE_MIX_CONTROLS(sst_mix_media0_controls, SST_MIX_MEDIA0); ++SST_MMX_DECLARE_MIX_CONTROLS(sst_mix_media1_controls, SST_MIX_MEDIA1); ++ ++/* 18 SBA mixers */ ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_pcm0_controls, SST_MIX_PCM0); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_pcm1_controls, SST_MIX_PCM1); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_pcm2_controls, SST_MIX_PCM2); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_sprot_l0_controls, SST_MIX_LOOP0); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_media_l1_controls, SST_MIX_LOOP1); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_media_l2_controls, SST_MIX_LOOP2); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_voip_controls, SST_MIX_VOIP); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_aware_controls, SST_MIX_AWARE); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_vad_controls, SST_MIX_VAD); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_hf_sns_controls, SST_MIX_HF_SNS); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_hf_controls, SST_MIX_HF); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_speech_controls, SST_MIX_SPEECH); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_rxspeech_controls, SST_MIX_RXSPEECH); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_codec0_controls, SST_MIX_CODEC0); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_codec1_controls, SST_MIX_CODEC1); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_bt_controls, SST_MIX_BT); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_fm_controls, SST_MIX_FM); ++SST_SBA_DECLARE_MIX_CONTROLS(sst_mix_modem_controls, SST_MIX_MODEM); ++ ++static int sst_vb_trigger_event(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *k, int event) ++{ ++ struct sst_cmd_generic cmd; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(w->platform); ++ ++ pr_debug("Enter:%s, widget=%s\n", __func__, w->name); ++ if (SND_SOC_DAPM_EVENT_ON(event)) ++ cmd.header.command_id = SBA_VB_START; ++ else ++ cmd.header.command_id = SBA_IDLE; ++ ++ SST_FILL_DEFAULT_DESTINATION(cmd.header.dst); ++ cmd.header.length = 0; ++ ++ if (SND_SOC_DAPM_EVENT_ON(event)) ++ sst_dsp->ops->power(true); ++ ++ sst_fill_and_send_cmd(sst, SST_IPC_IA_CMD, SST_FLAG_BLOCKED, ++ SST_TASK_SBA, 0, &cmd, ++ sizeof(cmd.header) + cmd.header.length); ++ ++ if (!SND_SOC_DAPM_EVENT_ON(event)) ++ sst_dsp->ops->power(false); ++ return 0; ++} ++ ++static void sst_send_slot_map(struct sst_data *sst) ++{ ++ struct sst_param_sba_ssp_slot_map cmd; ++ ++ pr_debug("Enter: %s", __func__); ++ ++ SST_FILL_DEFAULT_DESTINATION(cmd.header.dst); ++ cmd.header.command_id = SBA_SET_SSP_SLOT_MAP; ++ cmd.header.length = sizeof(struct sst_param_sba_ssp_slot_map) ++ - sizeof(struct sst_dsp_header); ++ ++ cmd.param_id = SBA_SET_SSP_SLOT_MAP; ++ cmd.param_len = sizeof(cmd.rx_slot_map) + sizeof(cmd.tx_slot_map) + sizeof(cmd.ssp_index); ++ cmd.ssp_index = SSP_CODEC; ++ ++ memcpy(cmd.rx_slot_map, &sst_ssp_slot_map[0], sizeof(cmd.rx_slot_map)); ++ memcpy(cmd.tx_slot_map, &sst_ssp_channel_map[0], sizeof(cmd.tx_slot_map)); ++ ++ sst_fill_and_send_cmd(sst, SST_IPC_IA_SET_PARAMS, SST_FLAG_BLOCKED, ++ SST_TASK_SBA, 0, &cmd, ++ sizeof(cmd.header) + cmd.header.length); ++} ++ ++static int sst_ssp_event(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *k, int event) ++{ ++ struct sst_cmd_sba_hw_set_ssp cmd; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(w->platform); ++ struct sst_ids *ids = w->priv; ++ static int ssp_active[SST_NUM_SSPS]; ++ unsigned int domain, mux; ++ unsigned int ssp_no = ids->ssp->ssp_number; ++ int domain_shift, mux_shift; ++ const struct sst_ssp_config *config; ++ ++ pr_debug("Enter:%s, widget=%s\n", __func__, w->name); ++ ++ SST_FILL_DEFAULT_DESTINATION(cmd.header.dst); ++ cmd.header.command_id = SBA_HW_SET_SSP; ++ cmd.header.length = sizeof(struct sst_cmd_sba_hw_set_ssp) ++ - sizeof(struct sst_dsp_header); ++ mux_shift = *ids->ssp->mux_shift; ++ mux = (mux_shift == -1) ? 0 : get_mux_state(sst, SST_MUX_REG, mux_shift); ++ domain_shift = (*ids->ssp->domain_shift)[mux]; ++ domain = (domain_shift == -1) ? 0 : get_mux_state(sst, SST_MUX_REG, domain_shift); ++ ++ config = &(*ids->ssp->ssp_config)[mux][domain]; ++ pr_debug("%s: ssp_id: %u, mux: %d, domain: %d\n", __func__, ++ config->ssp_id, mux, domain); ++ ++ if (SND_SOC_DAPM_EVENT_ON(event)) ++ ssp_active[ssp_no]++; ++ else ++ ssp_active[ssp_no]--; ++ ++ pr_debug("%s: ssp_no: %u ssp_active: %d", __func__, ssp_no, ssp_active[ssp_no]); ++ if (ssp_active[ssp_no]) ++ cmd.switch_state = SST_SWITCH_ON; ++ else ++ cmd.switch_state = SST_SWITCH_OFF; ++ ++ cmd.selection = config->ssp_id; ++ cmd.nb_bits_per_slots = config->bits_per_slot; ++ cmd.nb_slots = config->slots; ++ cmd.mode = config->ssp_mode | (config->pcm_mode << 1); ++ cmd.duplex = config->duplex; ++ cmd.active_tx_slot_map = config->active_slot_map; ++ cmd.active_rx_slot_map = config->active_slot_map; ++ cmd.frame_sync_frequency = config->fs_frequency; ++ cmd.frame_sync_polarity = SSP_FS_ACTIVE_HIGH; ++ cmd.data_polarity = 1; ++ cmd.frame_sync_width = config->fs_width; ++ cmd.ssp_protocol = config->ssp_protocol; ++ cmd.start_delay = config->start_delay; ++ cmd.reserved1 = cmd.reserved2 = 0xFF; ++ ++ sst_fill_and_send_cmd(sst, SST_IPC_IA_CMD, SST_FLAG_BLOCKED, ++ SST_TASK_SBA, 0, &cmd, ++ sizeof(cmd.header) + cmd.header.length); ++ ++ if (SND_SOC_DAPM_EVENT_ON(event)) { ++ sst_find_and_send_pipe_algo(w->platform, w); ++ sst_send_slot_map(sst); ++ sst_set_pipe_gain(ids, sst, 0); ++ } ++ return 0; ++} ++ ++static int sst_set_speech_path(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *k, int event) ++{ ++ struct sst_cmd_set_speech_path cmd; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(w->platform); ++ struct sst_ids *ids = w->priv; ++ bool is_wideband; ++ static int speech_active; ++ ++ pr_debug("%s: widget=%s\n", __func__, w->name); ++ ++ if (SND_SOC_DAPM_EVENT_ON(event)) { ++ speech_active++; ++ cmd.switch_state = SST_SWITCH_ON; ++ } else { ++ speech_active--; ++ cmd.switch_state = SST_SWITCH_OFF; ++ } ++ ++ SST_FILL_DEFAULT_DESTINATION(cmd.header.dst); ++ ++ cmd.header.command_id = SBA_VB_SET_SPEECH_PATH; ++ cmd.header.length = sizeof(struct sst_cmd_set_speech_path) ++ - sizeof(struct sst_dsp_header); ++ cmd.config.sample_length = 0; ++ cmd.config.rate = 0; /* 8 khz */ ++ cmd.config.format = 0; ++ ++ is_wideband = get_mux_state(sst, SST_MUX_REG, SST_VOICE_MODE_SHIFT); ++ if (is_wideband) ++ cmd.config.rate = 1; /* 16 khz */ ++ ++ if ((SND_SOC_DAPM_EVENT_ON(event) && (speech_active == 1)) || ++ (SND_SOC_DAPM_EVENT_OFF(event) && (speech_active == 0))) ++ sst_fill_and_send_cmd(sst, SST_IPC_IA_CMD, SST_FLAG_BLOCKED, ++ SST_TASK_SBA, 0, &cmd, ++ sizeof(cmd.header) + cmd.header.length); ++ ++ if (SND_SOC_DAPM_EVENT_ON(event)) { ++ sst_find_and_send_pipe_algo(w->platform, w); ++ sst_set_pipe_gain(ids, sst, 0); ++ } ++ ++ return 0; ++ ++} ++ ++static int sst_set_media_path(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *k, int event) ++{ ++ struct sst_cmd_set_media_path cmd; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(w->platform); ++ struct sst_ids *ids = w->priv; ++ ++ pr_debug("%s: widget=%s\n", __func__, w->name); ++ pr_debug("%s: task=%u, location=%#x\n", __func__, ++ ids->task_id, ids->location_id); ++ ++ if (SND_SOC_DAPM_EVENT_ON(event)) ++ cmd.switch_state = SST_PATH_ON; ++ else ++ cmd.switch_state = SST_PATH_OFF; ++ ++ SST_FILL_DESTINATION(2, cmd.header.dst, ++ ids->location_id, SST_DEFAULT_MODULE_ID); ++ ++ /* MMX_SET_MEDIA_PATH == SBA_SET_MEDIA_PATH */ ++ cmd.header.command_id = MMX_SET_MEDIA_PATH; ++ cmd.header.length = sizeof(struct sst_cmd_set_media_path) ++ - sizeof(struct sst_dsp_header); ++ ++ sst_fill_and_send_cmd(sst, SST_IPC_IA_CMD, SST_FLAG_BLOCKED, ++ ids->task_id, 0, &cmd, ++ sizeof(cmd.header) + cmd.header.length); ++ ++ if (SND_SOC_DAPM_EVENT_ON(event)) { ++ sst_find_and_send_pipe_algo(w->platform, w); ++ sst_set_pipe_gain(ids, sst, 0); ++ } ++ ++ return 0; ++} ++ ++static int sst_set_media_loop(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *k, int event) ++{ ++ struct sst_cmd_sba_set_media_loop_map cmd; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(w->platform); ++ struct sst_ids *ids = w->priv; ++ ++ pr_debug("Enter:%s, widget=%s\n", __func__, w->name); ++ if (SND_SOC_DAPM_EVENT_ON(event)) ++ cmd.switch_state = SST_SWITCH_ON; ++ else ++ cmd.switch_state = SST_SWITCH_OFF; ++ ++ SST_FILL_DESTINATION(2, cmd.header.dst, ++ ids->location_id, SST_DEFAULT_MODULE_ID); ++ ++ cmd.header.command_id = SBA_SET_MEDIA_LOOP_MAP; ++ cmd.header.length = sizeof(struct sst_cmd_sba_set_media_loop_map) ++ - sizeof(struct sst_dsp_header); ++ cmd.param.part.rate = 2; /* 48khz */ ++ ++ cmd.param.part.format = ids->format; /* stereo/Mono */ ++ cmd.param.part.sample_length = 1; /* 24bit left justified*/ ++ cmd.map = 0; /* Algo sequence: Gain - DRP - FIR - IIR */ ++ ++ sst_fill_and_send_cmd(sst, SST_IPC_IA_CMD, SST_FLAG_BLOCKED, ++ SST_TASK_SBA, 0, &cmd, ++ sizeof(cmd.header) + cmd.header.length); ++ if (SND_SOC_DAPM_EVENT_ON(event)) { ++ sst_find_and_send_pipe_algo(w->platform, w); ++ sst_set_pipe_gain(ids, sst, 0); ++ } ++ return 0; ++} ++ ++static int sst_send_probe_cmd(struct sst_data *sst, u16 probe_pipe_id, ++ int mode, int switch_state, ++ const struct sst_probe_config *probe_cfg) ++{ ++ struct sst_cmd_probe cmd; ++ ++ memset(&cmd, 0, sizeof(cmd)); ++ ++ SST_FILL_DESTINATION(3, cmd.header.dst, SST_DEFAULT_CELL_NBR, ++ probe_pipe_id, SST_DEFAULT_MODULE_ID); ++ cmd.header.command_id = SBA_PROBE; ++ cmd.header.length = sizeof(struct sst_cmd_probe) ++ - sizeof(struct sst_dsp_header); ++ cmd.switch_state = switch_state; ++ ++ SST_FILL_DESTINATION(2, cmd.probe_dst, ++ probe_cfg->loc_id, probe_cfg->mod_id); ++ ++ cmd.shared_mem = 1; ++ cmd.probe_in = 0; ++ cmd.probe_out = 0; ++ ++ cmd.probe_mode = mode; ++ cmd.sample_length = probe_cfg->cfg.s_length; ++ cmd.rate = probe_cfg->cfg.rate; ++ cmd.format = probe_cfg->cfg.format; ++ cmd.sm_buf_id = 1; ++ ++ return sst_fill_and_send_cmd(sst, SST_IPC_IA_CMD, SST_FLAG_BLOCKED, ++ probe_cfg->task_id, 0, &cmd, ++ sizeof(cmd.header) + cmd.header.length); ++} ++ ++static const struct snd_kcontrol_new sst_probe_controls[]; ++static const struct sst_probe_config sst_probes[]; ++ ++#define SST_MAX_PROBE_STREAMS 8 ++int sst_dpcm_probe_send(struct snd_soc_platform *platform, u16 probe_pipe_id, ++ int substream, int direction, bool on) ++{ ++ int switch_state = on ? SST_SWITCH_ON : SST_SWITCH_OFF; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ const struct sst_probe_config *probe_cfg; ++ struct sst_probe_value *probe_val; ++ char *type; ++ int offset; ++ int mode; ++ ++ if (direction == SNDRV_PCM_STREAM_CAPTURE) { ++ mode = SST_PROBE_EXTRACTOR; ++ offset = 0; ++ type = "extractor"; ++ } else { ++ mode = SST_PROBE_INJECTOR; ++ offset = SST_MAX_PROBE_STREAMS; ++ type = "injector"; ++ } ++ /* get the value of the probe connection kcontrol */ ++ probe_val = (void *)sst_probe_controls[substream + offset].private_value; ++ probe_cfg = &sst_probes[probe_val->val]; ++ ++ pr_debug("%s: substream=%d, direction=%d\n", __func__, substream, direction); ++ pr_debug("%s: %s probe point at %s\n", __func__, type, probe_cfg->name); ++ ++ return sst_send_probe_cmd(sst, probe_pipe_id, mode, switch_state, probe_cfg); ++} ++ ++static const struct snd_kcontrol_new sst_mix_sw_aware = ++ SOC_SINGLE_EXT("switch", SST_MIX_SWITCH, 0, 1, 0, ++ sst_mix_get, sst_mix_put); ++ ++static const char * const sst_bt_fm_texts[] = { ++ "fm", "bt", ++}; ++ ++static const struct snd_kcontrol_new sst_bt_fm_mux = ++ SST_SSP_MUX_CTL("ssp1_out", 0, SST_MUX_REG, SST_BT_FM_MUX_SHIFT, sst_bt_fm_texts, ++ sst_mux_get, sst_mux_put); ++ ++#define SST_SSP_CODEC_MUX 0 ++#define SST_SSP_CODEC_DOMAIN 0 ++#define SST_SSP_MODEM_MUX 0 ++#define SST_SSP_MODEM_DOMAIN 0 ++#define SST_SSP_FM_MUX 0 ++#define SST_SSP_FM_DOMAIN 0 ++#define SST_SSP_BT_MUX 1 ++#define SST_SSP_BT_NB_DOMAIN 0 ++#define SST_SSP_BT_WB_DOMAIN 1 ++ ++static const int sst_ssp_mux_shift[SST_NUM_SSPS] = { ++ [SST_SSP0] = -1, /* no register shift, i.e. single mux value */ ++ [SST_SSP1] = SST_BT_FM_MUX_SHIFT, ++ [SST_SSP2] = -1, ++}; ++ ++static const int sst_ssp_domain_shift[SST_NUM_SSPS][SST_MAX_SSP_MUX] = { ++ [SST_SSP0][0] = -1, /* no domain shift, i.e. single domain */ ++ [SST_SSP1] = { ++ [SST_SSP_FM_MUX] = -1, ++ [SST_SSP_BT_MUX] = SST_BT_MODE_SHIFT, ++ }, ++ [SST_SSP2][0] = -1, ++}; ++ ++static const struct sst_ssp_config ++sst_ssp_configs[SST_NUM_SSPS][SST_MAX_SSP_MUX][SST_MAX_SSP_DOMAINS] = { ++ [SST_SSP0] = { ++ [SST_SSP_MODEM_MUX] = { ++ [SST_SSP_MODEM_DOMAIN] = { ++ .ssp_id = SSP_MODEM, ++ .bits_per_slot = 16, ++ .slots = 1, ++ .ssp_mode = SSP_MODE_MASTER, ++ .pcm_mode = SSP_PCM_MODE_NETWORK, ++ .duplex = SSP_DUPLEX, ++ .ssp_protocol = SSP_MODE_PCM, ++ .fs_width = 1, ++ .fs_frequency = SSP_FS_48_KHZ, ++ .active_slot_map = 0x1, ++ .start_delay = 1, ++ }, ++ }, ++ }, ++ [SST_SSP1] = { ++ [SST_SSP_FM_MUX] = { ++ [SST_SSP_FM_DOMAIN] = { ++ .ssp_id = SSP_FM, ++ .bits_per_slot = 16, ++ .slots = 2, ++ .ssp_mode = SSP_MODE_MASTER, ++ .pcm_mode = SSP_PCM_MODE_NORMAL, ++ .duplex = SSP_DUPLEX, ++ .ssp_protocol = SSP_MODE_I2S, ++ .fs_width = 32, ++ .fs_frequency = SSP_FS_48_KHZ, ++ .active_slot_map = 0x3, ++ .start_delay = 0, ++ }, ++ }, ++ [SST_SSP_BT_MUX] = { ++ [SST_SSP_BT_NB_DOMAIN] = { ++ .ssp_id = SSP_BT, ++ .bits_per_slot = 16, ++ .slots = 1, ++ .ssp_mode = SSP_MODE_MASTER, ++ .pcm_mode = SSP_PCM_MODE_NORMAL, ++ .duplex = SSP_DUPLEX, ++ .ssp_protocol = SSP_MODE_PCM, ++ .fs_width = 1, ++ .fs_frequency = SSP_FS_8_KHZ, ++ .active_slot_map = 0x1, ++ .start_delay = 1, ++ }, ++ [SST_SSP_BT_WB_DOMAIN] = { ++ .ssp_id = SSP_BT, ++ .bits_per_slot = 16, ++ .slots = 1, ++ .ssp_mode = SSP_MODE_MASTER, ++ .pcm_mode = SSP_PCM_MODE_NORMAL, ++ .duplex = SSP_DUPLEX, ++ .ssp_protocol = SSP_MODE_PCM, ++ .fs_width = 1, ++ .fs_frequency = SSP_FS_16_KHZ, ++ .active_slot_map = 0x1, ++ .start_delay = 1, ++ }, ++ }, ++ }, ++ [SST_SSP2] = { ++ [SST_SSP_CODEC_MUX] = { ++ [SST_SSP_CODEC_DOMAIN] = { ++ .ssp_id = SSP_CODEC, ++ .bits_per_slot = 24, ++ .slots = 4, ++ .ssp_mode = SSP_MODE_MASTER, ++ .pcm_mode = SSP_PCM_MODE_NETWORK, ++ .duplex = SSP_DUPLEX, ++ .ssp_protocol = SSP_MODE_PCM, ++ .fs_width = 1, ++ .fs_frequency = SSP_FS_48_KHZ, ++ .active_slot_map = 0xF, ++ .start_delay = 0, ++ }, ++ }, ++ }, ++}; ++ ++#define SST_SSP_CFG(wssp_no) \ ++ (const struct sst_ssp_cfg){ .ssp_config = &sst_ssp_configs[wssp_no], \ ++ .ssp_number = wssp_no, \ ++ .mux_shift = &sst_ssp_mux_shift[wssp_no], \ ++ .domain_shift = &sst_ssp_domain_shift[wssp_no], } ++ ++static const struct snd_soc_dapm_widget sst_dapm_widgets[] = { ++ SND_SOC_DAPM_INPUT("tone"), ++ SND_SOC_DAPM_OUTPUT("aware"), ++ SND_SOC_DAPM_OUTPUT("vad"), ++ SST_SSP_INPUT("modem_in", sst_ssp_event, SST_SSP_CFG(SST_SSP0)), ++ SST_SSP_AIF_IN("codec_in0", sst_ssp_event, SST_SSP_CFG(SST_SSP2)), ++ SST_SSP_AIF_IN("codec_in1", sst_ssp_event, SST_SSP_CFG(SST_SSP2)), ++ SST_SSP_INPUT("bt_fm_in", sst_ssp_event, SST_SSP_CFG(SST_SSP1)), ++ SST_SSP_OUTPUT("modem_out", sst_ssp_event, SST_SSP_CFG(SST_SSP0)), ++ SST_SSP_AIF_OUT("codec_out0", sst_ssp_event, SST_SSP_CFG(SST_SSP2)), ++ SST_SSP_AIF_OUT("codec_out1", sst_ssp_event, SST_SSP_CFG(SST_SSP2)), ++ SST_SSP_OUTPUT("bt_fm_out", sst_ssp_event, SST_SSP_CFG(SST_SSP1)), ++ ++ /* Media Paths */ ++ /* MediaX IN paths are set via ALLOC, so no SET_MEDIA_PATH command */ ++ SST_PATH_INPUT("media0_in", SST_TASK_MMX, SST_SWM_IN_MEDIA0, NULL), ++ SST_PATH_INPUT("media1_in", SST_TASK_MMX, SST_SWM_IN_MEDIA1, NULL), ++ SST_PATH_INPUT("media2_in", SST_TASK_MMX, SST_SWM_IN_MEDIA2, sst_set_media_path), ++ SST_PATH_INPUT("media3_in", SST_TASK_MMX, SST_SWM_IN_MEDIA3, NULL), ++ SST_PATH_OUTPUT("media0_out", SST_TASK_MMX, SST_SWM_OUT_MEDIA0, sst_set_media_path), ++ SST_PATH_OUTPUT("media1_out", SST_TASK_MMX, SST_SWM_OUT_MEDIA1, sst_set_media_path), ++ ++ /* SBA PCM Paths */ ++ SST_PATH_INPUT("pcm0_in", SST_TASK_SBA, SST_SWM_IN_PCM0, sst_set_media_path), ++ SST_PATH_INPUT("pcm1_in", SST_TASK_SBA, SST_SWM_IN_PCM1, sst_set_media_path), ++ SST_PATH_OUTPUT("pcm0_out", SST_TASK_SBA, SST_SWM_OUT_PCM0, sst_set_media_path), ++ SST_PATH_OUTPUT("pcm1_out", SST_TASK_SBA, SST_SWM_OUT_PCM1, sst_set_media_path), ++ SST_PATH_OUTPUT("pcm2_out", SST_TASK_SBA, SST_SWM_OUT_PCM2, sst_set_media_path), ++ /* TODO: check if this needs SET_MEDIA_PATH command*/ ++ SST_PATH_INPUT("low_pcm0_in", SST_TASK_SBA, SST_SWM_IN_LOW_PCM0, NULL), ++ ++ SST_PATH_INPUT("voip_in", SST_TASK_SBA, SST_SWM_IN_VOIP, sst_set_media_path), ++ SST_PATH_OUTPUT("voip_out", SST_TASK_SBA, SST_SWM_OUT_VOIP, sst_set_media_path), ++ SST_PATH_OUTPUT("aware_out", SST_TASK_SBA, SST_SWM_OUT_AWARE, sst_set_media_path), ++ SST_PATH_OUTPUT("vad_out", SST_TASK_SBA, SST_SWM_OUT_VAD, sst_set_media_path), ++ ++ /* SBA Loops */ ++ SST_PATH_INPUT("sprot_loop_in", SST_TASK_SBA, SST_SWM_IN_SPROT_LOOP, NULL), ++ SST_PATH_INPUT("media_loop1_in", SST_TASK_SBA, SST_SWM_IN_MEDIA_LOOP1, NULL), ++ SST_PATH_INPUT("media_loop2_in", SST_TASK_SBA, SST_SWM_IN_MEDIA_LOOP2, NULL), ++ SST_PATH_MEDIA_LOOP_OUTPUT("sprot_loop_out", SST_TASK_SBA, SST_SWM_OUT_SPROT_LOOP, SST_FMT_MONO, sst_set_media_loop), ++ SST_PATH_MEDIA_LOOP_OUTPUT("media_loop1_out", SST_TASK_SBA, SST_SWM_OUT_MEDIA_LOOP1, SST_FMT_MONO, sst_set_media_loop), ++ SST_PATH_MEDIA_LOOP_OUTPUT("media_loop2_out", SST_TASK_SBA, SST_SWM_OUT_MEDIA_LOOP2, SST_FMT_STEREO, sst_set_media_loop), ++ ++ /* TODO: need to send command */ ++ SST_PATH_INPUT("sidetone_in", SST_TASK_SBA, SST_SWM_IN_SIDETONE, NULL), ++ SST_PATH_INPUT("tone_in", SST_TASK_SBA, SST_SWM_IN_TONE, NULL), ++ SST_PATH_INPUT("bt_in", SST_TASK_SBA, SST_SWM_IN_BT, NULL), ++ SST_PATH_INPUT("fm_in", SST_TASK_SBA, SST_SWM_IN_FM, NULL), ++ SST_PATH_OUTPUT("bt_out", SST_TASK_SBA, SST_SWM_OUT_BT, NULL), ++ SST_PATH_OUTPUT("fm_out", SST_TASK_SBA, SST_SWM_OUT_FM, NULL), ++ ++ /* SBA Voice Paths */ ++ SST_PATH_INPUT("speech_in", SST_TASK_SBA, SST_SWM_IN_SPEECH, sst_set_speech_path), ++ SST_PATH_INPUT("txspeech_in", SST_TASK_SBA, SST_SWM_IN_TXSPEECH, sst_set_speech_path), ++ SST_PATH_OUTPUT("hf_sns_out", SST_TASK_SBA, SST_SWM_OUT_HF_SNS, sst_set_speech_path), ++ SST_PATH_OUTPUT("hf_out", SST_TASK_SBA, SST_SWM_OUT_HF, sst_set_speech_path), ++ SST_PATH_OUTPUT("speech_out", SST_TASK_SBA, SST_SWM_OUT_SPEECH, sst_set_speech_path), ++ SST_PATH_OUTPUT("rxspeech_out", SST_TASK_SBA, SST_SWM_OUT_RXSPEECH, sst_set_speech_path), ++ ++ /* Media Mixers */ ++ SST_SWM_MIXER("media0_out mix 0", SST_MIX_MEDIA0, SST_TASK_MMX, SST_SWM_OUT_MEDIA0, ++ sst_mix_media0_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("media1_out mix 0", SST_MIX_MEDIA1, SST_TASK_MMX, SST_SWM_OUT_MEDIA1, ++ sst_mix_media1_controls, sst_swm_mixer_event), ++ ++ /* SBA PCM mixers */ ++ SST_SWM_MIXER("pcm0_out mix 0", SST_MIX_PCM0, SST_TASK_SBA, SST_SWM_OUT_PCM0, ++ sst_mix_pcm0_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("pcm1_out mix 0", SST_MIX_PCM1, SST_TASK_SBA, SST_SWM_OUT_PCM1, ++ sst_mix_pcm1_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("pcm2_out mix 0", SST_MIX_PCM2, SST_TASK_SBA, SST_SWM_OUT_PCM2, ++ sst_mix_pcm2_controls, sst_swm_mixer_event), ++ ++ /* SBA Loop mixers */ ++ SST_SWM_MIXER("sprot_loop_out mix 0", SST_MIX_LOOP0, SST_TASK_SBA, SST_SWM_OUT_SPROT_LOOP, ++ sst_mix_sprot_l0_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("media_loop1_out mix 0", SST_MIX_LOOP1, SST_TASK_SBA, SST_SWM_OUT_MEDIA_LOOP1, ++ sst_mix_media_l1_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("media_loop2_out mix 0", SST_MIX_LOOP2, SST_TASK_SBA, SST_SWM_OUT_MEDIA_LOOP2, ++ sst_mix_media_l2_controls, sst_swm_mixer_event), ++ ++ SST_SWM_MIXER("voip_out mix 0", SST_MIX_VOIP, SST_TASK_SBA, SST_SWM_OUT_VOIP, ++ sst_mix_voip_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("aware_out mix 0", SST_MIX_AWARE, SST_TASK_SBA, SST_SWM_OUT_AWARE, ++ sst_mix_aware_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("vad_out mix 0", SST_MIX_VAD, SST_TASK_SBA, SST_SWM_OUT_VAD, ++ sst_mix_vad_controls, sst_swm_mixer_event), ++ ++ /* SBA Voice mixers */ ++ SST_SWM_MIXER("hf_sns_out mix 0", SST_MIX_HF_SNS, SST_TASK_SBA, SST_SWM_OUT_HF_SNS, ++ sst_mix_hf_sns_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("hf_out mix 0", SST_MIX_HF, SST_TASK_SBA, SST_SWM_OUT_HF, ++ sst_mix_hf_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("speech_out mix 0", SST_MIX_SPEECH, SST_TASK_SBA, SST_SWM_OUT_SPEECH, ++ sst_mix_speech_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("rxspeech_out mix 0", SST_MIX_RXSPEECH, SST_TASK_SBA, SST_SWM_OUT_RXSPEECH, ++ sst_mix_rxspeech_controls, sst_swm_mixer_event), ++ ++ /* SBA Backend mixers */ ++ SST_SWM_MIXER("codec_out0 mix 0", SST_MIX_CODEC0, SST_TASK_SBA, SST_SWM_OUT_CODEC0, ++ sst_mix_codec0_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("codec_out1 mix 0", SST_MIX_CODEC1, SST_TASK_SBA, SST_SWM_OUT_CODEC1, ++ sst_mix_codec1_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("bt_out mix 0", SST_MIX_BT, SST_TASK_SBA, SST_SWM_OUT_BT, ++ sst_mix_bt_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("fm_out mix 0", SST_MIX_FM, SST_TASK_SBA, SST_SWM_OUT_FM, ++ sst_mix_fm_controls, sst_swm_mixer_event), ++ SST_SWM_MIXER("modem_out mix 0", SST_MIX_MODEM, SST_TASK_SBA, SST_SWM_OUT_MODEM, ++ sst_mix_modem_controls, sst_swm_mixer_event), ++ ++ SND_SOC_DAPM_SWITCH("aware_out aware 0", SND_SOC_NOPM, 0, 0, &sst_mix_sw_aware), ++ SND_SOC_DAPM_MUX("ssp1_out mux 0", SND_SOC_NOPM, 0, 0, &sst_bt_fm_mux), ++ ++ SND_SOC_DAPM_SUPPLY("VBTimer", SND_SOC_NOPM, 0, 0, ++ sst_vb_trigger_event, ++ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), ++}; ++ ++static const struct snd_soc_dapm_route intercon[] = { ++ {"media0_in", NULL, "Compress Playback"}, ++ {"media1_in", NULL, "Headset Playback"}, ++ {"media2_in", NULL, "pcm0_out"}, ++ {"media3_in", NULL, "Deepbuffer Playback"}, ++ ++ {"media0_out mix 0", "media0_in", "media0_in"}, ++ {"media0_out mix 0", "media1_in", "media1_in"}, ++ {"media0_out mix 0", "media2_in", "media2_in"}, ++ {"media0_out mix 0", "media3_in", "media3_in"}, ++ {"media1_out mix 0", "media0_in", "media0_in"}, ++ {"media1_out mix 0", "media1_in", "media1_in"}, ++ {"media1_out mix 0", "media2_in", "media2_in"}, ++ {"media1_out mix 0", "media3_in", "media3_in"}, ++ ++ {"media0_out", NULL, "media0_out mix 0"}, ++ {"media1_out", NULL, "media1_out mix 0"}, ++ {"pcm0_in", NULL, "media0_out"}, ++ {"pcm1_in", NULL, "media1_out"}, ++ ++ {"Headset Capture", NULL, "pcm1_out"}, ++ {"Headset Capture", NULL, "pcm2_out"}, ++ {"pcm0_out", NULL, "pcm0_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("pcm0_out mix 0"), ++ {"pcm1_out", NULL, "pcm1_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("pcm1_out mix 0"), ++ {"pcm2_out", NULL, "pcm2_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("pcm2_out mix 0"), ++ ++ {"media_loop1_in", NULL, "media_loop1_out"}, ++ {"media_loop1_out", NULL, "media_loop1_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("media_loop1_out mix 0"), ++ {"media_loop2_in", NULL, "media_loop2_out"}, ++ {"media_loop2_out", NULL, "media_loop2_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("media_loop2_out mix 0"), ++ {"sprot_loop_in", NULL, "sprot_loop_out"}, ++ {"sprot_loop_out", NULL, "sprot_loop_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("sprot_loop_out mix 0"), ++ ++ {"voip_in", NULL, "VOIP Playback"}, ++ {"VOIP Capture", NULL, "voip_out"}, ++ {"voip_out", NULL, "voip_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("voip_out mix 0"), ++ ++ {"aware", NULL, "aware_out"}, ++ {"aware_out", NULL, "aware_out aware 0"}, ++ {"aware_out aware 0", "switch", "aware_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("aware_out mix 0"), ++ {"vad", NULL, "vad_out"}, ++ {"vad_out", NULL, "vad_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("vad_out mix 0"), ++ ++ {"codec_out0", NULL, "codec_out0 mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("codec_out0 mix 0"), ++ {"codec_out1", NULL, "codec_out1 mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("codec_out1 mix 0"), ++ {"modem_out", NULL, "modem_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("modem_out mix 0"), ++ ++ {"bt_fm_out", NULL, "ssp1_out mux 0"}, ++ {"ssp1_out mux 0", "bt", "bt_out"}, ++ {"ssp1_out mux 0", "fm", "fm_out"}, ++ {"bt_out", NULL, "bt_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("bt_out mix 0"), ++ {"fm_out", NULL, "fm_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("fm_out mix 0"), ++ {"bt_in", NULL, "bt_fm_in"}, ++ {"fm_in", NULL, "bt_fm_in"}, ++ ++ /* Uplink processing */ ++ {"txspeech_in", NULL, "hf_sns_out"}, ++ {"txspeech_in", NULL, "hf_out"}, ++ {"txspeech_in", NULL, "speech_out"}, ++ ++ {"hf_sns_out", NULL, "hf_sns_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("hf_sns_out mix 0"), ++ {"hf_out", NULL, "hf_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("hf_out mix 0"), ++ {"speech_out", NULL, "speech_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("speech_out mix 0"), ++ ++ /* Downlink processing */ ++ {"speech_in", NULL, "rxspeech_out"}, ++ {"rxspeech_out", NULL, "rxspeech_out mix 0"}, ++ SST_SBA_MIXER_GRAPH_MAP("rxspeech_out mix 0"), ++ ++ /* TODO: add Tone inputs */ ++ /* TODO: add Low Latency stream support */ ++ ++ {"Headset Capture", NULL, "VBTimer"}, ++ {"Headset Playback", NULL, "VBTimer"}, ++ {"Deepbuffer Playback", NULL, "VBTimer"}, ++ {"Compress Playback", NULL, "VBTimer"}, ++ {"VOIP Playback", NULL, "VBTimer"}, ++ {"aware", NULL, "VBTimer"}, ++ {"modem_in", NULL, "VBTimer"}, ++ {"modem_out", NULL, "VBTimer"}, ++ {"bt_fm_in", NULL, "VBTimer"}, ++ {"bt_fm_out", NULL, "VBTimer"}, ++}; ++ ++static const char * const sst_nb_wb_texts[] = { ++ "narrowband", "wideband", ++}; ++ ++static const struct snd_kcontrol_new sst_mux_controls[] = { ++ SST_SSP_MUX_CTL("domain voice mode", 0, SST_MUX_REG, SST_VOICE_MODE_SHIFT, sst_nb_wb_texts, ++ sst_mode_get, sst_mode_put), ++ SST_SSP_MUX_CTL("domain bt mode", 0, SST_MUX_REG, SST_BT_MODE_SHIFT, sst_nb_wb_texts, ++ sst_mode_get, sst_mode_put), ++}; ++ ++static const char * const slot_names[] = { ++ "none", ++ "slot 0", "slot 1", "slot 2", "slot 3", ++ "slot 4", "slot 5", "slot 6", "slot 7", /* not supported by FW */ ++}; ++ ++static const char * const channel_names[] = { ++ "none", ++ "codec_out0_0", "codec_out0_1", "codec_out1_0", "codec_out1_1", ++ "codec_out2_0", "codec_out2_1", "codec_out3_0", "codec_out3_1", /* not supported by FW */ ++}; ++ ++#define SST_INTERLEAVER(xpname, slot_name, slotno) \ ++ SST_SSP_SLOT_CTL(xpname, "interleaver", slot_name, slotno, 1, \ ++ channel_names, sst_slot_get, sst_slot_put) ++ ++#define SST_DEINTERLEAVER(xpname, channel_name, channel_no) \ ++ SST_SSP_SLOT_CTL(xpname, "deinterleaver", channel_name, channel_no, 0, \ ++ slot_names, sst_slot_get, sst_slot_put) ++ ++static const struct snd_kcontrol_new sst_slot_controls[] = { ++ SST_INTERLEAVER("codec_out", "slot 0", 0), ++ SST_INTERLEAVER("codec_out", "slot 1", 1), ++ SST_INTERLEAVER("codec_out", "slot 2", 2), ++ SST_INTERLEAVER("codec_out", "slot 3", 3), ++ SST_DEINTERLEAVER("codec_in", "codec_in0_0", 0), ++ SST_DEINTERLEAVER("codec_in", "codec_in0_1", 1), ++ SST_DEINTERLEAVER("codec_in", "codec_in1_0", 2), ++ SST_DEINTERLEAVER("codec_in", "codec_in1_1", 3), ++}; ++ ++#define SST_NUM_PROBE_CONNECTION_PTS 31 ++static const struct sst_probe_config sst_probes[SST_NUM_PROBE_CONNECTION_PTS] = { ++ /* TODO: get this struct from FW config data */ ++ /* TODO: only gain outputs supported currently */ ++ { "media0_in gain", SST_PATH_INDEX_MEDIA0_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_MMX, { 1, 2, 1 } }, ++ { "media1_in gain", SST_PATH_INDEX_MEDIA1_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_MMX, { 1, 2, 1 } }, ++ { "media2_in gain", SST_PATH_INDEX_MEDIA2_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_MMX, { 1, 2, 1 } }, ++ { "media3_in gain", SST_PATH_INDEX_MEDIA3_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_MMX, { 1, 2, 1 } }, ++ { "pcm0_in gain", SST_PATH_INDEX_PCM0_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "pcm1_in gain", SST_PATH_INDEX_PCM1_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "pcm1_out gain", SST_PATH_INDEX_PCM1_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "pcm2_out gain", SST_PATH_INDEX_PCM2_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "voip_in gain", SST_PATH_INDEX_VOIP_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "voip_out gain", SST_PATH_INDEX_VOIP_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "aware_out gain", SST_PATH_INDEX_AWARE_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "vad_out gain", SST_PATH_INDEX_VAD_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "hf_sns_out gain", SST_PATH_INDEX_HF_SNS_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "hf_out gain", SST_PATH_INDEX_HF_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "speech_out gain", SST_PATH_INDEX_SPEECH_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "txspeech_in gain", SST_PATH_INDEX_TX_SPEECH_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "rxspeech_out gain", SST_PATH_INDEX_RX_SPEECH_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "speech_in gain", SST_PATH_INDEX_SPEECH_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "media_loop1_out gain", SST_PATH_INDEX_MEDIA_LOOP1_OUT , SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "media_loop2_out gain", SST_PATH_INDEX_MEDIA_LOOP2_OUT , SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "tone_in gain", SST_PATH_INDEX_TONE_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "codec_out0 gain", SST_PATH_INDEX_CODEC_OUT0, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "codec_out1 gain", SST_PATH_INDEX_CODEC_OUT1, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "bt_out gain", SST_PATH_INDEX_BT_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "fm_out gain", SST_PATH_INDEX_FM_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "modem_out gain", SST_PATH_INDEX_MODEM_OUT, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "codec_in0 gain", SST_PATH_INDEX_CODEC_IN0, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "codec_in1 gain", SST_PATH_INDEX_CODEC_IN1, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "bt_in gain", SST_PATH_INDEX_BT_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "fm_in gain", SST_PATH_INDEX_FM_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++ { "modem_in gain", SST_PATH_INDEX_MODEM_IN, SST_MODULE_ID_GAIN_CELL, SST_TASK_SBA, { 1, 2, 1 } }, ++}; ++ ++/* initialized based on names in sst_probes array */ ++static const char *sst_probe_enum_texts[SST_NUM_PROBE_CONNECTION_PTS]; ++static const SOC_ENUM_SINGLE_EXT_DECL(sst_probe_enum, sst_probe_enum_texts); ++ ++#define SST_PROBE_CTL(name, num) \ ++ SST_PROBE_ENUM(SST_PROBE_CTL_NAME(name, num, "connection"), \ ++ sst_probe_enum, sst_probe_get, sst_probe_put) ++ /* TODO: implement probe gains ++ SOC_SINGLE_EXT_TLV(SST_PROBE_CTL_NAME(name, num, "gains"), xreg, xshift, ++ xmax, xinv, xget, xput, sst_gain_tlv_common) ++ */ ++ ++static const struct snd_kcontrol_new sst_probe_controls[] = { ++ SST_PROBE_CTL("probe out", 0), ++ SST_PROBE_CTL("probe out", 1), ++ SST_PROBE_CTL("probe out", 2), ++ SST_PROBE_CTL("probe out", 3), ++ SST_PROBE_CTL("probe out", 4), ++ SST_PROBE_CTL("probe out", 5), ++ SST_PROBE_CTL("probe out", 6), ++ SST_PROBE_CTL("probe out", 7), ++ SST_PROBE_CTL("probe in", 0), ++ SST_PROBE_CTL("probe in", 1), ++ SST_PROBE_CTL("probe in", 2), ++ SST_PROBE_CTL("probe in", 3), ++ SST_PROBE_CTL("probe in", 4), ++ SST_PROBE_CTL("probe in", 5), ++ SST_PROBE_CTL("probe in", 6), ++ SST_PROBE_CTL("probe in", 7), ++}; ++ ++/* Gain helper with min/max set */ ++#define SST_GAIN(name, path_id, task_id, instance, gain_var) \ ++ SST_GAIN_KCONTROLS(name, "gain", SST_GAIN_MIN_VALUE, SST_GAIN_MAX_VALUE, \ ++ SST_GAIN_TC_MIN, SST_GAIN_TC_MAX, \ ++ sst_gain_get, sst_gain_put, \ ++ SST_MODULE_ID_GAIN_CELL, path_id, instance, task_id, \ ++ sst_gain_tlv_common, gain_var) ++ ++#define SST_VOLUME(name, path_id, task_id, instance, gain_var) \ ++ SST_GAIN_KCONTROLS(name, "volume", SST_GAIN_MIN_VALUE, SST_GAIN_MAX_VALUE, \ ++ SST_GAIN_TC_MIN, SST_GAIN_TC_MAX, \ ++ sst_gain_get, sst_gain_put, \ ++ SST_MODULE_ID_VOLUME, path_id, instance, task_id, \ ++ sst_gain_tlv_common, gain_var) ++ ++#define SST_NUM_GAINS 36 ++static struct sst_gain_value sst_gains[SST_NUM_GAINS]; ++ ++static const struct snd_kcontrol_new sst_gain_controls[] = { ++ SST_GAIN("media0_in", SST_PATH_INDEX_MEDIA0_IN, SST_TASK_MMX, 0, &sst_gains[0]), ++ SST_GAIN("media1_in", SST_PATH_INDEX_MEDIA1_IN, SST_TASK_MMX, 0, &sst_gains[1]), ++ SST_GAIN("media2_in", SST_PATH_INDEX_MEDIA2_IN, SST_TASK_MMX, 0, &sst_gains[2]), ++ SST_GAIN("media3_in", SST_PATH_INDEX_MEDIA3_IN, SST_TASK_MMX, 0, &sst_gains[3]), ++ ++ SST_GAIN("pcm0_in", SST_PATH_INDEX_PCM0_IN, SST_TASK_SBA, 0, &sst_gains[4]), ++ SST_GAIN("pcm1_in", SST_PATH_INDEX_PCM1_IN, SST_TASK_SBA, 0, &sst_gains[5]), ++ SST_GAIN("low_pcm0_in", SST_PATH_INDEX_LOW_PCM0_IN, SST_TASK_SBA, 0, &sst_gains[6]), ++ SST_GAIN("pcm1_out", SST_PATH_INDEX_PCM1_OUT, SST_TASK_SBA, 0, &sst_gains[7]), ++ SST_GAIN("pcm2_out", SST_PATH_INDEX_PCM1_OUT, SST_TASK_SBA, 0, &sst_gains[8]), ++ ++ SST_GAIN("voip_in", SST_PATH_INDEX_VOIP_IN, SST_TASK_SBA, 0, &sst_gains[9]), ++ SST_GAIN("voip_out", SST_PATH_INDEX_VOIP_OUT, SST_TASK_SBA, 0, &sst_gains[10]), ++ SST_GAIN("tone_in", SST_PATH_INDEX_TONE_IN, SST_TASK_SBA, 0, &sst_gains[11]), ++ ++ SST_GAIN("aware_out", SST_PATH_INDEX_AWARE_OUT, SST_TASK_SBA, 0, &sst_gains[12]), ++ SST_GAIN("vad_out", SST_PATH_INDEX_VAD_OUT, SST_TASK_SBA, 0, &sst_gains[13]), ++ ++ SST_GAIN("hf_sns_out", SST_PATH_INDEX_HF_SNS_OUT, SST_TASK_SBA, 0, &sst_gains[14]), ++ SST_GAIN("hf_out", SST_PATH_INDEX_HF_OUT, SST_TASK_SBA, 0, &sst_gains[15]), ++ SST_GAIN("speech_out", SST_PATH_INDEX_SPEECH_OUT, SST_TASK_SBA, 0, &sst_gains[16]), ++ SST_GAIN("txspeech_in", SST_PATH_INDEX_TX_SPEECH_IN, SST_TASK_SBA, 0, &sst_gains[17]), ++ SST_GAIN("rxspeech_out", SST_PATH_INDEX_RX_SPEECH_OUT, SST_TASK_SBA, 0, &sst_gains[18]), ++ SST_GAIN("speech_in", SST_PATH_INDEX_SPEECH_IN, SST_TASK_SBA, 0, &sst_gains[19]), ++ ++ SST_GAIN("codec_in0", SST_PATH_INDEX_CODEC_IN0, SST_TASK_SBA, 0, &sst_gains[20]), ++ SST_GAIN("codec_in1", SST_PATH_INDEX_CODEC_IN1, SST_TASK_SBA, 0, &sst_gains[21]), ++ SST_GAIN("codec_out0", SST_PATH_INDEX_CODEC_OUT0, SST_TASK_SBA, 0, &sst_gains[22]), ++ SST_GAIN("codec_out1", SST_PATH_INDEX_CODEC_OUT1, SST_TASK_SBA, 0, &sst_gains[23]), ++ SST_GAIN("bt_out", SST_PATH_INDEX_BT_OUT, SST_TASK_SBA, 0, &sst_gains[24]), ++ SST_GAIN("fm_out", SST_PATH_INDEX_FM_OUT, SST_TASK_SBA, 0, &sst_gains[25]), ++ SST_GAIN("bt_in", SST_PATH_INDEX_BT_IN, SST_TASK_SBA, 0, &sst_gains[26]), ++ SST_GAIN("fm_in", SST_PATH_INDEX_FM_IN, SST_TASK_SBA, 0, &sst_gains[27]), ++ SST_GAIN("modem_in", SST_PATH_INDEX_MODEM_IN, SST_TASK_SBA, 0, &sst_gains[28]), ++ SST_GAIN("modem_out", SST_PATH_INDEX_MODEM_OUT, SST_TASK_SBA, 0, &sst_gains[29]), ++ SST_GAIN("media_loop1_out", SST_PATH_INDEX_MEDIA_LOOP1_OUT, SST_TASK_SBA, 0, &sst_gains[30]), ++ SST_GAIN("media_loop2_out", SST_PATH_INDEX_MEDIA_LOOP2_OUT, SST_TASK_SBA, 0, &sst_gains[31]), ++ SST_GAIN("sprot_loop_out", SST_PATH_INDEX_SPROT_LOOP_OUT, SST_TASK_SBA, 0, &sst_gains[32]), ++ SST_VOLUME("media0_in", SST_PATH_INDEX_MEDIA0_IN, SST_TASK_MMX, 0, &sst_gains[33]), ++ SST_GAIN("sidetone_in", SST_PATH_INDEX_SIDETONE_IN, SST_TASK_SBA, 0, &sst_gains[34]), ++ SST_GAIN("speech_out", SST_PATH_INDEX_SPEECH_OUT, SST_TASK_FBA_UL, 1, &sst_gains[35]), ++}; ++ ++static const struct snd_kcontrol_new sst_algo_controls[] = { ++ SST_ALGO_KCONTROL_BYTES("media_loop1_out", "fir", 138, SST_MODULE_ID_FIR_24, ++ SST_PATH_INDEX_MEDIA_LOOP1_OUT, 0, SST_TASK_SBA, SBA_VB_SET_FIR), ++ SST_ALGO_KCONTROL_BYTES("media_loop1_out", "iir", 300, SST_MODULE_ID_IIR_24, ++ SST_PATH_INDEX_MEDIA_LOOP1_OUT, 0, SST_TASK_SBA, SBA_VB_SET_IIR), ++ SST_ALGO_KCONTROL_BYTES("media_loop1_out", "mdrp", 76, SST_MODULE_ID_MDRP, ++ SST_PATH_INDEX_MEDIA_LOOP1_OUT, 0, SST_TASK_SBA, SBA_SET_MDRP), ++ SST_ALGO_KCONTROL_BYTES("media_loop2_out", "fir", 272, SST_MODULE_ID_FIR_24, ++ SST_PATH_INDEX_MEDIA_LOOP2_OUT, 0, SST_TASK_SBA, SBA_VB_SET_FIR), ++ SST_ALGO_KCONTROL_BYTES("media_loop2_out", "iir", 300, SST_MODULE_ID_IIR_24, ++ SST_PATH_INDEX_MEDIA_LOOP2_OUT, 0, SST_TASK_SBA, SBA_VB_SET_IIR), ++ SST_ALGO_KCONTROL_BYTES("media_loop2_out", "mdrp", 76, SST_MODULE_ID_MDRP, ++ SST_PATH_INDEX_MEDIA_LOOP2_OUT, 0, SST_TASK_SBA, SBA_SET_MDRP), ++ SST_ALGO_KCONTROL_BYTES("aware_out", "fir", 272, SST_MODULE_ID_FIR_24, ++ SST_PATH_INDEX_AWARE_OUT, 0, SST_TASK_SBA, SBA_VB_SET_FIR), ++ SST_ALGO_KCONTROL_BYTES("aware_out", "iir", 300, SST_MODULE_ID_IIR_24, ++ SST_PATH_INDEX_AWARE_OUT, 0, SST_TASK_SBA, SBA_VB_SET_IIR), ++ SST_ALGO_KCONTROL_BYTES("aware_out", "aware", 48, SST_MODULE_ID_CONTEXT_ALGO_AWARE, ++ SST_PATH_INDEX_AWARE_OUT, 0, SST_TASK_AWARE, AWARE_ENV_CLASS_PARAMS), ++ SST_ALGO_KCONTROL_BYTES("vad_out", "fir", 272, SST_MODULE_ID_FIR_24, ++ SST_PATH_INDEX_VAD_OUT, 0, SST_TASK_SBA, SBA_VB_SET_FIR), ++ SST_ALGO_KCONTROL_BYTES("vad_out", "iir", 300, SST_MODULE_ID_IIR_24, ++ SST_PATH_INDEX_VAD_OUT, 0, SST_TASK_SBA, SBA_VB_SET_IIR), ++ SST_ALGO_KCONTROL_BYTES("sprot_loop_out", "lpro", 192, SST_MODULE_ID_SPROT, ++ SST_PATH_INDEX_SPROT_LOOP_OUT, 0, SST_TASK_SBA, SBA_VB_LPRO), ++ SST_ALGO_KCONTROL_BYTES("codec_in0", "dcr", 300, SST_MODULE_ID_FILT_DCR, ++ SST_PATH_INDEX_CODEC_IN0, 0, SST_TASK_SBA, SBA_VB_SET_IIR), ++ SST_ALGO_KCONTROL_BYTES("codec_in1", "dcr", 300, SST_MODULE_ID_FILT_DCR, ++ SST_PATH_INDEX_CODEC_IN1, 0, SST_TASK_SBA, SBA_VB_SET_IIR), ++ /* Uplink */ ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "fir_speech", 136, SST_MODULE_ID_FIR_16, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_SET_FIR), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "fir_hf_sns", 136, SST_MODULE_ID_FIR_16, ++ SST_PATH_INDEX_HF_SNS_OUT, 0, SST_TASK_FBA_UL, FBA_VB_SET_FIR), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "iir_speech", 48, SST_MODULE_ID_IIR_16, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_SET_IIR), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "iir_hf_sns", 48, SST_MODULE_ID_IIR_16, ++ SST_PATH_INDEX_HF_SNS_OUT, 0, SST_TASK_FBA_UL, FBA_VB_SET_IIR), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "aec", 640, SST_MODULE_ID_AEC, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_AEC), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "nr", 38, SST_MODULE_ID_NR, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_NR_UL), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "agc", 58, SST_MODULE_ID_AGC, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_AGC), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "biquad", 22, SST_MODULE_ID_DRP, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_SET_BIQUAD_D_C), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "compr", 36, SST_MODULE_ID_DRP, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_DUAL_BAND_COMP), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "sns", 324, SST_MODULE_ID_NR_SNS, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_SNS), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "ser", 42, SST_MODULE_ID_SER, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_SER), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "cni", 48, SST_MODULE_ID_CNI_TX, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_TX_CNI), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "ref", 24, SST_MODULE_ID_REF_LINE, ++ SST_PATH_INDEX_HF_OUT, 0, SST_TASK_FBA_UL, FBA_VB_SET_REF_LINE), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "delay", 6, SST_MODULE_ID_EDL, ++ SST_PATH_INDEX_HF_OUT, 0, SST_TASK_FBA_UL, FBA_VB_SET_DELAY_LINE), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "bmf", 264, SST_MODULE_ID_BMF, ++ SST_PATH_INDEX_HF_SNS_OUT, 0, SST_TASK_FBA_UL, FBA_VB_BMF), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_out", "ul_module", "dnr", 18, SST_MODULE_ID_DNR, ++ SST_PATH_INDEX_SPEECH_OUT, 0, SST_TASK_FBA_UL, FBA_VB_DNR), ++ /* Downlink */ ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_in", "dl_module", "ana", 52, SST_MODULE_ID_ANA, ++ SST_PATH_INDEX_SPEECH_IN, 0, SST_TASK_FBA_DL, FBA_VB_ANA), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_in", "dl_module", "fir", 136, SST_MODULE_ID_FIR_16, ++ SST_PATH_INDEX_SPEECH_IN, 0, SST_TASK_FBA_DL, FBA_VB_SET_FIR), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_in", "dl_module", "iir", 48, SST_MODULE_ID_IIR_16, ++ SST_PATH_INDEX_SPEECH_IN, 0, SST_TASK_FBA_DL, FBA_VB_SET_IIR), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_in", "dl_module", "nr", 38, SST_MODULE_ID_NR, ++ SST_PATH_INDEX_SPEECH_IN, 0, SST_TASK_FBA_DL, FBA_VB_NR_DL), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_in", "dl_module", "biquad", 22, SST_MODULE_ID_DRP, ++ SST_PATH_INDEX_SPEECH_IN, 0, SST_TASK_FBA_DL, FBA_VB_SET_BIQUAD_D_C), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_in", "dl_module", "compr", 36, SST_MODULE_ID_DRP, ++ SST_PATH_INDEX_SPEECH_IN, 0, SST_TASK_FBA_DL, FBA_VB_DUAL_BAND_COMP), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_in", "dl_module", "cni", 48, SST_MODULE_ID_CNI, ++ SST_PATH_INDEX_SPEECH_IN, 0, SST_TASK_FBA_DL, FBA_VB_RX_CNI), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_in", "dl_module", "bwx", 54, SST_MODULE_ID_BWX, ++ SST_PATH_INDEX_SPEECH_IN, 0, SST_TASK_FBA_DL, FBA_VB_BWX), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_in", "dl_module", "gmm", 586, SST_MODULE_ID_BWX, ++ SST_PATH_INDEX_SPEECH_IN, 0, SST_TASK_FBA_DL, FBA_VB_GMM), ++ SST_COMBO_ALGO_KCONTROL_BYTES("speech_in", "dl_module", "glc", 18, SST_MODULE_ID_GLC, ++ SST_PATH_INDEX_SPEECH_IN, 0, SST_TASK_FBA_DL, FBA_VB_GLC), ++}; ++ ++static const struct snd_kcontrol_new sst_debug_controls[] = { ++ SND_SOC_BYTES_EXT("sst debug byte control", SST_MAX_BIN_BYTES, ++ sst_byte_control_get, sst_byte_control_set), ++}; ++ ++static inline bool is_sst_dapm_widget(struct snd_soc_dapm_widget *w) ++{ ++ if ((w->id == snd_soc_dapm_pga) || ++ (w->id == snd_soc_dapm_aif_in) || ++ (w->id == snd_soc_dapm_aif_out) || ++ (w->id == snd_soc_dapm_input) || ++ (w->id == snd_soc_dapm_output) || ++ (w->id == snd_soc_dapm_mixer)) ++ return true; ++ else ++ return false; ++} ++ ++int sst_send_pipe_gains(struct snd_soc_dai *dai, int stream, int mute) ++{ ++ struct snd_soc_platform *platform = dai->platform; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ struct snd_soc_dapm_widget *w; ++ struct snd_soc_dapm_path *p = NULL; ++ ++ pr_debug("%s: enter, dai-name=%s dir=%d\n", __func__, dai->name, stream); ++ ++ if (stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ pr_debug("Stream name=%s\n", dai->playback_widget->name); ++ w = dai->playback_widget; ++ list_for_each_entry(p, &w->sinks, list_source) { ++ if (p->connected && !p->connected(w, p->sink)) ++ continue; ++ ++ if (p->connect && p->sink->power && is_sst_dapm_widget(p->sink)) { ++ struct sst_ids *ids = p->sink->priv; ++ ++ pr_debug("send gains for widget=%s\n", p->sink->name); ++ sst_set_pipe_gain(ids, sst, mute); ++ } ++ } ++ } else { ++ pr_debug("Stream name=%s\n", dai->capture_widget->name); ++ w = dai->capture_widget; ++ list_for_each_entry(p, &w->sources, list_sink) { ++ if (p->connected && !p->connected(w, p->sink)) ++ continue; ++ ++ if (p->connect && p->source->power && is_sst_dapm_widget(p->source)) { ++ struct sst_ids *ids = p->source->priv; ++ ++ pr_debug("send gain for widget=%s\n", p->source->name); ++ sst_set_pipe_gain(ids, sst, mute); ++ } ++ } ++ } ++ return 0; ++} ++ ++static int sst_fill_module_list(struct snd_kcontrol *kctl, ++ struct snd_soc_dapm_widget *w, int type) ++{ ++ struct module *module = NULL; ++ struct sst_ids *ids = w->priv; ++ ++ module = devm_kzalloc(w->platform->dev, sizeof(*module), GFP_KERNEL); ++ if (!module) { ++ pr_err("kzalloc block failed\n"); ++ return -ENOMEM; ++ } ++ ++ if (type == SST_MODULE_GAIN) { ++ struct sst_gain_mixer_control *mc = (void *)kctl->private_value; ++ ++ mc->w = w; ++ module->kctl = kctl; ++ list_add_tail(&module->node, &ids->gain_list); ++ } else if (type == SST_MODULE_ALGO) { ++ struct sst_algo_control *bc = (void *)kctl->private_value; ++ ++ bc->w = w; ++ module->kctl = kctl; ++ list_add_tail(&module->node, &ids->algo_list); ++ } ++ ++ return 0; ++} ++ ++static int sst_fill_widget_module_info(struct snd_soc_dapm_widget *w, ++ struct snd_soc_platform *platform) ++{ ++ struct snd_kcontrol *kctl; ++ int index, ret = 0; ++ struct snd_card *card = platform->card->snd_card; ++ char *idx; ++ ++ down_read(&card->controls_rwsem); ++ ++ list_for_each_entry(kctl, &card->controls, list) { ++ idx = strstr(kctl->id.name, " "); ++ if (idx == NULL) ++ continue; ++ index = strlen(kctl->id.name) - strlen(idx); ++ if (strstr(kctl->id.name, "volume") && ++ !strncmp(kctl->id.name, w->name, index)) ++ ret = sst_fill_module_list(kctl, w, SST_MODULE_GAIN); ++ else if (strstr(kctl->id.name, "params") && ++ !strncmp(kctl->id.name, w->name, index)) ++ ret = sst_fill_module_list(kctl, w, SST_MODULE_ALGO); ++ else if (strstr(kctl->id.name, "mute") && ++ !strncmp(kctl->id.name, w->name, index)) { ++ struct sst_gain_mixer_control *mc = (void *)kctl->private_value; ++ mc->w = w; ++ } ++ if (ret < 0) { ++ up_read(&card->controls_rwsem); ++ return ret; ++ } ++ } ++ up_read(&card->controls_rwsem); ++ return 0; ++} ++ ++static int sst_map_modules_to_pipe(struct snd_soc_platform *platform) ++{ ++ struct snd_soc_dapm_widget *w; ++ struct snd_soc_dapm_context *dapm = &platform->dapm; ++ int ret = 0; ++ ++ list_for_each_entry(w, &dapm->card->widgets, list) { ++ if (w->platform && is_sst_dapm_widget(w) && (w->priv)) { ++ struct sst_ids *ids = w->priv; ++ ++ pr_debug("widget type=%d name=%s", w->id, w->name); ++ INIT_LIST_HEAD(&ids->algo_list); ++ INIT_LIST_HEAD(&ids->gain_list); ++ ret = sst_fill_widget_module_info(w, platform); ++ if (ret < 0) ++ return ret; ++ } ++ } ++ return 0; ++} ++ ++int sst_dsp_init_v2_dpcm(struct snd_soc_platform *platform) ++{ ++ int i, ret = 0; ++ struct sst_data *sst = snd_soc_platform_get_drvdata(platform); ++ ++ sst->byte_stream = devm_kzalloc(platform->dev, ++ SST_MAX_BIN_BYTES, GFP_KERNEL); ++ if (!sst->byte_stream) { ++ pr_err("%s: kzalloc failed\n", __func__); ++ return -ENOMEM; ++ } ++ sst->widget = devm_kzalloc(platform->dev, ++ SST_NUM_WIDGETS * sizeof(*sst->widget), ++ GFP_KERNEL); ++ if (!sst->widget) { ++ pr_err("%s: kzalloc failed\n", __func__); ++ return -ENOMEM; ++ } ++ ++ snd_soc_dapm_new_controls(&platform->dapm, sst_dapm_widgets, ++ ARRAY_SIZE(sst_dapm_widgets)); ++ snd_soc_dapm_add_routes(&platform->dapm, intercon, ++ ARRAY_SIZE(intercon)); ++ snd_soc_dapm_new_widgets(&platform->dapm); ++ ++ for (i = 0; i < SST_NUM_GAINS; i++) { ++ sst_gains[i].mute = SST_GAIN_MUTE_DEFAULT; ++ sst_gains[i].l_gain = SST_GAIN_VOLUME_DEFAULT; ++ sst_gains[i].r_gain = SST_GAIN_VOLUME_DEFAULT; ++ sst_gains[i].ramp_duration = SST_GAIN_RAMP_DURATION_DEFAULT; ++ } ++ ++ snd_soc_add_platform_controls(platform, sst_gain_controls, ++ ARRAY_SIZE(sst_gain_controls)); ++ ++ snd_soc_add_platform_controls(platform, sst_algo_controls, ++ ARRAY_SIZE(sst_algo_controls)); ++ snd_soc_add_platform_controls(platform, sst_slot_controls, ++ ARRAY_SIZE(sst_slot_controls)); ++ snd_soc_add_platform_controls(platform, sst_mux_controls, ++ ARRAY_SIZE(sst_mux_controls)); ++ ++ /* initialize the names of the probe points */ ++ for (i = 0; i < SST_NUM_PROBE_CONNECTION_PTS; i++) ++ sst_probe_enum_texts[i] = sst_probes[i].name; ++ ++ snd_soc_add_platform_controls(platform, sst_probe_controls, ++ ARRAY_SIZE(sst_probe_controls)); ++ ++ ret = sst_map_modules_to_pipe(platform); ++ ++ return ret; ++} +diff --git a/sound/soc/intel/platform-libs/ipc_lib.h b/sound/soc/intel/platform-libs/ipc_lib.h +new file mode 100644 +index 0000000..6ba50c4 +--- /dev/null ++++ b/sound/soc/intel/platform-libs/ipc_lib.h +@@ -0,0 +1,33 @@ ++/* ++ * ipc_lib.h - Intel MID Platform driver header file ++ * ++ * Copyright (C) 2013 Intel Corp ++ * Author: Lakshmi N Vinnakota ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * ++ */ ++ ++#ifndef __PLATFORMDRV_IPC_LIB_H__ ++#define __PLATFORMDRV_IPC_LIB_H__ ++ ++struct sst_algo_int_control_v2; ++ ++void sst_create_compr_vol_ipc(char *bytes, unsigned int type, ++ struct sst_algo_int_control_v2 *kdata); ++#endif +diff --git a/sound/soc/intel/platform-libs/ipc_lib_v2.c b/sound/soc/intel/platform-libs/ipc_lib_v2.c +new file mode 100644 +index 0000000..105c756 +--- /dev/null ++++ b/sound/soc/intel/platform-libs/ipc_lib_v2.c +@@ -0,0 +1,109 @@ ++/* ++ * ipc_lib_v2.c - Intel MID Platform Driver IPC wrappers for mrfld ++ * ++ * Copyright (C) 2013 Intel Corp ++ * Author: Lakshmi N Vinnakota ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * ++ */ ++#include ++#include ++#include "../platform_ipc_v2.h" ++#include "../sst_platform.h" ++#include "../sst_platform_pvt.h" ++ ++ ++static inline void sst_fill_dsp_hdr(struct ipc_dsp_hdr *hdr, u8 index, u8 pipe, ++ u16 module, u16 cmd, u16 len) ++{ ++ hdr->mod_index_id = index; ++ hdr->pipe_id = pipe; ++ hdr->mod_id = module; ++ hdr->cmd_id = cmd; ++ hdr->length = len; ++ ++} ++ ++static inline void sst_fill_byte_control_hdr(struct snd_sst_bytes_v2 *hdr, ++ u8 type, u8 msg, u8 block, u8 task, u8 pipe, u16 len) ++{ ++ hdr->type = type; ++ hdr->ipc_msg = msg; ++ hdr->block = block; ++ hdr->task_id = task; ++ hdr->pipe_id = pipe; ++ hdr->rsvd = 0; ++ hdr->len = len; ++} ++ ++#define SST_GAIN_V2_TIME_CONST 50 ++ ++void sst_create_compr_vol_ipc(char *bytes, unsigned int type, ++ struct sst_algo_int_control_v2 *kdata) ++{ ++ struct snd_sst_gain_v2 gain1; ++ struct snd_sst_bytes_v2 byte_hdr; ++ struct ipc_dsp_hdr dsp_hdr; ++ char *tmp; ++ u16 len; ++ u8 ipc_msg; ++ ++ /* Fill gain params */ ++ gain1.gain_cell_num = 1; /* num of gain cells to modify*/ ++ gain1.cell_nbr_idx = kdata->instance_id; /* instance index */ ++ gain1.cell_path_idx = kdata->pipe_id; /* pipe id */ ++ gain1.module_id = kdata->module_id; /*module id */ ++ gain1.left_cell_gain = kdata->value; /* left gain value in dB*/ ++ gain1.right_cell_gain = kdata->value; /* same value as left in dB*/ ++ /* set to default recommended value*/ ++ gain1.gain_time_const = SST_GAIN_V2_TIME_CONST; ++ ++ /* fill dsp header */ ++ /* Get params format for vol ctrl lib, size 6 bytes : ++ * u16 left_gain, u16 right_gain, u16 ramp ++ */ ++ memset(&dsp_hdr, 0, sizeof(dsp_hdr)); ++ if (type == SND_SST_BYTES_GET) { ++ len = 6; ++ ipc_msg = IPC_GET_PARAMS; ++ } else { ++ len = sizeof(gain1); ++ ipc_msg = IPC_SET_PARAMS; ++ } ++ ++ sst_fill_dsp_hdr(&dsp_hdr, 0, kdata->pipe_id, kdata->module_id, ++ IPC_IA_SET_GAIN_MRFLD, len); ++ ++ /* fill byte control header */ ++ memset(&byte_hdr, 0, sizeof(byte_hdr)); ++ len = sizeof(dsp_hdr) + dsp_hdr.length; ++ sst_fill_byte_control_hdr(&byte_hdr, type, ipc_msg, 1, ++ SST_TASK_ID_MEDIA, kdata->pipe_id, len); ++ ++ /* fill complete byte stream as ipc payload */ ++ tmp = bytes; ++ memcpy(tmp, &byte_hdr, sizeof(byte_hdr)); ++ memcpy((tmp + sizeof(byte_hdr)), &dsp_hdr, sizeof(dsp_hdr)); ++ if (type != SND_SST_BYTES_GET) ++ memcpy((tmp + sizeof(byte_hdr) + sizeof(dsp_hdr)), &gain1, ++ sizeof(gain1)); ++#ifdef DEBUG_HEX_DUMP_BYTES ++ print_hex_dump_bytes(__func__, DUMP_PREFIX_NONE, bytes, 32); ++#endif ++} +diff --git a/sound/soc/intel/platform-libs/sst_widgets.h b/sound/soc/intel/platform-libs/sst_widgets.h +new file mode 100644 +index 0000000..d39ec89 +--- /dev/null ++++ b/sound/soc/intel/platform-libs/sst_widgets.h +@@ -0,0 +1,337 @@ ++/* ++ * sst_widgets.h - Intel helpers to generate FW widgets ++ * ++ * Copyright (C) 2013 Intel Corp ++ * Author: Omair Mohammed Abdullah ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ */ ++ ++#ifndef __SST_WIDGETS_H__ ++#define __SST_WIDGETS_H__ ++ ++#include ++#include ++ ++#define SST_MODULE_GAIN 1 ++#define SST_MODULE_ALGO 2 ++ ++#define SST_FMT_MONO 0 ++#define SST_FMT_STEREO 3 ++ ++/* physical SSP numbers */ ++enum { ++ SST_SSP0 = 0, ++ SST_SSP1, ++ SST_SSP2, ++ SST_SSP_LAST = SST_SSP2, ++}; ++ ++#define SST_NUM_SSPS (SST_SSP_LAST + 1) /* physical SSPs */ ++#define SST_MAX_SSP_MUX 2 /* single SSP muxed between pipes */ ++#define SST_MAX_SSP_DOMAINS 2 /* domains present in each pipe */ ++ ++struct module { ++ struct snd_kcontrol *kctl; ++ struct list_head node; ++}; ++ ++struct sst_ssp_config { ++ u8 ssp_id; ++ u8 bits_per_slot; ++ u8 slots; ++ u8 ssp_mode; ++ u8 pcm_mode; ++ u8 duplex; ++ u8 ssp_protocol; ++ u8 fs_frequency; ++ u8 active_slot_map; ++ u8 start_delay; ++ u16 fs_width; ++}; ++ ++struct sst_ssp_cfg { ++ const u8 ssp_number; ++ const int *mux_shift; ++ const int (*domain_shift)[SST_MAX_SSP_MUX]; ++ const struct sst_ssp_config (*ssp_config)[SST_MAX_SSP_MUX][SST_MAX_SSP_DOMAINS]; ++}; ++ ++struct sst_ids { ++ u16 location_id; ++ u16 module_id; ++ u8 task_id; ++ u8 format; ++ u8 reg; ++ struct list_head algo_list; ++ struct list_head gain_list; ++ const struct sst_ssp_cfg *ssp; ++}; ++ ++#define SST_SSP_AIF_IN(wname, wevent, wssp_cfg) \ ++{ .id = snd_soc_dapm_aif_in, .name = wname, .sname = NULL, \ ++ .reg = SND_SOC_NOPM, .shift = 0, .invert = 0, \ ++ .event = wevent, .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD, \ ++ .priv = (void *)&(struct sst_ids) { .ssp = &wssp_cfg, } \ ++} ++ ++#define SST_SSP_AIF_OUT(wname, wevent, wssp_cfg) \ ++{ .id = snd_soc_dapm_aif_out, .name = wname, .sname = NULL, \ ++ .reg = SND_SOC_NOPM, .shift = 0, .invert = 0, \ ++ .event = wevent, .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD, \ ++ .priv = (void *)&(struct sst_ids) { .ssp = &wssp_cfg, } \ ++} ++ ++#define SST_SSP_INPUT(wname, wevent, wssp_cfg) \ ++{ .id = snd_soc_dapm_input, .name = wname, .sname = NULL, \ ++ .reg = SND_SOC_NOPM, .shift = 0, .invert = 0, \ ++ .event = wevent, .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD, \ ++ .priv = (void *)&(struct sst_ids) { .ssp = &wssp_cfg, } \ ++} ++ ++#define SST_SSP_OUTPUT(wname, wevent, wssp_cfg) \ ++{ .id = snd_soc_dapm_output, .name = wname, .sname = NULL, \ ++ .reg = SND_SOC_NOPM, .shift = 0, .invert = 0, \ ++ .event = wevent, .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD, \ ++ .priv = (void *)&(struct sst_ids) { .ssp = &wssp_cfg, } \ ++} ++ ++#define SST_PATH(wname, wtask, wloc_id, wevent, wflags) \ ++{ .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \ ++ .invert = 0, .kcontrol_news = NULL, .num_kcontrols = 0, \ ++ .event = wevent, .event_flags = wflags, \ ++ .priv = (void *)&(struct sst_ids) { .task_id = wtask, .location_id = wloc_id, } \ ++} ++ ++#define SST_PATH_MEDIA_LOOP(wname, wtask, wloc_id, wformat, wevent, wflags) \ ++{ .id = snd_soc_dapm_pga, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \ ++ .invert = 0, .kcontrol_news = NULL, .num_kcontrols = 0, \ ++ .event = wevent, .event_flags = wflags, \ ++ .priv = (void *)&(struct sst_ids) { .task_id = wtask, .location_id = wloc_id, \ ++ .format = wformat,} \ ++} ++ ++/* output is triggered before input */ ++#define SST_PATH_INPUT(name, task_id, loc_id, event) \ ++ SST_PATH(name, task_id, loc_id, event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD) ++ ++#define SST_PATH_OUTPUT(name, task_id, loc_id, event) \ ++ SST_PATH(name, task_id, loc_id, event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD) ++ ++#define SST_PATH_MEDIA_LOOP_OUTPUT(name, task_id, loc_id, format, event) \ ++ SST_PATH_MEDIA_LOOP(name, task_id, loc_id, format, event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD) ++ ++ ++#define SST_SWM_MIXER(wname, wreg, wtask, wloc_id, wcontrols, wevent) \ ++{ .id = snd_soc_dapm_mixer, .name = wname, .reg = SND_SOC_NOPM, .shift = 0, \ ++ .invert = 0, .kcontrol_news = wcontrols, .num_kcontrols = ARRAY_SIZE(wcontrols),\ ++ .event = wevent, .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD | \ ++ SND_SOC_DAPM_POST_REG, \ ++ .priv = (void *)&(struct sst_ids) { .task_id = wtask, .location_id = wloc_id, \ ++ .reg = wreg } \ ++} ++ ++enum sst_gain_kcontrol_type { ++ SST_GAIN_TLV, ++ SST_GAIN_MUTE, ++ SST_GAIN_RAMP_DURATION, ++}; ++ ++struct sst_gain_mixer_control { ++ bool stereo; ++ enum sst_gain_kcontrol_type type; ++ struct sst_gain_value *gain_val; ++ int max; ++ int min; ++ u16 instance_id; ++ u16 module_id; ++ u16 pipe_id; ++ u16 task_id; ++ char pname[44]; ++ struct snd_soc_dapm_widget *w; ++}; ++ ++struct sst_gain_value { ++ u16 ramp_duration; ++ s16 l_gain; ++ s16 r_gain; ++ bool mute; ++}; ++ ++#define SST_GAIN_VOLUME_DEFAULT (-1440) ++#define SST_GAIN_RAMP_DURATION_DEFAULT 5 /* timeconstant */ ++#define SST_GAIN_MUTE_DEFAULT true ++ ++#define SST_GAIN_KCONTROL_TLV(xname, xhandler_get, xhandler_put, \ ++ xmod, xpipe, xinstance, xtask, tlv_array, xgain_val, \ ++ xmin, xmax, xpname) \ ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ ++ .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ ++ SNDRV_CTL_ELEM_ACCESS_READWRITE, \ ++ .tlv.p = (tlv_array), \ ++ .info = sst_gain_ctl_info,\ ++ .get = xhandler_get, .put = xhandler_put, \ ++ .private_value = (unsigned long)&(struct sst_gain_mixer_control) \ ++ { .stereo = true, .max = xmax, .min = xmin, .type = SST_GAIN_TLV, \ ++ .module_id = xmod, .pipe_id = xpipe, .task_id = xtask,\ ++ .instance_id = xinstance, .gain_val = xgain_val, .pname = xpname} ++ ++#define SST_GAIN_KCONTROL_INT(xname, xhandler_get, xhandler_put, \ ++ xmod, xpipe, xinstance, xtask, xtype, xgain_val, \ ++ xmin, xmax, xpname) \ ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ ++ .info = sst_gain_ctl_info, \ ++ .get = xhandler_get, .put = xhandler_put, \ ++ .private_value = (unsigned long)&(struct sst_gain_mixer_control) \ ++ { .stereo = false, .max = xmax, .min = xmin, .type = xtype, \ ++ .module_id = xmod, .pipe_id = xpipe, .task_id = xtask,\ ++ .instance_id = xinstance, .gain_val = xgain_val, .pname = xpname} ++ ++#define SST_GAIN_KCONTROL_BOOL(xname, xhandler_get, xhandler_put,\ ++ xmod, xpipe, xinstance, xtask, xgain_val, xpname) \ ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ ++ .info = snd_soc_info_bool_ext, \ ++ .get = xhandler_get, .put = xhandler_put, \ ++ .private_value = (unsigned long)&(struct sst_gain_mixer_control) \ ++ { .stereo = false, .type = SST_GAIN_MUTE, \ ++ .module_id = xmod, .pipe_id = xpipe, .task_id = xtask,\ ++ .instance_id = xinstance, .gain_val = xgain_val, .pname = xpname} ++ ++#define SST_CONTROL_NAME(xpname, xmname, xinstance, xtype) \ ++ xpname " " xmname " " #xinstance " " xtype ++ ++#define SST_COMBO_CONTROL_NAME(xpname, xmname, xinstance, xtype, xsubmodule) \ ++ xpname " " xmname " " #xinstance " " xtype " " xsubmodule ++ ++/* ++ * 3 Controls for each Gain module ++ * e.g. - pcm0_in gain 0 volume ++ * - pcm0_in gain 0 rampduration ++ * - pcm0_in gain 0 mute ++ */ ++#define SST_GAIN_KCONTROLS(xpname, xmname, xmin_gain, xmax_gain, xmin_tc, xmax_tc, \ ++ xhandler_get, xhandler_put, \ ++ xmod, xpipe, xinstance, xtask, tlv_array, xgain_val) \ ++ { SST_GAIN_KCONTROL_INT(SST_CONTROL_NAME(xpname, xmname, xinstance, "rampduration"), \ ++ xhandler_get, xhandler_put, xmod, xpipe, xinstance, xtask, SST_GAIN_RAMP_DURATION, \ ++ xgain_val, xmin_tc, xmax_tc, xpname) }, \ ++ { SST_GAIN_KCONTROL_BOOL(SST_CONTROL_NAME(xpname, xmname, xinstance, "mute"), \ ++ xhandler_get, xhandler_put, xmod, xpipe, xinstance, xtask, \ ++ xgain_val, xpname) } ,\ ++ { SST_GAIN_KCONTROL_TLV(SST_CONTROL_NAME(xpname, xmname, xinstance, "volume"), \ ++ xhandler_get, xhandler_put, xmod, xpipe, xinstance, xtask, tlv_array, \ ++ xgain_val, xmin_gain, xmax_gain, xpname) } ++ ++#define SST_GAIN_TC_MIN 5 ++#define SST_GAIN_TC_MAX 5000 ++#define SST_GAIN_MIN_VALUE -1440 /* in 0.1 DB units */ ++#define SST_GAIN_MAX_VALUE 360 ++ ++enum sst_algo_kcontrol_type { ++ SST_ALGO_PARAMS, ++ SST_ALGO_BYPASS, ++}; ++ ++struct sst_algo_control { ++ enum sst_algo_kcontrol_type type; ++ int max; ++ u16 module_id; ++ u16 pipe_id; ++ u16 instance_id; ++ u16 task_id; ++ u16 cmd_id; ++ bool bypass; ++ unsigned char *params; ++ char pname[44]; ++ struct snd_soc_dapm_widget *w; ++}; ++ ++#define SST_ALGO_KCONTROL_BYTES(xpname, xmname, xcount, xmod, \ ++ xpipe, xinstance, xtask, xcmd) \ ++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,\ ++ .name = SST_CONTROL_NAME(xpname, xmname, xinstance, "params"), \ ++ .info = sst_algo_bytes_ctl_info, \ ++ .get = sst_algo_control_get, .put = sst_algo_control_set, \ ++ .private_value = (unsigned long)&(struct sst_algo_control) \ ++ {.max = xcount, .type = SST_ALGO_PARAMS, .module_id = xmod, .pname = xpname, \ ++ .pipe_id = xpipe, .instance_id = xinstance, .task_id = xtask, .cmd_id = xcmd} } ++ ++#define SST_ALGO_KCONTROL_BOOL(xpname, xmname, xmod, xpipe, xinstance, xtask) \ ++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ ++ .name = SST_CONTROL_NAME(xpname, xmname, xinstance, "bypass"), \ ++ .info = snd_soc_info_bool_ext, \ ++ .get = sst_algo_control_get, .put = sst_algo_control_set, \ ++ .private_value = (unsigned long)&(struct sst_algo_control) \ ++ {.type = SST_ALGO_BYPASS, .module_id = xmod, .pipe_id = xpipe, .pname = xpname, \ ++ .task_id = xtask, .instance_id = xinstance, .bypass = 0 } } ++ ++#define SST_ALGO_BYPASS_PARAMS(xpname, xmname, xcount, xmod, xpipe, \ ++ xinstance, xtask, xcmd) \ ++ SST_ALGO_KCONTROL_BOOL(xpname, xmname, xmod, xpipe, xinstance, xtask), \ ++ SST_ALGO_KCONTROL_BYTES(xpname, xmname, xcount, xmod, xpipe, xinstance, xtask, xcmd) ++ ++#define SST_COMBO_ALGO_KCONTROL_BYTES(xpname, xmname, xsubmod, xcount, xmod, \ ++ xpipe, xinstance, xtask, xcmd) \ ++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,\ ++ .name = SST_COMBO_CONTROL_NAME(xpname, xmname, xinstance, "params", xsubmod), \ ++ .info = sst_algo_bytes_ctl_info, \ ++ .get = sst_algo_control_get, .put = sst_algo_control_set, \ ++ .private_value = (unsigned long)&(struct sst_algo_control) \ ++ {.max = xcount, .type = SST_ALGO_PARAMS, .module_id = xmod, .pname = xpname, \ ++ .pipe_id = xpipe, .instance_id = xinstance, .task_id = xtask, .cmd_id = xcmd} } ++ ++ ++/* only 4 slots/channels supported atm */ ++#define SST_SSP_SLOT_ENUM(s_ch_no, is_tx, xtexts) \ ++ (struct soc_enum){ .reg = s_ch_no, .reg2 = is_tx, .max = 4+1, .texts = xtexts, } ++ ++#define SST_SLOT_CTL_NAME(xpname, xmname, s_ch_name) \ ++ xpname " " xmname " " s_ch_name ++ ++#define SST_SSP_SLOT_CTL(xpname, xmname, s_ch_name, s_ch_no, is_tx, xtexts, xget, xput) \ ++ SOC_DAPM_ENUM_EXT(SST_SLOT_CTL_NAME(xpname, xmname, s_ch_name), \ ++ SST_SSP_SLOT_ENUM(s_ch_no, is_tx, xtexts), \ ++ xget, xput) ++ ++#define SST_MUX_CTL_NAME(xpname, xinstance) \ ++ xpname " " #xinstance ++ ++#define SST_SSP_MUX_ENUM(xreg, xshift, xtexts) \ ++ (struct soc_enum){ .reg = xreg, .texts = xtexts, .shift_l = xshift, \ ++ .shift_r = xshift, .max = ARRAY_SIZE(xtexts), } ++ ++#define SST_SSP_MUX_CTL(xpname, xinstance, xreg, xshift, xtexts, xget, xput) \ ++ SOC_DAPM_ENUM_EXT(SST_MUX_CTL_NAME(xpname, xinstance), \ ++ SST_SSP_MUX_ENUM(xreg, xshift, xtexts), \ ++ xget, xput) ++ ++struct sst_probe_value { ++ unsigned int val; ++ const struct soc_enum *p_enum; ++}; ++ ++#define SST_PROBE_CTL_NAME(dir, num, type) \ ++ dir #num " " type ++ ++#define SST_PROBE_ENUM(xname, xenum, xhandler_get, xhandler_put) \ ++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ ++ .info = sst_probe_enum_info, \ ++ .get = xhandler_get, .put = xhandler_put, \ ++ .private_value = (unsigned long)&(struct sst_probe_value) \ ++ { .val = 0, .p_enum = &xenum } } ++ ++#endif +diff --git a/sound/soc/intel/platform_ipc_v2.h b/sound/soc/intel/platform_ipc_v2.h +new file mode 100644 +index 0000000..a5db16b +--- /dev/null ++++ b/sound/soc/intel/platform_ipc_v2.h +@@ -0,0 +1,693 @@ ++/* ++* platform_ipc_v2.h - Intel MID Platform driver FW IPC definitions ++* ++* Copyright (C) 2008-10 Intel Corporation ++* Author: Vinod Koul ++* Harsha Priya ++* Dharageswari R ++* KP Jeeja ++* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++* ++* This program is free software; you can redistribute it and/or modify ++* it under the terms of the GNU General Public License as published by ++* the Free Software Foundation; version 2 of the License. ++* ++* This program is distributed in the hope that it will be useful, but ++* WITHOUT ANY WARRANTY; without even the implied warranty of ++* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++* General Public License for more details. ++* ++* You should have received a copy of the GNU General Public License along ++* with this program; if not, write to the Free Software Foundation, Inc., ++* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++* ++* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++* ++* This driver exposes the audio engine functionalities to the ALSA ++* and middleware. ++* This file has definitions shared between the firmware and driver ++*/ ++#ifndef __PLATFORM_IPC_V2_H__ ++#define __PLATFORM_IPC_V2_H__ ++ ++#define MAX_DBG_RW_BYTES 80 ++#define MAX_NUM_SCATTER_BUFFERS 8 ++#define MAX_LOOP_BACK_DWORDS 8 ++/* IPC base address and mailbox, timestamp offsets */ ++#define SST_MAILBOX_SIZE 0x0400 ++#define SST_MAILBOX_SEND 0x0000 ++#define SST_TIME_STAMP 0x1800 ++#define SST_TIME_STAMP_MRFLD 0x680 ++#define SST_TIME_STAMP_BYT 0x800 ++#define SST_RESERVED_OFFSET 0x1A00 ++#define SST_SCU_LPE_MAILBOX 0x1000 ++#define SST_LPE_SCU_MAILBOX 0x1400 ++#define SST_SCU_LPE_LOG_BUF (SST_SCU_LPE_MAILBOX+16) ++#define PROCESS_MSG 0x80 ++ ++/* Message ID's for IPC messages */ ++/* Bits B7: SST or IA/SC ; B6-B4: Msg Category; B3-B0: Msg Type */ ++ ++/* I2L Firmware/Codec Download msgs */ ++#define IPC_IA_PREP_LIB_DNLD 0x01 ++#define IPC_IA_LIB_DNLD_CMPLT 0x02 ++#define IPC_IA_GET_FW_VERSION 0x04 ++#define IPC_IA_GET_FW_BUILD_INF 0x05 ++#define IPC_IA_GET_FW_INFO 0x06 ++#define IPC_IA_GET_FW_CTXT 0x07 ++#define IPC_IA_SET_FW_CTXT 0x08 ++#define IPC_IA_PREPARE_SHUTDOWN 0x31 ++/* I2L Codec Config/control msgs */ ++#define IPC_PREP_D3 0x10 ++#define IPC_IA_SET_CODEC_PARAMS 0x10 ++#define IPC_IA_GET_CODEC_PARAMS 0x11 ++#define IPC_IA_SET_PPP_PARAMS 0x12 ++#define IPC_IA_GET_PPP_PARAMS 0x13 ++#define IPC_SST_PERIOD_ELAPSED_MRFLD 0xA ++#define IPC_IA_ALG_PARAMS 0x1A ++#define IPC_IA_TUNING_PARAMS 0x1B ++#define IPC_IA_SET_RUNTIME_PARAMS 0x1C ++#define IPC_IA_SET_PARAMS 0x1 ++#define IPC_IA_GET_PARAMS 0x2 ++ ++#define IPC_EFFECTS_CREATE 0xE ++#define IPC_EFFECTS_DESTROY 0xF ++ ++/* I2L Stream config/control msgs */ ++#define IPC_IA_ALLOC_STREAM_MRFLD 0x2 ++#define IPC_IA_ALLOC_STREAM 0x20 /* Allocate a stream ID */ ++#define IPC_IA_FREE_STREAM_MRFLD 0x03 ++#define IPC_IA_FREE_STREAM 0x21 /* Free the stream ID */ ++#define IPC_IA_SET_STREAM_PARAMS 0x22 ++#define IPC_IA_SET_STREAM_PARAMS_MRFLD 0x12 ++#define IPC_IA_GET_STREAM_PARAMS 0x23 ++#define IPC_IA_PAUSE_STREAM 0x24 ++#define IPC_IA_PAUSE_STREAM_MRFLD 0x4 ++#define IPC_IA_RESUME_STREAM 0x25 ++#define IPC_IA_RESUME_STREAM_MRFLD 0x5 ++#define IPC_IA_DROP_STREAM 0x26 ++#define IPC_IA_DROP_STREAM_MRFLD 0x07 ++#define IPC_IA_DRAIN_STREAM 0x27 /* Short msg with str_id */ ++#define IPC_IA_DRAIN_STREAM_MRFLD 0x8 ++#define IPC_IA_CONTROL_ROUTING 0x29 ++#define IPC_IA_VTSV_UPDATE_MODULES 0x20 ++#define IPC_IA_VTSV_DETECTED 0x21 ++ ++#define IPC_IA_START_STREAM_MRFLD 0X06 ++#define IPC_IA_START_STREAM 0x30 /* Short msg with str_id */ ++ ++#define IPC_IA_SET_GAIN_MRFLD 0x21 ++/* Debug msgs */ ++#define IPC_IA_DBG_MEM_READ 0x40 ++#define IPC_IA_DBG_MEM_WRITE 0x41 ++#define IPC_IA_DBG_LOOP_BACK 0x42 ++#define IPC_IA_DBG_LOG_ENABLE 0x45 ++#define IPC_IA_DBG_SET_PROBE_PARAMS 0x47 ++ ++/* L2I Firmware/Codec Download msgs */ ++#define IPC_IA_FW_INIT_CMPLT 0x81 ++#define IPC_IA_FW_INIT_CMPLT_MRFLD 0x01 ++#define IPC_IA_FW_ASYNC_ERR_MRFLD 0x11 ++ ++/* L2I Codec Config/control msgs */ ++#define IPC_SST_FRAGMENT_ELPASED 0x90 /* Request IA more data */ ++ ++#define IPC_SST_BUF_UNDER_RUN 0x92 /* PB Under run and stopped */ ++#define IPC_SST_BUF_OVER_RUN 0x93 /* CAP Under run and stopped */ ++#define IPC_SST_DRAIN_END 0x94 /* PB Drain complete and stopped */ ++#define IPC_SST_CHNGE_SSP_PARAMS 0x95 /* PB SSP parameters changed */ ++#define IPC_SST_STREAM_PROCESS_FATAL_ERR 0x96/* error in processing a stream */ ++#define IPC_SST_PERIOD_ELAPSED 0x97 /* period elapsed */ ++ ++#define IPC_SST_ERROR_EVENT 0x99 /* Buffer over run occurred */ ++/* L2S messages */ ++#define IPC_SC_DDR_LINK_UP 0xC0 ++#define IPC_SC_DDR_LINK_DOWN 0xC1 ++#define IPC_SC_SET_LPECLK_REQ 0xC2 ++#define IPC_SC_SSP_BIT_BANG 0xC3 ++ ++/* L2I Error reporting msgs */ ++#define IPC_IA_MEM_ALLOC_FAIL 0xE0 ++#define IPC_IA_PROC_ERR 0xE1 /* error in processing a ++ stream can be used by playback and ++ capture modules */ ++ ++/* L2I Debug msgs */ ++#define IPC_IA_PRINT_STRING 0xF0 ++ ++/* Buffer under-run */ ++#define IPC_IA_BUF_UNDER_RUN_MRFLD 0x0B ++ ++/* Mrfld specific defines: ++ * For asynchronous messages(INIT_CMPLT, PERIOD_ELAPSED, ASYNC_ERROR) ++ * received from FW, the format is: ++ * - IPC High: pvt_id is set to zero. Always short message. ++ * - msg_id is in lower 16-bits of IPC low payload. ++ * - pipe_id is in higher 16-bits of IPC low payload for period_elapsed. ++ * - error id is in higher 16-bits of IPC low payload for async errors. ++ */ ++#define SST_ASYNC_DRV_ID 0 ++ ++/* Command Response or Acknowledge message to any IPC message will have ++ * same message ID and stream ID information which is sent. ++ * There is no specific Ack message ID. The data field is used as response ++ * meaning. ++ */ ++ ++/* SCU IPC for resetting & power gating the LPE through SCU */ ++#define IPC_SCU_LPE_RESET 0xA3 ++ ++enum ackData { ++ IPC_ACK_SUCCESS = 0, ++ IPC_ACK_FAILURE, ++}; ++ ++enum ipc_ia_msg_id { ++ IPC_CMD = 1, /*!< Task Control message ID */ ++ IPC_SET_PARAMS = 2,/*!< Task Set param message ID */ ++ IPC_GET_PARAMS = 3, /*!< Task Get param message ID */ ++ IPC_INVALID = 0xFF, /*! ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * ++ */ ++ ++#define FORMAT(fmt) "%s: " fmt, __func__ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " FORMAT(fmt) ++ ++#include ++#include "mid_ssp.h" ++ ++ ++/* ++ * Default I2S configuration ++ */ ++/* ++ * TO BE DONE: use mixer to make it more flexible ++ */ ++const struct intel_mid_i2s_settings ssp_platform_i2s_config = { ++ .master_mode_clk_selection = SSP_MASTER_CLOCK_UNDEFINED, ++ .master_mode_standard_freq = 0xFFFF, ++ .tx_tristate_phase = TXD_TRISTATE_LAST_PHASE_OFF, ++ .slave_clk_free_running_status = ++ SLAVE_SSPCLK_ON_DURING_TRANSFER_ONLY, ++ .ssp_duplex_mode = RX_AND_TX_MODE, ++ .ssp_trailing_byte_mode = SSP_TRAILING_BYTE_HDL_BY_IA, ++ .ssp_tx_dma = SSP_TX_DMA_ENABLE, ++ .ssp_rx_dma = SSP_RX_DMA_ENABLE, ++ .rx_fifo_interrupt = SSP_RX_FIFO_OVER_INT_ENABLE, ++ .tx_fifo_interrupt = SSP_TX_FIFO_UNDER_INT_ENABLE, ++ .ssp_rx_timeout_interrupt_status = SSP_RX_TIMEOUT_INT_DISABLE, ++ .ssp_trailing_byte_interrupt_status = ++ SSP_TRAILING_BYTE_INT_ENABLE, ++ .ssp_loopback_mode_status = SSP_LOOPBACK_OFF, ++ .ssp_rx_fifo_threshold = MID_SSP_RX_FIFO_THRESHOLD, ++ .ssp_tx_fifo_threshold = MID_SSP_TX_FIFO_THRESHOLD, ++ .ssp_frmsync_pol_bit = SSP_FRMS_ACTIVE_HIGH, ++ .ssp_end_transfer_state = ++ SSP_END_DATA_TRANSFER_STATE_LOW, ++ .ssp_psp_T1 = 0, ++ .ssp_psp_T2 = 0, ++ .ssp_psp_T4 = 0, ++ .ssp_psp_T5 = 0, ++ .ssp_psp_T6 = 1, ++}; ++ ++/* ++ * SSP DAI Internal functions ++ */ ++ ++/** ++ * ssp_dma_req - This function programs a write or read request ++ * to the Intel I2S driver ++ * ++ * @param substream Pointer to stream structure ++ * return ret_val Status ++ */ ++static int ssp_dma_req(struct snd_pcm_substream *substream) ++{ ++ ++ struct intel_alsa_ssp_stream_info *str_info; ++ struct intel_ssp_config *ssp_config; ++ struct snd_pcm_runtime *pl_runtime; ++ int ret; ++#ifdef _LLI_ENABLED_ ++ struct intel_mid_i2s_lli *sg_table = NULL; ++ int i; ++#else ++ u32 *dma_addr; ++#endif /* _LLI_ENABLED_ */ ++ ++ WARN(!substream, "SSP DAI: " ++ "ERROR NULL substream\n"); ++ if (!substream) ++ return -EINVAL; ++ ++ ++ pl_runtime = substream->runtime; ++ ++ str_info = pl_runtime->private_data; ++ ++ WARN(!str_info, "SSP DAI: " ++ "ERROR NULL str_info\n"); ++ if (!str_info) ++ return -EINVAL; ++ ++ ssp_config = str_info->ssp_config; ++ ++ WARN(!ssp_config, "SSP DAI: " ++ "ERROR NULL ssp_config\n"); ++ if (!ssp_config) ++ return -EINVAL; ++ ++ ++ WARN(!ssp_config->i2s_handle, "SSP DAI: " ++ "ERROR, trying to play a stream however " ++ "ssp_config->i2s_handle is NULL\n"); ++ ++ if (!ssp_config->i2s_handle) ++ return -EINVAL; ++ ++#ifdef _LLI_ENABLED_ ++ if (!test_bit(INTEL_ALSA_SSP_STREAM_STARTED, ++ &str_info->stream_status)) { ++ pr_err("%s: Stream has been stopped before SSP DMA request has been taken into account", ++ __func__); ++ return 0; ++ } ++ ++ /* Will be executed once until next DAI shutdown */ ++ if (!test_bit(INTEL_ALSA_SSP_STREAM_INIT, ++ &str_info->stream_status)) { ++ ++ str_info->length = frames_to_bytes(pl_runtime, ++ pl_runtime->period_size); ++ ++ str_info->addr = substream->runtime->dma_area; ++ ++ sg_table = kzalloc(sizeof(struct intel_mid_i2s_lli) * ++ pl_runtime->periods, ++ GFP_KERNEL); ++ if (sg_table == NULL) { ++ pr_err("sg_table allocation failed!"); ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < pl_runtime->periods; i++) { ++ sg_table[i].addr = (u32 *) (str_info->addr + ++ str_info->length * i); ++ sg_table[i].leng = (u32) str_info->length; ++ } ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ ret = intel_mid_i2s_lli_wr_req(ssp_config->i2s_handle, ++ sg_table, ++ pl_runtime->periods, ++ I2S_CIRCULAR_MODE, ++ substream); ++ else ++ ret = intel_mid_i2s_lli_rd_req(ssp_config->i2s_handle, ++ sg_table, ++ pl_runtime->periods, ++ I2S_CIRCULAR_MODE, ++ substream); ++ kfree(sg_table); ++ ++ if (ret != 0) { ++ pr_err("SSP DAI: %s request error", ++ (substream->stream == ++ SNDRV_PCM_STREAM_PLAYBACK) ? ++ "write" : "read"); ++ } ++ ++ set_bit(INTEL_ALSA_SSP_STREAM_INIT, &str_info->stream_status); ++ ++ intel_mid_i2s_command(ssp_config->i2s_handle, ++ SSP_CMD_ENABLE_SSP, NULL); ++ } ++ ++ /* Executed at each TRIGGER_START */ ++ intel_mid_i2s_command(ssp_config->i2s_handle, ++ (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? ++ SSP_CMD_ENABLE_DMA_TX_INTR : ++ SSP_CMD_ENABLE_DMA_RX_INTR, NULL); ++ ++ return 0; ++#else ++ str_info->length = frames_to_bytes(pl_runtime, pl_runtime->period_size); ++ ++ str_info->addr = substream->runtime->dma_area; ++ pr_debug("SSP DAI: FCT %s substream->runtime->dma_area = %p", ++ __func__, substream->runtime->dma_area); ++ ++ dma_addr = (u32 *)(str_info->addr + str_info->length ++ * str_info->period_req_index); ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ ret = intel_mid_i2s_wr_req(ssp_config->i2s_handle, dma_addr, ++ str_info->length, substream); ++ else ++ ret = intel_mid_i2s_rd_req(ssp_config->i2s_handle, dma_addr, ++ str_info->length, substream); ++ ++ if (ret == 0) { ++ intel_mid_i2s_command(ssp_config->i2s_handle, ++ SSP_CMD_ENABLE_SSP, NULL); ++ ++ if (test_and_set_bit(INTEL_ALSA_SSP_STREAM_RUNNING, ++ &str_info->stream_status)) { ++ pr_err("SSP DAI: ERROR previous request not handled\n"); ++ return -EBUSY; ++ } ++ ++ if (++(str_info->period_req_index) >= pl_runtime->periods) ++ str_info->period_req_index = 0; ++ return 0; ++ } else { ++ pr_err("SSP DAI: FCT %s read/write req ERROR\n", __func__); ++ return -EINVAL; ++ } ++#endif /* _LLI_ENABLED_ */ ++} /* ssp_dma_req */ ++ ++/** ++ * ssp_dma_complete - End of capture or playback callback ++ * called in DMA Complete Tasklet context ++ * This Callback has in charge of re-programming a new read or write ++ * request to Intel MID I2S Driver if the stream has not been Closed. ++ * It calls also the snd_pcm_period_elapsed if the stream is not ++ * PAUSED or SUSPENDED to inform ALSA Kernel that the Ring Buffer ++ * period has been sent or received properly ++ * ++ * @param param Pointer to a user data ++ * return status ++ */ ++static int ssp_dma_complete(void *param) ++{ ++ struct snd_pcm_substream *substream; ++ struct intel_alsa_ssp_stream_info *str_info; ++ struct snd_pcm_runtime *pl_runtime; ++#ifndef _LLI_ENABLED_ ++ bool call_back = false; ++ bool reset_index = false; ++#endif /* _LLI_ENABLED_ */ ++ ++ substream = (struct snd_pcm_substream *)param; ++ pl_runtime = substream->runtime; ++ str_info = substream->runtime->private_data; ++ ++ WARN(!str_info, "SSP DAI: ERROR NULL str_info\n"); ++ if (str_info == NULL) ++ return -EINVAL; ++ ++#ifdef _LLI_ENABLED_ ++ if (!test_bit(INTEL_ALSA_SSP_STREAM_INIT, ++ &str_info->stream_status)) { ++ pr_err("Stream already not initialized"); ++ return 0; ++ } ++ ++ if (++(str_info->period_cb_index) >= pl_runtime->periods) ++ str_info->period_cb_index = 0; ++ ++ if (test_bit(INTEL_ALSA_SSP_STREAM_STARTED, &str_info->stream_status)) ++ snd_pcm_period_elapsed(substream); ++ else ++ pr_debug("No call to snd_period_elapsed, stream is not started"); ++#else ++ if (test_and_clear_bit(INTEL_ALSA_SSP_STREAM_RUNNING, ++ &str_info->stream_status)) { ++ bool dropped = test_and_clear_bit(INTEL_ALSA_SSP_STREAM_DROPPED, ++ &str_info->stream_status); ++ bool started = test_bit(INTEL_ALSA_SSP_STREAM_STARTED, ++ &str_info->stream_status); ++ ++ if (started) { ++ /* ++ * Whatever dropped or not, ++ * the stream is on going ++ */ ++ call_back = true; ++ } ++ if (started && dropped) { ++ /* ++ * the stream has been dropped and restarted ++ * before the callback occurs ++ * in this case the we have to reprogram the ++ * requests to SSP driver ++ * and reset the stream's indexes ++ */ ++ reset_index = true; ++ } ++ if (!started && !dropped) { ++ pr_err("SSP DAI: FCT %s neither started nor dropped", ++ __func__); ++ return -EBUSY; ++ } ++ } else { ++ pr_err("SSP DAI: FCT %s called while not running ", __func__); ++ return -EBUSY; ++ } ++ ++ if (call_back == true) { ++ pr_debug("SSP DAI: playback/capture (REQ=%d,CB=%d): DMA_REQ_COMPLETE\n", ++ str_info->period_req_index, ++ str_info->period_cb_index); ++ ++ if (reset_index) { ++ str_info->period_cb_index = 0; ++ str_info->period_req_index = 0; ++ } else if (++(str_info->period_cb_index) >= pl_runtime->periods) ++ str_info->period_cb_index = 0; ++ ++ /* ++ * Launch the next Capture/Playback request if ++ * no CLOSE has been requested ++ */ ++ ssp_dma_req(substream); ++ ++ /* ++ * Call the snd_pcm_period_elapsed to inform ALSA kernel ++ * that a ringbuffer period has been played ++ */ ++ snd_pcm_period_elapsed(substream); ++ } ++#endif /* _LLI_ENABLED_ */ ++ ++ return 0; ++} /* ssp_dma_complete */ ++ ++/** ++ * intel_mid_ssp_transfer_data - send data buffers ++ * ++ * @param work Pointer to stream structure ++ * return void ++ */ ++void intel_mid_ssp_transfer_data(struct work_struct *work) ++{ ++ struct intel_alsa_ssp_stream_info *str_info; ++ struct snd_pcm_substream *substream; ++ ++ BUG_ON(!work); ++ ++ str_info = container_of(work, struct intel_alsa_ssp_stream_info, ++ ssp_ws); ++ ++ BUG_ON(!str_info); ++ ++ substream = str_info->substream; ++ ++ BUG_ON(!substream); ++ ++ ssp_dma_req(substream); ++ ++} /* intel_mid_ssp_transfer_data */ ++ ++/* ++ * SSP PLATFORM ++ */ ++ ++/* ++ * SSP Platform functions ++ */ ++static int ssp_platform_pcm_new(struct snd_soc_pcm_runtime *soc_runtime) ++{ ++ int retval = 0; ++ struct snd_soc_dai *dai; ++ struct snd_pcm *pcm; ++ ++ pr_debug("SSP DAI: FCT %s enters\n", ++ __func__); ++ /* ++ * Do pre-allocation to all substreams of the given pcm for the ++ * specified DMA type. ++ * ++ */ ++ dai = soc_runtime->cpu_dai; ++ pcm = soc_runtime->pcm; ++ ++ if (dai->driver->playback.channels_min || ++ dai->driver->capture.channels_min) { ++ retval = snd_pcm_lib_preallocate_pages_for_all(pcm, ++ SNDRV_DMA_TYPE_CONTINUOUS, ++ snd_dma_continuous_data(GFP_KERNEL), ++ SSP_MIN_BUFFER, SSP_MAX_BUFFER); ++ ++ if (retval) { ++ pr_err("DMA buffer allocation fail\n"); ++ return retval; ++ } ++ } ++ return retval; ++} /* ssp_platform_pcm_new */ ++ ++static void ssp_platform_pcm_free(struct snd_pcm *pcm) ++{ ++ pr_debug("SSP DAI: FCT %s enter\n", ++ __func__); ++ /* ++ * release all pre-allocated buffers on the pcm ++ * ++ */ ++ snd_pcm_lib_preallocate_free_for_all(pcm); ++ ++} /* ssp_platform_pcm_free */ ++ ++/** ++ * ssp_platform_hw_params - Allocate memory for Ring Buffer according ++ * to hw_params. ++ * It's called in a non-atomic context ++ * ++ * @param substream Substream for which the stream function is called ++ * @param hw_params Stream command thats requested from upper layer ++ * return status 0 ==> OK ++ * ++ */ ++static int ssp_platform_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *hw_params) ++{ ++ int ret_val; ++ ++ /* ++ * Allocates the DMA buffer for the substream ++ * This callback could be called several time ++ * snd_pcm_lib_malloc_pages allows to avoid memory leak ++ * as it release already allocated memory when already allocated ++ */ ++ ret_val = snd_pcm_lib_malloc_pages(substream, ++ params_buffer_bytes(hw_params)); ++ ++ if (ret_val < 0) ++ return ret_val; ++ ++ memset(substream->runtime->dma_area, 0, params_buffer_bytes(hw_params)); ++ ++ return 0; ++} /* ssp_platform_hw_params */ ++ ++/* ++ * ssp_platform_pointer- to send the current buffer pointer ++ * processed by HW ++ * This function is called by ALSA framework to get the current HW buffer ptr ++ * to check the Ring Buffer Status ++ * ++ * @param substream Pointer to the substream for which the function ++ * is called ++ * ++ * return pcm_pointer Indicates the number of samples played ++ * ++ */ ++static ++snd_pcm_uframes_t ssp_platform_pointer(struct snd_pcm_substream *substream) ++{ ++ struct intel_alsa_ssp_stream_info *str_info; ++ unsigned long pcm_pointer = 0; ++ ++ str_info = substream->runtime->private_data; ++ ++ WARN(!str_info, "SSP DAI: ERROR NULL str_info\n"); ++ if (!str_info) ++ return -EINVAL; ++ ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ pcm_pointer = (unsigned long) (str_info->period_cb_index ++ * substream->runtime->period_size); ++ else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) ++ pcm_pointer = (unsigned long) (str_info->period_cb_index ++ * substream->runtime->period_size); ++ ++ pr_debug("SSP DAI: FCT %s Frame bits = %d, period_size = %d, periods = %d\n", ++ __func__, ++ (int) substream->runtime->frame_bits, ++ (int) substream->runtime->period_size, ++ (int) substream->runtime->periods); ++ ++ pr_debug("SSP DAI: FCT %s returns %ld\n", ++ __func__, pcm_pointer); ++ ++ return pcm_pointer; ++} /* ssp_platform_pointer */ ++ ++static struct snd_pcm_ops ssp_platform_ops = { ++ .open = NULL, ++ .close = NULL, ++ .ioctl = snd_pcm_lib_ioctl, ++ .hw_params = ssp_platform_hw_params, ++ .hw_free = NULL, ++ .prepare = NULL, ++ .trigger = NULL, ++ .pointer = ssp_platform_pointer, ++}; ++ ++struct snd_soc_platform_driver soc_ssp_platform_drv = { ++ .ops = &ssp_platform_ops, ++ .probe = NULL, ++ .pcm_new = ssp_platform_pcm_new, ++ .pcm_free = ssp_platform_pcm_free, ++}; ++ ++/* ++ * SND SOC DAI OPs ++ */ ++static int ssp_probe(struct snd_soc_dai *cpu_dai) ++{ ++ struct intel_ssp_config *ssp_config; ++ ++ pr_info("SSP DAI: FCT %s enters for CPU_DAI %d\n", ++ __func__, cpu_dai->id); ++ ++ ssp_config = kzalloc(sizeof(struct intel_ssp_config), GFP_KERNEL); ++ ++ ++ if (ssp_config == NULL) { ++ pr_err("Unable to allocate ssp_config\n"); ++ return -ENOMEM; ++ } ++ ++#ifndef _LLI_ENABLED_ ++ ssp_config->intel_mid_dma_alloc = false; ++#endif /* _LLI_ENABLED_ */ ++ ssp_config->ssp_dai_tx_allocated = false; ++ ssp_config->ssp_dai_rx_allocated = false; ++ ++ ssp_config->i2s_settings = ssp_platform_i2s_config; ++ pr_info("SSP DAI: FCT %s ssp_config %p\n", ++ __func__, ssp_config); ++ ++ cpu_dai->playback_dma_data = cpu_dai->capture_dma_data = ssp_config; ++ ++ return 0; ++ ++} /* ssp_probe */ ++ ++static int ssp_remove(struct snd_soc_dai *cpu_dai) ++{ ++ struct intel_ssp_config *ssp_config; ++ ++ WARN(!cpu_dai, "SSP DAI: " ++ "ERROR NULL cpu_dai\n"); ++ if (!cpu_dai) ++ return -EINVAL; ++ ++ ssp_config = cpu_dai->playback_dma_data; ++ ++ kfree(ssp_config); ++ ++ return 0; ++} /* ssp_remove */ ++ ++static int ssp_dai_startup(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *cpu_dai) ++{ ++ struct intel_ssp_config *ssp_config; ++ struct snd_pcm_runtime *pl_runtime; ++ struct intel_alsa_ssp_stream_info *str_info; ++ struct intel_ssp_info *ssp_info; ++ struct snd_soc_dai_driver *cpudai_drv = cpu_dai->driver; ++ unsigned int device; ++ int ret = 0; ++ ++ WARN(!cpu_dai->driver, "SSP DAI: " ++ "FCT %s ERROR NULL cpu_dai->driver\n", ++ __func__); ++ if (!cpu_dai->driver) ++ return -EINVAL; ++ ++ pr_info("SSP DAI: FCT %s enters for DAI Id = %d\n", ++ __func__, cpu_dai->driver->id); ++ ++ ssp_info = dev_get_drvdata(cpu_dai->dev); ++ ++ WARN(!ssp_info, "SSP DAI: ERROR NULL ssp_info\n"); ++ if (!ssp_info) ++ return -EINVAL; ++ ++ pl_runtime = substream->runtime; ++ ++ ssp_config = snd_soc_dai_get_dma_data(cpu_dai, substream); ++ ++ WARN(!ssp_config, "SSP DAI: " ++ "FCT %s ERROR NULL ssp_config\n", ++ __func__); ++ if (!ssp_config) ++ return -EINVAL; ++ ++ ++ device = cpu_dai->driver->id; ++ ++ /* ++ * setup the internal data structure stream pointers based on it being ++ * playback or capture stream ++ */ ++ str_info = kzalloc(sizeof(*str_info), GFP_KERNEL); ++ ++ if (!str_info) { ++ pr_err("SSP DAI: str_info alloc failure\n"); ++ return -EINVAL; ++ ++ } ++ str_info->substream = substream; ++ str_info->ssp_config = ssp_config; ++ str_info->stream_status = 0; ++ ++ INIT_WORK(&str_info->ssp_ws, intel_mid_ssp_transfer_data); ++ ++ /* ++ * Initialize SSPx [x=0,1] driver ++ * Store the Stream information ++ */ ++ pl_runtime->private_data = str_info; ++ ++ pr_debug("SSP DAI: FCT %s enters cpu_dai->card->name = %s\n", ++ __func__, cpu_dai->card->name); ++ ++ if (!cpu_dai->active) { ++ if (!strcmp(cpudai_drv->name, SSP_BT_DAI_NAME)) { ++ ssp_config->i2s_handle = ++ intel_mid_i2s_open(SSP_USAGE_BLUETOOTH_FM); ++ pr_debug("opening the CPU_DAI for "\ ++ "SSP_USAGE_BLUETOOTH_FM, i2s_handle = %p\n", ++ ssp_config->i2s_handle); ++ ++ } else if (!strcmp(cpudai_drv->name, SSP_MODEM_DAI_NAME)) { ++ ssp_config->i2s_handle = ++ intel_mid_i2s_open(SSP_USAGE_MODEM); ++ pr_debug("opening the CPU_DAI for "\ ++ "SSP_USAGE_MODEM, i2s_handle = %p\n", ++ ssp_config->i2s_handle); ++ ++ } else { ++ pr_err("non Valid SOC CARD\n"); ++ return -EINVAL; ++ } ++ ++ /* Set the Write Callback */ ++ ret = intel_mid_i2s_set_wr_cb(ssp_config->i2s_handle, ++ ssp_dma_complete); ++ if (ret) ++ return ret; ++ ++ /* Set the Default Read Callback */ ++ ret = intel_mid_i2s_set_rd_cb(ssp_config->i2s_handle, ++ ssp_dma_complete); ++ if (ret) ++ return ret; ++ ++ } else { ++ /* ++ * do nothing because already Open by sibling substream ++ */ ++ pr_debug("SSP DAI: FCT %s Open DO NOTHING\n", ++ __func__); ++ } ++ return 0; ++} /* ssp_dai_startup */ ++ ++static void ssp_dai_shutdown(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *cpu_dai) ++{ ++ struct intel_ssp_config *ssp_config; ++ struct intel_alsa_ssp_stream_info *str_info; ++ struct snd_pcm_runtime *runtime; ++ struct intel_ssp_info *ssp_info; ++ ++ ssp_config = snd_soc_dai_get_dma_data(cpu_dai, substream); ++ ++ BUG_ON(!ssp_config); ++ ++ runtime = substream->runtime; ++ BUG_ON(!runtime->private_data); ++ ++ str_info = runtime->private_data; ++ BUG_ON(!str_info); ++ ++ ssp_info = dev_get_drvdata(cpu_dai->dev); ++ BUG_ON(!ssp_info); ++ ++ /* Cancel pending work */ ++ cancel_work_sync(&str_info->ssp_ws); ++ ++ switch (substream->stream) { ++ case SNDRV_PCM_STREAM_PLAYBACK: ++ /* ++ * Only Free Tx channel if no playback streams are active ++ * Shutdown can be called right after a startup if something ++ * failed (as a concurrency issue ++ * so this case can happen ++ */ ++ if ((!cpu_dai->playback_active) && ++ (ssp_config->i2s_settings.ssp_active_tx_slots_map)) { ++ intel_mid_i2s_command(ssp_config->i2s_handle, ++ SSP_CMD_FREE_TX, NULL); ++ pr_debug("SSP DAI: FCT %s TX DMA Channel released\n", ++ __func__); ++ } ++ ssp_config->ssp_dai_tx_allocated = false; ++ break; ++ ++ case SNDRV_PCM_STREAM_CAPTURE: ++ /* ++ * Only Free Rx channel if no capture streams are active ++ */ ++ if ((!cpu_dai->capture_active) && ++ (ssp_config->i2s_settings.ssp_active_rx_slots_map)) { ++ intel_mid_i2s_command(ssp_config->i2s_handle, ++ SSP_CMD_FREE_RX, NULL); ++ pr_debug("SSP DAI: FCT %s RX DMA Channel released\n", ++ __func__); ++ } ++ ssp_config->ssp_dai_rx_allocated = false; ++ break; ++ ++ default: ++ pr_err("SSP DAI: FCT %s Bad stream_dir: %d\n", ++ __func__, substream->stream); ++ break; ++ } ++ ++#ifdef _LLI_ENABLED_ ++ clear_bit(INTEL_ALSA_SSP_STREAM_INIT, &str_info->stream_status); ++#endif /* _LLI_ENABLED_ */ ++ ++ kfree(str_info); ++ ++ if (!cpu_dai->active) { ++ pr_info("SSP DAI: FCT %s closing I2S\n", ++ __func__); ++ /* ++ * Close the Intel MID I2S connection ++ */ ++ intel_mid_i2s_close(ssp_config->i2s_handle); ++ ++ ssp_config->i2s_handle = NULL; ++#ifndef _LLI_ENABLED_ ++ ssp_config->intel_mid_dma_alloc = false; ++#endif /* _LLI_ENABLED_ */ ++ } ++ ++} /* ssp_dai_shutdown */ ++ ++static int ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai, ++ unsigned int fmt) ++{ ++ struct intel_ssp_config *ssp_config; ++ struct intel_mid_i2s_settings *i2s_config; ++ ++ ssp_config = cpu_dai->playback_dma_data; ++ ++ WARN(!ssp_config, "SSP DAI: FCT %s ssp_config=NULL\n", ++ __func__); ++ if (!ssp_config) ++ return -EINVAL; ++ ++ pr_debug("SSP DAI: FCT %s fmt = %d\n", ++ __func__, fmt); ++ ++ i2s_config = &(ssp_config->i2s_settings); ++ ++ /* ++ * SSP CLK Direction ++ * SSP FRMSYNC Direction ++ */ ++ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { ++ case SND_SOC_DAIFMT_CBM_CFM: ++ i2s_config->sspslclk_direction = SSPSCLK_MASTER_MODE; ++ i2s_config->sspsfrm_direction = SSPSCLK_MASTER_MODE; ++ /* ++ * Mandatory to be able to perform only RX without TX ++ * in SSP CLK Master Mode ++ * ++ */ ++ i2s_config->ssp_duplex_mode = RX_WITHOUT_TX_MODE; ++ break; ++ case SND_SOC_DAIFMT_CBM_CFS: ++ i2s_config->sspslclk_direction = SSPSCLK_MASTER_MODE; ++ i2s_config->sspsfrm_direction = SSPSCLK_SLAVE_MODE; ++ /* ++ * Mandatory to be able to perform only RX without TX ++ * in SSP CLK Master Mode ++ * ++ */ ++ i2s_config->ssp_duplex_mode = RX_WITHOUT_TX_MODE; ++ break; ++ case SND_SOC_DAIFMT_CBS_CFS: ++ i2s_config->sspslclk_direction = SSPSCLK_SLAVE_MODE; ++ i2s_config->sspsfrm_direction = SSPSCLK_SLAVE_MODE; ++ i2s_config->ssp_duplex_mode = RX_AND_TX_MODE; ++ break; ++ case SND_SOC_DAIFMT_CBS_CFM: ++ i2s_config->sspslclk_direction = SSPSCLK_SLAVE_MODE; ++ i2s_config->sspsfrm_direction = SSPSCLK_MASTER_MODE; ++ i2s_config->ssp_duplex_mode = RX_AND_TX_MODE; ++ break; ++ default: ++ pr_err("SSP DAI: %s Bad DAI CLK/FS Mode=%d\n", ++ __func__, ++ (fmt & SND_SOC_DAIFMT_MASTER_MASK)); ++ return -EINVAL; ++ } ++ /* ++ * SSP Sgnal Inversion Mode ++ * Use clock gating bitfield for ++ * Serial bit-rate Clock Mode ++ */ ++ switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) { ++ case SSP_DAI_SCMODE_0: ++ i2s_config->ssp_serial_clk_mode = SSP_CLK_MODE_0; ++ break; ++ case SSP_DAI_SCMODE_1: ++ i2s_config->ssp_serial_clk_mode = SSP_CLK_MODE_1; ++ break; ++ case SSP_DAI_SCMODE_2: ++ i2s_config->ssp_serial_clk_mode = SSP_CLK_MODE_2; ++ break; ++ case SSP_DAI_SCMODE_3: ++ i2s_config->ssp_serial_clk_mode = SSP_CLK_MODE_3; ++ break; ++ default: ++ pr_err("SSP DAI: %s Bad DAI Signal Inversion Mode=%d\n", ++ __func__, ++ (fmt & SND_SOC_DAIFMT_INV_MASK)); ++ return -EINVAL; ++ } ++ ++ /* ++ * SSP FS Inversion Mode ++ */ ++ switch (fmt & SND_SOC_DAIFMT_INV_MASK) { ++ case SND_SOC_DAIFMT_NB_NF: ++ case SND_SOC_DAIFMT_IB_NF: ++ i2s_config->ssp_frmsync_pol_bit = SSP_FRMS_ACTIVE_HIGH; ++ break; ++ case SND_SOC_DAIFMT_NB_IF: ++ case SND_SOC_DAIFMT_IB_IF: ++ i2s_config->ssp_frmsync_pol_bit = SSP_FRMS_ACTIVE_LOW; ++ break; ++ default: ++ pr_err("SSP DAI: %s Bad DAI FS Inversion Mode=%d\n", ++ __func__, ++ (fmt & SND_SOC_DAIFMT_INV_MASK)); ++ return -EINVAL; ++ } ++ ++ /* ++ * SSP Format Mode ++ */ ++ ++ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { ++ case SND_SOC_DAIFMT_I2S: ++ i2s_config->frame_format = PSP_FORMAT; ++ break; ++ ++ default: ++ pr_err("SSP DAI: %s Bad DAI format Mode=%d\n", ++ __func__, ++ (fmt & SND_SOC_DAIFMT_FORMAT_MASK)); ++ return -EINVAL; ++ } ++ return 0; ++} /* ssp_set_dai_fmt */ ++ ++static int ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, ++ unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) ++{ ++ struct intel_ssp_config *ssp_config; ++ struct intel_mid_i2s_settings *i2s_config; ++ ++ ssp_config = cpu_dai->playback_dma_data; ++ ++ WARN(!ssp_config, "SSP DAI: FCT %s ssp_config=NULL\n", ++ __func__); ++ if (!ssp_config) ++ return -EINVAL; ++ ++ ++ i2s_config = &(ssp_config->i2s_settings); ++ ++ i2s_config->frame_rate_divider_control = slots; ++ i2s_config->data_size = slot_width; ++ i2s_config->mode = SSP_IN_NETWORK_MODE; ++ i2s_config->ssp_active_tx_slots_map = tx_mask; ++ i2s_config->ssp_active_rx_slots_map = rx_mask; ++ ++ pr_debug("i2s_config->frame_rate_divider_control = %d\n", ++ i2s_config->frame_rate_divider_control); ++ pr_debug("i2s_config->data_size = %d\n", ++ i2s_config->data_size); ++ pr_debug("i2s_config->mode = %d\n", ++ i2s_config->mode); ++ pr_debug("i2s_config->ssp_active_tx_slots_map = %d\n", ++ i2s_config->ssp_active_tx_slots_map); ++ pr_debug("i2s_config->ssp_active_rx_slots_map = %d\n", ++ i2s_config->ssp_active_rx_slots_map); ++ ++ return 0; ++} ++ ++static int ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai, ++ int clk_id, unsigned int freq, int dir) ++{ ++ struct intel_ssp_config *ssp_config; ++ struct intel_mid_i2s_settings *i2s_config; ++ ++ ssp_config = cpu_dai->playback_dma_data; ++ ++ BUG_ON(!ssp_config); ++ ++ i2s_config = &(ssp_config->i2s_settings); ++ ++ pr_debug("SSP DAI: FCT %s clk_id = %d\n", ++ __func__, clk_id); ++ ++ switch (clk_id) { ++ case SSP_CLK_ONCHIP: ++ i2s_config->master_mode_clk_selection = SSP_ONCHIP_CLOCK; ++ break; ++ case SSP_CLK_NET: ++ i2s_config->master_mode_clk_selection = SSP_NETWORK_CLOCK; ++ break; ++ case SSP_CLK_EXT: ++ i2s_config->master_mode_clk_selection = SSP_EXTERNAL_CLOCK; ++ break; ++ case SSP_CLK_AUDIO: ++ i2s_config->master_mode_clk_selection = SSP_ONCHIP_AUDIO_CLOCK; ++ break; ++ default: ++ i2s_config->master_mode_standard_freq = ++ SSP_MASTER_CLOCK_UNDEFINED; ++ pr_err("SSP DAI: %s Bad clk_id=%d\n", ++ __func__, ++ clk_id); ++ return -EINVAL; ++ } ++ ++ pr_debug("SSP DAI:FCT %s freq = %d\n", ++ __func__, freq); ++ ++ switch (freq) { ++ case 8000: ++ i2s_config->master_mode_standard_freq = SSP_FRM_FREQ_8_000; ++ i2s_config->ssp_psp_T1 = 0; ++ i2s_config->ssp_psp_T2 = 1; ++ i2s_config->ssp_psp_T4 = 0; ++ i2s_config->ssp_psp_T5 = 0; ++ i2s_config->ssp_psp_T6 = 1; ++ break; ++ ++ case 11025: ++ i2s_config->master_mode_standard_freq = SSP_FRM_FREQ_11_025; ++ pr_err("SSP DAI: %s Bad freq_out=%d\n", ++ __func__, ++ freq); ++ return -EINVAL; ++ ++ case 16000: ++ i2s_config->master_mode_standard_freq = SSP_FRM_FREQ_16_000; ++ i2s_config->ssp_psp_T1 = 6; ++ i2s_config->ssp_psp_T2 = 2; ++ i2s_config->ssp_psp_T4 = 0; ++ i2s_config->ssp_psp_T5 = 14; ++ i2s_config->ssp_psp_T6 = 16; ++ break; ++ ++ case 22050: ++ i2s_config->master_mode_standard_freq = SSP_FRM_FREQ_22_050; ++ pr_err("SSP DAI: %s Bad freq_out=%d\n", ++ __func__, ++ freq); ++ return -EINVAL; ++ ++ case 44100: ++ i2s_config->master_mode_standard_freq = SSP_FRM_FREQ_44_100; ++ pr_err("SSP DAI: %s Bad freq_out=%d\n", ++ __func__, ++ freq); ++ return -EINVAL; ++ ++ case 48000: ++ i2s_config->master_mode_standard_freq = SSP_FRM_FREQ_48_000; ++ i2s_config->ssp_psp_T1 = 6; ++ i2s_config->ssp_psp_T2 = 2; ++ i2s_config->ssp_psp_T4 = 0; ++ i2s_config->ssp_psp_T5 = 14; ++ i2s_config->ssp_psp_T6 = 16; ++ break; ++ ++ default: ++ i2s_config->master_mode_standard_freq = SSP_FRM_FREQ_UNDEFINED; ++ pr_err("SSP DAI: %s Bad freq_out=%d\n", ++ __func__, ++ freq); ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static int ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai, ++ int tristate) ++{ ++ struct intel_ssp_config *ssp_config; ++ struct intel_mid_i2s_settings *i2s_config; ++ ++ ssp_config = cpu_dai->playback_dma_data; ++ ++ BUG_ON(!ssp_config); ++ ++ i2s_config = &(ssp_config->i2s_settings); ++ ++ if (IS_TRISTATE_ENABLED(tristate)) ++ i2s_config->tx_tristate_enable = TXD_TRISTATE_ON; ++ else ++ i2s_config->tx_tristate_enable = TXD_TRISTATE_OFF; ++ ++ if (IS_NEXT_FRMS_ASSERTED_WITH_LSB_PREVIOUS_FRM(tristate)) ++ i2s_config->ssp_frmsync_timing_bit = ++ NEXT_FRMS_ASS_WITH_LSB_PREVIOUS_FRM; ++ else ++ i2s_config->ssp_frmsync_timing_bit = ++ NEXT_FRMS_ASS_AFTER_END_OF_T4; ++ ++ pr_debug("FCT %s tristate %x\n", __func__, tristate); ++ ++ return 0; ++} ++ ++/** ++ * ssp_dai_trigger- stream activities are handled here ++ * This function is called whenever a stream activity is invoked ++ * The Trigger function is called in an atomic context ++ * ++ * @param substream Substream for which the stream function is called ++ * @param cmd The stream command thats requested from upper layer ++ * return status 0 ==> OK ++ * ++ */ ++static int ssp_dai_trigger(struct snd_pcm_substream *substream, ++ int cmd, struct snd_soc_dai *cpu_dai) ++{ ++ int ret_val = 0; ++ struct intel_alsa_ssp_stream_info *str_info; ++ struct snd_pcm_runtime *pl_runtime; ++ struct intel_ssp_info *ssp_info; ++#ifdef _LLI_ENABLED_ ++ struct intel_ssp_config *ssp_config; ++#endif /* _LLI_ENABLED_ */ ++ ++ bool trigger_start = true; ++ int stream = 0; ++ ++ pr_debug("SSP DAI: FCT %s enters\n", ++ __func__); ++ ++ stream = substream->stream; ++ ++ ++ pl_runtime = substream->runtime; ++ ++ WARN(!pl_runtime->private_data, "SSP DAI: ERROR " ++ "NULL pl_runtime->private_data\n"); ++ if (!pl_runtime->private_data) ++ return -EINVAL; ++ ++ WARN(!cpu_dai, "SSP DAI: ERROR NULL cpu_dai\n"); ++ if (!cpu_dai) ++ return -EINVAL; ++ ++ WARN(!cpu_dai->dev, "SSP DAI: ERROR NULL cpu_dai->dev\n"); ++ if (!cpu_dai->dev) ++ return -EINVAL; ++ ++ ssp_info = dev_get_drvdata(cpu_dai->dev); ++ ++ ++ WARN(!ssp_info->ssp_dai_wq, "SSP DAI: ERROR NULL ssp_dai_wq\n"); ++ if (!ssp_info->ssp_dai_wq) ++ return -EINVAL; ++ ++ str_info = pl_runtime->private_data; ++ ++#ifdef _LLI_ENABLED_ ++ ssp_config = str_info->ssp_config; ++ ++ WARN(!ssp_config, "SSP DAI: ERROR NULL ssp_config\n"); ++ if (!ssp_config) ++ return -EINVAL; ++#endif /* _LLI_ENABLED_ */ ++ ++ pr_debug("SSP DAI: FCT %s CMD = 0x%04X\n", ++ __func__, cmd); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ if (!test_and_set_bit(INTEL_ALSA_SSP_STREAM_STARTED, ++ &str_info->stream_status)) { ++#ifndef _LLI_ENABLED_ ++ if (test_bit(INTEL_ALSA_SSP_STREAM_DROPPED, ++ &str_info->stream_status)) { ++ pr_debug("SSP DAI: FCT %s do not restart the trigger stream running already\n", ++ __func__); ++ trigger_start = false; ++ } else ++#endif /* _LLI_ENABLED_ */ ++ trigger_start = true; ++ } else { ++ pr_err("SSP DAI: ERROR 2 consecutive TRIGGER_START\n"); ++ return -EBUSY; ++ } ++ ++ /* Store the substream locally */ ++ if (trigger_start) { ++ if (stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ ++ pr_debug("SSP DAI: queue Playback Work\n"); ++ queue_work(ssp_info->ssp_dai_wq, ++ &str_info->ssp_ws); ++ } else if (stream == SNDRV_PCM_STREAM_CAPTURE) { ++ ++ pr_debug("SSP DAI: queue Capture Work\n"); ++ queue_work(ssp_info->ssp_dai_wq, ++ &str_info->ssp_ws); ++ } else { ++ pr_err("SSP DAI: SNDRV_PCM_TRIGGER_START Bad Stream: %d\n", ++ substream->stream); ++ return -EINVAL; ++ } ++ } ++ break; ++ ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ if (test_and_clear_bit(INTEL_ALSA_SSP_STREAM_STARTED, ++ &str_info->stream_status)) { ++#ifdef _LLI_ENABLED_ ++ intel_mid_i2s_command(ssp_config->i2s_handle, ++ (stream == SNDRV_PCM_STREAM_PLAYBACK) ? ++ SSP_CMD_DISABLE_DMA_TX_INTR : ++ SSP_CMD_DISABLE_DMA_RX_INTR, ++ NULL); ++#else ++ set_bit(INTEL_ALSA_SSP_STREAM_DROPPED, ++ &str_info->stream_status); ++#endif /* _LLI_ENABLED_ */ ++ } else { ++ pr_err("SSP DAI: trigger START/STOP mismatch\n"); ++ return -EBUSY; ++ } ++ break; ++ ++ default: ++ pr_err("SSP DAI: snd_i2s_alsa_pcm_trigger Bad Command\n"); ++ return -EINVAL; ++ } ++ return ret_val; ++} /* ssp_dai_trigger */ ++ ++/** ++ * ssp_dai_hw_params - Allocate memory for Ring Buffer according ++ * to hw_params. ++ * It's called in a non-atomic context ++ * ++ * @param substream Substream for which the stream function is called ++ * @param hw_params Stream command thats requested from upper layer ++ * @param cpu_dai Pointer to the CPU DAI that is used ++ * return status 0 ==> OK ++ * ++ */ ++static int ssp_dai_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *hw_params, ++ struct snd_soc_dai *cpu_dai) ++{ ++ ++ return 0; ++} ++ ++static int ssp_dai_prepare(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *cpu_dai) ++{ ++ struct intel_ssp_config *ssp_config; ++ struct intel_ssp_info *ssp_info; ++ ++ pr_debug("SSP DAI: FCT %s enters\n", ++ __func__); ++ ++ WARN(!cpu_dai, "SSP DAI: ERROR NULL cpu_dai\n"); ++ if (!cpu_dai) ++ return -EINVAL; ++ ++ ssp_info = dev_get_drvdata(cpu_dai->dev); ++ WARN(!ssp_info, "SSP DAI: ERROR NULL ssp_info\n"); ++ if (!ssp_info) ++ return -EINVAL; ++ ++ ssp_config = snd_soc_dai_get_dma_data(cpu_dai, substream); ++ pr_debug("SSP DAI: FCT %s ssp_dai_tx_allocated %d "\ ++ "ssp_dai_rx_allocated %d\n", ++ __func__, ++ ssp_config->ssp_dai_tx_allocated, ++ ssp_config->ssp_dai_rx_allocated); ++ ++ /* ++ * The set HW Config is only once for a CPU DAI ++ */ ++ ++ if (!ssp_config->ssp_dai_tx_allocated && ++ !ssp_config->ssp_dai_rx_allocated) { ++ intel_mid_i2s_command(ssp_config->i2s_handle, ++ SSP_CMD_SET_HW_CONFIG, ++ &(ssp_config->i2s_settings)); ++ } ++ ++ switch (substream->stream) { ++ case SNDRV_PCM_STREAM_PLAYBACK: ++ if (!ssp_config->ssp_dai_tx_allocated) { ++ if (intel_mid_i2s_command(ssp_config->i2s_handle, ++ SSP_CMD_ALLOC_TX, NULL)) { ++ pr_err("can not alloc TX DMA Channel\n"); ++ return -EBUSY; ++ } ++ ssp_config->ssp_dai_tx_allocated = true; ++ } ++ break; ++ ++ case SNDRV_PCM_STREAM_CAPTURE: ++ if (!ssp_config->ssp_dai_rx_allocated) { ++ if (intel_mid_i2s_command(ssp_config->i2s_handle, ++ SSP_CMD_ALLOC_RX, NULL)) { ++ pr_err("can not alloc RX DMA Channel\n"); ++ return -EBUSY; ++ } ++ ssp_config->ssp_dai_rx_allocated = true; ++ } ++ break; ++ ++ default: ++ pr_err("SSP DAI: FCT %s Bad stream_dir: %d\n", ++ __func__, substream->stream); ++ return -EINVAL; ++ } ++ ++#ifndef _LLI_ENABLED_ ++ ssp_config->intel_mid_dma_alloc = true; ++#endif /* _LLI_ENABLED_ */ ++ ++ pr_debug("SSP DAI: FCT %s leaves\n", ++ __func__); ++ ++ return 0; ++} ++ ++ ++ ++/* BT/FM */ ++static struct snd_soc_dai_ops ssp_dai_ops = { ++ .startup = ssp_dai_startup, ++ .shutdown = ssp_dai_shutdown, ++ .trigger = ssp_dai_trigger, ++ .hw_params = ssp_dai_hw_params, ++ .prepare = ssp_dai_prepare, ++ .set_sysclk = ssp_set_dai_sysclk, ++ .set_pll = NULL, ++ .set_fmt = ssp_set_dai_fmt, ++ .set_tdm_slot = ssp_set_dai_tdm_slot, ++ .set_tristate = ssp_set_dai_tristate, ++}; ++ ++#define SSP_SUPPORTED_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | \ ++ SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \ ++ SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) ++ ++#define SSP_SUPPORTED_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ ++ SNDRV_PCM_FMTBIT_U16_LE | \ ++ SNDRV_PCM_FMTBIT_S8 | \ ++ SNDRV_PCM_FMTBIT_U8) ++ ++struct snd_soc_dai_driver intel_ssp_platform_dai[] = { ++{ ++ .name = SSP_MODEM_DAI_NAME, ++ .id = 0, ++ .playback = { ++ .channels_min = 1, ++ .channels_max = 8, ++ .rates = SSP_SUPPORTED_RATES, ++ .formats = SSP_SUPPORTED_FORMATS, ++ }, ++ .capture = { ++ .channels_min = 1, ++ .channels_max = 8, ++ .rates = SSP_SUPPORTED_RATES, ++ .formats = SSP_SUPPORTED_FORMATS, ++ }, ++ .ops = &ssp_dai_ops, ++ .probe = ssp_probe, ++ .remove = ssp_remove, ++}, ++{ ++ .name = SSP_BT_DAI_NAME, ++ .id = 1, ++ .playback = { ++ .channels_min = 1, ++ .channels_max = 8, ++ .rates = SSP_SUPPORTED_RATES, ++ .formats = SSP_SUPPORTED_FORMATS, ++ }, ++ .capture = { ++ .channels_min = 1, ++ .channels_max = 8, ++ .rates = SSP_SUPPORTED_RATES, ++ .formats = SSP_SUPPORTED_FORMATS, ++ }, ++ .ops = &ssp_dai_ops, ++ .probe = ssp_probe, ++ .remove = ssp_remove, ++}, ++}; ++ ++static const struct snd_soc_component_driver ssp_component = { ++ .name = "ssp", ++}; ++ ++static int ssp_dai_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct intel_ssp_info *ssp_info; ++ ++ pr_info("SSP DAI: FCT %s enters\n", ++ __func__); ++ ++ ssp_info = kzalloc(sizeof(struct intel_ssp_info), GFP_KERNEL); ++ ++ if (ssp_info == NULL) { ++ pr_err("Unable to allocate ssp_info\n"); ++ return -ENOMEM; ++ } ++ pr_info("ssp_info address %p", ssp_info); ++ ++ ret = snd_soc_register_platform(&pdev->dev, ++ &soc_ssp_platform_drv); ++ if (ret) { ++ pr_err("registering SSP PLATFORM failed\n"); ++ snd_soc_unregister_component(&pdev->dev); ++ kfree(ssp_info); ++ return -EBUSY; ++ } ++ ++ ret = snd_soc_register_component(&pdev->dev, &ssp_component, ++ intel_ssp_platform_dai, ++ ARRAY_SIZE(intel_ssp_platform_dai)); ++ ++ if (ret) { ++ pr_err("registering cpu DAIs failed\n"); ++ snd_soc_unregister_component(&pdev->dev); ++ kfree(ssp_info); ++ return -EBUSY; ++ } ++ ++ ssp_info->ssp_dai_wq = create_workqueue("ssp_transfer_data"); ++ ++ if (!ssp_info->ssp_dai_wq) { ++ pr_err("work queue failed\n"); ++ snd_soc_unregister_component(&pdev->dev); ++ kfree(ssp_info); ++ return -ENOMEM; ++ } ++ ++ platform_set_drvdata(pdev, ssp_info); ++ ++ pr_info("SSP DAI: FCT %s leaves %d\n", ++ __func__, ret); ++ ++ return ret; ++} ++ ++static int ssp_dai_remove(struct platform_device *pdev) ++{ ++ struct intel_ssp_info *ssp_info = platform_get_drvdata(pdev); ++ ++ pr_debug("SSP DAI: FCT %s enters\n", ++ __func__); ++ ++ if (ssp_info == NULL) { ++ pr_err("Unable to allocate ssp_info\n"); ++ return -ENOMEM; ++ } ++ pr_info("ssp_info address %p", ssp_info); ++ ++ flush_workqueue(ssp_info->ssp_dai_wq); ++ ++ destroy_workqueue(ssp_info->ssp_dai_wq); ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ snd_soc_unregister_component(&pdev->dev); ++ ++ snd_soc_unregister_platform(&pdev->dev); ++ ++ pr_debug("SSP DAI: FCT %s leaves\n", ++ __func__); ++ ++ return 0; ++} ++ ++static struct platform_driver intel_ssp_dai_driver = { ++ .driver = { ++ .name = "mid-ssp-dai", ++ .owner = THIS_MODULE, ++ }, ++ .probe = ssp_dai_probe, ++ .remove = ssp_dai_remove, ++}; ++ ++ ++static int __init ssp_soc_dai_init(void) ++{ ++ pr_info("SSP DAI: FCT %s called\n", ++ __func__); ++ ++ return platform_driver_register(&intel_ssp_dai_driver); ++} ++module_init(ssp_soc_dai_init); ++ ++static void __exit ssp_soc_dai_exit(void) ++{ ++ pr_debug("SSP DAI: FCT %s called\n", ++ __func__); ++ ++ platform_driver_unregister(&intel_ssp_dai_driver); ++ ++} ++module_exit(ssp_soc_dai_exit); ++ ++MODULE_DESCRIPTION("ASoC Intel(R) MID Platform driver"); ++MODULE_AUTHOR("Selma Bensaid"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:ssp-cpu-dai"); +diff --git a/sound/soc/intel/ssp/mid_ssp.h b/sound/soc/intel/ssp/mid_ssp.h +new file mode 100644 +index 0000000..4df4eac +--- /dev/null ++++ b/sound/soc/intel/ssp/mid_ssp.h +@@ -0,0 +1,124 @@ ++/* ++ * mfld_ssp.h - ASoC CPU DAI driver for ++ * ++ * Copyright (C) 2011-12 Intel Corp ++ * Authors: Selma Bensaid ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ */ ++#ifndef MID_SSP_H_ ++#define MID_SSP_H_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define SSP_MODEM_DAI_NAME "ssp-modem-cpu-dai" ++#define SSP_BT_DAI_NAME "ssp-bt-cpu-dai" ++ ++#define SSP_MAX_BUFFER (640*1024) ++#define SSP_MIN_BUFFER (640*1024) ++ ++#define TRISTATE_BIT 0 ++#define FRAME_SYNC_RELATIVE_TIMING_BIT 1 ++#define DUMMY_START_ONE_PERIOD_OFFSET 2 ++#define DUMMY_START_ONE_PERIOD_MASK 0x3 ++ ++#define IS_TRISTATE_ENABLED(x) (x & BIT(TRISTATE_BIT)) ++#define IS_NEXT_FRMS_ASSERTED_WITH_LSB_PREVIOUS_FRM(x) \ ++ ((x & BIT(FRAME_SYNC_RELATIVE_TIMING_BIT)) \ ++ >> FRAME_SYNC_RELATIVE_TIMING_BIT) ++#define IS_DUMMY_START_ONE_PERIOD_OFFSET(x) \ ++ ((x >> DUMMY_START_ONE_PERIOD_OFFSET) \ ++ & DUMMY_START_ONE_PERIOD_MASK) ++ ++#define MID_SSP_RX_FIFO_THRESHOLD 8 ++#define MID_SSP_TX_FIFO_THRESHOLD 7 ++ ++ ++/* data driven FALLING, data sampled RISING, idle LOW */ ++#define SSP_DAI_SCMODE_0 (1 << 4) ++/* data driven RISING, data sampled FALLING, idle LOW */ ++#define SSP_DAI_SCMODE_1 (2 << 4) ++/* data driven RISING, data sampled FALLING, idle HIGH */ ++#define SSP_DAI_SCMODE_2 (3 << 4) ++/* data driven FALLING, data sampled RISING, idle HIGH */ ++#define SSP_DAI_SCMODE_3 (4 << 4) ++ ++ ++/* ++ * Structures Definition ++ */ ++ ++ ++struct intel_ssp_config { ++ struct intel_mid_i2s_hdl *i2s_handle; ++ struct intel_mid_i2s_settings i2s_settings; ++#ifndef _LLI_ENABLED_ ++ bool intel_mid_dma_alloc; ++#endif /* _LLI_ENABLED_ */ ++ bool ssp_dai_tx_allocated; ++ bool ssp_dai_rx_allocated; ++}; ++ ++struct intel_ssp_info { ++ struct workqueue_struct *ssp_dai_wq; ++}; ++ ++struct intel_alsa_ssp_stream_info { ++ struct snd_pcm_substream *substream; ++ struct work_struct ssp_ws; ++ struct intel_ssp_config *ssp_config; ++ unsigned long stream_status; ++ u32 period_req_index; ++ s32 period_cb_index; ++ u8 *addr; ++ int length; ++}; ++ ++ ++/* ++ * Enum Definition ++ */ ++ ++enum intel_alsa_ssp_stream_status { ++ INTEL_ALSA_SSP_STREAM_INIT = 0, ++ INTEL_ALSA_SSP_STREAM_STARTED, ++ INTEL_ALSA_SSP_STREAM_RUNNING, ++ INTEL_ALSA_SSP_STREAM_PAUSED, ++ INTEL_ALSA_SSP_STREAM_DROPPED, ++}; ++enum ssp_clk_def { ++ SSP_CLK_ONCHIP = 0x0, ++ SSP_CLK_NET, ++ SSP_CLK_EXT, ++ SSP_CLK_AUDIO ++}; ++ ++ ++#endif /* MID_SSP_H_ */ +diff --git a/sound/soc/intel/sst/Makefile b/sound/soc/intel/sst/Makefile +new file mode 100644 +index 0000000..8b620d0 +--- /dev/null ++++ b/sound/soc/intel/sst/Makefile +@@ -0,0 +1,13 @@ ++# Makefile for SST Audio driver ++snd-intel-sst-objs := sst.o sst_ipc.o sst_stream.o sst_drv_interface.o sst_dsp.o sst_pvt.o sst_app_interface.o sst_acpi.o ++ ++ifdef CONFIG_DEBUG_FS ++ snd-intel-sst-objs += sst_debug.o ++endif ++ ++obj-$(CONFIG_SND_INTEL_SST) += snd-intel-sst.o ++ ++ ++CFLAGS_snd-intel-sst.o = -I$(src) ++ ++ccflags-y += -DMRFLD_WORD_WA -Werror +diff --git a/sound/soc/intel/sst/sst.c b/sound/soc/intel/sst/sst.c +new file mode 100644 +index 0000000..0f59e47 +--- /dev/null ++++ b/sound/soc/intel/sst/sst.c +@@ -0,0 +1,1255 @@ ++/* ++ * sst.c - Intel SST Driver for audio engine ++ * ++ * Copyright (C) 2008-10 Intel Corp ++ * Authors: Vinod Koul ++ * Harsha Priya ++ * Dharageswari R ++ * KP Jeeja ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This driver enumerates the SST audio engine as a PCI or ACPI device and ++ * provides interface to the platform driver to interact with the SST audio ++ * Firmware. ++ * ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../sst_platform.h" ++#include "../platform_ipc_v2.h" ++#include "sst.h" ++ ++#define CREATE_TRACE_POINTS ++#include "sst_trace.h" ++ ++MODULE_AUTHOR("Vinod Koul "); ++MODULE_AUTHOR("Harsha Priya "); ++MODULE_AUTHOR("Dharageswari R "); ++MODULE_AUTHOR("KP Jeeja "); ++MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine Driver"); ++MODULE_LICENSE("GPL v2"); ++MODULE_VERSION(SST_DRIVER_VERSION); ++ ++struct intel_sst_drv *sst_drv_ctx; ++static struct mutex drv_ctx_lock; ++ ++/* ++ * * ioctl32 compat ++ * */ ++#ifdef CONFIG_COMPAT ++#include "sst_app_compat_interface.c" ++#else ++#define intel_sst_ioctl_compat NULL ++#endif ++ ++static const struct file_operations intel_sst_fops_cntrl = { ++ .owner = THIS_MODULE, ++ .open = intel_sst_open_cntrl, ++ .release = intel_sst_release_cntrl, ++ .unlocked_ioctl = intel_sst_ioctl, ++ .compat_ioctl = intel_sst_ioctl_compat, ++}; ++ ++struct miscdevice lpe_ctrl = { ++ .minor = MISC_DYNAMIC_MINOR,/* dynamic allocation */ ++ .name = "intel_sst_ctrl",/* /dev/intel_sst_ctrl */ ++ .fops = &intel_sst_fops_cntrl ++}; ++ ++static inline void set_imr_interrupts(struct intel_sst_drv *ctx, bool enable) ++{ ++ union interrupt_reg imr; ++ ++ spin_lock(&ctx->ipc_spin_lock); ++ imr.full = sst_shim_read(ctx->shim, SST_IMRX); ++ if (enable) { ++ imr.part.done_interrupt = 0; ++ imr.part.busy_interrupt = 0; ++ } else { ++ imr.part.done_interrupt = 1; ++ imr.part.busy_interrupt = 1; ++ } ++ sst_shim_write(ctx->shim, SST_IMRX, imr.full); ++ spin_unlock(&ctx->ipc_spin_lock); ++} ++ ++#define SST_IS_PROCESS_REPLY(header) ((header & PROCESS_MSG) ? true : false) ++#define SST_VALIDATE_MAILBOX_SIZE(size) ((size <= SST_MAILBOX_SIZE) ? true : false) ++ ++static irqreturn_t intel_sst_interrupt_mrfld(int irq, void *context) ++{ ++ union interrupt_reg_mrfld isr; ++ union ipc_header_mrfld header; ++ union sst_imr_reg_mrfld imr; ++ struct ipc_post *msg = NULL; ++ unsigned int size = 0; ++ struct intel_sst_drv *drv = (struct intel_sst_drv *) context; ++ irqreturn_t retval = IRQ_HANDLED; ++ ++ /* Interrupt arrived, check src */ ++ isr.full = sst_shim_read64(drv->shim, SST_ISRX); ++ if (isr.part.done_interrupt) { ++ /* Clear done bit */ ++ spin_lock(&drv->ipc_spin_lock); ++ header.full = sst_shim_read64(drv->shim, ++ drv->ipc_reg.ipcx); ++ header.p.header_high.part.done = 0; ++ sst_shim_write64(drv->shim, drv->ipc_reg.ipcx, header.full); ++ /* write 1 to clear status register */; ++ isr.part.done_interrupt = 1; ++ sst_shim_write64(drv->shim, SST_ISRX, isr.full); ++ spin_unlock(&drv->ipc_spin_lock); ++ trace_sst_ipc("ACK <-", header.p.header_high.full, ++ header.p.header_low_payload, ++ header.p.header_high.part.drv_id); ++ queue_work(drv->post_msg_wq, &drv->ipc_post_msg.wq); ++ retval = IRQ_HANDLED; ++ } ++ if (isr.part.busy_interrupt) { ++ spin_lock(&drv->ipc_spin_lock); ++ imr.full = sst_shim_read64(drv->shim, SST_IMRX); ++ imr.part.busy_interrupt = 1; ++ sst_shim_write64(drv->shim, SST_IMRX, imr.full); ++ spin_unlock(&drv->ipc_spin_lock); ++ header.full = sst_shim_read64(drv->shim, drv->ipc_reg.ipcd); ++ if (sst_create_ipc_msg(&msg, header.p.header_high.part.large)) { ++ pr_err("No memory available\n"); ++ drv->ops->clear_interrupt(); ++ return IRQ_HANDLED; ++ } ++ if (header.p.header_high.part.large) { ++ size = header.p.header_low_payload; ++ if (SST_VALIDATE_MAILBOX_SIZE(size)) { ++ memcpy_fromio(msg->mailbox_data, ++ drv->mailbox + drv->mailbox_recv_offset, size); ++ } else { ++ pr_err("Mailbox not copied, payload siz is: %u\n", size); ++ header.p.header_low_payload = 0; ++ } ++ } ++ msg->mrfld_header = header; ++ msg->is_process_reply = ++ SST_IS_PROCESS_REPLY(header.p.header_high.part.msg_id); ++ trace_sst_ipc("REPLY <-", msg->mrfld_header.p.header_high.full, ++ msg->mrfld_header.p.header_low_payload, ++ msg->mrfld_header.p.header_high.part.drv_id); ++ spin_lock(&drv->rx_msg_lock); ++ list_add_tail(&msg->node, &drv->rx_list); ++ spin_unlock(&drv->rx_msg_lock); ++ drv->ops->clear_interrupt(); ++ retval = IRQ_WAKE_THREAD; ++ } ++ return retval; ++} ++ ++static irqreturn_t intel_sst_irq_thread_mfld(int irq, void *context) ++{ ++ struct intel_sst_drv *drv = (struct intel_sst_drv *) context; ++ struct ipc_post *__msg, *msg = NULL; ++ unsigned long irq_flags; ++ ++ if (list_empty(&drv->rx_list)) ++ return IRQ_HANDLED; ++ ++ spin_lock_irqsave(&drv->rx_msg_lock, irq_flags); ++ list_for_each_entry_safe(msg, __msg, &drv->rx_list, node) { ++ ++ list_del(&msg->node); ++ spin_unlock_irqrestore(&drv->rx_msg_lock, irq_flags); ++ if (msg->is_process_reply) ++ drv->ops->process_message(msg); ++ else ++ drv->ops->process_reply(msg); ++ ++ if (msg->is_large) ++ kfree(msg->mailbox_data); ++ kfree(msg); ++ spin_lock_irqsave(&drv->rx_msg_lock, irq_flags); ++ } ++ spin_unlock_irqrestore(&drv->rx_msg_lock, irq_flags); ++ return IRQ_HANDLED; ++} ++/** ++* intel_sst_interrupt - Interrupt service routine for SST ++* ++* @irq: irq number of interrupt ++* @context: pointer to device structre ++* ++* This function is called by OS when SST device raises ++* an interrupt. This will be result of write in IPC register ++* Source can be busy or done interrupt ++*/ ++static irqreturn_t intel_sst_intr_mfld(int irq, void *context) ++{ ++ union interrupt_reg isr; ++ union ipc_header header; ++ irqreturn_t retval = IRQ_HANDLED; ++ struct ipc_post *msg = NULL; ++ unsigned int size = 0; ++ struct intel_sst_drv *drv = (struct intel_sst_drv *) context; ++ ++ /* Interrupt arrived, check src */ ++ isr.full = sst_shim_read(drv->shim, SST_ISRX); ++ if (isr.part.done_interrupt) { ++ /* Mask all interrupts till this one is processsed */ ++ set_imr_interrupts(drv, false); ++ /* Clear done bit */ ++ spin_lock(&drv->ipc_spin_lock); ++ header.full = sst_shim_read(drv->shim, drv->ipc_reg.ipcx); ++ header.part.done = 0; ++ sst_shim_write(drv->shim, drv->ipc_reg.ipcx, header.full); ++ /* write 1 to clear status register */; ++ isr.part.done_interrupt = 1; ++ sst_shim_write(drv->shim, SST_ISRX, isr.full); ++ spin_unlock(&drv->ipc_spin_lock); ++ queue_work(drv->post_msg_wq, &sst_drv_ctx->ipc_post_msg.wq); ++ ++ /* Un mask done and busy intr */ ++ set_imr_interrupts(drv, true); ++ retval = IRQ_HANDLED; ++ } ++ if (isr.part.busy_interrupt) { ++ /* Mask all interrupts till we process it in bottom half */ ++ set_imr_interrupts(drv, false); ++ header.full = sst_shim_read(drv->shim, drv->ipc_reg.ipcd); ++ if (sst_create_ipc_msg(&msg, header.part.large)) { ++ pr_err("No memory available\n"); ++ drv->ops->clear_interrupt(); ++ return IRQ_HANDLED; ++ } ++ if (header.part.large) { ++ size = header.part.data; ++ if (SST_VALIDATE_MAILBOX_SIZE(size)) { ++ memcpy_fromio(msg->mailbox_data, ++ drv->mailbox + drv->mailbox_recv_offset + 4, size); ++ } else { ++ pr_err("Mailbox not copied, payload siz is: %u\n", size); ++ header.part.data = 0; ++ } ++ } ++ msg->header = header; ++ msg->is_process_reply = ++ SST_IS_PROCESS_REPLY(msg->header.part.msg_id); ++ spin_lock(&drv->rx_msg_lock); ++ list_add_tail(&msg->node, &drv->rx_list); ++ spin_unlock(&drv->rx_msg_lock); ++ drv->ops->clear_interrupt(); ++ retval = IRQ_WAKE_THREAD; ++ } ++ return retval; ++} ++ ++static int sst_save_dsp_context_v2(struct intel_sst_drv *sst) ++{ ++ unsigned int pvt_id; ++ struct ipc_post *msg = NULL; ++ struct ipc_dsp_hdr dsp_hdr; ++ struct sst_block *block; ++ ++ /*send msg to fw*/ ++ pvt_id = sst_assign_pvt_id(sst); ++ if (sst_create_block_and_ipc_msg(&msg, true, sst, &block, ++ IPC_CMD, pvt_id)) { ++ pr_err("msg/block alloc failed. Not proceeding with context save\n"); ++ return 0; ++ } ++ ++ sst_fill_header_mrfld(&msg->mrfld_header, IPC_CMD, ++ SST_TASK_ID_MEDIA, 1, pvt_id); ++ msg->mrfld_header.p.header_low_payload = sizeof(dsp_hdr); ++ msg->mrfld_header.p.header_high.part.res_rqd = 1; ++ sst_fill_header_dsp(&dsp_hdr, IPC_PREP_D3, PIPE_RSVD, pvt_id); ++ memcpy(msg->mailbox_data, &dsp_hdr, sizeof(dsp_hdr)); ++ ++ sst_add_to_dispatch_list_and_post(sst, msg); ++ /*wait for reply*/ ++ if (sst_wait_timeout(sst, block)) { ++ pr_err("sst: err fw context save timeout ...\n"); ++ pr_err("not suspending FW!!!"); ++ sst_free_block(sst, block); ++ return -EIO; ++ } ++ if (block->ret_code) { ++ pr_err("fw responded w/ error %d", block->ret_code); ++ sst_free_block(sst, block); ++ return -EIO; ++ } ++ ++ sst_free_block(sst, block); ++ return 0; ++} ++ ++static int sst_save_dsp_context(struct intel_sst_drv *sst) ++{ ++ struct snd_sst_ctxt_params fw_context; ++ unsigned int pvt_id; ++ struct ipc_post *msg = NULL; ++ struct sst_block *block; ++ pr_debug("%s: Enter\n", __func__); ++ ++ /*send msg to fw*/ ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ if (sst_create_block_and_ipc_msg(&msg, true, sst_drv_ctx, &block, ++ IPC_IA_GET_FW_CTXT, pvt_id)) { ++ pr_err("msg/block alloc failed. Not proceeding with context save\n"); ++ return -ENOMEM; ++ } ++ sst_fill_header(&msg->header, IPC_IA_GET_FW_CTXT, 1, pvt_id); ++ msg->header.part.data = sizeof(fw_context) + sizeof(u32); ++ fw_context.address = virt_to_phys((void *)sst_drv_ctx->fw_cntx); ++ fw_context.size = FW_CONTEXT_MEM; ++ memcpy(msg->mailbox_data, &msg->header, sizeof(u32)); ++ memcpy(msg->mailbox_data + sizeof(u32), ++ &fw_context, sizeof(fw_context)); ++ sst_add_to_dispatch_list_and_post(sst, msg); ++ /*wait for reply*/ ++ if (sst_wait_timeout(sst_drv_ctx, block)) ++ pr_err("sst: err fw context save timeout ...\n"); ++ pr_debug("fw context saved ...\n"); ++ if (block->ret_code) ++ sst_drv_ctx->fw_cntx_size = 0; ++ else ++ sst_drv_ctx->fw_cntx_size = *sst_drv_ctx->fw_cntx; ++ pr_debug("fw copied data %x\n", sst_drv_ctx->fw_cntx_size); ++ sst_free_block(sst_drv_ctx, block); ++ return 0; ++} ++ ++static struct intel_sst_ops mrfld_ops = { ++ .interrupt = intel_sst_interrupt_mrfld, ++ .irq_thread = intel_sst_irq_thread_mfld, ++ .clear_interrupt = intel_sst_clear_intr_mrfld, ++ .start = sst_start_mrfld, ++ .reset = intel_sst_reset_dsp_mrfld, ++ .post_message = sst_post_message_mrfld, ++ .sync_post_message = sst_sync_post_message_mrfld, ++ .process_message = sst_process_message_mrfld, ++ .process_reply = sst_process_reply_mrfld, ++ .save_dsp_context = sst_save_dsp_context_v2, ++ .alloc_stream = sst_alloc_stream_mrfld, ++ .post_download = sst_post_download_mrfld, ++ .do_recovery = sst_do_recovery_mrfld, ++}; ++ ++static struct intel_sst_ops mrfld_32_ops = { ++ .interrupt = intel_sst_intr_mfld, ++ .irq_thread = intel_sst_irq_thread_mfld, ++ .clear_interrupt = intel_sst_clear_intr_mfld, ++ .start = sst_start_mrfld, ++ .reset = intel_sst_reset_dsp_mrfld, ++ .post_message = sst_post_message_mfld, ++ .sync_post_message = sst_sync_post_message_mfld, ++ .process_message = sst_process_message_mfld, ++ .process_reply = sst_process_reply_mfld, ++ .save_dsp_context = sst_save_dsp_context, ++ .restore_dsp_context = sst_restore_fw_context, ++ .alloc_stream = sst_alloc_stream_ctp, ++ .post_download = sst_post_download_byt, ++ .do_recovery = sst_do_recovery, ++}; ++ ++static struct intel_sst_ops ctp_ops = { ++ .interrupt = intel_sst_intr_mfld, ++ .irq_thread = intel_sst_irq_thread_mfld, ++ .clear_interrupt = intel_sst_clear_intr_mfld, ++ .start = sst_start_mfld, ++ .reset = intel_sst_reset_dsp_mfld, ++ .post_message = sst_post_message_mfld, ++ .sync_post_message = sst_sync_post_message_mfld, ++ .process_message = sst_process_message_mfld, ++ .process_reply = sst_process_reply_mfld, ++ .set_bypass = intel_sst_set_bypass_mfld, ++ .save_dsp_context = sst_save_dsp_context, ++ .restore_dsp_context = sst_restore_fw_context, ++ .alloc_stream = sst_alloc_stream_ctp, ++ .post_download = sst_post_download_ctp, ++ .do_recovery = sst_do_recovery, ++}; ++ ++int sst_driver_ops(struct intel_sst_drv *sst) ++{ ++ ++ switch (sst->pci_id) { ++ case SST_MRFLD_PCI_ID: ++ sst->tstamp = SST_TIME_STAMP_MRFLD; ++ sst->ops = &mrfld_ops; ++ return 0; ++ case SST_BYT_PCI_ID: ++ sst->tstamp = SST_TIME_STAMP_BYT; ++ sst->ops = &mrfld_32_ops; ++ return 0; ++ case SST_CLV_PCI_ID: ++ sst->tstamp = SST_TIME_STAMP; ++ sst->ops = &ctp_ops; ++ return 0; ++ default: ++ pr_err("SST Driver capablities missing for pci_id: %x", sst->pci_id); ++ return -EINVAL; ++ }; ++} ++ ++int sst_alloc_drv_context(struct device *dev) ++{ ++ struct intel_sst_drv *ctx; ++ mutex_lock(&drv_ctx_lock); ++ if (sst_drv_ctx) { ++ pr_err("Only one sst handle is supported\n"); ++ mutex_unlock(&drv_ctx_lock); ++ return -EBUSY; ++ } ++ pr_debug("%s: %d", __func__, __LINE__); ++ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); ++ if (!ctx) { ++ pr_err("malloc fail\n"); ++ mutex_unlock(&drv_ctx_lock); ++ return -ENOMEM; ++ } ++ sst_drv_ctx = ctx; ++ mutex_unlock(&drv_ctx_lock); ++ return 0; ++} ++ ++static ssize_t sst_sysfs_get_recovery(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct intel_sst_drv *ctx = dev_get_drvdata(dev); ++ ++ return sprintf(buf, "%d\n", ctx->sst_state); ++} ++ ++ ++static ssize_t sst_sysfs_set_recovery(struct device *dev, ++ struct device_attribute *attr, const char *buf, size_t len) ++{ ++ long val; ++ struct intel_sst_drv *ctx = dev_get_drvdata(dev); ++ ++ if (kstrtol(buf, 0, &val)) ++ return -EINVAL; ++ ++ if (val == 1) { ++ if (!atomic_read(&ctx->pm_usage_count)) { ++ pr_debug("%s: set sst state to uninit...\n", __func__); ++ sst_set_fw_state_locked(ctx, SST_UN_INIT); ++ } else { ++ pr_err("%s: not setting sst state... %d\n", __func__, ++ atomic_read(&ctx->pm_usage_count)); ++ pr_err("Unrecoverable state....\n"); ++ BUG(); ++ return -EPERM; ++ } ++ } ++ ++ return len; ++} ++ ++static DEVICE_ATTR(audio_recovery, S_IRUGO | S_IWUSR, ++ sst_sysfs_get_recovery, sst_sysfs_set_recovery); ++ ++int sst_request_firmware_async(struct intel_sst_drv *ctx) ++{ ++ int ret = 0; ++ ++ snprintf(ctx->firmware_name, sizeof(ctx->firmware_name), ++ "%s%04x%s", "fw_sst_", ++ ctx->pci_id, ".bin"); ++ pr_debug("Requesting FW %s now...\n", ctx->firmware_name); ++ ++ trace_sst_fw_download("Request firmware async", ctx->sst_state); ++ ++ ret = request_firmware_nowait(THIS_MODULE, 1, ctx->firmware_name, ++ ctx->dev, GFP_KERNEL, ctx, sst_firmware_load_cb); ++ if (ret) ++ pr_err("could not load firmware %s error %d\n", ctx->firmware_name, ret); ++ ++ return ret; ++} ++/* ++* intel_sst_probe - PCI probe function ++* ++* @pci: PCI device structure ++* @pci_id: PCI device ID structure ++* ++* This function is called by OS when a device is found ++* This enables the device, interrupt etc ++*/ ++static int intel_sst_probe(struct pci_dev *pci, ++ const struct pci_device_id *pci_id) ++{ ++ int i, ret = 0; ++ struct intel_sst_ops *ops; ++ struct sst_platform_info *sst_pdata = pci->dev.platform_data; ++ int ddr_base; ++ u32 ssp_base_add; ++ u32 dma_base_add; ++ u32 len; ++ ++ ++ ++ pr_debug("Probe for DID %x\n", pci->device); ++ ret = sst_alloc_drv_context(&pci->dev); ++ if (ret) ++ return ret; ++ ++ sst_drv_ctx->dev = &pci->dev; ++ sst_drv_ctx->pci_id = pci->device; ++ if (!sst_pdata) ++ return -EINVAL; ++ sst_drv_ctx->pdata = sst_pdata; ++ ++ if (!sst_drv_ctx->pdata->probe_data) ++ return -EINVAL; ++ memcpy(&sst_drv_ctx->info, sst_drv_ctx->pdata->probe_data, ++ sizeof(sst_drv_ctx->info)); ++ ++ sst_drv_ctx->use_32bit_ops = sst_drv_ctx->pdata->ipc_info->use_32bit_ops; ++ sst_drv_ctx->mailbox_recv_offset = sst_drv_ctx->pdata->ipc_info->mbox_recv_off; ++ ++ if (0 != sst_driver_ops(sst_drv_ctx)) ++ return -EINVAL; ++ ops = sst_drv_ctx->ops; ++ mutex_init(&sst_drv_ctx->stream_lock); ++ mutex_init(&sst_drv_ctx->sst_lock); ++ mutex_init(&sst_drv_ctx->mixer_ctrl_lock); ++ mutex_init(&sst_drv_ctx->csr_lock); ++ ++ sst_drv_ctx->stream_cnt = 0; ++ sst_drv_ctx->fw_in_mem = NULL; ++ sst_drv_ctx->vcache.file1_in_mem = NULL; ++ sst_drv_ctx->vcache.file2_in_mem = NULL; ++ sst_drv_ctx->vcache.size1 = 0; ++ sst_drv_ctx->vcache.size2 = 0; ++ ++ /* we don't use dma, so set to 0*/ ++ sst_drv_ctx->use_dma = 0; //1; ++ sst_drv_ctx->use_lli = 1; ++ ++ INIT_LIST_HEAD(&sst_drv_ctx->memcpy_list); ++ INIT_LIST_HEAD(&sst_drv_ctx->libmemcpy_list); ++ ++ INIT_LIST_HEAD(&sst_drv_ctx->ipc_dispatch_list); ++ INIT_LIST_HEAD(&sst_drv_ctx->block_list); ++ INIT_LIST_HEAD(&sst_drv_ctx->rx_list); ++ INIT_WORK(&sst_drv_ctx->ipc_post_msg.wq, ops->post_message); ++ init_waitqueue_head(&sst_drv_ctx->wait_queue); ++ ++ sst_drv_ctx->mad_wq = create_singlethread_workqueue("sst_mad_wq"); ++ if (!sst_drv_ctx->mad_wq) ++ goto do_free_drv_ctx; ++ sst_drv_ctx->post_msg_wq = ++ create_singlethread_workqueue("sst_post_msg_wq"); ++ if (!sst_drv_ctx->post_msg_wq) ++ goto free_mad_wq; ++ ++ spin_lock_init(&sst_drv_ctx->ipc_spin_lock); ++ spin_lock_init(&sst_drv_ctx->block_lock); ++ spin_lock_init(&sst_drv_ctx->pvt_id_lock); ++ spin_lock_init(&sst_drv_ctx->rx_msg_lock); ++ ++ sst_drv_ctx->ipc_reg.ipcx = SST_IPCX + sst_drv_ctx->pdata->ipc_info->ipc_offset; ++ sst_drv_ctx->ipc_reg.ipcd = SST_IPCD + sst_drv_ctx->pdata->ipc_info->ipc_offset; ++ pr_debug("ipcx 0x%x ipxd 0x%x", sst_drv_ctx->ipc_reg.ipcx, ++ sst_drv_ctx->ipc_reg.ipcd); ++ ++ pr_info("Got drv data max stream %d\n", ++ sst_drv_ctx->info.max_streams); ++ for (i = 1; i <= sst_drv_ctx->info.max_streams; i++) { ++ struct stream_info *stream = &sst_drv_ctx->streams[i]; ++ memset(stream, 0, sizeof(*stream)); ++ stream->pipe_id = PIPE_RSVD; ++ mutex_init(&stream->lock); ++ } ++ ++ ret = sst_request_firmware_async(sst_drv_ctx); ++ if (ret) { ++ pr_err("Firmware download failed:%d\n", ret); ++ goto do_free_mem; ++ } ++ /* Init the device */ ++ ret = pci_enable_device(pci); ++ if (ret) { ++ pr_err("device can't be enabled\n"); ++ goto do_free_mem; ++ } ++ sst_drv_ctx->pci = pci_dev_get(pci); ++ ret = pci_request_regions(pci, SST_DRV_NAME); ++ if (ret) ++ goto do_disable_device; ++ /* map registers */ ++ /* SST Shim */ ++ ++ if (sst_drv_ctx->pci_id == SST_MRFLD_PCI_ID) { ++ sst_drv_ctx->ddr_base = pci_resource_start(pci, 0); ++ /* ++ * check that the relocated IMR base matches with FW Binary ++ * put temporary check till better soln is available for FW ++ */ ++ ddr_base = relocate_imr_addr_mrfld(sst_drv_ctx->ddr_base); ++ if (!sst_drv_ctx->pdata->lib_info) { ++ pr_err("%s:lib_info pointer NULL\n", __func__); ++ ret = -EINVAL; ++ goto do_release_regions; ++ } ++ if (ddr_base != sst_drv_ctx->pdata->lib_info->mod_base) { ++ pr_err("FW LSP DDR BASE does not match with IFWI\n"); ++ ret = -EINVAL; ++ goto do_release_regions; ++ } ++ sst_drv_ctx->ddr_end = pci_resource_end(pci, 0); ++ ++ sst_drv_ctx->ddr = pci_ioremap_bar(pci, 0); ++ if (!sst_drv_ctx->ddr) ++ goto do_unmap_ddr; ++ pr_debug("sst: DDR Ptr %p\n", sst_drv_ctx->ddr); ++ } else { ++ sst_drv_ctx->ddr = NULL; ++ } ++ ++ /* SHIM */ ++ sst_drv_ctx->shim_phy_add = pci_resource_start(pci, 1); ++ sst_drv_ctx->shim = pci_ioremap_bar(pci, 1); ++ if (!sst_drv_ctx->shim) ++ goto do_release_regions; ++ pr_debug("SST Shim Ptr %p\n", sst_drv_ctx->shim); ++ ++ /* Shared SRAM */ ++ sst_drv_ctx->mailbox_add = pci_resource_start(pci, 2); ++ sst_drv_ctx->mailbox = pci_ioremap_bar(pci, 2); ++ if (!sst_drv_ctx->mailbox) ++ goto do_unmap_shim; ++ pr_debug("SRAM Ptr %p\n", sst_drv_ctx->mailbox); ++ ++ /* IRAM */ ++ sst_drv_ctx->iram_end = pci_resource_end(pci, 3); ++ sst_drv_ctx->iram_base = pci_resource_start(pci, 3); ++ sst_drv_ctx->iram = pci_ioremap_bar(pci, 3); ++ if (!sst_drv_ctx->iram) ++ goto do_unmap_sram; ++ pr_debug("IRAM Ptr %p\n", sst_drv_ctx->iram); ++ ++ /* DRAM */ ++ sst_drv_ctx->dram_end = pci_resource_end(pci, 4); ++ sst_drv_ctx->dram_base = pci_resource_start(pci, 4); ++ sst_drv_ctx->dram = pci_ioremap_bar(pci, 4); ++ if (!sst_drv_ctx->dram) ++ goto do_unmap_iram; ++ pr_debug("DRAM Ptr %p\n", sst_drv_ctx->dram); ++ ++ if ((sst_pdata->pdata != NULL) && ++ (sst_pdata->debugfs_data != NULL)) { ++ if (sst_pdata->ssp_data != NULL) { ++ /* SSP Register */ ++ ssp_base_add = sst_pdata->ssp_data->base_add; ++ len = sst_pdata->debugfs_data->ssp_reg_size; ++ for (i = 0; i < sst_pdata->debugfs_data->num_ssp; i++) { ++ sst_drv_ctx->debugfs.ssp[i] = ++ devm_ioremap(&pci->dev, ++ ssp_base_add + (len * i), len); ++ if (!sst_drv_ctx->debugfs.ssp[i]) { ++ pr_warn("ssp ioremap failed\n"); ++ continue; ++ } ++ ++ pr_debug("\n ssp io 0x%p ssp 0x%x size 0x%x", ++ sst_drv_ctx->debugfs.ssp[i], ++ ssp_base_add, len); ++ } ++ } ++ ++ /* DMA Register */ ++ dma_base_add = sst_pdata->pdata->sst_dma_base[0]; ++ len = sst_pdata->debugfs_data->dma_reg_size; ++ for (i = 0; i < sst_pdata->debugfs_data->num_dma; i++) { ++ sst_drv_ctx->debugfs.dma_reg[i] = ++ devm_ioremap(&pci->dev, ++ dma_base_add + (len * i), len); ++ if (!sst_drv_ctx->debugfs.dma_reg[i]) { ++ pr_warn("dma ioremap failed\n"); ++ continue; ++ } ++ ++ pr_debug("\n dma io 0x%p ssp 0x%x size 0x%x", ++ sst_drv_ctx->debugfs.dma_reg[i], ++ dma_base_add, len); ++ } ++ } ++ ++ /* Do not access iram/dram etc before LPE is reset */ ++ ++ sst_drv_ctx->dump_buf.iram_buf.size = pci_resource_len(pci, 3); ++ sst_drv_ctx->dump_buf.iram_buf.buf = kzalloc(sst_drv_ctx->dump_buf.iram_buf.size, ++ GFP_KERNEL); ++ if (!sst_drv_ctx->dump_buf.iram_buf.buf) { ++ pr_err("%s: no memory\n", __func__); ++ ret = -ENOMEM; ++ goto do_unmap_dram; ++ } ++ ++ sst_drv_ctx->dump_buf.dram_buf.size = pci_resource_len(pci, 4); ++ sst_drv_ctx->dump_buf.dram_buf.buf = kzalloc(sst_drv_ctx->dump_buf.dram_buf.size, ++ GFP_KERNEL); ++ if (!sst_drv_ctx->dump_buf.dram_buf.buf) { ++ pr_err("%s: no memory\n", __func__); ++ ret = -ENOMEM; ++ goto do_free_iram_buf; ++ } ++ ++ pr_debug("\niram len 0x%x dram len 0x%x", ++ sst_drv_ctx->dump_buf.iram_buf.size, ++ sst_drv_ctx->dump_buf.dram_buf.size); ++ ++ if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) { ++ sst_drv_ctx->probe_bytes = kzalloc(SST_MAX_BIN_BYTES, GFP_KERNEL); ++ if (!sst_drv_ctx->probe_bytes) { ++ pr_err("%s: no memory\n", __func__); ++ ret = -ENOMEM; ++ goto do_free_dram_buf; ++ } ++ } ++ ++ sst_set_fw_state_locked(sst_drv_ctx, SST_UN_INIT); ++ sst_drv_ctx->irq_num = pci->irq; ++ /* Register the ISR */ ++ ret = request_threaded_irq(pci->irq, sst_drv_ctx->ops->interrupt, ++ sst_drv_ctx->ops->irq_thread, 0, SST_DRV_NAME, ++ sst_drv_ctx); ++ if (ret) ++ goto do_free_probe_bytes; ++ pr_debug("Registered IRQ 0x%x\n", pci->irq); ++ ++ /*Register LPE Control as misc driver*/ ++ ret = misc_register(&lpe_ctrl); ++ if (ret) { ++ pr_err("couldn't register control device\n"); ++ goto do_free_irq; ++ } ++ /* default intr are unmasked so set this as masked */ ++ if (sst_drv_ctx->pci_id == SST_MRFLD_PCI_ID) ++ sst_shim_write64(sst_drv_ctx->shim, SST_IMRX, 0xFFFF0038); ++ ++ if (sst_drv_ctx->use_32bit_ops) { ++ pr_debug("allocate mem for context save/restore\n "); ++ /*allocate mem for fw context save during suspend*/ ++ sst_drv_ctx->fw_cntx = kzalloc(FW_CONTEXT_MEM, GFP_KERNEL); ++ if (!sst_drv_ctx->fw_cntx) { ++ ret = -ENOMEM; ++ goto do_free_misc; ++ } ++ /*setting zero as that is valid mem to restore*/ ++ sst_drv_ctx->fw_cntx_size = 0; ++ } ++ if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) { ++ u32 csr; ++ u32 csr2; ++ u32 clkctl; ++ ++ /*set lpe start clock and ram size*/ ++ csr = sst_shim_read(sst_drv_ctx->shim, SST_CSR); ++ csr |= 0x30000; ++ /*make sure clksel set to OSC for SSP0,1 (default)*/ ++ csr &= 0xFFFFFFF3; ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr); ++ ++ /*set clock output enable for SSP0,1,3*/ ++ clkctl = sst_shim_read(sst_drv_ctx->shim, SST_CLKCTL); ++ if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) ++ clkctl |= (0x7 << 16); ++ else ++ clkctl |= ((1<<16)|(1<<17)); ++ sst_shim_write(sst_drv_ctx->shim, SST_CLKCTL, clkctl); ++ ++ /* set SSP0 & SSP1 disable DMA Finish*/ ++ csr2 = sst_shim_read(sst_drv_ctx->shim, SST_CSR2); ++ /*set SSP3 disable DMA finsh for SSSP3 */ ++ csr2 |= BIT(1)|BIT(2); ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR2, csr2); ++ } ++ if (sst_drv_ctx->pdata->ssp_data) { ++ if (sst_drv_ctx->pdata->ssp_data->gpio_in_use) ++ sst_set_gpio_conf(&sst_drv_ctx->pdata->ssp_data->gpio); ++ } ++ pci_set_drvdata(pci, sst_drv_ctx); ++ pm_runtime_allow(sst_drv_ctx->dev); ++ pm_runtime_put_noidle(sst_drv_ctx->dev); ++ register_sst(sst_drv_ctx->dev); ++ sst_debugfs_init(sst_drv_ctx); ++ sst_drv_ctx->qos = kzalloc(sizeof(struct pm_qos_request), ++ GFP_KERNEL); ++ if (!sst_drv_ctx->qos) ++ goto do_free_misc; ++ pm_qos_add_request(sst_drv_ctx->qos, PM_QOS_CPU_DMA_LATENCY, ++ PM_QOS_DEFAULT_VALUE); ++ ++ ret = device_create_file(sst_drv_ctx->dev, &dev_attr_audio_recovery); ++ if (ret) { ++ pr_err("could not create sysfs %s file\n", ++ dev_attr_audio_recovery.attr.name); ++ goto do_free_qos; ++ } ++ ++ pr_info("%s successfully done!\n", __func__); ++ return ret; ++ ++do_free_qos: ++ pm_qos_remove_request(sst_drv_ctx->qos); ++ kfree(sst_drv_ctx->qos); ++do_free_misc: ++ misc_deregister(&lpe_ctrl); ++do_free_irq: ++ free_irq(pci->irq, sst_drv_ctx); ++do_free_probe_bytes: ++ if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) ++ kfree(sst_drv_ctx->probe_bytes); ++do_free_dram_buf: ++#ifdef CONFIG_DEBUG_FS ++ if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) ++ kfree(sst_drv_ctx->dump_buf.dram_buf.buf); ++do_free_iram_buf: ++ if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) ++ kfree(sst_drv_ctx->dump_buf.iram_buf.buf); ++#endif ++do_unmap_dram: ++ iounmap(sst_drv_ctx->dram); ++do_unmap_iram: ++ iounmap(sst_drv_ctx->iram); ++do_unmap_sram: ++ iounmap(sst_drv_ctx->mailbox); ++do_unmap_shim: ++ iounmap(sst_drv_ctx->shim); ++ ++do_unmap_ddr: ++ if (sst_drv_ctx->ddr) ++ iounmap(sst_drv_ctx->ddr); ++ ++do_release_regions: ++ pci_release_regions(pci); ++do_disable_device: ++ pci_disable_device(pci); ++do_free_mem: ++ destroy_workqueue(sst_drv_ctx->post_msg_wq); ++free_mad_wq: ++ destroy_workqueue(sst_drv_ctx->mad_wq); ++do_free_drv_ctx: ++ sst_drv_ctx = NULL; ++ pr_err("Probe failed with %d\n", ret); ++ return ret; ++} ++ ++/** ++* intel_sst_remove - PCI remove function ++* ++* @pci: PCI device structure ++* ++* This function is called by OS when a device is unloaded ++* This frees the interrupt etc ++*/ ++static void intel_sst_remove(struct pci_dev *pci) ++{ ++ struct intel_sst_drv *sst_drv_ctx = pci_get_drvdata(pci); ++ sst_debugfs_exit(sst_drv_ctx); ++ pm_runtime_get_noresume(sst_drv_ctx->dev); ++ pm_runtime_forbid(sst_drv_ctx->dev); ++ unregister_sst(sst_drv_ctx->dev); ++ pci_dev_put(sst_drv_ctx->pci); ++ sst_set_fw_state_locked(sst_drv_ctx, SST_UN_INIT); ++ misc_deregister(&lpe_ctrl); ++ free_irq(pci->irq, sst_drv_ctx); ++ ++ iounmap(sst_drv_ctx->dram); ++ iounmap(sst_drv_ctx->iram); ++ iounmap(sst_drv_ctx->mailbox); ++ iounmap(sst_drv_ctx->shim); ++#ifdef CONFIG_DEBUG_FS ++ if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) { ++ kfree(sst_drv_ctx->dump_buf.iram_buf.buf); ++ kfree(sst_drv_ctx->dump_buf.dram_buf.buf); ++ } ++#endif ++ if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) ++ kfree(sst_drv_ctx->probe_bytes); ++ ++ device_remove_file(sst_drv_ctx->dev, &dev_attr_audio_recovery); ++ kfree(sst_drv_ctx->fw_cntx); ++ kfree(sst_drv_ctx->runtime_param.param.addr); ++ flush_scheduled_work(); ++ destroy_workqueue(sst_drv_ctx->post_msg_wq); ++ destroy_workqueue(sst_drv_ctx->mad_wq); ++ pm_qos_remove_request(sst_drv_ctx->qos); ++ kfree(sst_drv_ctx->qos); ++ kfree(sst_drv_ctx->fw_sg_list.src); ++ kfree(sst_drv_ctx->fw_sg_list.dst); ++ sst_drv_ctx->fw_sg_list.list_len = 0; ++ kfree(sst_drv_ctx->fw_in_mem); ++ sst_drv_ctx->fw_in_mem = NULL; ++ sst_memcpy_free_resources(); ++ sst_drv_ctx = NULL; ++ pci_release_regions(pci); ++ pci_disable_device(pci); ++ pci_set_drvdata(pci, NULL); ++} ++ ++inline void sst_save_shim64(struct intel_sst_drv *ctx, ++ void __iomem *shim, ++ struct sst_shim_regs64 *shim_regs) ++{ ++ unsigned long irq_flags; ++ spin_lock_irqsave(&ctx->ipc_spin_lock, irq_flags); ++ ++ shim_regs->csr = sst_shim_read64(shim, SST_CSR), ++ shim_regs->pisr = sst_shim_read64(shim, SST_PISR), ++ shim_regs->pimr = sst_shim_read64(shim, SST_PIMR), ++ shim_regs->isrx = sst_shim_read64(shim, SST_ISRX), ++ shim_regs->isrd = sst_shim_read64(shim, SST_ISRD), ++ shim_regs->imrx = sst_shim_read64(shim, SST_IMRX), ++ shim_regs->imrd = sst_shim_read64(shim, SST_IMRD), ++ shim_regs->ipcx = sst_shim_read64(shim, ctx->ipc_reg.ipcx), ++ shim_regs->ipcd = sst_shim_read64(shim, ctx->ipc_reg.ipcd), ++ shim_regs->isrsc = sst_shim_read64(shim, SST_ISRSC), ++ shim_regs->isrlpesc = sst_shim_read64(shim, SST_ISRLPESC), ++ shim_regs->imrsc = sst_shim_read64(shim, SST_IMRSC), ++ shim_regs->imrlpesc = sst_shim_read64(shim, SST_IMRLPESC), ++ shim_regs->ipcsc = sst_shim_read64(shim, SST_IPCSC), ++ shim_regs->ipclpesc = sst_shim_read64(shim, SST_IPCLPESC), ++ shim_regs->clkctl = sst_shim_read64(shim, SST_CLKCTL), ++ shim_regs->csr2 = sst_shim_read64(shim, SST_CSR2); ++ ++ spin_unlock_irqrestore(&ctx->ipc_spin_lock, irq_flags); ++} ++ ++static inline void sst_restore_shim64(struct intel_sst_drv *ctx, ++ void __iomem *shim, ++ struct sst_shim_regs64 *shim_regs) ++{ ++ unsigned long irq_flags; ++ spin_lock_irqsave(&ctx->ipc_spin_lock, irq_flags); ++ sst_shim_write64(shim, SST_IMRX, shim_regs->imrx), ++ spin_unlock_irqrestore(&ctx->ipc_spin_lock, irq_flags); ++} ++ ++/* ++ * The runtime_suspend/resume is pretty much similar to the legacy ++ * suspend/resume with the noted exception below: The PCI core takes care of ++ * taking the system through D3hot and restoring it back to D0 and so there is ++ * no need to duplicate that here. ++ */ ++static int intel_sst_runtime_suspend(struct device *dev) ++{ ++ union config_status_reg csr; ++ int ret = 0; ++ struct intel_sst_drv *ctx = dev_get_drvdata(dev); ++ ++ pr_info("runtime_suspend called\n"); ++ if (ctx->sst_state == SST_UN_INIT) { ++ pr_debug("LPE is already in UNINIT state, No action"); ++ return 0; ++ } ++ /*save fw context*/ ++ if (ctx->ops->save_dsp_context(ctx)) ++ return -EBUSY; ++ ++ if (ctx->pci_id == SST_CLV_PCI_ID) { ++ /*Assert RESET on LPE Processor*/ ++ csr.full = sst_shim_read(ctx->shim, SST_CSR); ++ ctx->csr_value = csr.full; ++ csr.full = csr.full | 0x2; ++ sst_shim_write(ctx->shim, SST_CSR, csr.full); ++ } ++ ++ /* Move the SST state to Suspended */ ++ sst_set_fw_state_locked(ctx, SST_SUSPENDED); ++ ++ flush_workqueue(ctx->post_msg_wq); ++ synchronize_irq(ctx->irq_num); ++ ++ if (ctx->pci_id == SST_BYT_PCI_ID || ctx->pci_id == SST_CHT_PCI_ID) { ++ /* save the shim registers because PMC doesn't save state */ ++ sst_save_shim64(ctx, ctx->shim, ctx->shim_regs64); ++ } ++ return ret; ++} ++ ++static int intel_sst_runtime_resume(struct device *dev) ++{ ++ u32 csr; ++ int ret = 0; ++ struct intel_sst_drv *ctx = dev_get_drvdata(dev); ++ ++ pr_info("runtime_resume called\n"); ++ ++ if (ctx->pci_id == SST_BYT_PCI_ID || ctx->pci_id == SST_CHT_PCI_ID) { ++ /* wait for device power up a/c to PCI spec */ ++ usleep_range(10000, 11000); ++ sst_restore_shim64(ctx, ctx->shim, ctx->shim_regs64); ++ } ++ ++ if (ctx->pci_id == SST_CLV_PCI_ID) { ++ csr = sst_shim_read(ctx->shim, SST_CSR); ++ /* ++ * To restore the csr_value after S0ix and S3 states. ++ * The value 0x30000 is to enable LPE dram high and low addresses. ++ * Reference: ++ * Penwell Audio Voice Module HAS 1.61 Section - 13.12.1 - ++ * CSR - Configuration and Status Register. ++ */ ++ csr |= (ctx->csr_value | 0x30000); ++ sst_shim_write(ctx->shim, SST_CSR, csr); ++ if (sst_drv_ctx->pdata->ssp_data) { ++ if (ctx->pdata->ssp_data->gpio_in_use) ++ sst_set_gpio_conf(&ctx->pdata->ssp_data->gpio); ++ } ++ } ++ /* When fw_clear_cache is set, clear the cached firmware copy */ ++ /* fw_clear_cache is set through debugfs support */ ++ if (atomic_read(&ctx->fw_clear_cache) && ctx->fw_in_mem) { ++ pr_debug("Clearing the cached firmware\n"); ++ kfree(ctx->fw_in_mem); ++ ctx->fw_in_mem = NULL; ++ atomic_set(&ctx->fw_clear_cache, 0); ++ } ++ ++ sst_set_fw_state_locked(ctx, SST_UN_INIT); ++ return ret; ++} ++ ++static int intel_sst_suspend(struct device *dev) ++{ ++ int retval = 0, usage_count; ++ struct intel_sst_drv *ctx = dev_get_drvdata(dev); ++ ++ usage_count = atomic_read(&ctx->pm_usage_count); ++ if (usage_count) { ++ pr_err("Ret error for suspend:%d\n", usage_count); ++ return -EBUSY; ++ } ++ retval = intel_sst_runtime_suspend(dev); ++ ++ return retval; ++} ++ ++static int intel_sst_runtime_idle(struct device *dev) ++{ ++ struct intel_sst_drv *ctx = dev_get_drvdata(dev); ++ ++ pr_info("runtime_idle called\n"); ++ if (ctx->sst_state != SST_UN_INIT) { ++ pm_schedule_suspend(dev, SST_SUSPEND_DELAY); ++ return -EBUSY; ++ } else { ++ return 0; ++ } ++ return -EBUSY; ++ ++} ++ ++static void sst_do_shutdown(struct intel_sst_drv *ctx) ++{ ++ int retval = 0; ++ unsigned int pvt_id; ++ struct ipc_post *msg = NULL; ++ struct sst_block *block = NULL; ++ ++ pr_debug(" %s called\n", __func__); ++ if (ctx->sst_state == SST_SUSPENDED || ++ ctx->sst_state == SST_UN_INIT) { ++ sst_set_fw_state_locked(ctx, SST_SHUTDOWN); ++ pr_debug("sst is already in suspended/un-int state\n"); ++ return; ++ } ++ if (!ctx->use_32bit_ops) ++ return; ++ ++ sst_set_fw_state_locked(ctx, SST_SHUTDOWN); ++ flush_workqueue(ctx->post_msg_wq); ++ pvt_id = sst_assign_pvt_id(ctx); ++ retval = sst_create_block_and_ipc_msg(&msg, false, ++ ctx, &block, ++ IPC_IA_PREPARE_SHUTDOWN, pvt_id); ++ if (retval) { ++ pr_err("sst_create_block returned error!\n"); ++ return; ++ } ++ sst_fill_header(&msg->header, IPC_IA_PREPARE_SHUTDOWN, 0, pvt_id); ++ sst_add_to_dispatch_list_and_post(ctx, msg); ++ sst_wait_timeout(ctx, block); ++ sst_free_block(ctx, block); ++} ++ ++ ++/** ++* sst_pci_shutdown - PCI shutdown function ++* ++* @pci: PCI device structure ++* ++* This function is called by OS when a device is shutdown/reboot ++* ++*/ ++ ++static void sst_pci_shutdown(struct pci_dev *pci) ++{ ++ struct intel_sst_drv *ctx = pci_get_drvdata(pci); ++ ++ pr_debug(" %s called\n", __func__); ++ ++ sst_do_shutdown(ctx); ++ disable_irq_nosync(pci->irq); ++} ++ ++/** ++* sst_acpi_shutdown - platform shutdown function ++* ++* @pci: Platform device structure ++* ++* This function is called by OS when a device is shutdown/reboot ++* ++*/ ++static void sst_acpi_shutdown(struct platform_device *pdev) ++{ ++ struct intel_sst_drv *ctx = platform_get_drvdata(pdev); ++ int irq = platform_get_irq(pdev, 0); ++ ++ pr_debug(" %s called\n", __func__); ++ ++ sst_do_shutdown(ctx); ++ disable_irq_nosync(irq); ++} ++ ++static const struct dev_pm_ops intel_sst_pm = { ++ .suspend = intel_sst_suspend, ++ .resume = intel_sst_runtime_resume, ++ .runtime_suspend = intel_sst_runtime_suspend, ++ .runtime_resume = intel_sst_runtime_resume, ++ .runtime_idle = intel_sst_runtime_idle, ++}; ++ ++static const struct acpi_device_id sst_acpi_ids[]; ++ ++struct sst_platform_info *sst_get_acpi_driver_data(const char *hid) ++{ ++ const struct acpi_device_id *id; ++ ++ pr_debug("%s", __func__); ++ for (id = sst_acpi_ids; id->id[0]; id++) ++ if (!strncmp(id->id, hid, 16)) ++ return (struct sst_platform_info *)id->driver_data; ++ return NULL; ++} ++ ++/* PCI Routines */ ++static DEFINE_PCI_DEVICE_TABLE(intel_sst_ids) = { ++ { PCI_VDEVICE(INTEL, SST_CLV_PCI_ID), 0}, ++ { PCI_VDEVICE(INTEL, SST_MRFLD_PCI_ID), 0}, ++ { 0, } ++}; ++MODULE_DEVICE_TABLE(pci, intel_sst_ids); ++ ++static const struct acpi_device_id sst_acpi_ids[] = { ++ { "LPE0F28", (kernel_ulong_t) &byt_rvp_platform_data }, ++ { "LPE0F281", (kernel_ulong_t) &byt_ffrd8_platform_data }, ++ { "80860F28", (kernel_ulong_t) &byt_ffrd8_platform_data }, ++ { "808622A8", (kernel_ulong_t) &cht_platform_data }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(acpi, sst_acpi_ids); ++ ++static struct pci_driver driver = { ++ .name = SST_DRV_NAME, ++ .id_table = intel_sst_ids, ++ .probe = intel_sst_probe, ++ .remove = intel_sst_remove, ++ .shutdown = sst_pci_shutdown, ++#ifdef CONFIG_PM ++ .driver = { ++ .pm = &intel_sst_pm, ++ }, ++#endif ++}; ++ ++static struct platform_driver sst_acpi_driver = { ++ .driver = { ++ .name = "intel_sst_acpi", ++ .owner = THIS_MODULE, ++ .acpi_match_table = ACPI_PTR(sst_acpi_ids), ++ .pm = &intel_sst_pm, ++ }, ++ .probe = sst_acpi_probe, ++ .remove = sst_acpi_remove, ++ .shutdown = sst_acpi_shutdown, ++}; ++ ++ ++/** ++* intel_sst_init - Module init function ++* ++* Registers with PCI ++* Registers with /dev ++* Init all data strutures ++*/ ++static int __init intel_sst_init(void) ++{ ++ /* Init all variables, data structure etc....*/ ++ int ret = 0; ++ pr_info("INFO: ******** SST DRIVER loading.. Ver: %s\n", ++ SST_DRIVER_VERSION); ++ ++ mutex_init(&drv_ctx_lock); ++ /* Register with PCI */ ++ ret = pci_register_driver(&driver); ++ if (ret) ++ pr_err("PCI register failed\n"); ++ ++ ret = platform_driver_register(&sst_acpi_driver); ++ if (ret) ++ pr_err("ACPI register failed\n"); ++ return ret; ++} ++ ++/** ++* intel_sst_exit - Module exit function ++* ++* Unregisters with PCI ++* Unregisters with /dev ++* Frees all data strutures ++*/ ++static void __exit intel_sst_exit(void) ++{ ++ pci_unregister_driver(&driver); ++ platform_driver_unregister(&sst_acpi_driver); ++ ++ pr_debug("driver unloaded\n"); ++ sst_drv_ctx = NULL; ++ return; ++} ++ ++module_init(intel_sst_init); ++module_exit(intel_sst_exit); +diff --git a/sound/soc/intel/sst/sst.h b/sound/soc/intel/sst/sst.h +new file mode 100644 +index 0000000..4ef3efa +--- /dev/null ++++ b/sound/soc/intel/sst/sst.h +@@ -0,0 +1,932 @@ ++/* ++ * sst.h - Intel SST Driver for audio engine ++ * ++ * Copyright (C) 2008-10 Intel Corporation ++ * Authors: Vinod Koul ++ * Harsha Priya ++ * Dharageswari R ++ * KP Jeeja ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * Common private declarations for SST ++ */ ++#ifndef __SST_H__ ++#define __SST_H__ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define SST_DRIVER_VERSION "3.0.8" ++ ++/* driver names */ ++#define SST_DRV_NAME "intel_sst_driver" ++#define SST_CLV_PCI_ID 0x08E7 ++#define SST_MRFLD_PCI_ID 0x119A ++#define SST_BYT_PCI_ID 0x0F28 ++#define SST_CHT_PCI_ID 0x22A8 ++ ++#define SST_SUSPEND_DELAY 2000 ++#define FW_CONTEXT_MEM (64*1024) ++#define SST_ICCM_BOUNDARY 4 ++#define SST_CONFIG_SSP_SIGN 0x7ffe8001 ++ ++/* FIXME: All this info should come from platform data ++ * move this when the base framework is ready to pass ++ * platform data to SST driver ++ */ ++#define MRFLD_FW_VIRTUAL_BASE 0xC0000000 ++#define MRFLD_FW_DDR_BASE_OFFSET 0x0 ++#define MRFLD_FW_FEATURE_BASE_OFFSET 0x4 ++#define MRFLD_FW_BSS_RESET_BIT 0 ++extern struct intel_sst_drv *sst_drv_ctx; ++enum sst_states { ++ SST_FW_LOADED = 1, ++ SST_FW_RUNNING, ++ SST_START_INIT, ++ SST_UN_INIT, ++ SST_ERROR, ++ SST_SUSPENDED, ++ SST_FW_CTXT_RESTORE, ++ SST_SHUTDOWN, ++ SST_FW_LIB_LOAD, ++}; ++ ++enum sst_algo_ops { ++ SST_SET_ALGO = 0, ++ SST_GET_ALGO = 1, ++}; ++ ++#define SST_BLOCK_TIMEOUT 1000 ++ ++/* SST register map */ ++#define SST_CSR 0x00 ++#define SST_PISR 0x08 ++#define SST_PIMR 0x10 ++#define SST_ISRX 0x18 ++#define SST_ISRD 0x20 ++#define SST_IMRX 0x28 ++#define SST_IMRD 0x30 ++#define SST_IPCX 0x38 /* IPC IA-SST */ ++#define SST_IPCD 0x40 /* IPC SST-IA */ ++#define SST_ISRSC 0x48 ++#define SST_ISRLPESC 0x50 ++#define SST_IMRSC 0x58 ++#define SST_IMRLPESC 0x60 ++#define SST_IPCSC 0x68 ++#define SST_IPCLPESC 0x70 ++#define SST_CLKCTL 0x78 ++#define SST_CSR2 0x80 ++ ++#define SST_SHIM_BEGIN SST_CSR ++#define SST_SHIM_END SST_CSR2 ++#define SST_SHIM_SIZE 0x88 ++ ++#define FW_SIGNATURE_SIZE 4 ++ ++/* stream states */ ++enum sst_stream_states { ++ STREAM_UN_INIT = 0, /* Freed/Not used stream */ ++ STREAM_RUNNING = 1, /* Running */ ++ STREAM_PAUSED = 2, /* Paused stream */ ++ STREAM_DECODE = 3, /* stream is in decoding only state */ ++ STREAM_INIT = 4, /* stream init, waiting for data */ ++ STREAM_RESET = 5, /* force reset on recovery */ ++}; ++ ++enum sst_ram_type { ++ SST_IRAM = 1, ++ SST_DRAM = 2, ++}; ++ ++/* SST shim registers to structure mapping */ ++union config_status_reg { ++ struct { ++ u32 mfld_strb:1; ++ u32 sst_reset:1; ++ u32 clk_sel:3; ++ u32 sst_clk:2; ++ u32 bypass:3; ++ u32 run_stall:1; ++ u32 rsvd1:2; ++ u32 strb_cntr_rst:1; ++ u32 rsvd:18; ++ } part; ++ u32 full; ++}; ++ ++union interrupt_reg { ++ struct { ++ u64 done_interrupt:1; ++ u64 busy_interrupt:1; ++ u64 rsvd:62; ++ } part; ++ u64 full; ++}; ++ ++union sst_imr_reg { ++ struct { ++ u32 done_interrupt:1; ++ u32 busy_interrupt:1; ++ u32 rsvd:30; ++ } part; ++ u32 full; ++}; ++ ++union sst_pisr_reg { ++ struct { ++ u32 pssp0:1; ++ u32 pssp1:1; ++ u32 rsvd0:3; ++ u32 dmac:1; ++ u32 rsvd1:26; ++ } part; ++ u32 full; ++}; ++ ++union sst_pimr_reg { ++ struct { ++ u32 ssp0:1; ++ u32 ssp1:1; ++ u32 rsvd0:3; ++ u32 dmac:1; ++ u32 rsvd1:10; ++ u32 ssp0_sc:1; ++ u32 ssp1_sc:1; ++ u32 rsvd2:3; ++ u32 dmac_sc:1; ++ u32 rsvd3:10; ++ } part; ++ u32 full; ++}; ++ ++union config_status_reg_mrfld { ++ struct { ++ u64 lpe_reset:1; ++ u64 lpe_reset_vector:1; ++ u64 runstall:1; ++ u64 pwaitmode:1; ++ u64 clk_sel:3; ++ u64 rsvd2:1; ++ u64 sst_clk:3; ++ u64 xt_snoop:1; ++ u64 rsvd3:4; ++ u64 clk_sel1:6; ++ u64 clk_enable:3; ++ u64 rsvd4:6; ++ u64 slim0baseclk:1; ++ u64 rsvd:32; ++ } part; ++ u64 full; ++}; ++ ++union interrupt_reg_mrfld { ++ struct { ++ u64 done_interrupt:1; ++ u64 busy_interrupt:1; ++ u64 rsvd:62; ++ } part; ++ u64 full; ++}; ++ ++union sst_imr_reg_mrfld { ++ struct { ++ u64 done_interrupt:1; ++ u64 busy_interrupt:1; ++ u64 rsvd:62; ++ } part; ++ u64 full; ++}; ++ ++/*This structure is used to block a user/fw data call to another ++fw/user call ++*/ ++struct sst_block { ++ bool condition; /* condition for blocking check */ ++ int ret_code; /* ret code when block is released */ ++ void *data; /* data to be appsed for block if any */ ++ u32 size; ++ bool on; ++ u32 msg_id; /*msg_id = msgid in mfld/ctp, mrfld = 0 */ ++ u32 drv_id; /* = str_id in mfld/ctp, = drv_id in mrfld*/ ++ struct list_head node; ++}; ++ ++/** ++ * struct stream_info - structure that holds the stream information ++ * ++ * @status : stream current state ++ * @prev : stream prev state ++ * @ops : stream operation pb/cp/drm... ++ * @bufs: stream buffer list ++ * @lock : stream mutex for protecting state ++ * @pcm_substream : PCM substream ++ * @period_elapsed : PCM period elapsed callback ++ * @sfreq : stream sampling freq ++ * @str_type : stream type ++ * @cumm_bytes : cummulative bytes decoded ++ * @str_type : stream type ++ * @src : stream source ++ * @device : output device type (medfield only) ++ */ ++struct stream_info { ++ unsigned int status; ++ unsigned int prev; ++ unsigned int ops; ++ struct mutex lock; /* mutex */ ++ void *pcm_substream; ++ void (*period_elapsed) (void *pcm_substream); ++ unsigned int sfreq; ++ u32 cumm_bytes; ++ void *compr_cb_param; ++ void (*compr_cb) (void *compr_cb_param); ++ void *drain_cb_param; ++ void (*drain_notify) (void *drain_cb_param); ++ ++ unsigned int num_ch; ++ unsigned int pipe_id; ++ unsigned int str_id; ++ unsigned int task_id; ++}; ++ ++#define SST_FW_SIGN "$SST" ++#define SST_FW_LIB_SIGN "$LIB" ++ ++/* ++ * struct fw_header - FW file headers ++ * ++ * @signature : FW signature ++ * @modules : # of modules ++ * @file_format : version of header format ++ * @reserved : reserved fields ++ */ ++struct fw_header { ++ unsigned char signature[FW_SIGNATURE_SIZE]; /* FW signature */ ++ u32 file_size; /* size of fw minus this header */ ++ u32 modules; /* # of modules */ ++ u32 file_format; /* version of header format */ ++ u32 reserved[4]; ++}; ++ ++struct fw_module_header { ++ unsigned char signature[FW_SIGNATURE_SIZE]; /* module signature */ ++ u32 mod_size; /* size of module */ ++ u32 blocks; /* # of blocks */ ++ u32 type; /* codec type, pp lib */ ++ u32 entry_point; ++}; ++ ++struct fw_block_info { ++ enum sst_ram_type type; /* IRAM/DRAM */ ++ u32 size; /* Bytes */ ++ u32 ram_offset; /* Offset in I/DRAM */ ++ u32 rsvd; /* Reserved field */ ++}; ++ ++struct sst_ipc_msg_wq { ++ union ipc_header_mrfld mrfld_header; ++ struct ipc_dsp_hdr dsp_hdr; ++ char mailbox[SST_MAILBOX_SIZE]; ++ struct work_struct wq; ++ union ipc_header header; ++}; ++ ++struct sst_dma { ++ struct dma_chan *ch; ++ struct intel_mid_dma_slave slave; ++ struct device *dev; ++}; ++ ++struct sst_runtime_param { ++ struct snd_sst_runtime_params param; ++}; ++ ++struct sst_sg_list { ++ struct scatterlist *src; ++ struct scatterlist *dst; ++ int list_len; ++ unsigned int sg_idx; ++}; ++ ++struct sst_memcpy_list { ++ struct list_head memcpylist; ++ void *dstn; ++ const void *src; ++ u32 size; ++ bool is_io; ++}; ++ ++struct sst_debugfs { ++#ifdef CONFIG_DEBUG_FS ++ struct dentry *root; ++#endif ++ int runtime_pm_status; ++ void __iomem *ssp[SST_MAX_SSP_PORTS]; ++ void __iomem *dma_reg[SST_MAX_DMA]; ++ unsigned char get_params_data[1024]; ++ ssize_t get_params_len; ++}; ++ ++struct lpe_log_buf_hdr { ++ u32 base_addr; ++ u32 end_addr; ++ u32 rd_addr; ++ u32 wr_addr; ++}; ++ ++struct snd_ssp_config { ++ int size; ++ char bytes[0]; ++}; ++ ++struct snd_sst_probe_bytes { ++ u16 len; ++ char bytes[0]; ++}; ++ ++#define PCI_DMAC_CLV_ID 0x08F0 ++#define PCI_DMAC_MRFLD_ID 0x119B ++ ++struct sst_ram_buf { ++ u32 size; ++ char *buf; ++}; ++ ++/* Firmware Module Information*/ ++ ++enum sst_lib_dwnld_status { ++ SST_LIB_NOT_FOUND = 0, ++ SST_LIB_FOUND, ++ SST_LIB_DOWNLOADED, ++}; ++ ++struct sst_module_info { ++ const char *name; /* Library name */ ++ u32 id; /* Module ID */ ++ u32 entry_pt; /* Module entry point */ ++ u8 status; /* module status*/ ++ u8 rsvd1; ++ u16 rsvd2; ++}; ++ ++/* Structure for managing the Library Region(1.5MB) ++ * in DDR in Merrifield ++ */ ++struct sst_mem_mgr { ++ phys_addr_t current_base; ++ int avail; ++ unsigned int count; ++}; ++ ++struct sst_dump_buf { ++ /* buffers for iram-dram dump crash */ ++ struct sst_ram_buf iram_buf; ++ struct sst_ram_buf dram_buf; ++}; ++ ++struct sst_ipc_reg { ++ int ipcx; ++ int ipcd; ++}; ++ ++struct sst_shim_regs64 { ++ u64 csr; ++ u64 pisr; ++ u64 pimr; ++ u64 isrx; ++ u64 isrd; ++ u64 imrx; ++ u64 imrd; ++ u64 ipcx; ++ u64 ipcd; ++ u64 isrsc; ++ u64 isrlpesc; ++ u64 imrsc; ++ u64 imrlpesc; ++ u64 ipcsc; ++ u64 ipclpesc; ++ u64 clkctl; ++ u64 csr2; ++}; ++ ++struct sst_vtsv_cache { ++ void *file1_in_mem; ++ u32 size1; ++ void *file2_in_mem; ++ u32 size2; ++}; ++ ++/*** ++ * ++ * struct intel_sst_drv - driver ops ++ * ++ * @sst_state : current sst device state ++ * @pci_id : PCI device id loaded ++ * @shim : SST shim pointer ++ * @mailbox : SST mailbox pointer ++ * @iram : SST IRAM pointer ++ * @dram : SST DRAM pointer ++ * @pdata : SST info passed as a part of pci platform data ++ * @shim_phy_add : SST shim phy addr ++ * @shim_regs64: Struct to save shim registers ++ * @ipc_dispatch_list : ipc messages dispatched ++ * @rx_list : to copy the process_reply/process_msg from DSP ++ * @ipc_post_msg_wq : wq to post IPC messages context ++ * @ipc_post_msg : wq to post reply from FW context ++ * @mad_ops : MAD driver operations registered ++ * @mad_wq : MAD driver wq ++ * @post_msg_wq : wq to post IPC messages ++ * @streams : sst stream contexts ++ * @list_lock : sst driver list lock (deprecated) ++ * @ipc_spin_lock : spin lock to handle audio shim access and ipc queue ++ * @rx_msg_lock : spin lock to handle the rx messages from the DSP ++ * @scard_ops : sst card ops ++ * @pci : sst pci device struture ++ * @dev : pointer to current device struct ++ * @sst_lock : sst device lock ++ * @stream_lock : sst stream lock ++ * @pvt_id : sst private id ++ * @stream_cnt : total sst active stream count ++ * @pb_streams : total active pb streams ++ * @cp_streams : total active cp streams ++ * @audio_start : audio status ++ * @qos : PM Qos struct ++ * firmware_name : Firmware / Library name ++ */ ++struct intel_sst_drv { ++ int sst_state; ++ int irq_num; ++ unsigned int pci_id; ++ bool use_32bit_ops; ++ void __iomem *ddr; ++ void __iomem *shim; ++ void __iomem *mailbox; ++ void __iomem *iram; ++ void __iomem *dram; ++ unsigned int mailbox_add; ++ unsigned int iram_base; ++ unsigned int dram_base; ++ unsigned int shim_phy_add; ++ unsigned int iram_end; ++ unsigned int dram_end; ++ unsigned int ddr_end; ++ unsigned int ddr_base; ++ unsigned int mailbox_recv_offset; ++ atomic_t pm_usage_count; ++ struct sst_shim_regs64 *shim_regs64; ++ struct list_head block_list; ++ struct list_head ipc_dispatch_list; ++ struct sst_platform_info *pdata; ++ struct sst_ipc_msg_wq ipc_post_msg; ++ struct list_head rx_list; ++ struct work_struct ipc_post_msg_wq; ++ wait_queue_head_t wait_queue; ++ struct workqueue_struct *mad_wq; ++ struct workqueue_struct *post_msg_wq; ++ unsigned int tstamp; ++ struct stream_info streams[MAX_NUM_STREAMS+1]; /*str_id 0 is not used*/ ++ spinlock_t ipc_spin_lock; /* lock for Shim reg access and ipc queue */ ++ spinlock_t block_lock; /* lock for adding block to block_list */ ++ spinlock_t pvt_id_lock; /* lock for allocating private id */ ++ spinlock_t rx_msg_lock; ++ struct pci_dev *pci; ++ struct device *dev; ++ unsigned int pvt_id; ++ struct mutex sst_lock; ++ struct mutex stream_lock; ++ unsigned int stream_cnt; ++ unsigned int *fw_cntx; ++ unsigned int fw_cntx_size; ++ unsigned int csr_value; ++ struct sst_dma dma; ++ void *fw_in_mem; ++ struct sst_runtime_param runtime_param; ++ unsigned int device_input_mixer; ++ struct mutex mixer_ctrl_lock; ++ struct dma_async_tx_descriptor *desc; ++ struct sst_sg_list fw_sg_list, library_list; ++ struct intel_sst_ops *ops; ++ struct sst_debugfs debugfs; ++ struct pm_qos_request *qos; ++ struct sst_info info; ++ unsigned int use_dma; ++ unsigned int use_lli; ++ atomic_t fw_clear_context; ++ atomic_t fw_clear_cache; ++ bool lib_dwnld_reqd; ++ /* list used during FW download in memcpy mode */ ++ struct list_head memcpy_list; ++ /* list used during LIB download in memcpy mode */ ++ struct list_head libmemcpy_list; ++ /* holds the stucts of iram/dram local buffers for dump*/ ++ struct sst_dump_buf dump_buf; ++ /* Lock for CSR register change */ ++ struct mutex csr_lock; ++ /* byte control to set the probe stream */ ++ struct snd_sst_probe_bytes *probe_bytes; ++ /* contains the ipc registers */ ++ struct sst_ipc_reg ipc_reg; ++ /* IMR region Library space memory manager */ ++ struct sst_mem_mgr lib_mem_mgr; ++ /* Contains the cached vtsv files*/ ++ struct sst_vtsv_cache vcache; ++ /* Pointer to device ID, now for same PCI_ID, HID will be ++ * will be different for FDK and EDK2. This will be used ++ * for devices where PCI or ACPI id is same but HID is ++ * different ++ */ ++ const char *hid; ++ /* Holder for firmware name. Due to async call it needs to be ++ * persistent till worker thread gets called ++ */ ++ char firmware_name[20]; ++}; ++ ++extern struct intel_sst_drv *sst_drv_ctx; ++extern struct sst_platform_info byt_rvp_platform_data; ++extern struct sst_platform_info byt_ffrd8_platform_data; ++extern struct sst_platform_info cht_platform_data; ++ ++/* misc definitions */ ++#define FW_DWNL_ID 0xFF ++ ++struct sst_fill_config { ++ u32 sign; ++ struct sst_board_config_data sst_bdata; ++ struct sst_platform_config_data sst_pdata; ++ u32 shim_phy_add; ++ u32 mailbox_add; ++} __packed; ++ ++struct intel_sst_ops { ++ irqreturn_t (*interrupt) (int, void *); ++ irqreturn_t (*irq_thread) (int, void *); ++ void (*clear_interrupt) (void); ++ int (*start) (void); ++ int (*reset) (void); ++ void (*process_reply) (struct ipc_post *msg); ++ void (*post_message) (struct work_struct *work); ++ int (*sync_post_message) (struct ipc_post *msg); ++ void (*process_message) (struct ipc_post *msg); ++ void (*set_bypass)(bool set); ++ int (*save_dsp_context) (struct intel_sst_drv *sst); ++ void (*restore_dsp_context) (void); ++ int (*alloc_stream) (char *params, struct sst_block *block); ++ void (*post_download)(struct intel_sst_drv *sst); ++ void (*do_recovery)(struct intel_sst_drv *sst); ++}; ++ ++int sst_alloc_stream(char *params, struct sst_block *block); ++int sst_pause_stream(int id); ++int sst_resume_stream(int id); ++int sst_drop_stream(int id); ++int sst_next_track(void); ++int sst_free_stream(int id); ++int sst_start_stream(int str_id); ++int sst_send_byte_stream_mrfld(void *sbytes); ++int sst_send_probe_bytes(struct intel_sst_drv *sst); ++int sst_set_stream_param(int str_id, struct snd_sst_params *str_param); ++int sst_set_metadata(int str_id, char *params); ++int sst_get_stream(struct snd_sst_params *str_param); ++int sst_get_stream_allocated(struct snd_sst_params *str_param, ++ struct snd_sst_lib_download **lib_dnld); ++int sst_drain_stream(int str_id, bool partial_drain); ++ ++ ++int sst_sync_post_message_mfld(struct ipc_post *msg); ++void sst_post_message_mfld(struct work_struct *work); ++void sst_process_message_mfld(struct ipc_post *msg); ++void sst_process_reply_mfld(struct ipc_post *msg); ++int sst_start_mfld(void); ++int intel_sst_reset_dsp_mfld(void); ++void intel_sst_clear_intr_mfld(void); ++void intel_sst_set_bypass_mfld(bool set); ++ ++int sst_sync_post_message_mrfld(struct ipc_post *msg); ++void sst_post_message_mrfld(struct work_struct *work); ++void sst_process_message_mrfld(struct ipc_post *msg); ++void sst_process_reply_mrfld(struct ipc_post *msg); ++int sst_start_mrfld(void); ++int intel_sst_reset_dsp_mrfld(void); ++void intel_sst_clear_intr_mrfld(void); ++void sst_process_mad_ops(struct work_struct *work); ++ ++long intel_sst_ioctl(struct file *file_ptr, unsigned int cmd, ++ unsigned long arg); ++int intel_sst_open_cntrl(struct inode *i_node, struct file *file_ptr); ++int intel_sst_release_cntrl(struct inode *i_node, struct file *file_ptr); ++ ++int sst_load_fw(void); ++int sst_load_library(struct snd_sst_lib_download *lib, u8 ops); ++int sst_load_all_modules_elf(struct intel_sst_drv *ctx, ++ struct sst_module_info *mod_table, int mod_table_size); ++int sst_get_next_lib_mem(struct sst_mem_mgr *mgr, int size, ++ unsigned long *lib_base); ++void sst_post_download_ctp(struct intel_sst_drv *ctx); ++void sst_post_download_mrfld(struct intel_sst_drv *ctx); ++void sst_post_download_byt(struct intel_sst_drv *ctx); ++int sst_get_block_stream(struct intel_sst_drv *sst_drv_ctx); ++void sst_memcpy_free_resources(void); ++ ++int sst_wait_interruptible(struct intel_sst_drv *sst_drv_ctx, ++ struct sst_block *block); ++int sst_wait_timeout(struct intel_sst_drv *sst_drv_ctx, ++ struct sst_block *block); ++int sst_create_ipc_msg(struct ipc_post **arg, bool large); ++int sst_download_fw(void); ++int free_stream_context(unsigned int str_id); ++void sst_clean_stream(struct stream_info *stream); ++int intel_sst_register_compress(struct intel_sst_drv *sst); ++int intel_sst_remove_compress(struct intel_sst_drv *sst); ++void sst_cdev_fragment_elapsed(int str_id); ++int sst_send_sync_msg(int ipc, int str_id); ++int sst_get_num_channel(struct snd_sst_params *str_param); ++int sst_get_sfreq(struct snd_sst_params *str_param); ++int intel_sst_check_device(void); ++int sst_alloc_stream_ctp(char *params, struct sst_block *block); ++int sst_alloc_stream_mrfld(char *params, struct sst_block *block); ++void sst_restore_fw_context(void); ++struct sst_block *sst_create_block(struct intel_sst_drv *ctx, ++ u32 msg_id, u32 drv_id); ++int sst_create_block_and_ipc_msg(struct ipc_post **arg, bool large, ++ struct intel_sst_drv *sst_drv_ctx, struct sst_block **block, ++ u32 msg_id, u32 drv_id); ++int sst_free_block(struct intel_sst_drv *ctx, struct sst_block *freed); ++int sst_wake_up_block(struct intel_sst_drv *ctx, int result, ++ u32 drv_id, u32 ipc, void *data, u32 size); ++int sst_alloc_drv_context(struct device *dev); ++int sst_request_firmware_async(struct intel_sst_drv *ctx); ++int sst_driver_ops(struct intel_sst_drv *sst); ++struct sst_platform_info *sst_get_acpi_driver_data(const char *hid); ++int sst_acpi_probe(struct platform_device *pdev); ++int sst_acpi_remove(struct platform_device *pdev); ++void sst_save_shim64(struct intel_sst_drv *ctx, void __iomem *shim, ++ struct sst_shim_regs64 *shim_regs); ++void sst_firmware_load_cb(const struct firmware *fw, void *context); ++int sst_send_vtsv_data_to_fw(struct intel_sst_drv *ctx); ++ ++void sst_do_recovery_mrfld(struct intel_sst_drv *sst); ++void sst_do_recovery(struct intel_sst_drv *sst); ++long intel_sst_ioctl_dsp(unsigned int cmd, ++ struct snd_ppp_params *algo_params, unsigned long arg); ++ ++void sst_dump_to_buffer(const void *from, size_t from_len, char *buf); ++ ++extern int intel_scu_ipc_simple_command(int, int); ++ ++static inline int sst_pm_runtime_put(struct intel_sst_drv *sst_drv) ++{ ++ int ret; ++ ++ ret = pm_runtime_put_sync(sst_drv->dev); ++ if (ret < 0) ++ return ret; ++ atomic_dec(&sst_drv->pm_usage_count); ++ ++ pr_debug("%s: count is %d now..\n", __func__, ++ atomic_read(&sst_drv->pm_usage_count)); ++ return 0; ++} ++/* ++ * sst_fill_header - inline to fill sst header ++ * ++ * @header : ipc header ++ * @msg : IPC message to be sent ++ * @large : is ipc large msg ++ * @str_id : stream id ++ * ++ * this function is an inline function that sets the headers before ++ * sending a message ++ */ ++static inline void sst_fill_header(union ipc_header *header, ++ int msg, int large, int str_id) ++{ ++ header->part.msg_id = msg; ++ header->part.str_id = str_id; ++ header->part.large = large; ++ header->part.done = 0; ++ header->part.busy = 1; ++ header->part.data = 0; ++} ++ ++ ++static inline void sst_fill_header_mrfld(union ipc_header_mrfld *header, ++ int msg, int task_id, int large, int drv_id) ++{ ++ header->full = 0; ++ header->p.header_high.part.msg_id = msg; ++ header->p.header_high.part.task_id = task_id; ++ header->p.header_high.part.large = large; ++ header->p.header_high.part.drv_id = drv_id; ++ header->p.header_high.part.done = 0; ++ header->p.header_high.part.busy = 1; ++ header->p.header_high.part.res_rqd = 1; ++} ++ ++static inline void sst_fill_header_dsp(struct ipc_dsp_hdr *dsp, int msg, ++ int pipe_id, int len) ++{ ++ dsp->cmd_id = msg; ++ dsp->mod_index_id = 0xff; ++ dsp->pipe_id = pipe_id; ++ dsp->length = len; ++ dsp->mod_id = 0; ++} ++ ++#define MAX_BLOCKS 15 ++/* sst_assign_pvt_id - assign a pvt id for stream ++ * ++ * @sst_drv_ctx : driver context ++ * ++ * this inline function assigns a private id for calls that dont have stream ++ * context yet, should be called with lock held ++ */ ++static inline unsigned int sst_assign_pvt_id(struct intel_sst_drv *sst_drv_ctx) ++{ ++ unsigned int local; ++ ++ spin_lock(&sst_drv_ctx->pvt_id_lock); ++ sst_drv_ctx->pvt_id++; ++ if (sst_drv_ctx->pvt_id > MAX_BLOCKS) ++ sst_drv_ctx->pvt_id = 1; ++ local = sst_drv_ctx->pvt_id; ++ spin_unlock(&sst_drv_ctx->pvt_id_lock); ++ return local; ++} ++ ++ ++/* ++ * sst_init_stream - this function initialzes stream context ++ * ++ * @stream : stream struture ++ * @codec : codec for stream ++ * @sst_id : stream id ++ * @ops : stream operation ++ * @slot : stream pcm slot ++ * @device : device type ++ * ++ * this inline function initialzes stream context for allocated stream ++ */ ++static inline void sst_init_stream(struct stream_info *stream, ++ int codec, int sst_id, int ops, u8 slot) ++{ ++ stream->status = STREAM_INIT; ++ stream->prev = STREAM_UN_INIT; ++ stream->ops = ops; ++} ++ ++static inline void sst_set_gpio_conf(const struct sst_gpio_config *gpio_conf) ++{ ++ lnw_gpio_set_alt(gpio_conf->i2s_rx_alt, gpio_conf->alt_function); ++ lnw_gpio_set_alt(gpio_conf->i2s_tx_alt, gpio_conf->alt_function); ++ lnw_gpio_set_alt(gpio_conf->i2s_frame, gpio_conf->alt_function); ++ lnw_gpio_set_alt(gpio_conf->i2s_clock, gpio_conf->alt_function); ++} ++ ++ ++/* ++ * sst_validate_strid - this function validates the stream id ++ * ++ * @str_id : stream id to be validated ++ * ++ * returns 0 if valid stream ++ */ ++static inline int sst_validate_strid(int str_id) ++{ ++ if (str_id <= 0 || str_id > sst_drv_ctx->info.max_streams) { ++ pr_err("SST ERR: invalid stream id : %d, max %d\n", ++ str_id, sst_drv_ctx->info.max_streams); ++ return -EINVAL; ++ } else ++ return 0; ++} ++ ++static inline int sst_shim_write(void __iomem *addr, int offset, int value) ++{ ++ writel(value, addr + offset); ++ return 0; ++} ++ ++static inline u32 sst_shim_read(void __iomem *addr, int offset) ++{ ++ ++ return readl(addr + offset); ++} ++ ++static inline u32 sst_reg_read(void __iomem *addr, int offset) ++{ ++ ++ return readl(addr + offset); ++} ++ ++static inline u64 sst_reg_read64(void __iomem *addr, int offset) ++{ ++ u64 val = 0; ++ ++ memcpy_fromio(&val, addr + offset, sizeof(val)); ++ ++ return val; ++} ++ ++static inline int sst_shim_write64(void __iomem *addr, int offset, u64 value) ++{ ++ memcpy_toio(addr + offset, &value, sizeof(value)); ++ return 0; ++} ++ ++static inline u64 sst_shim_read64(void __iomem *addr, int offset) ++{ ++ u64 val = 0; ++ ++ memcpy_fromio(&val, addr + offset, sizeof(val)); ++ return val; ++} ++ ++static inline void ++sst_set_fw_state_locked(struct intel_sst_drv *sst_drv_ctx, int sst_state) ++{ ++ mutex_lock(&sst_drv_ctx->sst_lock); ++ sst_drv_ctx->sst_state = sst_state; ++ mutex_unlock(&sst_drv_ctx->sst_lock); ++} ++ ++static inline struct stream_info *get_stream_info(int str_id) ++{ ++ if (sst_validate_strid(str_id)) ++ return NULL; ++ return &sst_drv_ctx->streams[str_id]; ++} ++ ++static inline int get_stream_id_mrfld(u32 pipe_id) ++{ ++ int i; ++ ++ for (i = 1; i <= sst_drv_ctx->info.max_streams; i++) ++ if (pipe_id == sst_drv_ctx->streams[i].pipe_id) ++ return i; ++ ++ pr_debug("%s: no such pipe_id(%u)", __func__, pipe_id); ++ return -1; ++} ++ ++int register_sst(struct device *); ++int unregister_sst(struct device *); ++ ++#ifdef CONFIG_DEBUG_FS ++void sst_debugfs_init(struct intel_sst_drv *sst); ++void sst_debugfs_exit(struct intel_sst_drv *sst); ++#else ++static inline void sst_debugfs_init(struct intel_sst_drv *sst) ++{ ++} ++ ++static inline void sst_debugfs_exit(struct intel_sst_drv *sst) ++{ ++} ++#endif /* CONFIG_DEBUG_FS */ ++ ++/* ++ * FW should use virtual address 0xC000_0000 to map to the DDR ++ * reserved 2MB region at 512MB boundary. Currently the address of ++ * DDR region allocated by IA FW is not 512MB aligned. So FW is ++ * statically linking the DDR region at 0xDF600000. So we need to ++ * use the translated address to identify the DDR regions in the FW ++ * ELF binary. ++ */ ++static inline u32 relocate_imr_addr_mrfld(u32 base_addr) ++{ ++ /* Get the difference from 512MB aligned base addr */ ++ /* relocate the base */ ++ base_addr = MRFLD_FW_VIRTUAL_BASE + (base_addr % (512 * 1024 * 1024)); ++ return base_addr; ++} ++ ++static inline void sst_add_to_dispatch_list_and_post(struct intel_sst_drv *sst, ++ struct ipc_post *msg) ++{ ++ unsigned long irq_flags; ++ spin_lock_irqsave(&sst->ipc_spin_lock, irq_flags); ++ list_add_tail(&msg->node, &sst->ipc_dispatch_list); ++ spin_unlock_irqrestore(&sst->ipc_spin_lock, irq_flags); ++ sst->ops->post_message(&sst->ipc_post_msg_wq); ++} ++#endif +diff --git a/sound/soc/intel/sst/sst_acpi.c b/sound/soc/intel/sst/sst_acpi.c +new file mode 100644 +index 0000000..a898c2a +--- /dev/null ++++ b/sound/soc/intel/sst/sst_acpi.c +@@ -0,0 +1,669 @@ ++/* sst_acpi.c - SST (LPE) driver init file for ACPI enumeration. ++ * ++ * Copyright (c) 2013, Intel Corporation. ++ * ++ * Authors: Ramesh Babu K V ++ * Authors: Omair Mohammed Abdullah ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms and conditions of the GNU General Public License, ++ * version 2, as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. ++ * ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../sst_platform.h" ++#include "../platform_ipc_v2.h" ++#include "sst.h" ++ ++extern struct miscdevice lpe_ctrl; ++ ++static const struct sst_platform_config_data sst_byt_pdata = { ++ .sst_sram_buff_base = 0xffffffff, ++ .sst_dma_base[0] = SST_BYT_DMA0_PHY_ADDR, ++ .sst_dma_base[1] = SST_BYT_DMA1_PHY_ADDR, ++}; ++ ++/* use array[0] for ssp_platform_data even though SSP2 is used */ ++static const struct sst_board_config_data sst_byt_rvp_bdata = { ++ .active_ssp_ports = 1, ++ .platform_id = 3, ++ .board_id = 1, ++ .ihf_num_chan = 2, ++ .osc_clk_freq = 25000000, ++ .ssp_platform_data = { ++ [0] = { ++ .ssp_cfg_sst = 1, ++ .port_number = 2, ++ .is_master = 1, ++ .pack_mode = 1, ++ .num_slots_per_frame = 2, ++ .num_bits_per_slot = 24, ++ .active_tx_map = 3, ++ .active_rx_map = 3, ++ .ssp_frame_format = 3, ++ .frame_polarity = 1, ++ .serial_bitrate_clk_mode = 0, ++ .frame_sync_width = 24, ++ .dma_handshake_interface_tx = 5, ++ .dma_handshake_interface_rx = 4, ++ .network_mode = 0, ++ .start_delay = 1, ++ .ssp_base_add = SST_BYT_SSP2_PHY_ADDR, ++ }, ++ }, ++}; ++ ++static const struct sst_board_config_data sst_byt_ffrd8_bdata = { ++ .active_ssp_ports = 1, ++ .platform_id = 3, ++ .board_id = 1, ++ .ihf_num_chan = 2, ++ .osc_clk_freq = 25000000, ++ .ssp_platform_data = { ++ [0] = { ++ .ssp_cfg_sst = 1, ++ .port_number = 0, ++ .is_master = 1, ++ .pack_mode = 1, ++ .num_slots_per_frame = 2, ++ .num_bits_per_slot = 24, ++ .active_tx_map = 3, ++ .active_rx_map = 3, ++ .ssp_frame_format = 3, ++ .frame_polarity = 1, ++ .serial_bitrate_clk_mode = 0, ++ .frame_sync_width = 24, ++ .dma_handshake_interface_tx = 1, ++ .dma_handshake_interface_rx = 0, ++ .network_mode = 0, ++ .start_delay = 1, ++ .ssp_base_add = SST_BYT_SSP0_PHY_ADDR, ++ }, ++ }, ++}; ++ ++static const struct sst_board_config_data sst_byt_crv2_bdata = { ++ .active_ssp_ports = 1, ++ .platform_id = 3, ++ .board_id = 1, ++ .ihf_num_chan = 1, ++ .osc_clk_freq = 25000000, ++ .ssp_platform_data = { ++ [0] = { ++ .ssp_cfg_sst = 1, ++ .port_number = 0, ++ .is_master = 1, ++ .pack_mode = 1, ++ .num_slots_per_frame = 2, ++ .num_bits_per_slot = 24, ++ .active_tx_map = 3, ++ .active_rx_map = 3, ++ .ssp_frame_format = 3, ++ .frame_polarity = 1, ++ .serial_bitrate_clk_mode = 0, ++ .frame_sync_width = 24, ++ .dma_handshake_interface_tx = 1, ++ .dma_handshake_interface_rx = 0, ++ .network_mode = 0, ++ .start_delay = 1, ++ .ssp_base_add = SST_BYT_SSP0_PHY_ADDR, ++ }, ++ }, ++}; ++ ++static const struct sst_info byt_fwparse_info = { ++ .use_elf = true, ++ .max_streams = 4, ++ .dma_max_len = SST_MAX_DMA_LEN_MRFLD, ++ .iram_start = SST_BYT_IRAM_PHY_START, ++ .iram_end = SST_BYT_IRAM_PHY_END, ++ .iram_use = true, ++ .dram_start = SST_BYT_DRAM_PHY_START, ++ .dram_end = SST_BYT_DRAM_PHY_END, ++ .dram_use = true, ++ .imr_start = SST_BYT_IMR_VIRT_START, ++ .imr_end = SST_BYT_IMR_VIRT_END, ++ .imr_use = true, ++ .mailbox_start = SST_BYT_MBOX_PHY_ADDR, ++ .num_probes = 0, ++ .lpe_viewpt_rqd = true, ++}; ++ ++ ++static const struct sst_info cht_fwparse_info = { ++ .use_elf = true, ++ .max_streams = MAX_NUM_STREAMS_MRFLD, ++ .dma_max_len = SST_MAX_DMA_LEN_MRFLD, ++ .iram_start = SST_BYT_IRAM_PHY_START, ++ .iram_end = SST_BYT_IRAM_PHY_END, ++ .iram_use = true, ++ .dram_start = SST_BYT_DRAM_PHY_START, ++ .dram_end = SST_BYT_DRAM_PHY_END, ++ .dram_use = true, ++ .imr_start = SST_BYT_IMR_VIRT_START, ++ .imr_end = SST_BYT_IMR_VIRT_END, ++ .imr_use = true, ++ .mailbox_start = SST_BYT_MBOX_PHY_ADDR, ++ .num_probes = 0, ++ .lpe_viewpt_rqd = true, ++}; ++ ++static const struct sst_ipc_info byt_ipc_info = { ++ .use_32bit_ops = true, ++ .ipc_offset = 4, ++ .mbox_recv_off = 0x400, ++}; ++ ++static const struct sst_lib_dnld_info byt_lib_dnld_info = { ++ .mod_base = SST_BYT_IMR_VIRT_START, ++ .mod_end = SST_BYT_IMR_VIRT_END, ++ .mod_table_offset = BYT_FW_MOD_TABLE_OFFSET, ++ .mod_table_size = BYT_FW_MOD_TABLE_SIZE, ++ .mod_ddr_dnld = true, ++}; ++ ++static const struct sst_ipc_info cht_ipc_info = { ++ .use_32bit_ops = false, ++ .ipc_offset = 0, ++ .mbox_recv_off = 0x400, ++}; ++ ++struct sst_platform_info cht_platform_data = { ++ .probe_data = &cht_fwparse_info, ++ .ssp_data = NULL, ++ .bdata = NULL, ++ .pdata = NULL, ++ .ipc_info = &cht_ipc_info, ++ .lib_info = NULL, ++}; ++ ++struct sst_platform_info byt_rvp_platform_data = { ++ .probe_data = &byt_fwparse_info, ++ .ssp_data = NULL, ++ .bdata = &sst_byt_rvp_bdata, ++ .pdata = &sst_byt_pdata, ++ .ipc_info = &byt_ipc_info, ++ .lib_info = &byt_lib_dnld_info, ++}; ++ ++struct sst_platform_info byt_ffrd8_platform_data = { ++ .probe_data = &byt_fwparse_info, ++ .ssp_data = NULL, ++ .bdata = &sst_byt_ffrd8_bdata, ++ .pdata = &sst_byt_pdata, ++ .ipc_info = &byt_ipc_info, ++ .lib_info = &byt_lib_dnld_info, ++}; ++ ++int sst_workqueue_init(struct intel_sst_drv *ctx) ++{ ++ pr_debug("%s", __func__); ++ ++ INIT_LIST_HEAD(&ctx->memcpy_list); ++ INIT_LIST_HEAD(&ctx->libmemcpy_list); ++ INIT_LIST_HEAD(&sst_drv_ctx->rx_list); ++ INIT_LIST_HEAD(&ctx->ipc_dispatch_list); ++ INIT_LIST_HEAD(&ctx->block_list); ++ INIT_WORK(&ctx->ipc_post_msg.wq, ctx->ops->post_message); ++ init_waitqueue_head(&ctx->wait_queue); ++ ++ ctx->mad_wq = create_singlethread_workqueue("sst_mad_wq"); ++ if (!ctx->mad_wq) ++ goto err_wq; ++ ctx->post_msg_wq = ++ create_singlethread_workqueue("sst_post_msg_wq"); ++ if (!ctx->post_msg_wq) ++ goto err_wq; ++ return 0; ++err_wq: ++ return -EBUSY; ++} ++ ++void sst_init_locks(struct intel_sst_drv *ctx) ++{ ++ mutex_init(&ctx->stream_lock); ++ mutex_init(&ctx->sst_lock); ++ mutex_init(&ctx->mixer_ctrl_lock); ++ mutex_init(&ctx->csr_lock); ++ spin_lock_init(&sst_drv_ctx->rx_msg_lock); ++ spin_lock_init(&ctx->ipc_spin_lock); ++ spin_lock_init(&ctx->block_lock); ++ spin_lock_init(&ctx->pvt_id_lock); ++} ++ ++int sst_destroy_workqueue(struct intel_sst_drv *ctx) ++{ ++ pr_debug("%s", __func__); ++ if (ctx->mad_wq) ++ destroy_workqueue(ctx->mad_wq); ++ if (ctx->post_msg_wq) ++ destroy_workqueue(ctx->post_msg_wq); ++ return 0; ++} ++ ++#if IS_ENABLED(CONFIG_ACPI) ++static int sst_platform_get_resources_fdk(struct intel_sst_drv *ctx, ++ struct platform_device *pdev) ++{ ++ struct resource *rsrc; ++ ++ pr_debug("%s", __func__); ++ ++ /* All ACPI resource request here */ ++ /* Get DDR addr from platform resource table */ ++ rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!rsrc) { ++ pr_err("Invalid DDR base from IFWI"); ++ return -EIO; ++ } ++ ctx->ddr_base = rsrc->start; ++ ctx->ddr_end = rsrc->end; ++ pr_debug("DDR base: %#x", ctx->ddr_base); ++ ctx->ddr = devm_ioremap_nocache(ctx->dev, ctx->ddr_base, ++ resource_size(rsrc)); ++ if (!ctx->ddr) { ++ pr_err("unable to map DDR"); ++ return -EIO; ++ } ++ ++ /* Get Shim addr from platform resource table */ ++ rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!rsrc) { ++ pr_err("Invalid SHIM base from IFWI"); ++ return -EIO; ++ } ++ ctx->shim_phy_add = rsrc->start; ++ pr_debug("SHIM base: %#x", ctx->shim_phy_add); ++ ctx->shim = devm_ioremap_nocache(ctx->dev, ctx->shim_phy_add, ++ resource_size(rsrc)); ++ if (!ctx->shim) { ++ pr_err("unable to map SHIM"); ++ return -EIO; ++ } ++ /* reassign physical address to LPE viewpoint address */ ++ ctx->shim_phy_add = SST_BYT_SHIM_PHY_ADDR; ++ ++ /* Get mailbox addr from platform resource table */ ++ rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 2); ++ if (!rsrc) { ++ pr_err("Invalid Mailbox base from IFWI"); ++ return -EIO; ++ } ++ ctx->mailbox_add = rsrc->start; ++ pr_debug("Mailbox base: %#x", ctx->mailbox_add); ++ ctx->mailbox = devm_ioremap_nocache(ctx->dev, ctx->mailbox_add, ++ resource_size(rsrc)); ++ if (!ctx->mailbox) { ++ pr_err("unable to map mailbox"); ++ return -EIO; ++ } ++ /* reassign physical address to LPE viewpoint address */ ++ ctx->mailbox_add = sst_drv_ctx->info.mailbox_start; ++ ++ /* Get iram/iccm addr from platform resource table */ ++ rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 3); ++ if (!rsrc) { ++ pr_err("Invalid IRAM base from IFWI"); ++ return -EIO; ++ } ++ ctx->iram_base = rsrc->start; ++ ctx->iram_end = rsrc->end; ++ pr_debug("IRAM base: %#x", ctx->iram_base); ++ ctx->iram = devm_ioremap_nocache(ctx->dev, ctx->iram_base, ++ resource_size(rsrc)); ++ if (!ctx->iram) { ++ pr_err("unable to map IRAM"); ++ return -EIO; ++ } ++ ++ /* Get dram/dccm addr from platform resource table */ ++ rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 4); ++ if (!rsrc) { ++ pr_err("Invalid DRAM base from IFWI"); ++ return -EIO; ++ } ++ ctx->dram_base = rsrc->start; ++ ctx->dram_end = rsrc->end; ++ pr_debug("DRAM base: %#x", ctx->dram_base); ++ ctx->dram = devm_ioremap_nocache(ctx->dev, ctx->dram_base, ++ resource_size(rsrc)); ++ if (!ctx->dram) { ++ pr_err("unable to map DRAM"); ++ return -EIO; ++ } ++ ++ /* Register the ISR */ ++ ctx->irq_num = platform_get_irq(pdev, 0); ++ pr_debug("irq from pdev is:%d", ctx->irq_num); ++ return 0; ++} ++ ++#define LPE_IRAM_OFFSET 0x0C0000 ++#define LPE_IRAM_SIZE 0x040000 ++#define LPE_DRAM_OFFSET 0x100000 ++#define LPE_DRAM_SIZE 0x040000 ++#define LPE_SHIM_OFFSET 0x140000 ++#define LPE_SHIM_SIZE 0x004000 ++#define LPE_MBOX_OFFSET 0x144000 ++#define LPE_MBOX_SIZE 0x004000 ++ ++static int sst_platform_get_resources_edk(struct intel_sst_drv *ctx, ++ struct platform_device *pdev) ++{ ++ struct resource *rsrc; ++ ++ pr_debug("%s", __func__); ++ ++ /* All ACPI resource request here */ ++ /* Get Shim addr */ ++ rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!rsrc) { ++ pr_err("Invalid SHIM base from IFWI"); ++ return -EIO; ++ } ++ pr_debug("LPE base: %#x size:%#x", (unsigned int) rsrc->start, ++ (unsigned int)resource_size(rsrc)); ++ ctx->iram_base = rsrc->start + LPE_IRAM_OFFSET; ++ ctx->iram_end = ctx->iram_base + LPE_IRAM_SIZE - 1; ++ pr_debug("IRAM base: %#x", ctx->iram_base); ++ ctx->iram = devm_ioremap_nocache(ctx->dev, ctx->iram_base, ++ LPE_IRAM_SIZE); ++ if (!ctx->iram) { ++ pr_err("unable to map IRAM"); ++ return -EIO; ++ } ++ ++ ctx->dram_base = rsrc->start + LPE_DRAM_OFFSET; ++ ctx->dram_end = ctx->dram_base + LPE_DRAM_SIZE - 1; ++ pr_debug("DRAM base: %#x", ctx->dram_base); ++ ctx->dram = devm_ioremap_nocache(ctx->dev, ctx->dram_base, ++ LPE_DRAM_SIZE); ++ if (!ctx->dram) { ++ pr_err("unable to map DRAM"); ++ return -EIO; ++ } ++ ++ ctx->shim_phy_add = rsrc->start + LPE_SHIM_OFFSET; ++ pr_debug("SHIM base: %#x", ctx->shim_phy_add); ++ ctx->shim = devm_ioremap_nocache(ctx->dev, ctx->shim_phy_add, ++ LPE_SHIM_SIZE); ++ if (!ctx->shim) { ++ pr_err("unable to map SHIM"); ++ return -EIO; ++ } ++ /* reassign physical address to LPE viewpoint address */ ++ ctx->shim_phy_add = SST_BYT_SHIM_PHY_ADDR; ++ ++ /* Get mailbox addr */ ++ ctx->mailbox_add = rsrc->start + LPE_MBOX_OFFSET; ++ pr_debug("Mailbox base: %#x", ctx->mailbox_add); ++ ctx->mailbox = devm_ioremap_nocache(ctx->dev, ctx->mailbox_add, ++ LPE_MBOX_SIZE); ++ if (!ctx->mailbox) { ++ pr_err("unable to map mailbox"); ++ return -EIO; ++ } ++ ++ /* reassign physical address to LPE viewpoint address */ ++ ctx->mailbox_add = sst_drv_ctx->info.mailbox_start; ++ ++ rsrc = platform_get_resource(pdev, IORESOURCE_MEM, 2); ++ if (!rsrc) { ++ pr_err("Invalid DDR base from IFWI"); ++ return -EIO; ++ } ++ ctx->ddr_base = rsrc->start; ++ ctx->ddr_end = rsrc->end; ++ pr_debug("DDR base: %#x", ctx->ddr_base); ++ ctx->ddr = devm_ioremap_nocache(ctx->dev, ctx->ddr_base, ++ resource_size(rsrc)); ++ if (!ctx->ddr) { ++ pr_err("unable to map DDR"); ++ return -EIO; ++ } ++ /* Register the ISR */ ++ if (!strncmp(ctx->hid, "80860F28", 8)) ++ ctx->irq_num = platform_get_irq(pdev, 0); ++ else if (!strncmp(ctx->hid, "808622A8", 8)) { ++ /* FIXME: IRQ number will be moved to 0 once the BIOS fix is done */ ++ ctx->irq_num = platform_get_irq(pdev, 5); ++ } else ++ return -EINVAL; ++ return 0; ++} ++ ++static int sst_platform_get_resources(const char *hid, ++ struct intel_sst_drv *ctx, struct platform_device *pdev) ++{ ++ ++ pr_debug("%s", __func__); ++ ++ if (!strncmp(hid, "LPE0F281", 8)) { ++ ctx->pci_id = SST_BYT_PCI_ID; ++ return sst_platform_get_resources_fdk(ctx, pdev); ++ } ++ if (!strncmp(hid, "808622A8", 8)) { ++ ctx->pci_id = SST_CHT_PCI_ID; ++ return sst_platform_get_resources_edk(ctx, pdev); ++ } ++ if (!strncmp(hid, "80860F28", 8)) { ++ ctx->pci_id = SST_BYT_PCI_ID; ++ return sst_platform_get_resources_edk(ctx, pdev); ++ } else if (!strncmp(hid, "LPE0F28", 7)) { ++ ctx->pci_id = SST_BYT_PCI_ID; ++ return sst_platform_get_resources_fdk(ctx, pdev); ++ } else { ++ pr_err("Invalid device\n"); ++ return -EINVAL; ++ } ++} ++ ++int sst_acpi_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ acpi_handle handle = ACPI_HANDLE(dev); ++ struct acpi_device *device; ++ const char *hid; ++ int i, ret = 0; ++ struct intel_sst_drv *ctx; ++ ++ ret = acpi_bus_get_device(handle, &device); ++ if (ret) { ++ pr_err("%s: could not get acpi device - %d\n", __func__, ret); ++ return -ENODEV; ++ } ++ ++ if (acpi_bus_get_status(device) || !device->status.present) { ++ pr_err("%s: device has invalid status", __func__); ++ return -ENODEV; ++ } ++ ++ hid = acpi_device_hid(device); ++ pr_debug("%s for %s", __func__, hid); ++ ret = sst_alloc_drv_context(dev); ++ if (ret) ++ return ret; ++ ctx = sst_drv_ctx; ++ ctx->dev = dev; ++ ctx->hid = hid; ++ ++ ret = sst_platform_get_resources(hid, ctx, pdev); ++ if (ret) ++ return ret; ++ /* need to save shim registers in BYT */ ++ ctx->shim_regs64 = devm_kzalloc(dev, sizeof(*ctx->shim_regs64), ++ GFP_KERNEL); ++ if (!ctx->shim_regs64) ++ return -ENOMEM; ++ ++ ret = sst_driver_ops(ctx); ++ if (ret != 0) ++ return -EINVAL; ++ ++ sst_init_locks(ctx); ++ ++ ctx->stream_cnt = 0; ++ ctx->fw_in_mem = NULL; ++ ctx->use_dma = 1; ++ ctx->use_lli = 1; ++ ++ if (sst_workqueue_init(ctx)) ++ goto do_free_wq; ++ ++ ctx->pdata = sst_get_acpi_driver_data(hid); ++ if (!ctx->pdata) ++ return -EINVAL; ++ if (INTEL_MID_BOARD(3, TABLET, BYT, BLK, PRO, CRV2)) { ++ /* BYT-CR V2 has only mono speaker, while ++ * byt has stereo speaker, for both ++ * HID is same, so platform data also is ++ * same, hence overriding bdata based on spid ++ */ ++ ctx->pdata->bdata = &sst_byt_crv2_bdata; ++ pr_info("Overriding bdata for byt-crv2\n"); ++ } ++ ++ ctx->use_32bit_ops = ctx->pdata->ipc_info->use_32bit_ops; ++ ctx->mailbox_recv_offset = ctx->pdata->ipc_info->mbox_recv_off; ++ ++ memcpy(&ctx->info, ctx->pdata->probe_data, sizeof(ctx->info)); ++ ++ ctx->ipc_reg.ipcx = SST_IPCX + ctx->pdata->ipc_info->ipc_offset; ++ ctx->ipc_reg.ipcd = SST_IPCD + ctx->pdata->ipc_info->ipc_offset; ++ ++ pr_debug("Got drv data max stream %d\n", ++ ctx->info.max_streams); ++ for (i = 1; i <= ctx->info.max_streams; i++) { ++ struct stream_info *stream = &ctx->streams[i]; ++ mutex_init(&stream->lock); ++ } ++ ret = sst_request_firmware_async(ctx); ++ if (ret) { ++ pr_err("Firmware download failed:%d\n", ret); ++ goto do_free_wq; ++ } ++ ++ ret = devm_request_threaded_irq(ctx->dev, ctx->irq_num, ctx->ops->interrupt, ++ ctx->ops->irq_thread, 0, SST_DRV_NAME, ++ ctx); ++ if (ret) ++ return ret; ++ pr_debug("Registered IRQ %#x\n", ctx->irq_num); ++ ++ /*Register LPE Control as misc driver*/ ++ ret = misc_register(&lpe_ctrl); ++ if (ret) { ++ pr_err("couldn't register control device\n"); ++ goto do_free_wq; ++ } ++ /* mask all SSP and DMA irq to IA - enabled in acpi kernel driver */ ++ sst_shim_write64(ctx->shim, SST_IMRX, 0xFFFF0038); ++ ++ if (ctx->use_32bit_ops) { ++ pr_debug("allocate mem for context save/restore\n "); ++ /*allocate mem for fw context save during suspend*/ ++ ctx->fw_cntx = devm_kzalloc(ctx->dev, FW_CONTEXT_MEM, GFP_KERNEL); ++ if (!ctx->fw_cntx) { ++ ret = -ENOMEM; ++ goto do_free_misc; ++ } ++ /*setting zero as that is valid mem to restore*/ ++ ctx->fw_cntx_size = 0; ++ } ++ ++ platform_set_drvdata(pdev, ctx); ++ pm_runtime_set_active(dev); ++ pm_runtime_enable(dev); ++ register_sst(dev); ++ sst_debugfs_init(ctx); ++ sst_set_fw_state_locked(ctx, SST_UN_INIT); ++ sst_save_shim64(ctx, ctx->shim, ctx->shim_regs64); ++ pr_info("%s successfully done!\n", __func__); ++ return ret; ++ ++do_free_misc: ++ misc_deregister(&lpe_ctrl); ++do_free_wq: ++ sst_destroy_workqueue(ctx); ++ ++ sst_drv_ctx = NULL; ++ platform_set_drvdata(pdev, NULL); ++ pr_err("%s: failed with %d\n", __func__, ret); ++ return ret; ++} ++ ++/** ++* intel_sst_remove - remove function ++* ++* @pdev: platform device structure ++* ++* This function is called by OS when a device is unloaded ++* This frees the interrupt etc ++*/ ++int sst_acpi_remove(struct platform_device *pdev) ++{ ++ struct intel_sst_drv *ctx; ++ ++ ctx = platform_get_drvdata(pdev); ++ sst_debugfs_exit(ctx); ++ pm_runtime_get_noresume(ctx->dev); ++ pm_runtime_disable(ctx->dev); ++ unregister_sst(ctx->dev); ++ sst_set_fw_state_locked(ctx, SST_UN_INIT); ++ misc_deregister(&lpe_ctrl); ++ kfree(ctx->runtime_param.param.addr); ++ flush_scheduled_work(); ++ sst_destroy_workqueue(ctx); ++ kfree(ctx->fw_sg_list.src); ++ kfree(ctx->fw_sg_list.dst); ++ ctx->fw_sg_list.list_len = 0; ++ kfree(ctx->fw_in_mem); ++ ctx->fw_in_mem = NULL; ++ sst_memcpy_free_resources(); ++ sst_drv_ctx = NULL; ++ platform_set_drvdata(pdev, NULL); ++ return 0; ++} ++ ++#else ++int sst_acpi_probe(struct platform_device *pdev) ++{ ++ return -EINVAL; ++} ++ ++int sst_acpi_remove(struct platform_device *pdev) ++{ ++ return -EINVAL; ++} ++#endif ++ ++MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine ACPI Driver"); ++MODULE_AUTHOR("Ramesh Babu K V"); ++MODULE_AUTHOR("Omair Mohammed Abdullah"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("sst"); +diff --git a/sound/soc/intel/sst/sst_app_compat_interface.c b/sound/soc/intel/sst/sst_app_compat_interface.c +new file mode 100644 +index 0000000..4babd76 +--- /dev/null ++++ b/sound/soc/intel/sst/sst_app_compat_interface.c +@@ -0,0 +1,85 @@ ++ ++/* ++ * sst_app_compat_interface.c - Intel SST Driver for audio engine ++ * ++ * Copyright (C) 2013-14 Intel Corp ++ * Authors: Subhransu S. Prusty ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * This driver exposes the audio engine functionalities to the ALSA ++ * and middleware. ++ */ ++ ++/* This file is included from sst.c */ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include "sst.h" ++ ++struct snd_ppp_params32 { ++ __u8 algo_id;/* Post/Pre processing algorithm ID */ ++ __u8 str_id; /*Only 5 bits used 0 - 31 are valid*/ ++ __u8 enable; /* 0= disable, 1= enable*/ ++ __u8 operation; ++ __u32 size; /*Size of parameters for all blocks*/ ++ __u32 params; ++} __packed; ++ ++enum { ++SNDRV_SST_SET_ALGO32 = _IOW('L', 0x30, struct snd_ppp_params32), ++SNDRV_SST_GET_ALGO32 = _IOWR('L', 0x31, struct snd_ppp_params32), ++}; ++ ++static long sst_algo_compat(unsigned int cmd, ++ struct snd_ppp_params32 __user *arg32) ++{ ++ int retval = 0; ++ struct snd_ppp_params32 algo_params32; ++ struct snd_ppp_params algo_params; ++ ++ if (copy_from_user(&algo_params32, arg32, sizeof(algo_params32))) { ++ pr_debug("%s: copy from user failed: %d\n", __func__, retval); ++ return -EINVAL; ++ } ++ ++ memcpy(&algo_params, &algo_params32, sizeof(algo_params32)-sizeof(__u32)); ++ algo_params.params = compat_ptr(algo_params32.params); ++ retval = intel_sst_ioctl_dsp(cmd, &algo_params, (unsigned long)arg32); ++ return retval; ++} ++ ++static long intel_sst_ioctl_compat(struct file *file_ptr, ++ unsigned int cmd, unsigned long arg) ++{ ++ void __user *argp = compat_ptr(arg); ++ ++ switch (_IOC_NR(cmd)) { ++ case _IOC_NR(SNDRV_SST_DRIVER_INFO): ++ case _IOC_NR(SNDRV_SST_TUNING_PARAMS): ++ return intel_sst_ioctl(file_ptr, cmd, (unsigned long)argp); ++ case _IOC_NR(SNDRV_SST_SET_ALGO32): ++ return sst_algo_compat(SNDRV_SST_SET_ALGO, argp); ++ case _IOC_NR(SNDRV_SST_GET_ALGO32): ++ return sst_algo_compat(SNDRV_SST_GET_ALGO, argp); ++ ++ default: ++ return -ENOTTY; ++ } ++ return 0; ++} +diff --git a/sound/soc/intel/sst/sst_app_interface.c b/sound/soc/intel/sst/sst_app_interface.c +new file mode 100644 +index 0000000..cfbbf4f +--- /dev/null ++++ b/sound/soc/intel/sst/sst_app_interface.c +@@ -0,0 +1,342 @@ ++/* ++ * sst_app_interface.c - Intel SST Driver for audio engine ++ * ++ * Copyright (C) 2008-10 Intel Corp ++ * Authors: Vinod Koul ++ * Harsha Priya ++ * Dharageswari R ++ * Jeeja KP ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * This driver exposes the audio engine functionalities to the ALSA ++ * and middleware. ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../sst_platform.h" ++#include "../platform_ipc_v2.h" ++#include "sst.h" ++ ++#define AM_MODULE 1 ++ ++/** ++ * intel_sst_open_cntrl - opens a handle to driver ++ * ++ * @i_node: inode structure ++ * @file_ptr:pointer to file ++ * ++ * This function is called by OS when a user space component ++ * tries to get a driver handle to /dev/intel_sst_control. ++ * Only one handle at a time will be allowed ++ * This is for control operations only ++ */ ++int intel_sst_open_cntrl(struct inode *i_node, struct file *file_ptr) ++{ ++ unsigned int retval; ++ ++ /* audio manager open */ ++ mutex_lock(&sst_drv_ctx->stream_lock); ++ retval = intel_sst_check_device(); ++ if (retval) { ++ mutex_unlock(&sst_drv_ctx->stream_lock); ++ return retval; ++ } ++ pr_debug("AM handle opened\n"); ++ ++ mutex_unlock(&sst_drv_ctx->stream_lock); ++ return retval; ++} ++ ++ ++int intel_sst_release_cntrl(struct inode *i_node, struct file *file_ptr) ++{ ++ /* audio manager close */ ++ mutex_lock(&sst_drv_ctx->stream_lock); ++ sst_pm_runtime_put(sst_drv_ctx); ++ mutex_unlock(&sst_drv_ctx->stream_lock); ++ pr_debug("AM handle closed\n"); ++ return 0; ++} ++ ++/** ++ * sst_get_max_streams - Function to populate the drv info structure ++ * with the max streams ++ * @info: the out params that holds the drv info ++ * ++ * This function is called when max streams count is required ++**/ ++void sst_get_max_streams(struct snd_sst_driver_info *info) ++{ ++ pr_debug("info.max_streams %d num_probes %d\n", sst_drv_ctx->info.max_streams, ++ sst_drv_ctx->info.num_probes); ++ info->max_streams = sst_drv_ctx->info.max_streams - sst_drv_ctx->info.num_probes; ++} ++ ++/** ++ * sst_create_algo_ipc - create ipc msg for algorithm parameters ++ * ++ * @algo_params: Algorithm parameters ++ * @msg: post msg pointer ++ * @pvt_id: Checked by wake_up_block ++ * ++ * This function is called to create ipc msg ++ * For copying the mailbox data the function returns offset in bytes to mailbox ++ * memory where the mailbox data should be copied after msg header ++ */ ++static int sst_create_algo_ipc(struct snd_ppp_params *algo_params, ++ struct ipc_post **msg, int pvt_id) ++{ ++ u32 header_size = 0; ++ u32 ipc_msg_size = sizeof(u32) + sizeof(*algo_params) ++ - sizeof(algo_params->params) + algo_params->size; ++ u32 offset = 0; ++ ++ if (ipc_msg_size > SST_MAILBOX_SIZE) ++ return -ENOMEM; ++ if (sst_create_ipc_msg(msg, true)) ++ return -ENOMEM; ++ sst_fill_header(&(*msg)->header, ++ IPC_IA_ALG_PARAMS, 1, pvt_id); ++ (*msg)->header.part.data = ipc_msg_size; ++ memcpy((*msg)->mailbox_data, &(*msg)->header, sizeof(u32)); ++ offset = sizeof(u32); ++ header_size = sizeof(*algo_params) - sizeof(algo_params->params); ++ memcpy((*msg)->mailbox_data + offset, algo_params, header_size); ++ offset += header_size; ++ return offset; ++} ++ ++static long sst_send_algo(struct snd_ppp_params *algo_params, ++ struct sst_block *block, enum sst_algo_ops algo) ++{ ++ struct ipc_post *msg; ++ int retval; ++ int offset; ++ ++ pr_debug("Algo ID %d Str id %d Enable %d Size %d\n", ++ algo_params->algo_id, algo_params->str_id, ++ algo_params->enable, algo_params->size); ++ ++ algo_params->operation = algo; ++ ++ offset = sst_create_algo_ipc(algo_params, &msg, block->drv_id); ++ if (offset < 0) ++ return offset; ++ ++ if (copy_from_user(msg->mailbox_data + offset, ++ algo_params->params, algo_params->size)) { ++ kfree(msg); ++ return -EFAULT; ++ } ++ ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ retval = sst_wait_timeout(sst_drv_ctx, block); ++ if (retval) { ++ pr_debug("%s: failed for algo ops %s with retval %d\n", ++ __func__, algo ? "SST_GET_ALGO" : "SST_SET_ALGO", retval); ++ return -EIO; ++ } ++ return 0; ++} ++ ++/** ++ * intel_sst_ioctl_dsp - receives the device ioctl's ++ * ++ * @cmd:Ioctl cmd ++ * @arg:data ++ * ++ * This function is called when a user space component ++ * sends a DSP Ioctl to SST driver ++ */ ++long intel_sst_ioctl_dsp(unsigned int cmd, ++ struct snd_ppp_params *algo_params, unsigned long arg) ++{ ++ int retval = 0; ++ struct snd_ppp_params *algo_params_copied; ++ struct sst_block *block; ++ int pvt_id; ++ ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ block = sst_create_block(sst_drv_ctx, IPC_IA_ALG_PARAMS, pvt_id); ++ if (block == NULL) ++ return -ENOMEM; ++ ++ switch (_IOC_NR(cmd)) { ++ case _IOC_NR(SNDRV_SST_SET_ALGO): ++ retval = sst_send_algo(algo_params, block, SST_SET_ALGO); ++ break; ++ ++ case _IOC_NR(SNDRV_SST_GET_ALGO): ++ retval = sst_send_algo(algo_params, block, SST_GET_ALGO); ++ if (retval) ++ break; ++ algo_params_copied = (struct snd_ppp_params *)block->data; ++ ++ if (algo_params_copied->size > algo_params->size) { ++ pr_debug("mem insufficient to copy\n"); ++ retval = -EMSGSIZE; ++ break; ++ } else { ++ char __user *tmp; ++ struct snd_ppp_params *get_params; ++ char *pp; ++ ++ tmp = (char __user *)arg + offsetof( ++ struct snd_ppp_params, size); ++ if (copy_to_user(tmp, &algo_params_copied->size, ++ sizeof(u32))) { ++ retval = -EFAULT; ++ break; ++ } ++ tmp = (char __user *)arg + offsetof( ++ struct snd_ppp_params, enable); ++ if (copy_to_user(tmp, &algo_params_copied->enable, ++ sizeof(u8))) { ++ retval = -EFAULT; ++ break; ++ } ++ if (algo_params_copied->size == 0) ++ break; ++ ++ get_params = kmalloc(sizeof(*get_params), GFP_KERNEL); ++ if (!get_params) { ++ pr_err("sst: mem alloc failed\n"); ++ break; ++ } ++ memcpy(get_params, algo_params_copied, ++ sizeof(*get_params)); ++ ++ get_params->params = kmalloc(get_params->size, GFP_KERNEL); ++ if (!get_params->params) { ++ pr_err("sst: mem alloc failed\n"); ++ goto free_mem; ++ } ++ pp = (char *)algo_params_copied; ++ pp = pp + sizeof(*get_params) - ++ sizeof(get_params->params); ++ memcpy(get_params->params, pp, get_params->size); ++ if (copy_to_user(algo_params->params, ++ get_params->params, ++ get_params->size)) { ++ retval = -EFAULT; ++ } ++ kfree(get_params->params); ++ ++free_mem: ++ kfree(get_params); ++ ++ } ++ break; ++ } ++ sst_free_block(sst_drv_ctx, block); ++ pr_debug("ioctl dsp return = %d, for cmd = %x\n", retval, cmd); ++ return retval; ++} ++ ++static long sst_ioctl_tuning_params(unsigned int cmd, unsigned long arg) ++{ ++ struct snd_sst_tuning_params params; ++ struct ipc_post *msg; ++ unsigned long address; ++ ++ if (copy_from_user(¶ms, (void __user *)arg, sizeof(params))) ++ return -EFAULT; ++ pr_debug("sst: Parameter %d, Stream %d, Size %d\n", params.type, ++ params.str_id, params.size); ++ if (sst_create_ipc_msg(&msg, true)) ++ return -ENOMEM; ++ address = (unsigned long)params.addr; ++ ++ switch (_IOC_NR(cmd)) { ++ case _IOC_NR(SNDRV_SST_TUNING_PARAMS): ++ sst_fill_header(&msg->header, IPC_IA_TUNING_PARAMS, 1, ++ params.str_id); ++ break; ++ } ++ msg->header.part.data = sizeof(u32) + sizeof(params) + params.size; ++ memcpy(msg->mailbox_data, &msg->header.full, sizeof(u32)); ++ memcpy(msg->mailbox_data + sizeof(u32), ¶ms, sizeof(params)); ++ /* driver doesn't need to send address, so overwrite addr with data */ ++ if (copy_from_user(msg->mailbox_data + sizeof(u32) ++ + sizeof(params) - sizeof(params.addr), ++ (void __user *)address, params.size)) { ++ kfree(msg->mailbox_data); ++ kfree(msg); ++ return -EFAULT; ++ } ++ ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ return 0; ++} ++/** ++ * intel_sst_ioctl - receives the device ioctl's ++ * @file_ptr:pointer to file ++ * @cmd:Ioctl cmd ++ * @arg:data ++ * ++ * This function is called by OS when a user space component ++ * sends an Ioctl to SST driver ++ */ ++long intel_sst_ioctl(struct file *file_ptr, unsigned int cmd, unsigned long arg) ++{ ++ int retval = 0; ++ struct snd_ppp_params algo_params; ++ ++ if (sst_drv_ctx->sst_state != SST_FW_RUNNING) ++ return -EBUSY; ++ ++ switch (_IOC_NR(cmd)) { ++ case _IOC_NR(SNDRV_SST_DRIVER_INFO): { ++ struct snd_sst_driver_info info; ++ ++ pr_debug("SNDRV_SST_DRIVER_INFO received\n"); ++ sst_get_max_streams(&info); ++ ++ if (copy_to_user((void __user *)arg, &info, ++ sizeof(info))) ++ retval = -EFAULT; ++ break; ++ } ++ case _IOC_NR(SNDRV_SST_GET_ALGO): ++ case _IOC_NR(SNDRV_SST_SET_ALGO): ++ if (copy_from_user(&algo_params, (void __user *)arg, ++ sizeof(algo_params))) { ++ return -EFAULT; ++ } ++ retval = intel_sst_ioctl_dsp(cmd, &algo_params, arg); ++ break; ++ ++ case _IOC_NR(SNDRV_SST_TUNING_PARAMS): ++ retval = sst_ioctl_tuning_params(cmd, arg); ++ break; ++ ++ default: ++ retval = -EINVAL; ++ } ++ pr_debug("intel_sst_ioctl:complete ret code = %d for command = %x\n", retval, cmd); ++ return retval; ++} ++ +diff --git a/sound/soc/intel/sst/sst_debug.c b/sound/soc/intel/sst/sst_debug.c +new file mode 100644 +index 0000000..ce771c5 +--- /dev/null ++++ b/sound/soc/intel/sst/sst_debug.c +@@ -0,0 +1,1328 @@ ++/* ++ * sst_debug.c - Intel SST Driver debugfs support ++ * ++ * Copyright (C) 2012 Intel Corp ++ * Authors: Vinod Koul ++ * Omair Mohammed Abdullah ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This file contains all debugfs functions ++ * Support includes: ++ * - Disabling/Enabling runtime PM for SST ++ * - Reading/Writing SST SHIM registers ++ * - Reading/Enabling Input OSC Clock ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": debugfs: " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../sst_platform.h" ++#include "../platform_ipc_v2.h" ++#include "sst.h" ++ ++#define DMA_NUM_CH 8 ++#define DEBUGFS_SSP_BUF_SIZE 300 /* 22 chars * 12 reg*/ ++#define DEBUGFS_DMA_BUF_SIZE 2500 /* 32 chars * 78 regs*/ ++ ++/* Register Offsets of SSP3 and LPE DMA */ ++u32 ssp_reg_off[] = {0x0, 0x4, 0x8, 0xC, 0x10, 0x28, 0x2C, 0x30, 0x34, 0x38, ++ 0x3C, 0x40}; ++/* Excludes the channel registers */ ++u32 dma_reg_off[] = {0x2C0, 0x2C8, 0x2D0, 0x2D8, 0x2E0, 0x2E8, ++ 0x2F0, 0x2F8, 0x300, 0x308, 0x310, 0x318, 0x320, 0x328, 0x330, ++ 0x338, 0x340, 0x348, 0x350, 0x358, 0x360, 0x368, 0x370, 0x378, ++ 0x380, 0x388, 0x390, 0x398, 0x3A0, 0x3A8, 0x3B0, 0x3C8, 0x3D0, ++ 0x3D8, 0x3E0, 0x3E8, 0x3F0, 0x3F8}; ++ ++static ssize_t sst_debug_shim_read(struct file *file, char __user *user_buf, ++ size_t count, loff_t *ppos) ++{ ++ struct intel_sst_drv *drv = file->private_data; ++ unsigned long long val = 0; ++ unsigned int addr; ++ char buf[512]; ++ char name[8]; ++ int pos = 0; ++ ++ buf[0] = 0; ++ if (drv->sst_state == SST_SUSPENDED) { ++ pr_err("FW suspended, cannot read SHIM registers\n"); ++ return -EFAULT; ++ } ++ ++ for (addr = SST_SHIM_BEGIN; addr <= SST_SHIM_END; addr += 8) { ++ switch (drv->pci_id) { ++ case SST_CLV_PCI_ID: ++ val = sst_shim_read(drv->shim, addr); ++ break; ++ case SST_MRFLD_PCI_ID: ++ case SST_BYT_PCI_ID: ++ case SST_CHT_PCI_ID: ++ val = sst_shim_read64(drv->shim, addr); ++ break; ++ } ++ ++ name[0] = 0; ++ switch (addr) { ++ case SST_ISRX: ++ strcpy(name, "ISRX"); break; ++ case SST_ISRD: ++ strcpy(name, "ISRD"); break; ++ case SST_IPCX: ++ strcpy(name, "IPCX"); break; ++ case SST_IPCD: ++ strcpy(name, "IPCD"); break; ++ case SST_IMRX: ++ strcpy(name, "IMRX"); break; ++ case SST_IMRD: ++ strcpy(name, "IMRD"); break; ++ } ++ pos += sprintf(buf + pos, "0x%.2x: %.8llx %s\n", addr, val, name); ++ } ++ ++ return simple_read_from_buffer(user_buf, count, ppos, ++ buf, strlen(buf)); ++} ++ ++static ssize_t sst_debug_shim_write(struct file *file, ++ const char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ struct intel_sst_drv *drv = file->private_data; ++ char buf[32]; ++ char *start = buf, *end; ++ unsigned long long value; ++ unsigned long reg_addr; ++ int ret_val; ++ size_t buf_size = min(count, sizeof(buf)-1); ++ ++ if (copy_from_user(buf, user_buf, buf_size)) ++ return -EFAULT; ++ buf[buf_size] = 0; ++ ++ if (drv->sst_state == SST_SUSPENDED) { ++ pr_err("FW suspended, cannot write SHIM registers\n"); ++ return -EFAULT; ++ } ++ ++ while (*start == ' ') ++ start++; ++ end = start; ++ while (isalnum(*end)) ++ end++; ++ *end = 0; ++ ++ ret_val = kstrtoul(start, 16, ®_addr); ++ if (ret_val) { ++ pr_err("kstrtoul failed, ret_val = %d\n", ret_val); ++ return ret_val; ++ } ++ if (!(SST_SHIM_BEGIN < reg_addr && reg_addr < SST_SHIM_END)) { ++ pr_err("invalid shim address: 0x%lx\n", reg_addr); ++ return -EINVAL; ++ } ++ ++ start = end + 1; ++ while (*start == ' ') ++ start++; ++ ++ ret_val = kstrtoull(start, 16, &value); ++ if (ret_val) { ++ pr_err("kstrtoul failed, ret_val = %d\n", ret_val); ++ return ret_val; ++ } ++ ++ pr_debug("writing shim: 0x%.2lx=0x%.8llx", reg_addr, value); ++ ++ if (drv->pci_id == SST_CLV_PCI_ID) ++ sst_shim_write(drv->shim, reg_addr, (u32) value); ++ else if (drv->pci_id == SST_MRFLD_PCI_ID) ++ sst_shim_write64(drv->shim, reg_addr, (u64) value); ++ ++ /* Userspace has been fiddling around behind the kernel's back */ ++ add_taint(TAINT_USER, LOCKDEP_NOW_UNRELIABLE); ++ return buf_size; ++} ++ ++static const struct file_operations sst_debug_shim_ops = { ++ .open = simple_open, ++ .read = sst_debug_shim_read, ++ .write = sst_debug_shim_write, ++ .llseek = default_llseek, ++}; ++ ++#define RESVD_DUMP_SZ 40 ++#define IA_LPE_MAILBOX_DUMP_SZ 100 ++#define LPE_IA_MAILBOX_DUMP_SZ 100 ++#define SCU_LPE_MAILBOX_DUMP_SZ 256 ++#define LPE_SCU_MAILBOX_DUMP_SZ 256 ++ ++static inline int is_fw_running(struct intel_sst_drv *drv) ++{ ++ pm_runtime_get_sync(drv->dev); ++ atomic_inc(&drv->pm_usage_count); ++ if (drv->sst_state != SST_FW_RUNNING) { ++ pr_err("FW not running\n"); ++ sst_pm_runtime_put(drv); ++ return -EFAULT; ++ } ++ return 0; ++} ++ ++static inline int read_buffer_fromio(char *dest, unsigned int sz, ++ const u32 __iomem *from, ++ unsigned int num_dwords) ++{ ++ int i; ++ const unsigned int rowsz = 16, groupsz = 4; ++ const unsigned int size = num_dwords * sizeof(u32); ++ unsigned int linelen, printed = 0, remaining = size; ++ ++ u8 *tmp = kmalloc(size, GFP_KERNEL); ++ if (!tmp) ++ return -ENOMEM; ++ memcpy_fromio(tmp, from, size); ++ for (i = 0; i < size; i += rowsz) { ++ linelen = min(remaining, rowsz); ++ remaining -= rowsz; ++ hex_dump_to_buffer(tmp + i, linelen, rowsz, groupsz, ++ dest + printed, sz - printed, false); ++ printed += linelen * 2 + linelen / groupsz - 1; ++ *(dest + printed++) = '\n'; ++ *(dest + printed) = 0; ++ } ++ kfree(tmp); ++ return 0; ++} ++ ++static inline int copy_sram_to_user_buffer(char __user *user_buf, size_t count, loff_t *ppos, ++ unsigned int num_dwords, const u32 __iomem *from, ++ u32 offset) ++{ ++ ssize_t bytes_read; ++ char *buf; ++ int pos; ++ unsigned int bufsz = 48 + sizeof(u32) * num_dwords * (2 + 1) + 1; ++ ++ buf = kmalloc(bufsz, GFP_KERNEL); ++ if (!buf) { ++ pr_err("%s: no memory\n", __func__); ++ return -ENOMEM; ++ } ++ *buf = 0; ++ pos = scnprintf(buf, 48, "Reading %u dwords from offset %#x\n", ++ num_dwords, offset); ++ read_buffer_fromio(buf + pos, bufsz - pos, from, num_dwords); ++ bytes_read = simple_read_from_buffer(user_buf, count, ppos, ++ buf, strlen(buf)); ++ kfree(buf); ++ return bytes_read; ++} ++ ++static ssize_t sst_debug_sram_lpe_debug_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ ++ struct intel_sst_drv *drv = file->private_data; ++ int ret = 0; ++ ++ ret = is_fw_running(drv); ++ if (ret) ++ return ret; ++ ++ ret = copy_sram_to_user_buffer(user_buf, count, ppos, RESVD_DUMP_SZ, ++ (u32 *)(drv->mailbox + SST_RESERVED_OFFSET), ++ SST_RESERVED_OFFSET); ++ sst_pm_runtime_put(drv); ++ return ret; ++} ++ ++static const struct file_operations sst_debug_sram_lpe_debug_ops = { ++ .open = simple_open, ++ .read = sst_debug_sram_lpe_debug_read, ++ .llseek = default_llseek, ++}; ++ ++static ssize_t sst_debug_sram_lpe_checkpoint_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ ++ struct intel_sst_drv *drv = file->private_data; ++ int ret = 0; ++ u32 offset; ++ ++ ret = is_fw_running(drv); ++ if (ret) ++ return ret; ++ ++ offset = sst_drv_ctx->pdata->debugfs_data->checkpoint_offset; ++ ++ ret = copy_sram_to_user_buffer(user_buf, count, ppos, ++ sst_drv_ctx->pdata->debugfs_data->checkpoint_size, ++ (u32 *)(drv->mailbox + offset), offset); ++ sst_pm_runtime_put(drv); ++ return ret; ++} ++ ++static const struct file_operations sst_debug_sram_lpe_checkpoint_ops = { ++ .open = simple_open, ++ .read = sst_debug_sram_lpe_checkpoint_read, ++ .llseek = default_llseek, ++}; ++ ++static ssize_t sst_debug_sram_ia_lpe_mbox_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ ++ struct intel_sst_drv *drv = file->private_data; ++ int ret = 0; ++ ++ ret = is_fw_running(drv); ++ if (ret) ++ return ret; ++ ret = copy_sram_to_user_buffer(user_buf, count, ppos, IA_LPE_MAILBOX_DUMP_SZ, ++ (u32 *)(drv->mailbox + SST_MAILBOX_SEND), ++ SST_MAILBOX_SEND); ++ sst_pm_runtime_put(drv); ++ return ret; ++} ++ ++static const struct file_operations sst_debug_sram_ia_lpe_mbox_ops = { ++ .open = simple_open, ++ .read = sst_debug_sram_ia_lpe_mbox_read, ++ .llseek = default_llseek, ++}; ++ ++static ssize_t sst_debug_sram_lpe_ia_mbox_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ ++ struct intel_sst_drv *drv = file->private_data; ++ int ret = 0; ++ ++ ret = is_fw_running(drv); ++ if (ret) ++ return ret; ++ ++ ret = copy_sram_to_user_buffer(user_buf, count, ppos, LPE_IA_MAILBOX_DUMP_SZ, ++ (u32 *)(drv->mailbox + drv->mailbox_recv_offset), ++ drv->mailbox_recv_offset); ++ sst_pm_runtime_put(drv); ++ return ret; ++} ++ ++static const struct file_operations sst_debug_sram_lpe_ia_mbox_ops = { ++ .open = simple_open, ++ .read = sst_debug_sram_lpe_ia_mbox_read, ++ .llseek = default_llseek, ++}; ++ ++static ssize_t sst_debug_sram_lpe_scu_mbox_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ struct intel_sst_drv *drv = file->private_data; ++ int ret = 0; ++ ++ ret = is_fw_running(drv); ++ if (ret) ++ return ret; ++ ret = copy_sram_to_user_buffer(user_buf, count, ppos, LPE_SCU_MAILBOX_DUMP_SZ, ++ (u32 *)(drv->mailbox + SST_LPE_SCU_MAILBOX), ++ SST_LPE_SCU_MAILBOX); ++ sst_pm_runtime_put(drv); ++ return ret; ++} ++ ++static const struct file_operations sst_debug_sram_lpe_scu_mbox_ops = { ++ .open = simple_open, ++ .read = sst_debug_sram_lpe_scu_mbox_read, ++ .llseek = default_llseek, ++}; ++ ++static ssize_t sst_debug_sram_scu_lpe_mbox_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ struct intel_sst_drv *drv = file->private_data; ++ int ret = 0; ++ ++ ret = is_fw_running(drv); ++ if (ret) ++ return ret; ++ ret = copy_sram_to_user_buffer(user_buf, count, ppos, SCU_LPE_MAILBOX_DUMP_SZ, ++ (u32 *)(drv->mailbox + SST_SCU_LPE_MAILBOX), ++ SST_SCU_LPE_MAILBOX); ++ sst_pm_runtime_put(drv); ++ return ret; ++} ++ ++static const struct file_operations sst_debug_sram_scu_lpe_mbox_ops = { ++ .open = simple_open, ++ .read = sst_debug_sram_scu_lpe_mbox_read, ++ .llseek = default_llseek, ++}; ++ ++static ssize_t sst_debug_lpe_log_enable_write(struct file *file, ++ const char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ struct intel_sst_drv *drv = file->private_data; ++ struct ipc_post *msg = NULL; ++ char buf[32]; ++ int str_id = 0; /* DUMMY, required by post message */ ++ struct snd_sst_lpe_log_params params; ++ int ret_val = 0; ++ char *start = buf, *end; ++ int i = 0; ++ u8 *addr; ++ unsigned long tmp; ++ ++ size_t buf_size = min(count, sizeof(buf)-1); ++ memset(¶ms, 0, sizeof(params)); ++ ++ ret_val = is_fw_running(drv); ++ if (ret_val) ++ return ret_val; ++ ++ if (copy_from_user(buf, user_buf, buf_size)) { ++ ret_val = -EFAULT; ++ goto put_pm_runtime; ++ } ++ ++ buf[buf_size] = 0; ++ ++ addr = ¶ms.dbg_type; ++ for (i = 0; i < (sizeof(params) - sizeof(u8)); i++) { ++ while (*start == ' ') ++ start++; ++ end = start; ++ while (isalnum(*end)) ++ end++; ++ *end = 0; ++ ret_val = kstrtoul(start, 16, &tmp); ++ if (ret_val) { ++ pr_err("kstrtoul failed, ret_val = %d\n", ret_val); ++ goto put_pm_runtime; ++ } ++ *addr++ = (u8)tmp; ++ start = end + 1; ++ } ++ ++ pr_debug("dbg_type = %d module_id = %d log_level = %d\n", ++ params.dbg_type, params.module_id, params.log_level); ++ ++ if (params.dbg_type < NO_DEBUG || params.dbg_type > PTI_DEBUG) { ++ ret_val = -EINVAL; ++ goto put_pm_runtime; ++ } ++ ++ ret_val = sst_create_ipc_msg(&msg, true); ++ if (ret_val != 0) ++ goto put_pm_runtime; ++ ++ if (sst_drv_ctx->pci_id != SST_MRFLD_PCI_ID) { ++ sst_fill_header(&msg->header, IPC_IA_DBG_LOG_ENABLE, 1, ++ str_id); ++ msg->header.part.data = sizeof(u32) + sizeof(params); ++ memcpy(msg->mailbox_data, &msg->header.full, sizeof(u32)); ++ memcpy(msg->mailbox_data + sizeof(u32), ¶ms, ++ sizeof(params)); ++ } ++ drv->ops->sync_post_message(msg); ++ ret_val = buf_size; ++put_pm_runtime: ++ sst_pm_runtime_put(drv); ++ return ret_val; ++} ++ ++/* ++ * Circular buffer hdr -> 0x1000 ++ * log data starts at 0x1010 ++ */ ++static ssize_t sst_debug_lpe_log_enable_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ struct intel_sst_drv *drv = file->private_data; ++ struct lpe_log_buf_hdr buf_hdr; ++ size_t size1, size2, offset, bytes_read; ++ char *buf = NULL; ++ int ret; ++ ++ ret = is_fw_running(drv); ++ if (ret) ++ return ret; ++ ++ /* Get the sram lpe log buffer header */ ++ memcpy_fromio(&buf_hdr, (u32 *)(drv->mailbox + SST_SCU_LPE_MAILBOX), ++ sizeof(buf_hdr)); ++ if (buf_hdr.rd_addr == buf_hdr.wr_addr) { ++ pr_err("SRAM emptry\n"); ++ ret = -ENODATA; ++ goto put_pm_runtime; ++ } else if (buf_hdr.rd_addr < buf_hdr.wr_addr) { ++ size1 = buf_hdr.wr_addr - buf_hdr.rd_addr; ++ offset = (buf_hdr.rd_addr - buf_hdr.base_addr) ++ + SST_SCU_LPE_LOG_BUF; ++ pr_debug("Size = %zu, offset = %zx\n", size1, offset); ++ buf = vmalloc(size1); ++ if (buf == NULL) { ++ pr_err("Not enough memory to allocate\n"); ++ ret = -ENOMEM; ++ goto put_pm_runtime; ++ } ++ memcpy_fromio(buf, (u32 *)(drv->mailbox + offset), size1); ++ bytes_read = simple_read_from_buffer(user_buf, count, ppos, ++ buf, size1); ++ ++ buf_hdr.rd_addr = buf_hdr.rd_addr + bytes_read; ++ ++ } else { ++ /* Read including the end address as well */ ++ size1 = buf_hdr.end_addr - buf_hdr.rd_addr + 1; ++ offset = (buf_hdr.rd_addr - buf_hdr.base_addr) ++ + SST_SCU_LPE_LOG_BUF; ++ pr_debug("Size = %zu, offset = %zx\n", size1, offset); ++ buf = vmalloc(size1); ++ if (buf == NULL) { ++ pr_err("Not enough memory to allocate\n"); ++ ret = -ENOMEM; ++ goto put_pm_runtime; ++ } ++ memcpy_fromio(buf, (u32 *)(drv->mailbox + offset), size1); ++ bytes_read = simple_read_from_buffer(user_buf, count, ppos, ++ buf, size1); ++ if (bytes_read != size1) { ++ buf_hdr.rd_addr = buf_hdr.rd_addr + bytes_read; ++ goto update_rd_ptr; ++ } ++ ++ /* Wrap around lpe log buffer here */ ++ vfree(buf); ++ buf = NULL; ++ size2 = (buf_hdr.wr_addr - buf_hdr.base_addr); ++ offset = SST_SCU_LPE_LOG_BUF; ++ pr_debug("Size = %zu, offset = %zx\n", size2, offset); ++ buf = vmalloc(size2); ++ if (buf == NULL) { ++ pr_err("Not enough memory to allocate\n"); ++ ret = -ENOMEM; ++ goto put_pm_runtime; ++ } ++ memcpy_fromio(buf, (u32 *)(drv->mailbox + offset), size2); ++ bytes_read += simple_read_from_buffer(user_buf, ++ (count - bytes_read), ppos, buf, size2); ++ buf_hdr.rd_addr = buf_hdr.base_addr + bytes_read - size1; ++ ++ } ++update_rd_ptr: ++ if (bytes_read != 0) { ++ memcpy_toio((u32 *)(drv->mailbox + SST_SCU_LPE_MAILBOX + ++ 2 * sizeof(u32)), &(buf_hdr.rd_addr), sizeof(u32)); ++ pr_debug("read pointer restored\n"); ++ } ++ vfree(buf); ++ buf = NULL; ++ ret = bytes_read; ++put_pm_runtime: ++ sst_pm_runtime_put(drv); ++ return ret; ++} ++ ++static const struct file_operations sst_debug_lpe_log_enable_ops = { ++ .open = simple_open, ++ .write = sst_debug_lpe_log_enable_write, ++ .read = sst_debug_lpe_log_enable_read, ++ .llseek = default_llseek, ++}; ++ ++static ssize_t sst_debug_rtpm_read(struct file *file, char __user *user_buf, ++ size_t count, loff_t *ppos) ++{ ++ struct intel_sst_drv *drv = file->private_data; ++ char *status; ++ ++ int usage = atomic_read(&drv->pm_usage_count); ++ ++ pr_debug("RTPM usage: %d\n", usage); ++ status = drv->debugfs.runtime_pm_status ? "enabled\n" : "disabled\n"; ++ return simple_read_from_buffer(user_buf, count, ppos, ++ status, strlen(status)); ++} ++ ++static ssize_t sst_debug_rtpm_write(struct file *file, ++ const char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ struct intel_sst_drv *drv = file->private_data; ++ char buf[16]; ++ int sz = min(count, sizeof(buf)-1); ++ ++ int usage = atomic_read(&drv->pm_usage_count); ++ ++ pr_debug("RTPM Usage: %d\n", usage); ++ if (copy_from_user(buf, user_buf, sz)) ++ return -EFAULT; ++ buf[sz] = 0; ++ ++ if (!strncmp(buf, "enable\n", sz)) { ++ /* already enabled? */ ++ if (drv->debugfs.runtime_pm_status) ++ return -EINVAL; ++ drv->debugfs.runtime_pm_status = 1; ++ pm_runtime_allow(drv->dev); ++ sz = 6; /* strlen("enable") */ ++ } else if (!strncmp(buf, "disable\n", sz)) { ++ if (!drv->debugfs.runtime_pm_status) ++ return -EINVAL; ++ drv->debugfs.runtime_pm_status = 0; ++ pm_runtime_forbid(drv->dev); ++ sz = 7; /* strlen("disable") */ ++ } else ++ return -EINVAL; ++ return sz; ++} ++ ++static const struct file_operations sst_debug_rtpm_ops = { ++ .open = simple_open, ++ .read = sst_debug_rtpm_read, ++ .write = sst_debug_rtpm_write, ++ .llseek = default_llseek, ++}; ++ ++ ++static ssize_t sst_debug_readme_read(struct file *file, char __user *user_buf, ++ size_t count, loff_t *ppos) ++{ ++ const char *buf = ++ "\nAll files can be read using 'cat'\n" ++ "1. 'echo disable > runtime_pm' disables runtime PM and will prevent SST from suspending.\n" ++ "To enable runtime PM, echo 'enable' to runtime_pm. Dmesg will print the runtime pm usage\n" ++ "if logs are enabled.\n" ++ "2. Write to shim register using 'echo > shim_dump'.\n" ++ "Valid address range is between 0x00 to 0x80 in increments of 8.\n" ++ "3. echo 1 > fw_clear_context , This sets the flag to skip the context restore\n" ++ "4. echo 1 > fw_clear_cache , This sets the flag to clear the cached copy of firmware\n" ++ "5. echo 1 > fw_reset_state ,This sets the fw state to uninit\n" ++ "6. echo memcpy > fw_dwnld_mode, This will set the firmware download mode to memcpy\n" ++ " echo lli > fw_dwnld_mode, This will set the firmware download mode to\n" ++ "dma lli mode\n" ++ " echo dma > fw_dwnld_mode, This will set the firmware download mode to\n" ++ "dma single block mode\n" ++ "7. iram_dump, dram_dump, interfaces provide mmap support to\n" ++ "get the iram and dram dump, these buffers will have data only\n" ++ "after the recovery is triggered\n"; ++ ++ const char *ctp_buf = ++ "8. Enable input clock by 'echo enable > osc_clk0'.\n" ++ "This prevents the input OSC clock from switching off till it is disabled by\n" ++ "'echo disable > osc_clk0'. The status of the clock indicated who are using it.\n" ++ "9. lpe_log_enable usage:\n" ++ " echo > lpe_log_enable.\n" ++ "10. cat fw_ssp_reg,This will dump the ssp register contents\n" ++ "11. cat fw_dma_reg,This will dump the dma register contents\n"; ++ ++ const char *mrfld_buf = ++ "8. lpe_log_enable usage:\n" ++ " echo > lpe_log_enable.\n" ++ "9. cat fw_ssp_reg,This will dump the ssp register contents\n" ++ "10. cat fw_dma_reg,This will dump the dma register contents\n" ++ "11. ddr_imr_dump interface provides mmap support to get the imr dump,\n" ++ "this buffer will have data only after the recovery is triggered\n" ++ "12. ipc usage:\n" ++ "\t ipc file works only in binary mode. The ipc format is .\n" ++ "\t drv_id in the ipc header will be overwritten with unique driver id in the driver\n"; ++ ++ char *readme = NULL; ++ const char *buf2 = NULL; ++ int size, ret = 0; ++ ++ switch (sst_drv_ctx->pci_id) { ++ case SST_CLV_PCI_ID: ++ size = strlen(buf) + strlen(ctp_buf) + 2; ++ buf2 = ctp_buf; ++ break; ++ case SST_MRFLD_PCI_ID: ++ size = strlen(buf) + strlen(mrfld_buf) + 2; ++ buf2 = mrfld_buf; ++ break; ++ default: ++ size = strlen(buf) + 1; ++ }; ++ ++ readme = kmalloc(size, GFP_KERNEL); ++ if (readme == NULL) { ++ pr_err("%s: no memory\n", __func__); ++ return -ENOMEM; ++ } ++ ++ if (buf2) ++ sprintf(readme, "%s%s\n", buf, buf2); ++ else ++ sprintf(readme, "%s\n", buf); ++ ++ ret = simple_read_from_buffer(user_buf, count, ppos, ++ readme, strlen(readme)); ++ kfree(readme); ++ return ret; ++} ++ ++static const struct file_operations sst_debug_readme_ops = { ++ .open = simple_open, ++ .read = sst_debug_readme_read, ++}; ++ ++static ssize_t sst_debug_osc_clk0_read(struct file *file, char __user *user_buf, ++ size_t count, loff_t *ppos) ++{ ++ char status[16]; ++ int mode = -1; ++#ifdef CONFIG_INTEL_SCU_IPC_UTIL ++ mode = intel_scu_ipc_set_osc_clk0(0, CLK0_QUERY); ++#endif ++ ++ snprintf(status, 16, "0x%x\n", mode); ++ return simple_read_from_buffer(user_buf, count, ppos, ++ status, strlen(status)); ++} ++ ++static ssize_t sst_debug_osc_clk0_write(struct file *file, ++ const char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ char buf[16]; ++ int sz = min(count, sizeof(buf)-1); ++ ++ if (copy_from_user(buf, user_buf, sz)) ++ return -EFAULT; ++ buf[sz] = 0; ++ ++#ifdef CONFIG_INTEL_SCU_IPC_UTIL ++ if (!strncmp(buf, "enable\n", sz)) { ++ intel_scu_ipc_set_osc_clk0(true, CLK0_DEBUG); ++ sz = 6; /* strlen("enable") */ ++ } else if (!strncmp(buf, "disable\n", sz)) { ++ intel_scu_ipc_set_osc_clk0(false, CLK0_DEBUG); ++ sz = 7; /* strlen("disable") */ ++ } else ++ return -EINVAL; ++#endif ++ return sz; ++} ++ ++static const struct file_operations sst_debug_osc_clk0_ops = { ++ .open = simple_open, ++ .read = sst_debug_osc_clk0_read, ++ .write = sst_debug_osc_clk0_write, ++}; ++ ++static ssize_t sst_debug_fw_clear_cntx_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ char *status; ++ ++ status = atomic_read(&sst_drv_ctx->fw_clear_context) ? \ ++ "clear fw cntx\n" : "do not clear fw cntx\n"; ++ ++ return simple_read_from_buffer(user_buf, count, ppos, ++ status, strlen(status)); ++ ++} ++ ++static ssize_t sst_debug_fw_clear_cntx_write(struct file *file, ++ const char __user *user_buf, size_t count, loff_t *ppos) ++ ++{ ++ char buf[16]; ++ int sz = min(count, sizeof(buf)-1); ++ ++ if (copy_from_user(buf, user_buf, sz)) ++ return -EFAULT; ++ buf[sz] = 0; ++ ++ if (!strncmp(buf, "1\n", sz)) ++ atomic_set(&sst_drv_ctx->fw_clear_context, 1); ++ else ++ atomic_set(&sst_drv_ctx->fw_clear_context, 0); ++ ++ return sz; ++ ++} ++ ++static const struct file_operations sst_debug_fw_clear_cntx = { ++ .open = simple_open, ++ .read = sst_debug_fw_clear_cntx_read, ++ .write = sst_debug_fw_clear_cntx_write, ++}; ++ ++static ssize_t sst_debug_fw_clear_cache_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ char *status; ++ ++ status = atomic_read(&sst_drv_ctx->fw_clear_cache) ? \ ++ "cache clear flag set\n" : "cache clear flag not set\n"; ++ ++ return simple_read_from_buffer(user_buf, count, ppos, ++ status, strlen(status)); ++ ++} ++ ++static ssize_t sst_debug_fw_clear_cache_write(struct file *file, ++ const char __user *user_buf, size_t count, loff_t *ppos) ++ ++{ ++ char buf[16]; ++ int sz = min(count, sizeof(buf)-1); ++ ++ if (copy_from_user(buf, user_buf, sz)) ++ return -EFAULT; ++ buf[sz] = 0; ++ ++ if (!strncmp(buf, "1\n", sz)) ++ atomic_set(&sst_drv_ctx->fw_clear_cache, 1); ++ else ++ return -EINVAL; ++ ++ return sz; ++} ++ ++static const struct file_operations sst_debug_fw_clear_cache = { ++ .open = simple_open, ++ .read = sst_debug_fw_clear_cache_read, ++ .write = sst_debug_fw_clear_cache_write, ++}; ++ ++static ssize_t sst_debug_fw_reset_state_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ char state[16]; ++ ++ sprintf(state, "%d\n", sst_drv_ctx->sst_state); ++ ++ return simple_read_from_buffer(user_buf, count, ppos, ++ state, strlen(state)); ++ ++} ++ ++static ssize_t sst_debug_fw_reset_state_write(struct file *file, ++ const char __user *user_buf, size_t count, loff_t *ppos) ++ ++{ ++ char buf[16]; ++ int sz = min(count, sizeof(buf)-1); ++ ++ if (copy_from_user(buf, user_buf, sz)) ++ return -EFAULT; ++ buf[sz] = 0; ++ ++ if (!strncmp(buf, "1\n", sz)) ++ sst_set_fw_state_locked(sst_drv_ctx, SST_UN_INIT); ++ else ++ return -EINVAL; ++ ++ return sz; ++ ++} ++ ++static const struct file_operations sst_debug_fw_reset_state = { ++ .open = simple_open, ++ .read = sst_debug_fw_reset_state_read, ++ .write = sst_debug_fw_reset_state_write, ++}; ++ ++static ssize_t sst_debug_dwnld_mode_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ char *state = "error\n"; ++ ++ if (sst_drv_ctx->use_dma == 0) { ++ state = "memcpy\n"; ++ } else if (sst_drv_ctx->use_dma == 1) { ++ state = sst_drv_ctx->use_lli ? \ ++ "lli\n" : "dma\n"; ++ ++ } ++ ++ return simple_read_from_buffer(user_buf, count, ppos, ++ state, strlen(state)); ++ ++} ++ ++static ssize_t sst_debug_dwnld_mode_write(struct file *file, ++ const char __user *user_buf, size_t count, loff_t *ppos) ++ ++{ ++ char buf[16]; ++ int sz = min(count, sizeof(buf)-1); ++ ++ if (sst_drv_ctx->sst_state != SST_SUSPENDED && ++ sst_drv_ctx->sst_state != SST_UN_INIT) { ++ pr_err("FW should be in suspended/uninit state\n"); ++ return -EFAULT; ++ } ++ ++ if (copy_from_user(buf, user_buf, sz)) ++ return -EFAULT; ++ buf[sz] = '\0'; ++ ++ /* Firmware needs to be downloaded again to populate the lists */ ++ atomic_set(&sst_drv_ctx->fw_clear_cache, 1); ++ ++ if (!strncmp(buf, "memcpy\n", sz)) { ++ sst_drv_ctx->use_dma = 0; ++ } else if (!strncmp(buf, "lli\n", sz)) { ++ sst_drv_ctx->use_dma = 1; ++ sst_drv_ctx->use_lli = 1; ++ } else if (!strncmp(buf, "dma\n", sz)) { ++ sst_drv_ctx->use_dma = 1; ++ sst_drv_ctx->use_lli = 0; ++ } ++ return sz; ++ ++} ++ ++static const struct file_operations sst_debug_dwnld_mode = { ++ .open = simple_open, ++ .read = sst_debug_dwnld_mode_read, ++ .write = sst_debug_dwnld_mode_write, ++}; ++ ++static int dump_ssp_port(void __iomem *ssp_base, char *buf, int pos) ++{ ++ int index = 0; ++ ++ while (index < ARRAY_SIZE(ssp_reg_off)) { ++ pos += sprintf(buf + pos, "Reg: 0x%x: 0x%x\n", ssp_reg_off[index], ++ sst_reg_read(ssp_base, ssp_reg_off[index])); ++ index++; ++ } ++ return pos; ++} ++ ++static ssize_t sst_debug_ssp_reg_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ char *buf; ++ int i, pos = 0, off = 0; ++ struct intel_sst_drv *drv = file->private_data; ++ int num_ssp, buf_size, ret; ++ ++ num_ssp = sst_drv_ctx->pdata->debugfs_data->num_ssp; ++ buf_size = DEBUGFS_SSP_BUF_SIZE * num_ssp; ++ ++ buf = kmalloc(buf_size, GFP_KERNEL); ++ if (!buf) { ++ pr_err("%s: no memory\n", __func__); ++ return -ENOMEM; ++ } ++ ++ ret = is_fw_running(drv); ++ if (ret) ++ goto err; ++ ++ buf[0] = 0; ++ ++ for (i = 0; i < num_ssp ; i++) { ++ if (!sst_drv_ctx->debugfs.ssp[i]) { ++ pr_err("ssp %d port not mapped\n", i); ++ continue; ++ } ++ off = sst_drv_ctx->pdata->debugfs_data->ssp_reg_size * i; ++ pos = dump_ssp_port((sst_drv_ctx->debugfs.ssp[i]), buf, pos); ++ } ++ sst_pm_runtime_put(drv); ++ ++ ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); ++err: ++ kfree(buf); ++ return ret; ++} ++ ++static const struct file_operations sst_debug_ssp_reg = { ++ .open = simple_open, ++ .read = sst_debug_ssp_reg_read, ++}; ++ ++static int dump_dma_reg(char *buf, int pos, int dma) ++{ ++ int i, index = 0; ++ int off = 0 ; ++ void __iomem *dma_reg; ++ ++ if (!sst_drv_ctx->debugfs.dma_reg[dma]) { ++ pr_err("dma %d not mapped\n", dma); ++ return pos; ++ } ++ ++ pos += sprintf(buf + pos, "\nDump DMA%d Reg\n\n", dma); ++ ++ dma_reg = sst_drv_ctx->debugfs.dma_reg[dma]; ++ ++ /* Dump the DMA channel registers */ ++ for (i = 0; i < DMA_NUM_CH; i++) { ++ pos += sprintf(buf + pos, "SAR%d: 0x%x: 0x%llx\n", i, off, ++ sst_reg_read64(dma_reg, off)); ++ off += 8; ++ ++ pos += sprintf(buf + pos, "DAR%d: 0x%x: 0x%llx\n", i, off, ++ sst_reg_read64(dma_reg, off)); ++ off += 8; ++ ++ pos += sprintf(buf + pos, "LLP%d: 0x%x: 0x%llx\n", i, off, ++ sst_reg_read64(dma_reg, off)); ++ off += 8; ++ ++ pos += sprintf(buf + pos, "CTL%d: 0x%x: 0x%llx\n", i, off, ++ sst_reg_read64(dma_reg, off)); ++ off += 0x28; ++ ++ pos += sprintf(buf + pos, "CFG%d: 0x%x: 0x%llx\n", i, off, ++ sst_reg_read64(dma_reg, off)); ++ off += 0x18; ++ } ++ ++ /* Dump the remaining DMA registers */ ++ while (index < ARRAY_SIZE(dma_reg_off)) { ++ pos += sprintf(buf + pos, "Reg: 0x%x: 0x%llx\n", dma_reg_off[index], ++ sst_reg_read64(dma_reg, dma_reg_off[index])); ++ index++; ++ } ++ return pos; ++} ++ ++static ssize_t sst_debug_dma_reg_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ char *buf; ++ int pos = 0; ++ int ret, i; ++ struct intel_sst_drv *drv = file->private_data; ++ int num_dma, buf_size; ++ ++ num_dma = sst_drv_ctx->pdata->debugfs_data->num_dma; ++ buf_size = DEBUGFS_DMA_BUF_SIZE * num_dma; ++ ++ buf = kmalloc(buf_size, GFP_KERNEL); ++ if (!buf) { ++ pr_err("%s: no memory\n", __func__); ++ return -ENOMEM; ++ } ++ ++ ret = is_fw_running(drv); ++ if (ret) ++ goto err; ++ ++ buf[0] = 0; ++ ++ for (i = 0; i < num_dma; i++) ++ pos = dump_dma_reg(buf, pos, i); ++ ++ sst_pm_runtime_put(drv); ++ ++ ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); ++err: ++ kfree(buf); ++ return ret; ++} ++ ++static const struct file_operations sst_debug_dma_reg = { ++ .open = simple_open, ++ .read = sst_debug_dma_reg_read, ++}; ++ ++/** ++ * sst_debug_remap - function remaps the iram/dram buff to userspace ++ * ++ * @vma: vm_area_struct passed from userspace ++ * @buf: Physical addr of the pointer to be remapped ++ * @type: type of the buffer ++ * ++ * Remaps the kernel buffer to the userspace ++ */ ++static int sst_debug_remap(struct vm_area_struct *vma, char *buf, ++ enum sst_ram_type type) ++{ ++ int retval, length; ++ void *mem_area; ++ ++ if (!buf) ++ return -EIO; ++ ++ length = vma->vm_end - vma->vm_start; ++ pr_debug("iram length 0x%x\n", length); ++ ++ /* round it up to the page bondary */ ++ mem_area = (void *)PAGE_ALIGN((unsigned long)buf); ++ ++ /* map the whole physically contiguous area in one piece */ ++ retval = remap_pfn_range(vma, ++ vma->vm_start, ++ virt_to_phys((void *)mem_area) >> PAGE_SHIFT, ++ length, ++ vma->vm_page_prot); ++ if (retval) ++ pr_err("mapping failed %d ", retval); ++ return retval; ++} ++ ++int sst_debug_iram_dump_mmap(struct file *file, struct vm_area_struct *vma) ++{ ++ int retval; ++ struct intel_sst_drv *sst = sst_drv_ctx; ++ ++ retval = sst_debug_remap(vma, sst->dump_buf.iram_buf.buf, SST_IRAM); ++ ++ return retval; ++} ++ ++static const struct file_operations sst_debug_iram_dump = { ++ .open = simple_open, ++ .mmap = sst_debug_iram_dump_mmap, ++}; ++ ++int sst_debug_dram_dump_mmap(struct file *file, struct vm_area_struct *vma) ++{ ++ int retval; ++ struct intel_sst_drv *sst = sst_drv_ctx; ++ ++ retval = sst_debug_remap(vma, sst->dump_buf.dram_buf.buf, SST_DRAM); ++ ++ return retval; ++} ++ ++static const struct file_operations sst_debug_dram_dump = { ++ .open = simple_open, ++ .mmap = sst_debug_dram_dump_mmap, ++}; ++ ++int sst_debug_ddr_imr_dump_mmap(struct file *file, struct vm_area_struct *vma) ++{ ++ int retval; ++ struct intel_sst_drv *sst = sst_drv_ctx; ++ ++ retval = sst_debug_remap(vma, sst->ddr, 0); ++ ++ return retval; ++} ++ ++static const struct file_operations sst_debug_ddr_imr_dump = { ++ .open = simple_open, ++ .mmap = sst_debug_ddr_imr_dump_mmap, ++}; ++ ++static ssize_t sst_debug_ipc_write(struct file *file, ++ const char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ struct intel_sst_drv *ctx = (struct intel_sst_drv *)file->private_data; ++ unsigned char *buf; ++ struct sst_block *block = NULL; ++ struct ipc_dsp_hdr *dsp_hdr; ++ struct ipc_post *msg = NULL; ++ int ret, res_rqd, msg_id, drv_id; ++ u32 low_payload; ++ ++ if (count > 1024) ++ return -EINVAL; ++ ++ ret = is_fw_running(ctx); ++ if (ret) ++ return ret; ++ ++ buf = kzalloc((sizeof(unsigned char) * (count)), GFP_KERNEL); ++ if (!buf) { ++ ret = -ENOMEM; ++ goto put_pm_runtime; ++ } ++ if (copy_from_user(buf, user_buf, count)) { ++ ret = -EFAULT; ++ goto free_mem; ++ } ++ ++ if (sst_create_ipc_msg(&msg, true)) { ++ ret = -ENOMEM; ++ goto free_mem; ++ } ++ ++ msg->mrfld_header.full = *((u64 *)buf); ++ pr_debug("ipc hdr: %llx\n", msg->mrfld_header.full); ++ ++ /* Override the drv id with unique drv id */ ++ drv_id = sst_assign_pvt_id(ctx); ++ msg->mrfld_header.p.header_high.part.drv_id = drv_id; ++ ++ res_rqd = msg->mrfld_header.p.header_high.part.res_rqd; ++ msg_id = msg->mrfld_header.p.header_high.part.msg_id; ++ pr_debug("res_rqd: %d, msg_id: %d, drv_id: %d\n", ++ res_rqd, msg_id, drv_id); ++ if (res_rqd) { ++ block = sst_create_block(ctx, msg_id, drv_id); ++ if (block == NULL) { ++ ret = -ENOMEM; ++ kfree(msg); ++ goto free_mem; ++ } ++ } ++ ++ dsp_hdr = (struct ipc_dsp_hdr *)(buf + 8); ++ pr_debug("dsp hdr: %llx\n", *((u64 *)(dsp_hdr))); ++ low_payload = msg->mrfld_header.p.header_low_payload; ++ if (low_payload > (1024 - sizeof(union ipc_header_mrfld))) { ++ pr_err("Invalid low payload length: %x\n", low_payload); ++ ret = -EINVAL; ++ kfree(msg); ++ goto free_block; ++ } ++ ++ memcpy(msg->mailbox_data, (buf+(sizeof(union ipc_header_mrfld))), ++ low_payload); ++ sst_add_to_dispatch_list_and_post(ctx, msg); ++ if (res_rqd) { ++ ret = sst_wait_timeout(ctx, block); ++ if (ret) { ++ pr_err("%s: fw returned err %d\n", __func__, ret); ++ goto free_block; ++ } ++ ++ if (msg_id == IPC_GET_PARAMS) { ++ unsigned char *r = block->data; ++ memcpy(ctx->debugfs.get_params_data, r, dsp_hdr->length); ++ ctx->debugfs.get_params_len = dsp_hdr->length; ++ } ++ ++ } ++ ret = count; ++free_block: ++ if (res_rqd) ++ sst_free_block(sst_drv_ctx, block); ++free_mem: ++ kfree(buf); ++put_pm_runtime: ++ sst_pm_runtime_put(ctx); ++ return ret; ++} ++ ++static ssize_t sst_debug_ipc_read(struct file *file, ++ char __user *user_buf, size_t count, loff_t *ppos) ++{ ++ struct intel_sst_drv *ctx = (struct intel_sst_drv *)file->private_data; ++ return simple_read_from_buffer(user_buf, count, ppos, ++ ctx->debugfs.get_params_data, ++ ctx->debugfs.get_params_len); ++} ++ ++static const struct file_operations sst_debug_ipc_ops = { ++ .open = simple_open, ++ .write = sst_debug_ipc_write, ++ .read = sst_debug_ipc_read, ++}; ++ ++struct sst_debug { ++ const char *name; ++ const struct file_operations *fops; ++ umode_t mode; ++}; ++ ++static const struct sst_debug sst_common_dbg_entries[] = { ++ {"runtime_pm", &sst_debug_rtpm_ops, 0600}, ++ {"shim_dump", &sst_debug_shim_ops, 0600}, ++ {"fw_clear_context", &sst_debug_fw_clear_cntx, 0600}, ++ {"fw_clear_cache", &sst_debug_fw_clear_cache, 0600}, ++ {"fw_reset_state", &sst_debug_fw_reset_state, 0600}, ++ {"fw_dwnld_mode", &sst_debug_dwnld_mode, 0600}, ++ {"iram_dump", &sst_debug_iram_dump, 0400}, ++ {"dram_dump", &sst_debug_dram_dump, 0400}, ++ {"sram_ia_lpe_mailbox", &sst_debug_sram_ia_lpe_mbox_ops, 0400}, ++ {"sram_lpe_ia_mailbox", &sst_debug_sram_lpe_ia_mbox_ops, 0400}, ++ {"README", &sst_debug_readme_ops, 0400}, ++}; ++ ++static const struct sst_debug ctp_dbg_entries[] = { ++ {"sram_lpe_debug", &sst_debug_sram_lpe_debug_ops, 0400}, ++ {"sram_lpe_checkpoint", &sst_debug_sram_lpe_checkpoint_ops, 0400}, ++ {"sram_lpe_scu_mailbox", &sst_debug_sram_lpe_scu_mbox_ops, 0400}, ++ {"sram_scu_lpe_mailbox", &sst_debug_sram_scu_lpe_mbox_ops, 0400}, ++ {"lpe_log_enable", &sst_debug_lpe_log_enable_ops, 0400}, ++ {"fw_ssp_reg", &sst_debug_ssp_reg, 0400}, ++ {"fw_dma_reg", &sst_debug_dma_reg, 0400}, ++ {"osc_clk0", &sst_debug_osc_clk0_ops, 0600}, ++}; ++ ++static const struct sst_debug mrfld_dbg_entries[] = { ++ {"sram_lpe_checkpoint", &sst_debug_sram_lpe_checkpoint_ops, 0400}, ++ {"fw_ssp_reg", &sst_debug_ssp_reg, 0400}, ++ {"fw_dma_reg", &sst_debug_dma_reg, 0400}, ++ {"ddr_imr_dump", &sst_debug_ddr_imr_dump, 0400}, ++ {"ipc", &sst_debug_ipc_ops, 0400}, ++}; ++ ++void sst_debugfs_create_files(struct intel_sst_drv *sst, ++ const struct sst_debug *entries, int size) ++{ ++ int i; ++ ++ for (i = 0; i < size; i++) { ++ struct dentry *dentry; ++ const struct sst_debug *entry = &entries[i]; ++ ++ dentry = debugfs_create_file(entry->name, entry->mode, ++ sst->debugfs.root, sst, entry->fops); ++ if (dentry == NULL) { ++ pr_err("Failed to create %s file\n", entry->name); ++ return; ++ } ++ } ++} ++ ++void sst_debugfs_init(struct intel_sst_drv *sst) ++{ ++ int size = 0; ++ const struct sst_debug *debug = NULL; ++ ++ sst->debugfs.root = debugfs_create_dir("sst", NULL); ++ if (IS_ERR(sst->debugfs.root) || !sst->debugfs.root) { ++ pr_err("Failed to create debugfs directory\n"); ++ return; ++ } ++ ++ sst_debugfs_create_files(sst, sst_common_dbg_entries, ++ ARRAY_SIZE(sst_common_dbg_entries)); ++ ++ /* Initial status is enabled */ ++ sst->debugfs.runtime_pm_status = 1; ++ ++ if (sst->pci_id == SST_MRFLD_PCI_ID) { ++ debug = mrfld_dbg_entries; ++ size = ARRAY_SIZE(mrfld_dbg_entries); ++ } else if (sst->pci_id == SST_CLV_PCI_ID) { ++ debug = ctp_dbg_entries; ++ size = ARRAY_SIZE(ctp_dbg_entries); ++ } ++ ++ if (debug) ++ sst_debugfs_create_files(sst, debug, size); ++ ++} ++ ++void sst_debugfs_exit(struct intel_sst_drv *sst) ++{ ++ if (sst->debugfs.runtime_pm_status) ++ pm_runtime_allow(sst->dev); ++ debugfs_remove_recursive(sst->debugfs.root); ++} +diff --git a/sound/soc/intel/sst/sst_drv_interface.c b/sound/soc/intel/sst/sst_drv_interface.c +new file mode 100644 +index 0000000..8250ccb +--- /dev/null ++++ b/sound/soc/intel/sst/sst_drv_interface.c +@@ -0,0 +1,1111 @@ ++/* ++ * sst_drv_interface.c - Intel SST Driver for audio engine ++ * ++ * Copyright (C) 2008-10 Intel Corp ++ * Authors: Vinod Koul ++ * Harsha Priya ++ * Dharageswari R ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../sst_platform.h" ++#include "../platform_ipc_v2.h" ++#include "sst.h" ++ ++#define NUM_CODEC 2 ++#define MIN_FRAGMENT 2 ++#define MAX_FRAGMENT 4 ++#define MIN_FRAGMENT_SIZE (50 * 1024) ++#define MAX_FRAGMENT_SIZE (1024 * 1024) ++#define SST_GET_BYTES_PER_SAMPLE(pcm_wd_sz) (((pcm_wd_sz + 15) >> 4) << 1) ++ ++void sst_restore_fw_context(void) ++{ ++ struct snd_sst_ctxt_params fw_context; ++ struct ipc_post *msg = NULL; ++ int retval = 0; ++ struct sst_block *block; ++ ++ /* Skip the context restore, when fw_clear_context is set */ ++ /* fw_clear_context set through debugfs support */ ++ if (atomic_read(&sst_drv_ctx->fw_clear_context)) { ++ pr_debug("Skipping restore_fw_context\n"); ++ atomic_set(&sst_drv_ctx->fw_clear_context, 0); ++ return; ++ } ++ ++ pr_debug("restore_fw_context\n"); ++ /*nothing to restore*/ ++ if (!sst_drv_ctx->fw_cntx_size) ++ return; ++ pr_debug("restoring context......\n"); ++ /*send msg to fw*/ ++ retval = sst_create_block_and_ipc_msg(&msg, true, sst_drv_ctx, &block, ++ IPC_IA_SET_FW_CTXT, 0); ++ if (retval) { ++ pr_err("Can't allocate block/msg. No restore fw_context\n"); ++ return; ++ } ++ ++ sst_drv_ctx->sst_state = SST_FW_CTXT_RESTORE; ++ sst_fill_header(&msg->header, IPC_IA_SET_FW_CTXT, 1, 0); ++ ++ msg->header.part.data = sizeof(fw_context) + sizeof(u32); ++ fw_context.address = virt_to_phys((void *)sst_drv_ctx->fw_cntx); ++ fw_context.size = sst_drv_ctx->fw_cntx_size; ++ memcpy(msg->mailbox_data, &msg->header, sizeof(u32)); ++ memcpy(msg->mailbox_data + sizeof(u32), ++ &fw_context, sizeof(fw_context)); ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ retval = sst_wait_timeout(sst_drv_ctx, block); ++ sst_free_block(sst_drv_ctx, block); ++ if (retval) ++ pr_err("sst_restore_fw_context..timeout!\n"); ++ return; ++} ++ ++/* ++ * sst_download_fw - download the audio firmware to DSP ++ * ++ * This function is called when the FW needs to be downloaded to SST DSP engine ++ */ ++int sst_download_fw(void) ++{ ++ int retval = 0; ++ ++ retval = sst_load_fw(); ++ if (retval) ++ return retval; ++ pr_debug("fw loaded successful!!!\n"); ++ ++ if (sst_drv_ctx->ops->restore_dsp_context) ++ sst_drv_ctx->ops->restore_dsp_context(); ++ sst_drv_ctx->sst_state = SST_FW_RUNNING; ++ return retval; ++} ++ ++int free_stream_context(unsigned int str_id) ++{ ++ struct stream_info *stream; ++ int ret = 0; ++ ++ stream = get_stream_info(str_id); ++ if (stream) { ++ /* str_id is valid, so stream is alloacted */ ++ ret = sst_free_stream(str_id); ++ if (ret) ++ sst_clean_stream(&sst_drv_ctx->streams[str_id]); ++ return ret; ++ } ++ return ret; ++} ++ ++/* ++ * sst_send_algo_param - send LPE Mixer param to SST ++ * ++ * this function sends the algo parameter to sst dsp engine ++ */ ++static int sst_send_algo_param(struct snd_ppp_params *algo_params) ++{ ++ u32 header_size = 0; ++ struct ipc_post *msg = NULL; ++ u32 ipc_msg_size = sizeof(u32) + sizeof(*algo_params) ++ - sizeof(algo_params->params) + algo_params->size; ++ u32 offset = 0; ++ ++ if (ipc_msg_size > SST_MAILBOX_SIZE) ++ return -ENOMEM; ++ if (sst_create_ipc_msg(&msg, true)) ++ return -ENOMEM; ++ sst_fill_header(&msg->header, ++ IPC_IA_ALG_PARAMS, 1, algo_params->str_id); ++ msg->header.part.data = sizeof(u32) + sizeof(*algo_params) ++ - sizeof(algo_params->params) + algo_params->size; ++ memcpy(msg->mailbox_data, &msg->header, sizeof(u32)); ++ offset = sizeof(u32); ++ header_size = sizeof(*algo_params) - sizeof(algo_params->params); ++ memcpy(msg->mailbox_data + sizeof(u32), algo_params, ++ sizeof(*algo_params) - sizeof(algo_params->params)); ++ offset += header_size; ++ memcpy(msg->mailbox_data + offset , algo_params->params, ++ algo_params->size); ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ return 0; ++} ++ ++static int sst_send_lpe_mixer_algo_params(void) ++{ ++ struct snd_ppp_params algo_param; ++ struct snd_ppp_mixer_params mixer_param; ++ unsigned int input_mixer, stream_device_id; ++ int retval = 0; ++ ++ retval = intel_sst_check_device(); ++ if (retval) { ++ pr_err("sst_check_device failed %d\n", retval); ++ return retval; ++ } ++ ++ mutex_lock(&sst_drv_ctx->mixer_ctrl_lock); ++ input_mixer = (sst_drv_ctx->device_input_mixer) ++ & SST_INPUT_STREAM_MIXED; ++ pr_debug("Input Mixer settings %d", input_mixer); ++ stream_device_id = sst_drv_ctx->device_input_mixer - input_mixer; ++ algo_param.algo_id = SST_ALGO_MIXER; ++ algo_param.str_id = stream_device_id; ++ algo_param.enable = 1; ++ algo_param.operation = SST_SET_ALGO; ++ algo_param.size = sizeof(mixer_param); ++ mixer_param.type = SST_ALGO_PARAM_MIXER_STREAM_CFG; ++ mixer_param.input_stream_bitmap = input_mixer; ++ mixer_param.size = sizeof(input_mixer); ++ algo_param.params = &mixer_param; ++ mutex_unlock(&sst_drv_ctx->mixer_ctrl_lock); ++ pr_debug("setting pp param\n"); ++ pr_debug("Algo ID %d Str id %d Enable %d Size %d\n", ++ algo_param.algo_id, algo_param.str_id, ++ algo_param.enable, algo_param.size); ++ sst_send_algo_param(&algo_param); ++ sst_pm_runtime_put(sst_drv_ctx); ++ return retval; ++} ++ ++/* ++ * sst_get_stream_allocated - this function gets a stream allocated with ++ * the given params ++ * ++ * @str_param : stream params ++ * @lib_dnld : pointer to pointer of lib downlaod struct ++ * ++ * This creates new stream id for a stream, in case lib is to be downloaded to ++ * DSP, it downloads that ++ */ ++int sst_get_stream_allocated(struct snd_sst_params *str_param, ++ struct snd_sst_lib_download **lib_dnld) ++{ ++ int retval, str_id; ++ struct sst_block *block; ++ struct snd_sst_alloc_response *response; ++ struct stream_info *str_info; ++ ++ pr_debug("In %s\n", __func__); ++ block = sst_create_block(sst_drv_ctx, 0, 0); ++ if (block == NULL) ++ return -ENOMEM; ++ ++ retval = sst_drv_ctx->ops->alloc_stream((char *) str_param, block); ++ str_id = retval; ++ if (retval < 0) { ++ pr_err("sst_alloc_stream failed %d\n", retval); ++ goto free_block; ++ } ++ pr_debug("Stream allocated %d\n", retval); ++ str_info = get_stream_info(str_id); ++ if (str_info == NULL) { ++ pr_err("get stream info returned null\n"); ++ str_id = -EINVAL; ++ goto free_block; ++ } ++ ++ /* Block the call for reply */ ++ retval = sst_wait_timeout(sst_drv_ctx, block); ++ if (block->data) { ++ response = (struct snd_sst_alloc_response *)block->data; ++ retval = response->str_type.result; ++ if (!retval) ++ goto free_block; ++ ++ pr_err("sst: FW alloc failed retval %d\n", retval); ++ if (retval == SST_ERR_STREAM_IN_USE) { ++ pr_err("sst:FW not in clean state, send free for:%d\n", ++ str_id); ++ sst_free_stream(str_id); ++ *lib_dnld = NULL; ++ } ++ if (retval == SST_LIB_ERR_LIB_DNLD_REQUIRED) { ++ *lib_dnld = kzalloc(sizeof(**lib_dnld), GFP_KERNEL); ++ if (*lib_dnld == NULL) { ++ str_id = -ENOMEM; ++ goto free_block; ++ } ++ memcpy(*lib_dnld, &response->lib_dnld, sizeof(**lib_dnld)); ++ sst_clean_stream(str_info); ++ } else { ++ *lib_dnld = NULL; ++ } ++ str_id = -retval; ++ } else if (retval != 0) { ++ pr_err("sst: FW alloc failed retval %d\n", retval); ++ /* alloc failed, so reset the state to uninit */ ++ str_info->status = STREAM_UN_INIT; ++ str_id = retval; ++ } ++free_block: ++ sst_free_block(sst_drv_ctx, block); ++ return str_id; /*will ret either error (in above if) or correct str id*/ ++} ++ ++/* ++ * sst_get_sfreq - this function returns the frequency of the stream ++ * ++ * @str_param : stream params ++ */ ++int sst_get_sfreq(struct snd_sst_params *str_param) ++{ ++ switch (str_param->codec) { ++ case SST_CODEC_TYPE_PCM: ++ return str_param->sparams.uc.pcm_params.sfreq; ++ case SST_CODEC_TYPE_AAC: ++ return str_param->sparams.uc.aac_params.externalsr; ++ case SST_CODEC_TYPE_MP3: ++ return 0; ++ default: ++ return -EINVAL; ++ } ++} ++ ++/* ++ * sst_get_sfreq - this function returns the frequency of the stream ++ * ++ * @str_param : stream params ++ */ ++int sst_get_num_channel(struct snd_sst_params *str_param) ++{ ++ switch (str_param->codec) { ++ case SST_CODEC_TYPE_PCM: ++ return str_param->sparams.uc.pcm_params.num_chan; ++ case SST_CODEC_TYPE_MP3: ++ return str_param->sparams.uc.mp3_params.num_chan; ++ case SST_CODEC_TYPE_AAC: ++ return str_param->sparams.uc.aac_params.num_chan; ++ default: ++ return -EINVAL; ++ } ++} ++ ++/* ++ * sst_get_stream - this function prepares for stream allocation ++ * ++ * @str_param : stream param ++ */ ++int sst_get_stream(struct snd_sst_params *str_param) ++{ ++ int retval; ++ struct stream_info *str_info; ++ struct snd_sst_lib_download *lib_dnld; ++ ++ pr_debug("In %s\n", __func__); ++ /* stream is not allocated, we are allocating */ ++ retval = sst_get_stream_allocated(str_param, &lib_dnld); ++ ++ if (retval == -(SST_LIB_ERR_LIB_DNLD_REQUIRED)) { ++ /* codec download is required */ ++ ++ pr_debug("Codec is required.... trying that\n"); ++ if (lib_dnld == NULL) { ++ pr_err("lib download null!!! abort\n"); ++ return -EIO; ++ } ++ ++ retval = sst_load_library(lib_dnld, str_param->ops); ++ kfree(lib_dnld); ++ ++ if (!retval) { ++ pr_debug("codec was downloaded successfully\n"); ++ ++ retval = sst_get_stream_allocated(str_param, &lib_dnld); ++ if (retval <= 0) { ++ retval = -EIO; ++ goto err; ++ } ++ ++ pr_debug("Alloc done stream id %d\n", retval); ++ } else { ++ pr_debug("codec download failed\n"); ++ retval = -EIO; ++ goto err; ++ } ++ } else if (retval <= 0) { ++ retval = -EIO; ++ goto err; ++ } ++ /* store sampling freq */ ++ str_info = &sst_drv_ctx->streams[retval]; ++ str_info->sfreq = sst_get_sfreq(str_param); ++ ++err: ++ return retval; ++} ++ ++/** ++* intel_sst_check_device - checks SST device ++* ++* This utility function checks the state of SST device and downlaods FW if ++* not done, or resumes the device if suspended ++*/ ++int intel_sst_check_device(void) ++{ ++ int retval = 0; ++ ++ pr_debug("In %s\n", __func__); ++ ++ pm_runtime_get_sync(sst_drv_ctx->dev); ++ atomic_inc(&sst_drv_ctx->pm_usage_count); ++ ++ pr_debug("%s: count is %d now\n", __func__, ++ atomic_read(&sst_drv_ctx->pm_usage_count)); ++ ++ mutex_lock(&sst_drv_ctx->sst_lock); ++ if (sst_drv_ctx->sst_state == SST_UN_INIT) ++ sst_drv_ctx->sst_state = SST_START_INIT; ++ ++ if (sst_drv_ctx->sst_state == SST_START_INIT || ++ sst_drv_ctx->sst_state == SST_FW_LIB_LOAD) { ++ ++ /* FW is not downloaded */ ++ pr_debug("DSP Downloading FW now...\n"); ++ retval = sst_download_fw(); ++ if (retval) { ++ pr_err("FW download fail %x\n", retval); ++ sst_drv_ctx->sst_state = SST_UN_INIT; ++ mutex_unlock(&sst_drv_ctx->sst_lock); ++ sst_pm_runtime_put(sst_drv_ctx); ++ return retval; ++ } ++ } ++ mutex_unlock(&sst_drv_ctx->sst_lock); ++ return retval; ++} ++ ++void sst_process_mad_ops(struct work_struct *work) ++{ ++ ++ struct mad_ops_wq *mad_ops = ++ container_of(work, struct mad_ops_wq, wq); ++ int retval = 0; ++ ++ switch (mad_ops->control_op) { ++ case SST_SND_PAUSE: ++ retval = sst_pause_stream(mad_ops->stream_id); ++ break; ++ case SST_SND_RESUME: ++ retval = sst_resume_stream(mad_ops->stream_id); ++ break; ++ default: ++ pr_err(" wrong control_ops reported\n"); ++ } ++ if (retval) ++ pr_err("%s(): op: %d, retval: %d\n", ++ __func__, mad_ops->control_op, retval); ++ kfree(mad_ops); ++ return; ++} ++ ++static int sst_power_control(bool state) ++{ ++ pr_debug("%s for %d", __func__, state); ++ ++ /* should we do ref count here, or rely on pcm handle?? */ ++ if (state == true) ++ return intel_sst_check_device(); ++ else ++ return sst_pm_runtime_put(sst_drv_ctx); ++} ++/* ++ * sst_open_pcm_stream - Open PCM interface ++ * ++ * @str_param: parameters of pcm stream ++ * ++ * This function is called by MID sound card driver to open ++ * a new pcm interface ++ */ ++static int sst_open_pcm_stream(struct snd_sst_params *str_param) ++{ ++ int retval; ++ ++ if (!str_param) ++ return -EINVAL; ++ ++ pr_debug("%s: doing rtpm_get\n", __func__); ++ ++ retval = intel_sst_check_device(); ++ ++ if (retval) ++ return retval; ++ retval = sst_get_stream(str_param); ++ if (retval > 0) { ++ sst_drv_ctx->stream_cnt++; ++ } else { ++ pr_err("sst_get_stream returned err %d\n", retval); ++ sst_pm_runtime_put(sst_drv_ctx); ++ } ++ ++ return retval; ++} ++ ++static int sst_cdev_open(struct snd_sst_params *str_params, ++ struct sst_compress_cb *cb) ++{ ++ int str_id, retval; ++ struct stream_info *stream; ++ ++ pr_debug("%s: doing rtpm_get\n", __func__); ++ ++ retval = intel_sst_check_device(); ++ if (retval) ++ return retval; ++ ++ str_id = sst_get_stream(str_params); ++ if (str_id > 0) { ++ pr_debug("stream allocated in sst_cdev_open %d\n", str_id); ++ stream = &sst_drv_ctx->streams[str_id]; ++ stream->compr_cb = cb->compr_cb; ++ stream->compr_cb_param = cb->param; ++ stream->drain_notify = cb->drain_notify; ++ stream->drain_cb_param = cb->drain_cb_param; ++ } else { ++ pr_err("stream encountered error during alloc %d\n", str_id); ++ str_id = -EINVAL; ++ sst_pm_runtime_put(sst_drv_ctx); ++ } ++ return str_id; ++} ++ ++static int sst_cdev_close(unsigned int str_id) ++{ ++ int retval; ++ struct stream_info *stream; ++ ++ pr_debug("%s: Entry\n", __func__); ++ stream = get_stream_info(str_id); ++ if (!stream) { ++ pr_err("stream info is NULL for str %d!!!\n", str_id); ++ return -EINVAL; ++ } ++ ++ if (stream->status == STREAM_RESET) { ++ /* silently fail here as we have cleaned the stream */ ++ pr_debug("stream in reset state...\n"); ++ stream->status = STREAM_UN_INIT; ++ ++ retval = 0; ++ goto put; ++ } ++ ++ retval = sst_free_stream(str_id); ++put: ++ stream->compr_cb_param = NULL; ++ stream->compr_cb = NULL; ++ ++ /* The free_stream will return a error if there is no stream to free, ++ (i.e. the alloc failure case). And in this case the open does a put in ++ the error scenario, so skip in this case. ++ In the close we need to handle put in the success scenario and ++ the timeout error(EBUSY) scenario. */ ++ if (!retval || (retval == -EBUSY)) ++ sst_pm_runtime_put(sst_drv_ctx); ++ else ++ pr_err("%s: free stream returned err %d\n", __func__, retval); ++ ++ pr_debug("%s: End\n", __func__); ++ return retval; ++ ++} ++ ++static int sst_cdev_ack(unsigned int str_id, unsigned long bytes) ++{ ++ struct stream_info *stream; ++ struct snd_sst_tstamp fw_tstamp = {0,}; ++ int offset; ++ void __iomem *addr; ++ ++ pr_debug("sst: ackfor %d\n", str_id); ++ stream = get_stream_info(str_id); ++ if (!stream) ++ return -EINVAL; ++ ++ /* update bytes sent */ ++ stream->cumm_bytes += bytes; ++ pr_debug("bytes copied %d inc by %ld\n", stream->cumm_bytes, bytes); ++ ++ memcpy_fromio(&fw_tstamp, ++ ((void *)(sst_drv_ctx->mailbox + sst_drv_ctx->tstamp) ++ +(str_id * sizeof(fw_tstamp))), ++ sizeof(fw_tstamp)); ++ ++ fw_tstamp.bytes_copied = stream->cumm_bytes; ++ pr_debug("bytes sent to fw %llu inc by %ld\n", fw_tstamp.bytes_copied, ++ bytes); ++ ++ addr = ((void *)(sst_drv_ctx->mailbox + sst_drv_ctx->tstamp)) + ++ (str_id * sizeof(fw_tstamp)); ++ offset = offsetof(struct snd_sst_tstamp, bytes_copied); ++ sst_shim_write(addr, offset, fw_tstamp.bytes_copied); ++ return 0; ++ ++} ++ ++static int sst_cdev_set_metadata(unsigned int str_id, ++ struct snd_compr_metadata *metadata) ++{ ++ int retval = 0, pvt_id, len; ++ struct ipc_post *msg = NULL; ++ struct stream_info *str_info; ++ struct ipc_dsp_hdr dsp_hdr; ++ ++ pr_debug("set metadata for stream %d\n", str_id); ++ ++ str_info = get_stream_info(str_id); ++ if (!str_info) ++ return -EINVAL; ++ ++ if (sst_create_ipc_msg(&msg, 1)) ++ return -ENOMEM; ++ ++ if (!sst_drv_ctx->use_32bit_ops) { ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ pr_debug("pvt id = %d\n", pvt_id); ++ pr_debug("pipe id = %d\n", str_info->pipe_id); ++ sst_fill_header_mrfld(&msg->mrfld_header, ++ IPC_CMD, str_info->task_id, 1, pvt_id); ++ ++ len = sizeof(*metadata) + sizeof(dsp_hdr); ++ msg->mrfld_header.p.header_low_payload = len; ++ sst_fill_header_dsp(&dsp_hdr, IPC_IA_SET_STREAM_PARAMS_MRFLD, ++ str_info->pipe_id, sizeof(*metadata)); ++ memcpy(msg->mailbox_data, &dsp_hdr, sizeof(dsp_hdr)); ++ memcpy(msg->mailbox_data + sizeof(dsp_hdr), ++ metadata, sizeof(*metadata)); ++ } else { ++ sst_fill_header(&msg->header, IPC_IA_SET_STREAM_PARAMS, ++ 1, str_id); ++ msg->header.part.data = sizeof(u32) + sizeof(*metadata); ++ memcpy(msg->mailbox_data, &msg->header, sizeof(u32)); ++ memcpy(msg->mailbox_data + sizeof(u32), ++ metadata, sizeof(*metadata)); ++ } ++ ++ sst_drv_ctx->ops->sync_post_message(msg); ++ return retval; ++} ++ ++static int sst_cdev_control(unsigned int cmd, unsigned int str_id) ++{ ++ pr_debug("recieved cmd %d on stream %d\n", cmd, str_id); ++ ++ if (sst_drv_ctx->sst_state == SST_UN_INIT) ++ return 0; ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ return sst_pause_stream(str_id); ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ return sst_resume_stream(str_id); ++ case SNDRV_PCM_TRIGGER_START: { ++ struct stream_info *str_info; ++ str_info = get_stream_info(str_id); ++ if (!str_info) ++ return -EINVAL; ++ str_info->prev = str_info->status; ++ str_info->status = STREAM_RUNNING; ++ return sst_start_stream(str_id); ++ } ++ case SNDRV_PCM_TRIGGER_STOP: ++ return sst_drop_stream(str_id); ++ case SND_COMPR_TRIGGER_DRAIN: ++ return sst_drain_stream(str_id, false); ++ case SND_COMPR_TRIGGER_NEXT_TRACK: ++ return sst_next_track(); ++ case SND_COMPR_TRIGGER_PARTIAL_DRAIN: ++ return sst_drain_stream(str_id, true); ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int sst_cdev_tstamp(unsigned int str_id, struct snd_compr_tstamp *tstamp) ++{ ++ struct snd_sst_tstamp fw_tstamp = {0,}; ++ struct stream_info *stream; ++ ++ memcpy_fromio(&fw_tstamp, ++ ((void *)(sst_drv_ctx->mailbox + sst_drv_ctx->tstamp) ++ +(str_id * sizeof(fw_tstamp))), ++ sizeof(fw_tstamp)); ++ ++ stream = get_stream_info(str_id); ++ if (!stream) ++ return -EINVAL; ++ pr_debug("rb_counter %llu in bytes\n", fw_tstamp.ring_buffer_counter); ++ ++ tstamp->copied_total = fw_tstamp.ring_buffer_counter; ++ tstamp->pcm_frames = fw_tstamp.frames_decoded; ++ tstamp->pcm_io_frames = div_u64(fw_tstamp.hardware_counter, ++ (u64)((stream->num_ch) * SST_GET_BYTES_PER_SAMPLE(24))); ++ tstamp->sampling_rate = fw_tstamp.sampling_frequency; ++ pr_debug("PCM = %u\n", tstamp->pcm_io_frames); ++ pr_debug("Pointer Query on strid = %d copied_total %d, decodec %d\n", ++ str_id, tstamp->copied_total, tstamp->pcm_frames); ++ pr_debug("rendered %d\n", tstamp->pcm_io_frames); ++ return 0; ++} ++ ++static int sst_cdev_caps(struct snd_compr_caps *caps) ++{ ++ caps->num_codecs = NUM_CODEC; ++ caps->min_fragment_size = MIN_FRAGMENT_SIZE; /* 50KB */ ++ caps->max_fragment_size = MAX_FRAGMENT_SIZE; /* 1024KB */ ++ caps->min_fragments = MIN_FRAGMENT; ++ caps->max_fragments = MAX_FRAGMENT; ++ caps->codecs[0] = SND_AUDIOCODEC_MP3; ++ caps->codecs[1] = SND_AUDIOCODEC_AAC; ++ return 0; ++} ++ ++static int sst_cdev_codec_caps(struct snd_compr_codec_caps *codec) ++{ ++ ++ if (codec->codec == SND_AUDIOCODEC_MP3) { ++ codec->num_descriptors = 2; ++ codec->descriptor[0].max_ch = 2; ++ codec->descriptor[0].sample_rates = SNDRV_PCM_RATE_8000_48000; ++ codec->descriptor[0].bit_rate[0] = 320; /* 320kbps */ ++ codec->descriptor[0].bit_rate[1] = 192; ++ codec->descriptor[0].num_bitrates = 2; ++ codec->descriptor[0].profiles = 0; ++ codec->descriptor[0].modes = SND_AUDIOCHANMODE_MP3_STEREO; ++ codec->descriptor[0].formats = 0; ++ } else if (codec->codec == SND_AUDIOCODEC_AAC) { ++ codec->num_descriptors = 2; ++ codec->descriptor[1].max_ch = 2; ++ codec->descriptor[1].sample_rates = SNDRV_PCM_RATE_8000_48000; ++ codec->descriptor[1].bit_rate[0] = 320; /* 320kbps */ ++ codec->descriptor[1].bit_rate[1] = 192; ++ codec->descriptor[1].num_bitrates = 2; ++ codec->descriptor[1].profiles = 0; ++ codec->descriptor[1].modes = 0; ++ codec->descriptor[1].formats = ++ (SND_AUDIOSTREAMFORMAT_MP4ADTS | ++ SND_AUDIOSTREAMFORMAT_RAW); ++ } else { ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++void sst_cdev_fragment_elapsed(int str_id) ++{ ++ struct stream_info *stream; ++ ++ pr_debug("fragment elapsed from firmware for str_id %d\n", str_id); ++ stream = &sst_drv_ctx->streams[str_id]; ++ if (stream->compr_cb) ++ stream->compr_cb(stream->compr_cb_param); ++} ++ ++/* ++ * sst_close_pcm_stream - Close PCM interface ++ * ++ * @str_id: stream id to be closed ++ * ++ * This function is called by MID sound card driver to close ++ * an existing pcm interface ++ */ ++static int sst_close_pcm_stream(unsigned int str_id) ++{ ++ struct stream_info *stream; ++ int retval = 0; ++ ++ pr_debug("%s: Entry\n", __func__); ++ stream = get_stream_info(str_id); ++ if (!stream) { ++ pr_err("stream info is NULL for str %d!!!\n", str_id); ++ return -EINVAL; ++ } ++ ++ if (stream->status == STREAM_RESET) { ++ /* silently fail here as we have cleaned the stream */ ++ pr_debug("stream in reset state...\n"); ++ ++ retval = 0; ++ goto put; ++ } ++ ++ retval = free_stream_context(str_id); ++put: ++ stream->pcm_substream = NULL; ++ stream->status = STREAM_UN_INIT; ++ stream->period_elapsed = NULL; ++ sst_drv_ctx->stream_cnt--; ++ ++ /* The free_stream will return a error if there is no stream to free, ++ (i.e. the alloc failure case). And in this case the open does a put in ++ the error scenario, so skip in this case. ++ In the close we need to handle put in the success scenario and ++ the timeout error(EBUSY) scenario. */ ++ if (!retval || (retval == -EBUSY)) ++ sst_pm_runtime_put(sst_drv_ctx); ++ else ++ pr_err("%s: free stream returned err %d\n", __func__, retval); ++ ++ pr_debug("%s: Exit\n", __func__); ++ return 0; ++} ++ ++int sst_send_sync_msg(int ipc, int str_id) ++{ ++ struct ipc_post *msg = NULL; ++ ++ if (sst_create_ipc_msg(&msg, false)) ++ return -ENOMEM; ++ sst_fill_header(&msg->header, ipc, 0, str_id); ++ return sst_drv_ctx->ops->sync_post_message(msg); ++} ++ ++static inline int sst_calc_tstamp(struct pcm_stream_info *info, ++ struct snd_pcm_substream *substream, ++ struct snd_sst_tstamp *fw_tstamp) ++{ ++ size_t delay_bytes, delay_frames; ++ size_t buffer_sz; ++ u32 pointer_bytes, pointer_samples; ++ ++ pr_debug("mrfld ring_buffer_counter %llu in bytes\n", ++ fw_tstamp->ring_buffer_counter); ++ pr_debug("mrfld hardware_counter %llu in bytes\n", ++ fw_tstamp->hardware_counter); ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ++ delay_bytes = (size_t) (fw_tstamp->ring_buffer_counter - ++ fw_tstamp->hardware_counter); ++ else ++ delay_bytes = (size_t) (fw_tstamp->hardware_counter - ++ fw_tstamp->ring_buffer_counter); ++ delay_frames = bytes_to_frames(substream->runtime, delay_bytes); ++ buffer_sz = snd_pcm_lib_buffer_bytes(substream); ++ div_u64_rem(fw_tstamp->ring_buffer_counter, buffer_sz, &pointer_bytes); ++ pointer_samples = bytes_to_samples(substream->runtime, pointer_bytes); ++ ++ pr_debug("pcm delay %zu in bytes\n", delay_bytes); ++ ++ info->buffer_ptr = pointer_samples / substream->runtime->channels; ++ ++ info->pcm_delay = delay_frames / substream->runtime->channels; ++ pr_debug("buffer ptr %llu pcm_delay rep: %llu\n", ++ info->buffer_ptr, info->pcm_delay); ++ return 0; ++} ++ ++static int sst_read_timestamp(struct pcm_stream_info *info) ++{ ++ struct stream_info *stream; ++ struct snd_pcm_substream *substream; ++ struct snd_sst_tstamp fw_tstamp; ++ unsigned int str_id; ++ ++ str_id = info->str_id; ++ stream = get_stream_info(str_id); ++ if (!stream) ++ return -EINVAL; ++ ++ if (!stream->pcm_substream) ++ return -EINVAL; ++ substream = stream->pcm_substream; ++ ++ memcpy_fromio(&fw_tstamp, ++ ((void *)(sst_drv_ctx->mailbox + sst_drv_ctx->tstamp) ++ + (str_id * sizeof(fw_tstamp))), ++ sizeof(fw_tstamp)); ++ return sst_calc_tstamp(info, substream, &fw_tstamp); ++} ++ ++/* ++ * sst_device_control - Set Control params ++ * ++ * @cmd: control cmd to be set ++ * @arg: command argument ++ * ++ * This function is called by MID sound card driver to set ++ * SST/Sound card controls for an opened stream. ++ * This is registered with MID driver ++ */ ++static int sst_device_control(int cmd, void *arg) ++{ ++ int retval = 0, str_id = 0; ++ ++ if (sst_drv_ctx->sst_state == SST_UN_INIT) ++ return 0; ++ ++ switch (cmd) { ++ case SST_SND_PAUSE: ++ case SST_SND_RESUME: { ++ struct mad_ops_wq *work = kzalloc(sizeof(*work), GFP_ATOMIC); ++ if (!work) ++ return -ENOMEM; ++ INIT_WORK(&work->wq, sst_process_mad_ops); ++ work->control_op = cmd; ++ work->stream_id = *(int *)arg; ++ queue_work(sst_drv_ctx->mad_wq, &work->wq); ++ break; ++ } ++ case SST_SND_START: { ++ struct stream_info *str_info; ++ int ipc; ++ str_id = *(int *)arg; ++ str_info = get_stream_info(str_id); ++ if (!str_info) ++ return -EINVAL; ++ ipc = IPC_IA_START_STREAM; ++ str_info->prev = str_info->status; ++ str_info->status = STREAM_RUNNING; ++ sst_start_stream(str_id); ++ break; ++ } ++ case SST_SND_DROP: { ++ struct stream_info *str_info; ++ int ipc; ++ str_id = *(int *)arg; ++ str_info = get_stream_info(str_id); ++ if (!str_info) ++ return -EINVAL; ++ ipc = IPC_IA_DROP_STREAM; ++ str_info->prev = STREAM_UN_INIT; ++ str_info->status = STREAM_INIT; ++ if (sst_drv_ctx->use_32bit_ops) ++ retval = sst_send_sync_msg(ipc, str_id); ++ else ++ retval = sst_drop_stream(str_id); ++ break; ++ } ++ case SST_SND_STREAM_INIT: { ++ struct pcm_stream_info *str_info; ++ struct stream_info *stream; ++ ++ pr_debug("stream init called\n"); ++ str_info = (struct pcm_stream_info *)arg; ++ str_id = str_info->str_id; ++ stream = get_stream_info(str_id); ++ if (!stream) { ++ retval = -EINVAL; ++ break; ++ } ++ pr_debug("setting the period ptrs\n"); ++ stream->pcm_substream = str_info->mad_substream; ++ stream->period_elapsed = str_info->period_elapsed; ++ stream->sfreq = str_info->sfreq; ++ stream->prev = stream->status; ++ stream->status = STREAM_INIT; ++ pr_debug("pcm_substream %p, period_elapsed %p, sfreq %d, status %d\n", ++ stream->pcm_substream, stream->period_elapsed, stream->sfreq, stream->status); ++ break; ++ } ++ ++ case SST_SND_BUFFER_POINTER: { ++ struct pcm_stream_info *stream_info; ++ ++ stream_info = (struct pcm_stream_info *)arg; ++ retval = sst_read_timestamp(stream_info); ++ pr_debug("pointer %llu, delay %llu\n", ++ stream_info->buffer_ptr, stream_info->pcm_delay); ++ break; ++ } ++ default: ++ /* Illegal case */ ++ pr_warn("illegal req\n"); ++ return -EINVAL; ++ } ++ ++ return retval; ++} ++ ++/* ++ * sst_copy_runtime_param - copy runtime params from src to dst ++ * structure. ++ * ++ *@dst: destination runtime structure ++ *@src: source runtime structure ++ * ++ * This helper function is called to copy the runtime parameter ++ * structure. ++*/ ++static int sst_copy_runtime_param(struct snd_sst_runtime_params *dst, ++ struct snd_sst_runtime_params *src) ++{ ++ dst->type = src->type; ++ dst->str_id = src->str_id; ++ dst->size = src->size; ++ if (dst->addr) { ++ pr_err("mem allocated in prev setting, use the same memory\n"); ++ return -EINVAL; ++ } ++ dst->addr = kzalloc(dst->size, GFP_KERNEL); ++ if (!dst->addr) ++ return -ENOMEM; ++ memcpy(dst->addr, src->addr, dst->size); ++ return 0; ++} ++/* ++ * sst_set_generic_params - Set generic params ++ * ++ * @cmd: control cmd to be set ++ * @arg: command argument ++ * ++ * This function is called by MID sound card driver to configure ++ * SST runtime params. ++ */ ++static int sst_set_generic_params(enum sst_controls cmd, void *arg) ++{ ++ int ret_val = 0; ++ pr_debug("Enter:%s, cmd:%d\n", __func__, cmd); ++ ++ if (NULL == arg) ++ return -EINVAL; ++ ++ switch (cmd) { ++ case SST_SET_RUNTIME_PARAMS: { ++ struct snd_sst_runtime_params *src; ++ struct snd_sst_runtime_params *dst; ++ ++ src = (struct snd_sst_runtime_params *)arg; ++ dst = &(sst_drv_ctx->runtime_param.param); ++ ret_val = sst_copy_runtime_param(dst, src); ++ break; ++ } ++ case SST_SET_ALGO_PARAMS: { ++ unsigned int device_input_mixer = *((unsigned int *)arg); ++ pr_debug("LPE mixer algo param set %x\n", device_input_mixer); ++ mutex_lock(&sst_drv_ctx->mixer_ctrl_lock); ++ sst_drv_ctx->device_input_mixer = device_input_mixer; ++ mutex_unlock(&sst_drv_ctx->mixer_ctrl_lock); ++ ret_val = sst_send_lpe_mixer_algo_params(); ++ break; ++ } ++ case SST_SET_BYTE_STREAM: { ++ ret_val = intel_sst_check_device(); ++ if (ret_val) ++ return ret_val; ++ ++ ret_val = sst_send_byte_stream_mrfld(arg); ++ sst_pm_runtime_put(sst_drv_ctx); ++ break; ++ } ++ case SST_GET_PROBE_BYTE_STREAM: { ++ struct snd_sst_probe_bytes *prb_bytes = (struct snd_sst_probe_bytes *)arg; ++ ++ if (sst_drv_ctx->probe_bytes) { ++ prb_bytes->len = sst_drv_ctx->probe_bytes->len; ++ memcpy(prb_bytes->bytes, &sst_drv_ctx->probe_bytes->bytes, prb_bytes->len); ++ } ++ break; ++ } ++ case SST_SET_PROBE_BYTE_STREAM: { ++ struct snd_sst_probe_bytes *prb_bytes = (struct snd_sst_probe_bytes *)arg; ++ ++ if (sst_drv_ctx->probe_bytes) { ++ sst_drv_ctx->probe_bytes->len = prb_bytes->len; ++ memcpy(&sst_drv_ctx->probe_bytes->bytes, prb_bytes->bytes, prb_bytes->len); ++ } ++ ++ ret_val = intel_sst_check_device(); ++ if (ret_val) ++ return ret_val; ++ ++ ret_val = sst_send_probe_bytes(sst_drv_ctx); ++ break; ++ } ++ case SST_SET_VTSV_INFO: { ++ ret_val = intel_sst_check_device(); ++ if (ret_val) ++ return ret_val; ++ ++ ret_val = sst_send_vtsv_data_to_fw(sst_drv_ctx); ++ if (ret_val) ++ pr_err("vtsv data send failed\n"); ++ sst_pm_runtime_put(sst_drv_ctx); ++ break; ++ } ++ default: ++ pr_err("Invalid cmd request:%d\n", cmd); ++ ret_val = -EINVAL; ++ } ++ return ret_val; ++} ++ ++static struct sst_ops pcm_ops = { ++ .open = sst_open_pcm_stream, ++ .device_control = sst_device_control, ++ .set_generic_params = sst_set_generic_params, ++ .close = sst_close_pcm_stream, ++ .power = sst_power_control, ++}; ++ ++static struct compress_sst_ops compr_ops = { ++ .open = sst_cdev_open, ++ .close = sst_cdev_close, ++ .control = sst_cdev_control, ++ .tstamp = sst_cdev_tstamp, ++ .ack = sst_cdev_ack, ++ .get_caps = sst_cdev_caps, ++ .get_codec_caps = sst_cdev_codec_caps, ++ .set_metadata = sst_cdev_set_metadata, ++}; ++ ++ ++static struct sst_device sst_dsp_device = { ++ .name = "Intel(R) SST LPE", ++ .dev = NULL, ++ .ops = &pcm_ops, ++ .compr_ops = &compr_ops, ++}; ++ ++/* ++ * register_sst - function to register DSP ++ * ++ * This functions registers DSP with the platform driver ++ */ ++int register_sst(struct device *dev) ++{ ++ int ret_val; ++ sst_dsp_device.dev = dev; ++ ret_val = sst_register_dsp(&sst_dsp_device); ++ if (ret_val) ++ pr_err("Unable to register DSP with platform driver\n"); ++ ++ return ret_val; ++} ++ ++int unregister_sst(struct device *dev) ++{ ++ return sst_unregister_dsp(&sst_dsp_device); ++} +diff --git a/sound/soc/intel/sst/sst_dsp.c b/sound/soc/intel/sst/sst_dsp.c +new file mode 100644 +index 0000000..edfe471 +--- /dev/null ++++ b/sound/soc/intel/sst/sst_dsp.c +@@ -0,0 +1,1995 @@ ++/* ++ * sst_dsp.c - Intel SST Driver for audio engine ++ * ++ * Copyright (C) 2008-10 Intel Corp ++ * Authors: Vinod Koul ++ * Harsha Priya ++ * Dharageswari R ++ * KP Jeeja ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This file contains all dsp controlling functions like firmware download, ++ * setting/resetting dsp cores, etc ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../sst_platform.h" ++#include "../platform_ipc_v2.h" ++#include "sst.h" ++#include "sst_trace.h" ++ ++#ifndef CONFIG_X86_64 ++#define MEMCPY_TOIO memcpy_toio ++#else ++#define MEMCPY_TOIO memcpy32_toio ++#endif ++ ++static struct sst_module_info sst_modules_mrfld[] = { ++ {"mp3_dec", SST_CODEC_TYPE_MP3, 0, SST_LIB_NOT_FOUND}, ++ {"aac_dec", SST_CODEC_TYPE_AAC, 0, SST_LIB_NOT_FOUND}, ++ {"audclass_lib", SST_ALGO_AUDCLASSIFIER, 0, SST_LIB_NOT_FOUND}, ++ {"vtsv_lib", SST_ALGO_VTSV, 0, SST_LIB_NOT_FOUND}, ++ {"geq_lib", SST_ALGO_GEQ, 0, SST_LIB_NOT_FOUND}, ++}; ++ ++static struct sst_module_info sst_modules_byt[] = { ++ {"mp3_dec", SST_CODEC_TYPE_MP3, 0, SST_LIB_NOT_FOUND}, ++ {"aac_dec", SST_CODEC_TYPE_AAC, 0, SST_LIB_NOT_FOUND}, ++}; ++ ++/** ++ * memcpy32_toio: Copy using writel commands ++ * ++ * This is needed because the hardware does not support ++ * 64-bit moveq insructions while writing to PCI MMIO ++ */ ++void memcpy32_toio(void *dst, const void *src, int count) ++{ ++ int i; ++ const u32 *src_32 = src; ++ u32 *dst_32 = dst; ++ ++ for (i = 0; i < count/sizeof(u32); i++) ++ writel(*src_32++, dst_32++); ++} ++ ++/** ++ * intel_sst_reset_dsp_medfield - Resetting SST DSP ++ * ++ * This resets DSP in case of Medfield platfroms ++ */ ++int intel_sst_reset_dsp_mfld(void) ++{ ++ union config_status_reg csr; ++ ++ pr_debug("Resetting the DSP in medfield\n"); ++ mutex_lock(&sst_drv_ctx->csr_lock); ++ csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR); ++ csr.full |= 0x382; ++ csr.part.run_stall = 0x1; ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); ++ mutex_unlock(&sst_drv_ctx->csr_lock); ++ ++ return 0; ++} ++ ++/** ++ * sst_start_medfield - Start the SST DSP processor ++ * ++ * This starts the DSP in MRST platfroms ++ */ ++int sst_start_mfld(void) ++{ ++ union config_status_reg csr; ++ ++ mutex_lock(&sst_drv_ctx->csr_lock); ++ csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR); ++ csr.part.bypass = 0; ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); ++ csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR); ++ csr.part.mfld_strb = 1; ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); ++ csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR); ++ csr.part.run_stall = 0; ++ csr.part.sst_reset = 0; ++ pr_debug("Starting the DSP_medfld %x\n", csr.full); ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); ++ pr_debug("Starting the DSP_medfld\n"); ++ mutex_unlock(&sst_drv_ctx->csr_lock); ++ ++ return 0; ++} ++/** ++ * intel_sst_reset_dsp_mrfld - Resetting SST DSP ++ * ++ * This resets DSP in case of MRFLD platfroms ++ */ ++int intel_sst_reset_dsp_mrfld(void) ++{ ++ union config_status_reg_mrfld csr; ++ ++ pr_debug("sst: Resetting the DSP in mrfld\n"); ++ mutex_lock(&sst_drv_ctx->csr_lock); ++ csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); ++ ++ pr_debug("value:0x%llx\n", csr.full); ++ ++ csr.full |= 0x7; ++ sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full); ++ csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); ++ ++ pr_debug("value:0x%llx\n", csr.full); ++ ++ csr.full &= ~(0x1); ++ sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full); ++ ++ csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); ++ pr_debug("value:0x%llx\n", csr.full); ++ mutex_unlock(&sst_drv_ctx->csr_lock); ++ return 0; ++} ++ ++/** ++ * sst_start_merrifield - Start the SST DSP processor ++ * ++ * This starts the DSP in MERRIFIELD platfroms ++ */ ++int sst_start_mrfld(void) ++{ ++ union config_status_reg_mrfld csr; ++ ++ pr_debug("sst: Starting the DSP in mrfld LALALALA\n"); ++ mutex_lock(&sst_drv_ctx->csr_lock); ++ csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); ++ pr_debug("value:0x%llx\n", csr.full); ++ ++ csr.full |= 0x7; ++ sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full); ++ ++ csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); ++ pr_debug("value:0x%llx\n", csr.full); ++ ++ csr.part.xt_snoop = 1; ++ csr.full &= ~(0x5); ++ sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full); ++ ++ csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); ++ pr_debug("sst: Starting the DSP_merrifield:%llx\n", csr.full); ++ mutex_unlock(&sst_drv_ctx->csr_lock); ++ return 0; ++} ++ ++/** ++ * intel_sst_set_bypass - Sets/clears the bypass bits ++ * ++ * This sets/clears the bypass bits ++ */ ++void intel_sst_set_bypass_mfld(bool set) ++{ ++ union config_status_reg csr; ++ ++ mutex_lock(&sst_drv_ctx->csr_lock); ++ csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR); ++ if (set == true) ++ csr.full |= 0x380; ++ else ++ csr.part.bypass = 0; ++ pr_debug("SetupByPass set %d Val 0x%x\n", set, csr.full); ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); ++ mutex_unlock(&sst_drv_ctx->csr_lock); ++ ++} ++#define SST_CALC_DMA_DSTN(lpe_viewpt_rqd, ia_viewpt_addr, elf_paddr, \ ++ lpe_viewpt_addr) ((lpe_viewpt_rqd) ? \ ++ elf_paddr : (ia_viewpt_addr + elf_paddr - lpe_viewpt_addr)) ++ ++static int sst_fill_dstn(struct intel_sst_drv *sst, struct sst_info info, ++ Elf32_Phdr *pr, void **dstn, unsigned int *dstn_phys, int *mem_type) ++{ ++#ifdef MRFLD_WORD_WA ++ /* work arnd-since only 4 byte align copying is only allowed for ICCM */ ++ if ((pr->p_paddr >= info.iram_start) && (pr->p_paddr < info.iram_end)) { ++ size_t data_size = pr->p_filesz % SST_ICCM_BOUNDARY; ++ ++ if (data_size) ++ pr->p_filesz += 4 - data_size; ++ *dstn = sst->iram + (pr->p_paddr - info.iram_start); ++ *dstn_phys = SST_CALC_DMA_DSTN(info.lpe_viewpt_rqd, ++ sst->iram_base, pr->p_paddr, info.iram_start); ++ *mem_type = 1; ++ } ++#else ++ if ((pr->p_paddr >= info.iram_start) && ++ (pr->p_paddr < info.iram_end)) { ++ ++ *dstn = sst->iram + (pr->p_paddr - info.iram_start); ++ *dstn_phys = SST_CALC_DMA_DSTN(info.lpe_viewpt_rqd, ++ sst->iram_base, pr->p_paddr, info.iram_start); ++ *mem_type = 1; ++ } ++#endif ++ else if ((pr->p_paddr >= info.dram_start) && ++ (pr->p_paddr < info.dram_end)) { ++ ++ *dstn = sst->dram + (pr->p_paddr - info.dram_start); ++ *dstn_phys = SST_CALC_DMA_DSTN(info.lpe_viewpt_rqd, ++ sst->dram_base, pr->p_paddr, info.dram_start); ++ *mem_type = 1; ++ } else if ((pr->p_paddr >= info.imr_start) && ++ (pr->p_paddr < info.imr_end)) { ++ ++ *dstn = sst->ddr + (pr->p_paddr - info.imr_start); ++ *dstn_phys = sst->ddr_base + pr->p_paddr - info.imr_start; ++ *mem_type = 0; ++ } else { ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static void sst_fill_info(struct intel_sst_drv *sst, ++ struct sst_info *info) ++{ ++ /* first we setup addresses to be used for elf sections */ ++ if (sst->info.iram_use) { ++ info->iram_start = sst->info.iram_start; ++ info->iram_end = sst->info.iram_end; ++ } else { ++ info->iram_start = sst->iram_base; ++ info->iram_end = sst->iram_end; ++ } ++ if (sst->info.dram_use) { ++ info->dram_start = sst->info.dram_start; ++ info->dram_end = sst->info.dram_end; ++ } else { ++ info->dram_start = sst->dram_base; ++ info->dram_end = sst->dram_end; ++ } ++ if (sst->info.imr_use) { ++ info->imr_start = sst->info.imr_start; ++ info->imr_end = sst->info.imr_end; ++ } else { ++ info->imr_start = relocate_imr_addr_mrfld(sst->ddr_base); ++ info->imr_end = relocate_imr_addr_mrfld(sst->ddr_end); ++ } ++ ++ info->lpe_viewpt_rqd = sst->info.lpe_viewpt_rqd; ++ info->dma_max_len = sst->info.dma_max_len; ++ pr_debug("%s: dma_max_len 0x%x", __func__, info->dma_max_len); ++} ++ ++static inline int sst_validate_elf(const struct firmware *sst_bin, bool dynamic) ++{ ++ Elf32_Ehdr *elf; ++ ++ BUG_ON(!sst_bin); ++ ++ pr_debug("IN %s\n", __func__); ++ ++ elf = (Elf32_Ehdr *)sst_bin->data; ++ ++ if ((elf->e_ident[0] != 0x7F) || (elf->e_ident[1] != 'E') || ++ (elf->e_ident[2] != 'L') || (elf->e_ident[3] != 'F')) { ++ pr_debug("ELF Header Not found!%zu\n", sst_bin->size); ++ return -EINVAL; ++ } ++ ++ if (dynamic == true) { ++ if (elf->e_type != ET_DYN) { ++ pr_err("Not a dynamic loadable library\n"); ++ return -EINVAL; ++ } ++ } ++ pr_debug("Valid ELF Header...%zu\n", sst_bin->size); ++ return 0; ++} ++ ++/** ++ * sst_validate_fw_image - validates the firmware signature ++ * ++ * @sst_fw_in_mem : pointer to audio FW ++ * @size : size of the firmware ++ * @module : points to the FW modules ++ * @num_modules : points to the num of modules ++ * This function validates the header signature in the FW image ++ */ ++static int sst_validate_fw_image(const void *sst_fw_in_mem, unsigned long size, ++ struct fw_module_header **module, u32 *num_modules) ++{ ++ struct fw_header *header; ++ ++ pr_debug("%s\n", __func__); ++ ++ /* Read the header information from the data pointer */ ++ header = (struct fw_header *)sst_fw_in_mem; ++ pr_debug("header sign=%s size=%x modules=%x fmt=%x size=%zx\n", ++ header->signature, header->file_size, header->modules, ++ header->file_format, sizeof(*header)); ++ ++ /* verify FW */ ++ if ((strncmp(header->signature, SST_FW_SIGN, 4) != 0) || ++ (size != header->file_size + sizeof(*header))) { ++ /* Invalid FW signature */ ++ pr_err("InvalidFW sign/filesize mismatch\n"); ++ return -EINVAL; ++ } ++ *num_modules = header->modules; ++ *module = (void *)sst_fw_in_mem + sizeof(*header); ++ ++ return 0; ++} ++ ++/** ++ * sst_validate_library - validates the library signature ++ * ++ * @fw_lib : pointer to FW library ++ * @slot : pointer to the lib slot info ++ * @entry_point : out param, which contains the module entry point ++ * This function is called before downloading the codec/postprocessing ++ * library ++ */ ++static int sst_validate_library(const struct firmware *fw_lib, ++ struct lib_slot_info *slot, ++ u32 *entry_point) ++{ ++ struct fw_header *header; ++ struct fw_module_header *module; ++ struct fw_block_info *block; ++ unsigned int n_blk, isize = 0, dsize = 0; ++ int err = 0; ++ ++ header = (struct fw_header *)fw_lib->data; ++ if (header->modules != 1) { ++ pr_err("Module no mismatch found\n"); ++ err = -EINVAL; ++ goto exit; ++ } ++ module = (void *)fw_lib->data + sizeof(*header); ++ *entry_point = module->entry_point; ++ pr_debug("Module entry point 0x%x\n", *entry_point); ++ pr_debug("Module Sign %s, Size 0x%x, Blocks 0x%x Type 0x%x\n", ++ module->signature, module->mod_size, ++ module->blocks, module->type); ++ ++ block = (void *)module + sizeof(*module); ++ for (n_blk = 0; n_blk < module->blocks; n_blk++) { ++ switch (block->type) { ++ case SST_IRAM: ++ isize += block->size; ++ break; ++ case SST_DRAM: ++ dsize += block->size; ++ break; ++ default: ++ pr_err("Invalid block type for 0x%x\n", n_blk); ++ err = -EINVAL; ++ goto exit; ++ } ++ block = (void *)block + sizeof(*block) + block->size; ++ } ++ if (isize > slot->iram_size || dsize > slot->dram_size) { ++ pr_err("library exceeds size allocated\n"); ++ err = -EINVAL; ++ goto exit; ++ } else ++ pr_debug("Library is safe for download...\n"); ++ ++ pr_debug("iram 0x%x, dram 0x%x, iram 0x%x, dram 0x%x\n", ++ isize, dsize, slot->iram_size, slot->dram_size); ++exit: ++ return err; ++ ++} ++ ++static bool chan_filter(struct dma_chan *chan, void *param) ++{ ++ struct sst_dma *dma = (struct sst_dma *)param; ++ ++ /* we only need MID_DMAC1 as that can access DSP RAMs*/ ++ if (chan->device->dev == dma->dev) ++ return true; ++ ++ return false; ++} ++ ++static unsigned int ++sst_get_elf_sg_len(struct intel_sst_drv *sst, Elf32_Ehdr *elf, Elf32_Phdr *pr, ++ struct sst_info info) ++{ ++ unsigned int i = 0, count = 0; ++ ++ pr_debug("in %s: dma_max_len 0x%x\n", __func__, info.dma_max_len); ++ ++ while (i < elf->e_phnum) { ++ if (pr[i].p_type == PT_LOAD) { ++ ++ if ((pr[i].p_paddr >= info.iram_start) && ++ (pr[i].p_paddr < info.iram_end && ++ pr[i].p_filesz)) { ++ count += (pr[i].p_filesz) / info.dma_max_len; ++ ++ if ((pr[i].p_filesz) % info.dma_max_len) ++ count++; ++ ++ } else if ((pr[i].p_paddr >= info.dram_start) && ++ (pr[i].p_paddr < info.dram_end && ++ pr[i].p_filesz)) { ++ count += (pr[i].p_filesz) / info.dma_max_len; ++ ++ if ((pr[i].p_filesz) % info.dma_max_len) ++ count++; ++ ++ } else if ((pr[i].p_paddr >= info.imr_start) && ++ (pr[i].p_paddr < info.imr_end && ++ pr[i].p_filesz)) { ++ count += (pr[i].p_filesz) / info.dma_max_len; ++ ++ if ((pr[i].p_filesz) % info.dma_max_len) ++ count++; ++ } ++ } ++ i++; ++ } ++ ++ pr_debug("gotcha count %d\n", count); ++ return count; ++} ++ ++static int ++sst_init_dma_sg_list(struct intel_sst_drv *sst, unsigned int len, ++ struct scatterlist **src, struct scatterlist **dstn) ++{ ++ struct scatterlist *sg_src = NULL, *sg_dst = NULL; ++ ++ sg_src = kzalloc(sizeof(*sg_src)*(len), GFP_KERNEL); ++ if (NULL == sg_src) ++ return -ENOMEM; ++ sg_init_table(sg_src, len); ++ sg_dst = kzalloc(sizeof(*sg_dst)*(len), GFP_KERNEL); ++ if (NULL == sg_dst) { ++ kfree(sg_src); ++ return -ENOMEM; ++ } ++ sg_init_table(sg_dst, len); ++ *src = sg_src; ++ *dstn = sg_dst; ++ ++ return 0; ++} ++ ++static int sst_alloc_dma_chan(struct sst_dma *dma) ++{ ++ dma_cap_mask_t mask; ++ struct intel_mid_dma_slave *slave = &dma->slave; ++ int retval; ++ struct pci_dev *dmac = NULL; ++ const char *hid; ++ ++ pr_debug("%s\n", __func__); ++ dma->dev = NULL; ++ dma_cap_zero(mask); ++ dma_cap_set(DMA_MEMCPY, mask); ++ ++ if (sst_drv_ctx->pci_id == SST_CLV_PCI_ID) ++ dmac = pci_get_device(PCI_VENDOR_ID_INTEL, ++ PCI_DMAC_CLV_ID, NULL); ++ else if (sst_drv_ctx->pci_id == SST_MRFLD_PCI_ID) ++ dmac = pci_get_device(PCI_VENDOR_ID_INTEL, ++ PCI_DMAC_MRFLD_ID, NULL); ++ else if (sst_drv_ctx->pci_id == SST_BYT_PCI_ID) { ++ hid = sst_drv_ctx->hid; ++ if (!strncmp(hid, "LPE0F281", 8)) ++ dma->dev = intel_mid_get_acpi_dma("DMA0F28"); ++ else if (!strncmp(hid, "80860F28", 8)) ++ dma->dev = intel_mid_get_acpi_dma("ADMA0F28"); ++ else if (!strncmp(hid, "808622A8", 8)) ++ dma->dev = intel_mid_get_acpi_dma("ADMA22A8"); ++ else if (!strncmp(hid, "LPE0F28", 7)) ++ dma->dev = intel_mid_get_acpi_dma("DMA0F28"); ++ } ++ ++ if (!dmac && !dma->dev) { ++ pr_err("Can't find DMAC\n"); ++ return -ENODEV; ++ } ++ if (dmac) ++ dma->dev = &dmac->dev; ++ ++ dma->ch = dma_request_channel(mask, chan_filter, dma); ++ if (!dma->ch) { ++ pr_err("unable to request dma channel\n"); ++ return -EIO; ++ } ++ ++ slave->dma_slave.direction = DMA_MEM_TO_MEM; ++ slave->hs_mode = 0; ++ slave->cfg_mode = LNW_DMA_MEM_TO_MEM; ++ slave->dma_slave.src_addr_width = slave->dma_slave.dst_addr_width = ++ DMA_SLAVE_BUSWIDTH_4_BYTES; ++ slave->dma_slave.src_maxburst = slave->dma_slave.dst_maxburst = ++ LNW_DMA_MSIZE_16; ++ ++ retval = dmaengine_slave_config(dma->ch, &slave->dma_slave); ++ if (retval) { ++ pr_err("unable to set slave config, err %d\n", retval); ++ dma_release_channel(dma->ch); ++ return -EIO; ++ } ++ return retval; ++} ++ ++static void sst_dma_transfer_complete(void *arg) ++{ ++ sst_drv_ctx = (struct intel_sst_drv *)arg; ++ pr_debug(" sst_dma_transfer_complete\n"); ++ sst_wake_up_block(sst_drv_ctx, 0, FW_DWNL_ID, FW_DWNL_ID, NULL, 0); ++} ++ ++static inline int sst_dma_wait_for_completion(struct intel_sst_drv *sst) ++{ ++ int ret = 0; ++ struct sst_block *block; ++ /* call prep and wait */ ++ sst->desc->callback = sst_dma_transfer_complete; ++ sst->desc->callback_param = sst; ++ ++ block = sst_create_block(sst, FW_DWNL_ID, FW_DWNL_ID); ++ if (block == NULL) ++ return -ENOMEM; ++ ++ sst->desc->tx_submit(sst_drv_ctx->desc); ++ ret = sst_wait_timeout(sst, block); ++ if (ret) ++ dma_wait_for_async_tx(sst_drv_ctx->desc); ++ sst_free_block(sst, block); ++ return ret; ++} ++ ++static int sst_dma_firmware(struct sst_dma *dma, struct sst_sg_list *sg_list) ++{ ++ int retval = 0; ++ enum dma_ctrl_flags flag = DMA_CTRL_ACK; ++ struct scatterlist *sg_src_list, *sg_dst_list; ++ int length; ++ pr_debug("%s: use_lli %d\n", __func__, sst_drv_ctx->use_lli); ++ ++ sg_src_list = sg_list->src; ++ sg_dst_list = sg_list->dst; ++ length = sg_list->list_len; ++ ++ /* BY default PIMR is unsmasked ++ * FW gets unmaksed dma intr too, so mask it for FW to execute on mrfld ++ */ ++ if (sst_drv_ctx->pci_id == SST_MRFLD_PCI_ID || ++ sst_drv_ctx->pci_id == SST_BYT_PCI_ID) ++ sst_shim_write(sst_drv_ctx->shim, SST_PIMR, 0xFFFF0034); ++ ++ if (sst_drv_ctx->use_lli) { ++ sst_drv_ctx->desc = dma->ch->device->device_prep_dma_sg(dma->ch, ++ sg_dst_list, length, ++ sg_src_list, length, flag); ++ if (!sst_drv_ctx->desc) ++ return -EFAULT; ++ retval = sst_dma_wait_for_completion(sst_drv_ctx); ++ if (retval) ++ pr_err("sst_dma_firmware..timeout!\n"); ++ } else { ++ struct scatterlist *sg; ++ dma_addr_t src_addr, dstn_addr; ++ int i = 0; ++ ++ /* dma single block mode */ ++ for_each_sg(sg_src_list, sg, length, i) { ++ pr_debug("dma desc %d, length %d\n", i, sg->length); ++ src_addr = sg_phys(sg); ++ dstn_addr = sg_phys(sg_dst_list); ++ if (sg_dst_list) ++ sg_dst_list = sg_next(sg_dst_list); ++ sst_drv_ctx->desc = dma->ch->device->device_prep_dma_memcpy( ++ dma->ch, dstn_addr, src_addr, sg->length, flag); ++ if (!sst_drv_ctx->desc) ++ return -EFAULT; ++ retval = sst_dma_wait_for_completion(sst_drv_ctx); ++ if (retval) ++ pr_err("sst_dma_firmware..timeout!\n"); ++ ++ } ++ } ++ ++ return retval; ++} ++ ++/* ++ * sst_fill_sglist - Fill the sg list ++ * ++ * @from: src address of the fw ++ * @to: virtual address of IRAM/DRAM ++ * @block_size: size of the block ++ * @sg_src: source scatterlist pointer ++ * @sg_dst: Destination scatterlist pointer ++ * @fw_sg_list: Pointer to the sg_list ++ * @dma_max_len: maximum len of the DMA block ++ * ++ * Parses modules that need to be placed in SST IRAM and DRAM ++ * and stores them in a sg list for transfer ++ * returns error or 0 if list creation fails or pass. ++ */ ++static int sst_fill_sglist(unsigned long from, unsigned long to, ++ u32 block_size, struct scatterlist **sg_src, struct scatterlist **sg_dstn, ++ struct sst_sg_list *fw_sg_list, u32 dma_max_len) ++{ ++ u32 offset = 0; ++ int len = 0; ++ unsigned long dstn, src; ++ ++ pr_debug("%s entry", __func__); ++ if (!sg_src || !sg_dstn) ++ return -EINVAL; ++ ++ do { ++ dstn = (unsigned long) (to + offset); ++ src = (unsigned long) (from + offset); ++ ++ /* split blocks to dma_max_len */ ++ ++ len = block_size - offset; ++ pr_debug("DMA blk src %lx,dstn %lx,len %d,offset %d, size %d\n", ++ src, dstn, len, offset, block_size); ++ if (len > dma_max_len) { ++ pr_debug("block size exceeds %d\n", dma_max_len); ++ len = dma_max_len; ++ offset += len; ++ } else { ++ pr_debug("Node length less that %d\n", dma_max_len); ++ offset = 0; ++ } ++ ++ if (!(*sg_src) || !(*sg_dstn)) ++ return -ENOMEM; ++ ++ sg_set_page(*sg_src, virt_to_page((void *) src), len, ++ offset_in_page((void *) src)); ++ sg_set_page(*sg_dstn, virt_to_page((void *) dstn), len, ++ offset_in_page((void *) dstn)); ++ ++ *sg_src = sg_next(*sg_src); ++ *sg_dstn = sg_next(*sg_dstn); ++ ++ /* TODO: is sg_idx required? */ ++ if (sst_drv_ctx->info.use_elf == true) ++ fw_sg_list->sg_idx++; ++ } while (offset > 0); ++ ++ return 0; ++} ++ ++static int sst_parse_elf_module_dma(struct intel_sst_drv *sst, const void *fw, ++ struct sst_info info, Elf32_Phdr *pr, ++ struct scatterlist **sg_src, struct scatterlist **sg_dstn, ++ struct sst_sg_list *fw_sg_list) ++{ ++ unsigned long dstn, src; ++ unsigned int dstn_phys; ++ int ret_val = 0; ++ int mem_type; ++ ++ ret_val = sst_fill_dstn(sst, info, pr, (void *)&dstn, &dstn_phys, &mem_type); ++ if (ret_val) ++ return ret_val; ++ ++ dstn = (unsigned long) phys_to_virt(dstn_phys); ++ src = (unsigned long) (fw + pr->p_offset); ++ ++ ret_val = sst_fill_sglist(src, dstn, pr->p_filesz, ++ sg_src, sg_dstn, fw_sg_list, sst->info.dma_max_len); ++ ++ return ret_val; ++} ++ ++static int ++sst_parse_elf_fw_dma(struct intel_sst_drv *sst, const void *fw_in_mem, ++ struct sst_sg_list *fw_sg_list) ++{ ++ int i = 0, ret = 0; ++ Elf32_Ehdr *elf; ++ Elf32_Phdr *pr; ++ struct sst_info info; ++ struct scatterlist *sg_src = NULL, *sg_dst = NULL; ++ unsigned int sg_len; ++ ++ BUG_ON(!fw_in_mem); ++ ++ elf = (Elf32_Ehdr *)fw_in_mem; ++ pr = (Elf32_Phdr *) (fw_in_mem + elf->e_phoff); ++ pr_debug("%s entry\n", __func__); ++ ++ sst_fill_info(sst, &info); ++ ++ sg_len = sst_get_elf_sg_len(sst, elf, pr, info); ++ if (sg_len == 0) { ++ pr_err("we got NULL sz ELF, abort\n"); ++ return -EIO; ++ } ++ ++ if (sst_init_dma_sg_list(sst, sg_len, &sg_src, &sg_dst)) { ++ ret = -ENOMEM; ++ goto err1; ++ } ++ ++ fw_sg_list->src = sg_src; ++ fw_sg_list->dst = sg_dst; ++ fw_sg_list->list_len = sg_len; ++ fw_sg_list->sg_idx = 0; ++ ++ while (i < elf->e_phnum) { ++ if ((pr[i].p_type == PT_LOAD) && (pr[i].p_filesz)) { ++ ret = sst_parse_elf_module_dma(sst, fw_in_mem, info, ++ &pr[i], &sg_src, &sg_dst, fw_sg_list); ++ if (ret) ++ goto err; ++ } ++ i++; ++ } ++ return 0; ++err: ++ kfree(fw_sg_list->src); ++ kfree(fw_sg_list->dst); ++err1: ++ fw_sg_list->src = NULL; ++ fw_sg_list->dst = NULL; ++ fw_sg_list->list_len = 0; ++ fw_sg_list->sg_idx = 0; ++ ++ return ret; ++} ++ ++/** ++ * sst_parse_module_dma - Parse audio FW modules and populate the dma list ++ * ++ * @sst_ctx : sst driver context ++ * @module : FW module header ++ * @sg_list : Pointer to the sg_list to be populated ++ * Count the length for scattergather list ++ * and create the scattergather list of same length ++ * returns error or 0 if module sizes are proper ++ */ ++static int sst_parse_module_dma(struct intel_sst_drv *sst_ctx, ++ struct fw_module_header *module, ++ struct sst_sg_list *sg_list) ++{ ++ struct fw_block_info *block; ++ u32 count; ++ unsigned long ram, src; ++ int retval, sg_len = 0; ++ struct scatterlist *sg_src, *sg_dst; ++ ++ pr_debug("module sign %s size %x blocks %x type %x\n", ++ module->signature, module->mod_size, ++ module->blocks, module->type); ++ pr_debug("module entrypoint 0x%x\n", module->entry_point); ++ ++ block = (void *)module + sizeof(*module); ++ ++ for (count = 0; count < module->blocks; count++) { ++ sg_len += (block->size) / sst_drv_ctx->info.dma_max_len; ++ ++ if (block->size % sst_drv_ctx->info.dma_max_len) ++ sg_len = sg_len + 1; ++ block = (void *)block + sizeof(*block) + block->size; ++ } ++ ++ if (sst_init_dma_sg_list(sst_ctx, sg_len, &sg_src, &sg_dst)) { ++ retval = -ENOMEM; ++ goto err1; ++ } ++ ++ sg_list->src = sg_src; ++ sg_list->dst = sg_dst; ++ sg_list->list_len = sg_len; ++ ++ block = (void *)module + sizeof(*module); ++ ++ for (count = 0; count < module->blocks; count++) { ++ if (block->size <= 0) { ++ pr_err("block size invalid\n"); ++ retval = -EINVAL; ++ goto err; ++ } ++ switch (block->type) { ++ case SST_IRAM: ++ ram = sst_ctx->iram_base; ++ break; ++ case SST_DRAM: ++ ram = sst_ctx->dram_base; ++ break; ++ default: ++ pr_err("wrong ram type0x%x in block0x%x\n", ++ block->type, count); ++ retval = -EINVAL; ++ goto err; ++ } ++ ++ /*converting from physical to virtual because ++ scattergather list works on virtual pointers*/ ++ ram = (unsigned long) phys_to_virt(ram); ++ ram = (unsigned long)(ram + block->ram_offset); ++ src = (unsigned long) (void *)block + sizeof(*block); ++ ++ retval = sst_fill_sglist(src, ram, ++ block->size, &sg_src, &sg_dst, ++ sg_list, sst_ctx->info.dma_max_len); ++ if (retval) ++ goto err; ++ ++ block = (void *)block + sizeof(*block) + block->size; ++ } ++ return 0; ++err: ++ kfree(sg_list->src); ++ kfree(sg_list->dst); ++err1: ++ sg_list->src = NULL; ++ sg_list->dst = NULL; ++ sg_list->list_len = 0; ++ ++ return retval; ++} ++ ++/** ++ * sst_parse_fw_dma - parse the firmware image & populate the list for dma ++ * ++ * @sst_fw_in_mem : pointer to audio fw ++ * @size : size of the firmware ++ * @fw_list : pointer to sst_sg_list to be populated ++ * This function parses the FW image and saves the parsed image in the list ++ * for dma ++ */ ++static int sst_parse_fw_dma(const void *sst_fw_in_mem, unsigned long size, ++ struct sst_sg_list *fw_list) ++{ ++ struct fw_module_header *module; ++ u32 count, num_modules; ++ int ret_val; ++ ++ ret_val = sst_validate_fw_image(sst_fw_in_mem, size, ++ &module, &num_modules); ++ if (ret_val) ++ return ret_val; ++ ++ for (count = 0; count < num_modules; count++) { ++ /* module */ ++ ret_val = sst_parse_module_dma(sst_drv_ctx, module, fw_list); ++ if (ret_val) ++ return ret_val; ++ module = (void *)module + sizeof(*module) + module->mod_size ; ++ } ++ ++ return 0; ++} ++ ++static void sst_dma_free_resources(struct sst_dma *dma) ++{ ++ pr_debug("entry:%s\n", __func__); ++ ++ dma_release_channel(dma->ch); ++} ++ ++void sst_fill_config(struct intel_sst_drv *sst_ctx, unsigned int offset) ++{ ++ struct sst_fill_config sst_config; ++ ++ if (!(sst_ctx->pdata->bdata && sst_ctx->pdata->pdata)) ++ return; ++ ++ sst_config.sign = SST_CONFIG_SSP_SIGN; ++ memcpy(&sst_config.sst_bdata, sst_ctx->pdata->bdata, sizeof(struct sst_board_config_data)); ++ memcpy(&sst_config.sst_pdata, sst_ctx->pdata->pdata, sizeof(struct sst_platform_config_data)); ++ sst_config.shim_phy_add = sst_ctx->shim_phy_add; ++ sst_config.mailbox_add = sst_ctx->mailbox_add; ++ MEMCPY_TOIO(sst_ctx->dram + offset, &sst_config, sizeof(sst_config)); ++ ++} ++ ++/** ++ * sst_do_dma - function allocs and initiates the DMA ++ * ++ * @sg_list: Pointer to dma list on which the dma needs to be initiated ++ * ++ * Triggers the DMA ++ */ ++static int sst_do_dma(struct sst_sg_list *sg_list) ++{ ++ int ret_val; ++ ++ /* get a dmac channel */ ++ ret_val = sst_alloc_dma_chan(&sst_drv_ctx->dma); ++ if (ret_val) ++ return ret_val; ++ ++ /* allocate desc for transfer and submit */ ++ ret_val = sst_dma_firmware(&sst_drv_ctx->dma, sg_list); ++ ++ sst_dma_free_resources(&sst_drv_ctx->dma); ++ ++ return ret_val; ++} ++ ++/* ++ * sst_fill_memcpy_list - Fill the memcpy list ++ * ++ * @memcpy_list: List to be filled ++ * @destn: Destination addr to be filled in the list ++ * @src: Source addr to be filled in the list ++ * @size: Size to be filled in the list ++ * ++ * Adds the node to the list after required fields ++ * are populated in the node ++ */ ++ ++static int sst_fill_memcpy_list(struct list_head *memcpy_list, ++ void *destn, const void *src, u32 size, bool is_io) ++{ ++ struct sst_memcpy_list *listnode; ++ ++ listnode = kzalloc(sizeof(*listnode), GFP_KERNEL); ++ if (listnode == NULL) ++ return -ENOMEM; ++ listnode->dstn = destn; ++ listnode->src = src; ++ listnode->size = size; ++ listnode->is_io = is_io; ++ list_add_tail(&listnode->memcpylist, memcpy_list); ++ ++ return 0; ++} ++ ++static int sst_parse_elf_module_memcpy(struct intel_sst_drv *sst, ++ const void *fw, struct sst_info info, Elf32_Phdr *pr, ++ struct list_head *memcpy_list) ++{ ++ void *dstn; ++ unsigned int dstn_phys; ++ int ret_val = 0; ++ int mem_type; ++ ++ ret_val = sst_fill_dstn(sst, info, pr, &dstn, &dstn_phys, &mem_type); ++ if (ret_val) ++ return ret_val; ++ ++ ret_val = sst_fill_memcpy_list(memcpy_list, dstn, ++ (void *)fw + pr->p_offset, pr->p_filesz, mem_type); ++ if (ret_val) ++ return ret_val; ++ ++ return 0; ++} ++ ++static int ++sst_parse_elf_fw_memcpy(struct intel_sst_drv *sst, const void *fw_in_mem, ++ struct list_head *memcpy_list) ++{ ++ int i = 0; ++ ++ Elf32_Ehdr *elf; ++ Elf32_Phdr *pr; ++ struct sst_info info; ++ ++ BUG_ON(!fw_in_mem); ++ ++ elf = (Elf32_Ehdr *)fw_in_mem; ++ pr = (Elf32_Phdr *) (fw_in_mem + elf->e_phoff); ++ pr_debug("%s entry\n", __func__); ++ ++ sst_fill_info(sst, &info); ++ ++ while (i < elf->e_phnum) { ++ if (pr[i].p_type == PT_LOAD) ++ sst_parse_elf_module_memcpy(sst, fw_in_mem, info, ++ &pr[i], memcpy_list); ++ i++; ++ } ++ return 0; ++} ++ ++/** ++ * sst_parse_module_memcpy - Parse audio FW modules and populate the memcpy list ++ * ++ * @module : FW module header ++ * @memcpy_list : Pointer to the list to be populated ++ * Create the memcpy list as the number of block to be copied ++ * returns error or 0 if module sizes are proper ++ */ ++static int sst_parse_module_memcpy(struct fw_module_header *module, ++ struct list_head *memcpy_list) ++{ ++ struct fw_block_info *block; ++ u32 count; ++ int ret_val = 0; ++ void __iomem *ram_iomem; ++ ++ pr_debug("module sign %s size %x blocks %x type %x\n", ++ module->signature, module->mod_size, ++ module->blocks, module->type); ++ pr_debug("module entrypoint 0x%x\n", module->entry_point); ++ ++ block = (void *)module + sizeof(*module); ++ ++ for (count = 0; count < module->blocks; count++) { ++ if (block->size <= 0) { ++ pr_err("block size invalid\n"); ++ return -EINVAL; ++ } ++ switch (block->type) { ++ case SST_IRAM: ++ ram_iomem = sst_drv_ctx->iram; ++ break; ++ case SST_DRAM: ++ ram_iomem = sst_drv_ctx->dram; ++ break; ++ default: ++ pr_err("wrong ram type0x%x in block0x%x\n", ++ block->type, count); ++ return -EINVAL; ++ } ++ ++ ret_val = sst_fill_memcpy_list(memcpy_list, ++ ram_iomem + block->ram_offset, ++ (void *)block + sizeof(*block), block->size, 1); ++ if (ret_val) ++ return ret_val; ++ ++ block = (void *)block + sizeof(*block) + block->size; ++ } ++ return 0; ++} ++ ++/** ++ * sst_parse_fw_memcpy - parse the firmware image & populate the list for memcpy ++ * ++ * @sst_fw_in_mem : pointer to audio fw ++ * @size : size of the firmware ++ * @fw_list : pointer to list_head to be populated ++ * This function parses the FW image and saves the parsed image in the list ++ * for memcpy ++ */ ++static int sst_parse_fw_memcpy(const void *sst_fw_in_mem, unsigned long size, ++ struct list_head *fw_list) ++{ ++ struct fw_module_header *module; ++ u32 count, num_modules; ++ int ret_val; ++ ++ ret_val = sst_validate_fw_image(sst_fw_in_mem, size, ++ &module, &num_modules); ++ if (ret_val) ++ return ret_val; ++ ++ for (count = 0; count < num_modules; count++) { ++ /* module */ ++ ret_val = sst_parse_module_memcpy(module, fw_list); ++ if (ret_val) ++ return ret_val; ++ module = (void *)module + sizeof(*module) + module->mod_size ; ++ } ++ ++ return 0; ++} ++ ++/** ++ * sst_do_memcpy - function initiates the memcpy ++ * ++ * @memcpy_list: Pter to memcpy list on which the memcpy needs to be initiated ++ * ++ * Triggers the memcpy ++ */ ++static void sst_do_memcpy(struct list_head *memcpy_list) ++{ ++ struct sst_memcpy_list *listnode; ++ ++ list_for_each_entry(listnode, memcpy_list, memcpylist) { ++ if (listnode->is_io == true) ++ MEMCPY_TOIO((void __iomem *)listnode->dstn, listnode->src, ++ listnode->size); ++ else ++ memcpy(listnode->dstn, listnode->src, listnode->size); ++ } ++} ++ ++static void sst_memcpy_free_lib_resources(void) ++{ ++ struct sst_memcpy_list *listnode, *tmplistnode; ++ ++ pr_debug("entry:%s\n", __func__); ++ ++ /*Free the list*/ ++ if (!list_empty(&sst_drv_ctx->libmemcpy_list)) { ++ list_for_each_entry_safe(listnode, tmplistnode, ++ &sst_drv_ctx->libmemcpy_list, memcpylist) { ++ list_del(&listnode->memcpylist); ++ kfree(listnode); ++ } ++ } ++} ++ ++void sst_memcpy_free_resources(void) ++{ ++ struct sst_memcpy_list *listnode, *tmplistnode; ++ ++ pr_debug("entry:%s\n", __func__); ++ ++ /*Free the list*/ ++ if (!list_empty(&sst_drv_ctx->memcpy_list)) { ++ list_for_each_entry_safe(listnode, tmplistnode, ++ &sst_drv_ctx->memcpy_list, memcpylist) { ++ list_del(&listnode->memcpylist); ++ kfree(listnode); ++ } ++ } ++ sst_memcpy_free_lib_resources(); ++} ++ ++void sst_firmware_load_cb(const struct firmware *fw, void *context) ++{ ++ struct intel_sst_drv *ctx = context; ++ int ret = 0; ++ ++ pr_debug("In %s\n", __func__); ++ ++ if (fw == NULL) { ++ pr_err("request fw failed\n"); ++ goto out; ++ } ++ ++ if (sst_drv_ctx->sst_state != SST_UN_INIT || ++ ctx->fw_in_mem != NULL) ++ goto exit; ++ ++ pr_debug("Request Fw completed\n"); ++ trace_sst_fw_download("End of FW request", ctx->sst_state); ++ ++ if (ctx->info.use_elf == true) ++ ret = sst_validate_elf(fw, false); ++ ++ if (ret != 0) { ++ pr_err("FW image invalid...\n"); ++ goto out; ++ } ++ ++ ctx->fw_in_mem = kzalloc(fw->size, GFP_KERNEL); ++ if (!ctx->fw_in_mem) { ++ pr_err("%s unable to allocate memory\n", __func__); ++ goto out; ++ } ++ ++ pr_debug("copied fw to %p", ctx->fw_in_mem); ++ pr_debug("phys: %lx", (unsigned long)virt_to_phys(ctx->fw_in_mem)); ++ memcpy(ctx->fw_in_mem, fw->data, fw->size); ++ ++ trace_sst_fw_download("Start FW parsing", ctx->sst_state); ++ if (ctx->use_dma) { ++ if (ctx->info.use_elf == true) ++ ret = sst_parse_elf_fw_dma(ctx, ctx->fw_in_mem, ++ &ctx->fw_sg_list); ++ else ++ ret = sst_parse_fw_dma(ctx->fw_in_mem, fw->size, ++ &ctx->fw_sg_list); ++ } else { ++ if (ctx->info.use_elf == true) ++ ret = sst_parse_elf_fw_memcpy(ctx, ctx->fw_in_mem, ++ &ctx->memcpy_list); ++ else ++ ret = sst_parse_fw_memcpy(ctx->fw_in_mem, fw->size, ++ &ctx->memcpy_list); ++ } ++ trace_sst_fw_download("End FW parsing", ctx->sst_state); ++ if (ret) { ++ kfree(ctx->fw_in_mem); ++ ctx->fw_in_mem = NULL; ++ goto out; ++ } ++ ++ /* If static module download(download at boot time) is supported, ++ * set the flag to indicate lib download is to be done ++ */ ++ if (ctx->pdata->lib_info) ++ if (ctx->pdata->lib_info->mod_ddr_dnld) ++ ctx->lib_dwnld_reqd = true; ++ ++ sst_set_fw_state_locked(sst_drv_ctx, SST_FW_LIB_LOAD); ++ goto exit; ++out: ++ sst_set_fw_state_locked(sst_drv_ctx, SST_UN_INIT); ++exit: ++ if (fw != NULL) ++ release_firmware(fw); ++} ++ ++/* ++ * sst_request_fw - requests audio fw from kernel and saves a copy ++ * ++ * This function requests the SST FW from the kernel, parses it and ++ * saves a copy in the driver context ++ */ ++static int sst_request_fw(struct intel_sst_drv *sst) ++{ ++ int retval = 0; ++ char name[20]; ++ const struct firmware *fw; ++ ++ snprintf(name, sizeof(name), "%s%04x%s", "fw_sst_", ++ sst->pci_id, ".bin"); ++ pr_debug("Requesting FW %s now...\n", name); ++ ++ retval = request_firmware(&fw, name, sst->dev); ++ if (fw == NULL) { ++ pr_err("fw is returning as null\n"); ++ return -EINVAL; ++ } ++ if (retval) { ++ pr_err("request fw failed %d\n", retval); ++ return retval; ++ } ++ trace_sst_fw_download("End of FW request", sst->sst_state); ++ if (sst->info.use_elf == true) ++ retval = sst_validate_elf(fw, false); ++ if (retval != 0) { ++ pr_err("FW image invalid...\n"); ++ goto end_release; ++ } ++ sst->fw_in_mem = kzalloc(fw->size, GFP_KERNEL); ++ if (!sst->fw_in_mem) { ++ pr_err("%s unable to allocate memory\n", __func__); ++ retval = -ENOMEM; ++ goto end_release; ++ } ++ pr_debug("copied fw to %p", sst->fw_in_mem); ++ pr_debug("phys: %lx", (unsigned long)virt_to_phys(sst->fw_in_mem)); ++ memcpy(sst->fw_in_mem, fw->data, fw->size); ++ trace_sst_fw_download("Start FW parsing", sst->sst_state); ++ if (sst->use_dma) { ++ if (sst->info.use_elf == true) ++ retval = sst_parse_elf_fw_dma(sst, sst->fw_in_mem, ++ &sst->fw_sg_list); ++ else ++ retval = sst_parse_fw_dma(sst->fw_in_mem, fw->size, ++ &sst->fw_sg_list); ++ } else { ++ if (sst->info.use_elf == true) ++ retval = sst_parse_elf_fw_memcpy(sst, sst->fw_in_mem, ++ &sst->memcpy_list); ++ else ++ retval = sst_parse_fw_memcpy(sst->fw_in_mem, fw->size, ++ &sst->memcpy_list); ++ } ++ trace_sst_fw_download("End FW parsing", sst->sst_state); ++ if (retval) { ++ kfree(sst->fw_in_mem); ++ sst->fw_in_mem = NULL; ++ } ++ ++ /* If static module download(download at boot time) is supported, ++ * set the flag to indicate lib download is to be done ++ */ ++ if (sst->pdata->lib_info) ++ if (sst->pdata->lib_info->mod_ddr_dnld) ++ sst->lib_dwnld_reqd = true; ++end_release: ++ release_firmware(fw); ++ return retval; ++} ++ ++static inline void print_lib_info(struct snd_sst_lib_download_info *resp) ++{ ++ pr_debug("codec Type %d Ver %d Built %s: %s\n", ++ resp->dload_lib.lib_info.lib_type, ++ resp->dload_lib.lib_info.lib_version, ++ resp->dload_lib.lib_info.b_date, ++ resp->dload_lib.lib_info.b_time); ++} ++ ++/* sst_download_library - This function is called when any ++ codec/post processing library needs to be downloaded */ ++static int sst_download_library(const struct firmware *fw_lib, ++ struct snd_sst_lib_download_info *lib) ++{ ++ int ret_val = 0; ++ ++ /* send IPC message and wait */ ++ u8 pvt_id; ++ struct ipc_post *msg = NULL; ++ union config_status_reg csr; ++ struct snd_sst_str_type str_type = {0}; ++ int retval = 0; ++ void *codec_fw; ++ struct sst_block *block; ++ ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ ret_val = sst_create_block_and_ipc_msg(&msg, true, sst_drv_ctx, &block, ++ IPC_IA_PREP_LIB_DNLD, pvt_id); ++ if (ret_val) { ++ pr_err("library download failed\n"); ++ return ret_val; ++ } ++ ++ sst_fill_header(&msg->header, IPC_IA_PREP_LIB_DNLD, 1, pvt_id); ++ msg->header.part.data = sizeof(u32) + sizeof(str_type); ++ str_type.codec_type = lib->dload_lib.lib_info.lib_type; ++ /*str_type.pvt_id = pvt_id;*/ ++ memcpy(msg->mailbox_data, &msg->header, sizeof(u32)); ++ memcpy(msg->mailbox_data + sizeof(u32), &str_type, sizeof(str_type)); ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ retval = sst_wait_timeout(sst_drv_ctx, block); ++ if (block->data) { ++ struct snd_sst_str_type *str_type = ++ (struct snd_sst_str_type *)block->data; ++ if (str_type->result) { ++ /* error */ ++ pr_err("Prep codec downloaded failed %d\n", ++ str_type->result); ++ retval = -EIO; ++ goto free_block; ++ } ++ kfree(block->data); ++ } else if (retval != 0) { ++ retval = -EIO; ++ goto free_block; ++ } ++ pr_debug("FW responded, ready for download now...\n"); ++ codec_fw = kzalloc(fw_lib->size, GFP_KERNEL); ++ if (!codec_fw) { ++ memset(lib, 0, sizeof(*lib)); ++ retval = -ENOMEM; ++ goto send_ipc; ++ } ++ memcpy(codec_fw, fw_lib->data, fw_lib->size); ++ ++ if (sst_drv_ctx->use_dma) ++ retval = sst_parse_fw_dma(codec_fw, fw_lib->size, ++ &sst_drv_ctx->library_list); ++ else ++ retval = sst_parse_fw_memcpy(codec_fw, fw_lib->size, ++ &sst_drv_ctx->libmemcpy_list); ++ ++ if (retval) { ++ memset(lib, 0, sizeof(*lib)); ++ goto send_ipc; ++ } ++ ++ /* downloading on success */ ++ mutex_lock(&sst_drv_ctx->sst_lock); ++ sst_drv_ctx->sst_state = SST_FW_LOADED; ++ mutex_lock(&sst_drv_ctx->csr_lock); ++ csr.full = readl(sst_drv_ctx->shim + SST_CSR); ++ csr.part.run_stall = 1; ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); ++ ++ csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR); ++ csr.part.bypass = 0x7; ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); ++ mutex_unlock(&sst_drv_ctx->csr_lock); ++ ++ if (sst_drv_ctx->use_dma) { ++ ret_val = sst_do_dma(&sst_drv_ctx->library_list); ++ if (ret_val) { ++ pr_err("sst_do_dma failed, abort\n"); ++ memset(lib, 0, sizeof(*lib)); ++ } ++ } else ++ sst_do_memcpy(&sst_drv_ctx->libmemcpy_list); ++ /* set the FW to running again */ ++ mutex_lock(&sst_drv_ctx->csr_lock); ++ csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR); ++ csr.part.bypass = 0x0; ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); ++ ++ csr.full = sst_shim_read(sst_drv_ctx->shim, SST_CSR); ++ csr.part.run_stall = 0; ++ sst_shim_write(sst_drv_ctx->shim, SST_CSR, csr.full); ++ mutex_unlock(&sst_drv_ctx->csr_lock); ++send_ipc: ++ /* send download complete and wait */ ++ if (sst_create_ipc_msg(&msg, true)) { ++ retval = -ENOMEM; ++ goto free_resources; ++ } ++ ++ block->condition = false; ++ block->msg_id = IPC_IA_LIB_DNLD_CMPLT; ++ sst_fill_header(&msg->header, IPC_IA_LIB_DNLD_CMPLT, 1, pvt_id); ++ msg->header.part.data = sizeof(u32) + sizeof(*lib); ++ lib->pvt_id = pvt_id; ++ memcpy(msg->mailbox_data, &msg->header, sizeof(u32)); ++ memcpy(msg->mailbox_data + sizeof(u32), lib, sizeof(*lib)); ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ pr_debug("Waiting for FW response Download complete\n"); ++ retval = sst_wait_timeout(sst_drv_ctx, block); ++ sst_drv_ctx->sst_state = SST_FW_RUNNING; ++ if (block->data) { ++ struct snd_sst_lib_download_info *resp = block->data; ++ retval = resp->result; ++ if (retval) { ++ pr_err("err in lib dload %x\n", resp->result); ++ goto free_resources; ++ } else { ++ pr_debug("Codec download complete...\n"); ++ print_lib_info(resp); ++ } ++ } else if (retval) { ++ /* error */ ++ retval = -EIO; ++ goto free_resources; ++ } ++ ++ pr_debug("FW success on Download complete\n"); ++ ++free_resources: ++ if (sst_drv_ctx->use_dma) { ++ kfree(sst_drv_ctx->library_list.src); ++ kfree(sst_drv_ctx->library_list.dst); ++ sst_drv_ctx->library_list.list_len = 0; ++ } ++ ++ kfree(codec_fw); ++ mutex_unlock(&sst_drv_ctx->sst_lock); ++free_block: ++ sst_free_block(sst_drv_ctx, block); ++ return retval; ++} ++ ++/* ++ * Writing the DDR physical base to DCCM offset ++ * so that FW can use it to setup TLB ++ */ ++static void sst_dccm_config_write(void __iomem *dram_base, unsigned int ddr_base) ++{ ++ void __iomem *addr; ++ u32 bss_reset = 0; ++ ++ addr = (void __iomem *)(dram_base + MRFLD_FW_DDR_BASE_OFFSET); ++ MEMCPY_TOIO(addr, (void *)&ddr_base, sizeof(u32)); ++ bss_reset |= (1 << MRFLD_FW_BSS_RESET_BIT); ++ addr = (void __iomem *)(dram_base + MRFLD_FW_FEATURE_BASE_OFFSET); ++ MEMCPY_TOIO(addr, &bss_reset, sizeof(u32)); ++ pr_debug("%s: config written to DCCM\n", __func__); ++} ++ ++void sst_post_download_mrfld(struct intel_sst_drv *ctx) ++{ ++ sst_dccm_config_write(ctx->dram, ctx->ddr_base); ++ /* For mrfld, download all libraries the first time fw is ++ * downloaded */ ++ pr_debug("%s: lib_dwnld = %u\n", __func__, ctx->lib_dwnld_reqd); ++ if (ctx->lib_dwnld_reqd) { ++ sst_load_all_modules_elf(ctx, sst_modules_mrfld, ARRAY_SIZE(sst_modules_mrfld)); ++ ctx->lib_dwnld_reqd = false; ++ } ++} ++ ++void sst_post_download_ctp(struct intel_sst_drv *ctx) ++{ ++ sst_fill_config(ctx, 0); ++} ++ ++void sst_post_download_byt(struct intel_sst_drv *ctx) ++{ ++ sst_dccm_config_write(ctx->dram, ctx->ddr_base); ++ sst_fill_config(ctx, 2 * sizeof(u32)); ++ ++ pr_debug("%s: lib_dwnld = %u\n", __func__, ctx->lib_dwnld_reqd); ++ if (ctx->lib_dwnld_reqd) { ++ sst_load_all_modules_elf(ctx, sst_modules_byt, ++ ARRAY_SIZE(sst_modules_byt)); ++ ctx->lib_dwnld_reqd = false; ++ } ++} ++ ++static void sst_init_lib_mem_mgr(struct intel_sst_drv *ctx) ++{ ++ struct sst_mem_mgr *mgr = &ctx->lib_mem_mgr; ++ const struct sst_lib_dnld_info *lib_info = ctx->pdata->lib_info; ++ ++ memset(mgr, 0, sizeof(*mgr)); ++ mgr->current_base = lib_info->mod_base + lib_info->mod_table_offset ++ + lib_info->mod_table_size; ++ mgr->avail = lib_info->mod_end - mgr->current_base + 1; ++ ++ pr_debug("current base = 0x%lx , avail = 0x%x\n", ++ (unsigned long)mgr->current_base, mgr->avail); ++} ++ ++/** ++ * sst_load_fw - function to load FW into DSP ++ * ++ * ++ * Transfers the FW to DSP using dma/memcpy ++ */ ++int sst_load_fw(void) ++{ ++ int ret_val = 0; ++ struct sst_block *block; ++ ++ pr_debug("sst_load_fw\n"); ++ ++ if ((sst_drv_ctx->sst_state != SST_START_INIT && ++ sst_drv_ctx->sst_state != SST_FW_LIB_LOAD) || ++ sst_drv_ctx->sst_state == SST_SHUTDOWN) ++ return -EAGAIN; ++ ++ if (!sst_drv_ctx->fw_in_mem) { ++ if (sst_drv_ctx->sst_state != SST_START_INIT) { ++ /* even wake*/ ++ pr_err("sst : wait for FW to be downloaded\n"); ++ return -EBUSY; ++ } else { ++ trace_sst_fw_download("Req FW sent in check device", ++ sst_drv_ctx->sst_state); ++ pr_debug("sst: FW not in memory retry to download\n"); ++ ret_val = sst_request_fw(sst_drv_ctx); ++ if (ret_val) ++ return ret_val; ++ } ++ } ++ ++ BUG_ON(!sst_drv_ctx->fw_in_mem); ++ block = sst_create_block(sst_drv_ctx, 0, FW_DWNL_ID); ++ if (block == NULL) ++ return -ENOMEM; ++ ++ /* Prevent C-states beyond C6 */ ++ pm_qos_update_request(sst_drv_ctx->qos, CSTATE_EXIT_LATENCY_S0i1 - 1); ++ ++ ret_val = sst_drv_ctx->ops->reset(); ++ if (ret_val) ++ goto restore; ++ ++ trace_sst_fw_download("Start FW copy", sst_drv_ctx->sst_state); ++ if (sst_drv_ctx->use_dma) { ++ ret_val = sst_do_dma(&sst_drv_ctx->fw_sg_list); ++ if (ret_val) { ++ pr_err("sst_do_dma failed, abort\n"); ++ goto restore; ++ } ++ } else { ++ sst_do_memcpy(&sst_drv_ctx->memcpy_list); ++ } ++ ++ trace_sst_fw_download("Post download for Lib start", ++ sst_drv_ctx->sst_state); ++ /* Write the DRAM/DCCM config before enabling FW */ ++ if (sst_drv_ctx->ops->post_download) ++ sst_drv_ctx->ops->post_download(sst_drv_ctx); ++ trace_sst_fw_download("Post download for Lib end", ++ sst_drv_ctx->sst_state); ++ sst_drv_ctx->sst_state = SST_FW_LOADED; ++ ++ /* bring sst out of reset */ ++ ret_val = sst_drv_ctx->ops->start(); ++ if (ret_val) ++ goto restore; ++ trace_sst_fw_download("DSP reset done", ++ sst_drv_ctx->sst_state); ++ ++ ret_val = sst_wait_timeout(sst_drv_ctx, block); ++ if (ret_val) { ++ pr_err("fw download failed %d\n" , ret_val); ++ /* assume FW d/l failed due to timeout*/ ++ ret_val = -EBUSY; ++ ++ } ++ ++restore: ++ /* Re-enable Deeper C-states beyond C6 */ ++ pm_qos_update_request(sst_drv_ctx->qos, PM_QOS_DEFAULT_VALUE); ++ sst_free_block(sst_drv_ctx, block); ++ ++ return ret_val; ++} ++ ++/** ++ * sst_load_library - function to load FW into DSP ++ * ++ * @lib: Pointer to the lib download structure ++ * @ops: Contains the stream ops ++ * This function is called when FW requests for a particular library download ++ * This function prepares & downloads the library ++ */ ++int sst_load_library(struct snd_sst_lib_download *lib, u8 ops) ++{ ++ char buf[20]; ++ const char *type, *dir; ++ int len = 0, error = 0; ++ u32 entry_point; ++ const struct firmware *fw_lib; ++ struct snd_sst_lib_download_info dload_info = {{{0},},}; ++ ++ memset(buf, 0, sizeof(buf)); ++ ++ pr_debug("Lib Type 0x%x, Slot 0x%x, ops 0x%x\n", ++ lib->lib_info.lib_type, lib->slot_info.slot_num, ops); ++ pr_debug("Version 0x%x, name %s, caps 0x%x media type 0x%x\n", ++ lib->lib_info.lib_version, lib->lib_info.lib_name, ++ lib->lib_info.lib_caps, lib->lib_info.media_type); ++ ++ pr_debug("IRAM Size 0x%x, offset 0x%x\n", ++ lib->slot_info.iram_size, lib->slot_info.iram_offset); ++ pr_debug("DRAM Size 0x%x, offset 0x%x\n", ++ lib->slot_info.dram_size, lib->slot_info.dram_offset); ++ ++ switch (lib->lib_info.lib_type) { ++ case SST_CODEC_TYPE_MP3: ++ type = "mp3_"; ++ break; ++ case SST_CODEC_TYPE_AAC: ++ type = "aac_"; ++ break; ++ case SST_CODEC_TYPE_AACP: ++ type = "aac_v1_"; ++ break; ++ case SST_CODEC_TYPE_eAACP: ++ type = "aac_v2_"; ++ break; ++ case SST_CODEC_TYPE_WMA9: ++ type = "wma9_"; ++ break; ++ default: ++ pr_err("Invalid codec type\n"); ++ error = -EINVAL; ++ goto wake; ++ } ++ ++ if (ops == STREAM_OPS_CAPTURE) ++ dir = "enc_"; ++ else ++ dir = "dec_"; ++ len = strlen(type) + strlen(dir); ++ strncpy(buf, type, sizeof(buf)-1); ++ strncpy(buf + strlen(type), dir, sizeof(buf)-strlen(type)-1); ++ len += snprintf(buf + len, sizeof(buf) - len, "%d", ++ lib->slot_info.slot_num); ++ len += snprintf(buf + len, sizeof(buf) - len, ".bin"); ++ ++ pr_debug("Requesting %s\n", buf); ++ ++ error = request_firmware(&fw_lib, buf, sst_drv_ctx->dev); ++ if (fw_lib == NULL) { ++ pr_err("fw_lib pointer is returning null\n"); ++ return -EINVAL; ++ } ++ if (error) { ++ pr_err("library load failed %d\n", error); ++ goto wake; ++ } ++ error = sst_validate_library(fw_lib, &lib->slot_info, &entry_point); ++ if (error) ++ goto wake_free; ++ ++ lib->mod_entry_pt = entry_point; ++ memcpy(&dload_info.dload_lib, lib, sizeof(*lib)); ++ /* Prevent C-states beyond C6 */ ++ pm_qos_update_request(sst_drv_ctx->qos, CSTATE_EXIT_LATENCY_S0i1 - 1); ++ error = sst_download_library(fw_lib, &dload_info); ++ /* Re-enable Deeper C-states beyond C6 */ ++ pm_qos_update_request(sst_drv_ctx->qos, PM_QOS_DEFAULT_VALUE); ++ if (error) ++ goto wake_free; ++ ++ /* lib is downloaded and init send alloc again */ ++ pr_debug("Library is downloaded now...\n"); ++wake_free: ++ /* sst_wake_up_alloc_block(sst_drv_ctx, pvt_id, error, NULL); */ ++ release_firmware(fw_lib); ++wake: ++ return error; ++} ++ ++/* In relocatable elf file, there can be relocatable variables and functions. ++ * Variables are kept in Global Address Offset Table (GOT) and functions in ++ * Procedural Linkage Table (PLT). In current codec binaries only relocatable ++ * variables are seen. So we use the GOT table. ++ */ ++static int sst_find_got_table(Elf32_Shdr *shdr, int nsec, char *in_elf, ++ Elf32_Rela **got, unsigned int *cnt) ++{ ++ int i = 0; ++ while (i < nsec) { ++ if (shdr[i].sh_type == SHT_RELA) { ++ *got = (Elf32_Rela *)(in_elf + shdr[i].sh_offset); ++ *cnt = shdr[i].sh_size / sizeof(Elf32_Rela); ++ break; ++ } ++ i++; ++ } ++ if (i == nsec) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++/* For each entry in the GOT table, find the unrelocated offset. Then ++ * add the relocation base to the offset and write back the new address to the ++ * original variable location. ++ */ ++static int sst_relocate_got_entries(Elf32_Rela *table, unsigned int size, ++ char *in_elf, int elf_size, u32 rel_base) ++{ ++ int i; ++ Elf32_Rela *entry; ++ Elf32_Addr *target_addr, unreloc_addr; ++ ++ for (i = 0; i < size; i++) { ++ entry = &table[i]; ++ if (ELF32_R_SYM(entry->r_info) != 0) { ++ return -EINVAL; ++ } else { ++ if (entry->r_offset > elf_size) { ++ pr_err("GOT table target addr out of range\n"); ++ return -EINVAL; ++ } ++ target_addr = (Elf32_Addr *)(in_elf + entry->r_offset); ++ unreloc_addr = *target_addr + entry->r_addend; ++ if (unreloc_addr > elf_size) { ++ pr_err("GOT table entry invalid\n"); ++ continue; ++ } ++ *target_addr = unreloc_addr + rel_base; ++ } ++ } ++ return 0; ++} ++ ++static int sst_relocate_elf(char *in_elf, int elf_size, phys_addr_t rel_base, ++ Elf32_Addr *entry_pt) ++{ ++ int retval = 0; ++ Elf32_Ehdr *ehdr = (Elf32_Ehdr *)in_elf; ++ Elf32_Shdr *shdr = (Elf32_Shdr *) (in_elf + ehdr->e_shoff); ++ Elf32_Phdr *phdr = (Elf32_Phdr *) (in_elf + ehdr->e_phoff); ++ int i, num_sec; ++ Elf32_Rela *rel_table = NULL; ++ unsigned int rela_cnt = 0; ++ u32 rbase; ++ ++ BUG_ON(rel_base > (u32)(-1)); ++ rbase = (u32) (rel_base & (u32)(~0)); ++ ++ /* relocate the entry_pt */ ++ *entry_pt = (Elf32_Addr)(ehdr->e_entry + rbase); ++ num_sec = ehdr->e_shnum; ++ ++ /* Find the relocation(GOT) table through the section header */ ++ retval = sst_find_got_table(shdr, num_sec, in_elf, ++ &rel_table, &rela_cnt); ++ if (retval < 0) ++ return retval; ++ ++ /* Relocate all the entries in the GOT */ ++ retval = sst_relocate_got_entries(rel_table, rela_cnt, in_elf, ++ elf_size, rbase); ++ if (retval < 0) ++ return retval; ++ ++ pr_debug("GOT entries relocated\n"); ++ ++ /* Update the program headers in the ELF */ ++ for (i = 0; i < ehdr->e_phnum; i++) { ++ if (phdr[i].p_type == PT_LOAD) { ++ phdr[i].p_vaddr += rbase; ++ phdr[i].p_paddr += rbase; ++ } ++ } ++ pr_debug("program header entries updated\n"); ++ ++ return retval; ++} ++ ++#define ALIGN_256 0x100 ++ ++int sst_get_next_lib_mem(struct sst_mem_mgr *mgr, int size, ++ unsigned long *lib_base) ++{ ++ int retval = 0; ++ ++ pr_debug("library orig size = 0x%x", size); ++ if (size % ALIGN_256) ++ size += (ALIGN_256 - (size % ALIGN_256)); ++ if (size > mgr->avail) ++ return -ENOMEM; ++ ++ *lib_base = mgr->current_base; ++ mgr->current_base += size; ++ mgr->avail -= size; ++ mgr->count++; ++ pr_debug("library base = 0x%lx", *lib_base); ++ pr_debug("library aligned size = 0x%x", size); ++ pr_debug("lib count = %d\n", mgr->count); ++ return retval; ++ ++} ++ ++static int sst_download_lib_elf(struct intel_sst_drv *sst, const void *lib, ++ int size) ++{ ++ int retval = 0; ++ ++ pr_debug("In %s\n", __func__); ++ ++ if (sst->use_dma) { ++ retval = sst_parse_elf_fw_dma(sst, lib, ++ &sst->library_list); ++ if (retval) ++ goto free_dma_res; ++ retval = sst_do_dma(&sst->library_list); ++ if (retval) ++ pr_err("sst_do_dma failed, abort\n"); ++free_dma_res: ++ kfree(sst->library_list.src); ++ kfree(sst->library_list.dst); ++ sst->library_list.list_len = 0; ++ } else { ++ retval = sst_parse_elf_fw_memcpy(sst, lib, ++ &sst->libmemcpy_list); ++ if (retval) ++ return retval; ++ sst_do_memcpy(&sst->libmemcpy_list); ++ sst_memcpy_free_lib_resources(); ++ } ++ pr_debug("download lib complete"); ++ return retval; ++} ++ ++static void sst_fill_fw_module_table(struct sst_module_info *mod_list, ++ int list_size, unsigned long ddr_base) ++{ ++ int i; ++ u32 *write_ptr = (u32 *)ddr_base; ++ ++ pr_debug("In %s\n", __func__); ++ ++ for (i = 0; i < list_size; i++) { ++ if (mod_list[i].status == SST_LIB_DOWNLOADED) { ++ pr_debug("status dnwld for %d\n", i); ++ pr_debug("module id %d\n", mod_list[i].id); ++ pr_debug("entry pt 0x%x\n", mod_list[i].entry_pt); ++ ++ *write_ptr++ = mod_list[i].id; ++ *write_ptr++ = mod_list[i].entry_pt; ++ } ++ } ++} ++ ++static int sst_request_lib_elf(struct sst_module_info *mod_entry, ++ const struct firmware **fw_lib, int pci_id, struct device *dev) ++{ ++ char name[25]; ++ int retval = 0; ++ ++ snprintf(name, sizeof(name), "%s%s%04x%s", mod_entry->name, ++ "_", pci_id, ".bin"); ++ pr_debug("Requesting %s\n", name); ++ ++ retval = request_firmware(fw_lib, name, dev); ++ if (retval) { ++ pr_err("%s library load failed %d\n", name, retval); ++ return retval; ++ } ++ pr_debug("got lib\n"); ++ mod_entry->status = SST_LIB_FOUND; ++ return 0; ++} ++ ++static int sst_allocate_lib_mem(const struct firmware *lib, int size, ++ struct sst_mem_mgr *mem_mgr, char **out_elf, unsigned long *lib_start) ++{ ++ int retval = 0; ++ ++ *out_elf = kzalloc(size, GFP_KERNEL); ++ if (!*out_elf) { ++ pr_err("cannot alloc mem for elf copy %d\n", retval); ++ goto mem_error; ++ } ++ ++ memcpy(*out_elf, lib->data, size); ++ retval = sst_get_next_lib_mem(mem_mgr, size, lib_start); ++ if (retval < 0) { ++ pr_err("cannot alloc ddr mem for lib: %d\n", retval); ++ kfree(*out_elf); ++ goto mem_error; ++ } ++ return 0; ++ ++mem_error: ++ release_firmware(lib); ++ return -ENOMEM; ++} ++ ++int sst_load_all_modules_elf(struct intel_sst_drv *ctx, struct sst_module_info *mod_table, ++ int num_modules) ++{ ++ int retval = 0; ++ int i; ++ const struct firmware *fw_lib; ++ struct sst_module_info *mod = NULL; ++ char *out_elf; ++ unsigned int lib_size = 0; ++ unsigned int mod_table_offset = ctx->pdata->lib_info->mod_table_offset; ++ unsigned long lib_base; ++ ++ pr_debug("In %s", __func__); ++ ++ sst_init_lib_mem_mgr(ctx); ++ ++ for (i = 0; i < num_modules; i++) { ++ mod = &mod_table[i]; ++ trace_sst_lib_download("Start of Request Lib", mod->name); ++ retval = sst_request_lib_elf(mod, &fw_lib, ++ ctx->pci_id, ctx->dev); ++ if (retval < 0) ++ continue; ++ lib_size = fw_lib->size; ++ ++ trace_sst_lib_download("End of Request Lib", mod->name); ++ retval = sst_validate_elf(fw_lib, true); ++ if (retval < 0) { ++ pr_err("library is not valid elf %d\n", retval); ++ release_firmware(fw_lib); ++ continue; ++ } ++ pr_debug("elf validated\n"); ++ retval = sst_allocate_lib_mem(fw_lib, lib_size, ++ &ctx->lib_mem_mgr, &out_elf, &lib_base); ++ if (retval < 0) { ++ pr_err("lib mem allocation failed: %d\n", retval); ++ continue; ++ } ++ pr_debug("lib space allocated\n"); ++ ++ /* relocate in place */ ++ retval = sst_relocate_elf(out_elf, lib_size, ++ lib_base, &mod->entry_pt); ++ if (retval < 0) { ++ pr_err("lib elf relocation failed: %d\n", retval); ++ release_firmware(fw_lib); ++ kfree(out_elf); ++ continue; ++ } ++ pr_debug("relocation done\n"); ++ release_firmware(fw_lib); ++ trace_sst_lib_download("Start of download Lib", mod->name); ++ /* write to ddr imr region,use memcpy method */ ++ retval = sst_download_lib_elf(ctx, out_elf, lib_size); ++ trace_sst_lib_download("End of download Lib", mod->name); ++ mod->status = SST_LIB_DOWNLOADED; ++ kfree(out_elf); ++ } ++ ++ /* write module table to DDR */ ++ sst_fill_fw_module_table(mod_table, num_modules, ++ (unsigned long)(ctx->ddr + mod_table_offset)); ++ return retval; ++} +diff --git a/sound/soc/intel/sst/sst_ipc.c b/sound/soc/intel/sst/sst_ipc.c +new file mode 100644 +index 0000000..097c715 +--- /dev/null ++++ b/sound/soc/intel/sst/sst_ipc.c +@@ -0,0 +1,768 @@ ++/* ++ * sst_ipc.c - Intel SST Driver for audio engine ++ * ++ * Copyright (C) 2008-10 Intel Corporation ++ * Authors: Vinod Koul ++ * Harsha Priya ++ * Dharageswari R ++ * KP Jeeja ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This file defines all ipc functions ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include "../sst_platform.h" ++#include "../platform_ipc_v2.h" ++#include "sst.h" ++#include "sst_trace.h" ++ ++void sst_dump_to_buffer(const void *from, size_t len, char *buf) ++{ ++ int i, end; ++ const unsigned char *cmd = from; ++ ++ if (len == 0) { ++ buf[0] = '\0'; ++ return; ++ } ++ ++ for (end = len - 1; end >= 0; end--) ++ if (cmd[end]) ++ break; ++ end++; ++ ++ buf += snprintf(buf, 3, "%02x", cmd[0]); ++ for (i = 1; i < len; i++) { ++ buf += snprintf(buf, 4, " %02x", cmd[i]); ++ if (i == end && end != len - 1) { ++ sprintf(buf, "..."); ++ break; ++ } ++ } ++} ++ ++struct sst_block *sst_create_block(struct intel_sst_drv *ctx, ++ u32 msg_id, u32 drv_id) ++{ ++ struct sst_block *msg = NULL; ++ ++ pr_debug("in %s\n", __func__); ++ msg = kzalloc(sizeof(*msg), GFP_KERNEL); ++ if (!msg) { ++ pr_err("kzalloc block failed\n"); ++ return NULL; ++ } ++ msg->condition = false; ++ msg->on = true; ++ msg->msg_id = msg_id; ++ msg->drv_id = drv_id; ++ spin_lock_bh(&ctx->block_lock); ++ list_add_tail(&msg->node, &ctx->block_list); ++ spin_unlock_bh(&ctx->block_lock); ++ ++ return msg; ++} ++ ++int sst_wake_up_block(struct intel_sst_drv *ctx, int result, ++ u32 drv_id, u32 ipc, void *data, u32 size) ++{ ++ struct sst_block *block = NULL; ++ ++ pr_debug("in %s\n", __func__); ++ spin_lock_bh(&ctx->block_lock); ++ list_for_each_entry(block, &ctx->block_list, node) { ++ pr_debug("Block ipc %d, drv_id %d\n", block->msg_id, ++ block->drv_id); ++ if (block->msg_id == ipc && block->drv_id == drv_id) { ++ pr_debug("free up the block\n"); ++ block->ret_code = result; ++ block->data = data; ++ block->size = size; ++ block->condition = true; ++ spin_unlock_bh(&ctx->block_lock); ++ wake_up(&ctx->wait_queue); ++ return 0; ++ } ++ } ++ spin_unlock_bh(&ctx->block_lock); ++ pr_debug("Block not found or a response is received for a short message for ipc %d, drv_id %d\n", ++ ipc, drv_id); ++ return -EINVAL; ++} ++ ++int sst_free_block(struct intel_sst_drv *ctx, struct sst_block *freed) ++{ ++ struct sst_block *block = NULL, *__block; ++ ++ pr_debug("in %s\n", __func__); ++ spin_lock_bh(&ctx->block_lock); ++ list_for_each_entry_safe(block, __block, &ctx->block_list, node) { ++ if (block == freed) { ++ list_del(&freed->node); ++ kfree(freed->data); ++ freed->data = NULL; ++ kfree(freed); ++ spin_unlock_bh(&ctx->block_lock); ++ return 0; ++ } ++ } ++ spin_unlock_bh(&ctx->block_lock); ++ return -EINVAL; ++} ++ ++/* ++ * sst_send_runtime_param - send runtime param to SST ++ * ++ * this function sends the runtime parameter to sst dsp engine ++ */ ++static int sst_send_runtime_param(struct snd_sst_runtime_params *params) ++{ ++ struct ipc_post *msg = NULL; ++ int ret_val; ++ ++ pr_debug("Enter:%s\n", __func__); ++ ret_val = sst_create_ipc_msg(&msg, true); ++ if (ret_val) ++ return ret_val; ++ sst_fill_header(&msg->header, IPC_IA_SET_RUNTIME_PARAMS, 1, ++ params->str_id); ++ msg->header.part.data = sizeof(u32) + sizeof(*params) - sizeof(params->addr) ++ + params->size; ++ memcpy(msg->mailbox_data, &msg->header.full, sizeof(u32)); ++ memcpy(msg->mailbox_data + sizeof(u32), params, sizeof(*params) ++ - sizeof(params->addr)); ++ /* driver doesn't need to send address, so overwrite addr with data */ ++ memcpy(msg->mailbox_data + sizeof(u32) + sizeof(*params) ++ - sizeof(params->addr), ++ params->addr, params->size); ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ return 0; ++} ++ ++void sst_post_message_mrfld(struct work_struct *work) ++{ ++ struct ipc_post *msg; ++ union ipc_header_mrfld header; ++ unsigned long irq_flags; ++ ++ pr_debug("Enter:%s\n", __func__); ++ spin_lock_irqsave(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ /* check list */ ++ if (list_empty(&sst_drv_ctx->ipc_dispatch_list)) { ++ /* queue is empty, nothing to send */ ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ pr_debug("Empty msg queue... NO Action\n"); ++ return; ++ } ++ ++ /* check busy bit */ ++ header.full = sst_shim_read64(sst_drv_ctx->shim, SST_IPCX); ++ if (header.p.header_high.part.busy) { ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ pr_debug("Busy not free... post later\n"); ++ return; ++ } ++ /* copy msg from list */ ++ msg = list_entry(sst_drv_ctx->ipc_dispatch_list.next, ++ struct ipc_post, node); ++ list_del(&msg->node); ++ pr_debug("sst: size: = %x\n", msg->mrfld_header.p.header_low_payload); ++ if (msg->mrfld_header.p.header_high.part.large) ++ memcpy_toio(sst_drv_ctx->mailbox + SST_MAILBOX_SEND, ++ msg->mailbox_data, msg->mrfld_header.p.header_low_payload); ++ ++ trace_sst_ipc("POST ->", msg->mrfld_header.p.header_high.full, ++ msg->mrfld_header.p.header_low_payload, ++ msg->mrfld_header.p.header_high.part.drv_id); ++ trace_sst_ipc_mailbox(msg->mailbox_data, msg->mrfld_header.p.header_low_payload); ++ sst_shim_write64(sst_drv_ctx->shim, SST_IPCX, msg->mrfld_header.full); ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ pr_debug("sst: Post message: header = %x\n", ++ msg->mrfld_header.p.header_high.full); ++ kfree(msg->mailbox_data); ++ kfree(msg); ++ return; ++} ++ ++/** ++* sst_post_message - Posts message to SST ++* ++* @work: Pointer to work structure ++* ++* This function is called by any component in driver which ++* wants to send an IPC message. This will post message only if ++* busy bit is free ++*/ ++void sst_post_message_mfld(struct work_struct *work) ++{ ++ struct ipc_post *msg; ++ union ipc_header header; ++ unsigned long irq_flags; ++ ++ pr_debug("Enter:%s\n", __func__); ++ ++ spin_lock_irqsave(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ /* check list */ ++ if (list_empty(&sst_drv_ctx->ipc_dispatch_list)) { ++ /* queue is empty, nothing to send */ ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ pr_debug("Empty msg queue... NO Action\n"); ++ return; ++ } ++ ++ /* check busy bit */ ++ header.full = sst_shim_read(sst_drv_ctx->shim, sst_drv_ctx->ipc_reg.ipcx); ++ if (header.part.busy) { ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ pr_debug("Busy not free... Post later\n"); ++ return; ++ } ++ /* copy msg from list */ ++ msg = list_entry(sst_drv_ctx->ipc_dispatch_list.next, ++ struct ipc_post, node); ++ list_del(&msg->node); ++ pr_debug("size: = %x\n", msg->header.part.data); ++ if (msg->header.part.large) ++ memcpy_toio(sst_drv_ctx->mailbox + SST_MAILBOX_SEND, ++ msg->mailbox_data, msg->header.part.data); ++ ++ sst_shim_write(sst_drv_ctx->shim, sst_drv_ctx->ipc_reg.ipcx, msg->header.full); ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ pr_debug("Posted message: header = %x\n", msg->header.full); ++ ++ kfree(msg->mailbox_data); ++ kfree(msg); ++ return; ++} ++ ++int sst_sync_post_message_mrfld(struct ipc_post *msg) ++{ ++ union ipc_header_mrfld header; ++ unsigned int loop_count = 0; ++ int retval = 0; ++ unsigned long irq_flags; ++ ++ pr_debug("Enter:%s\n", __func__); ++ spin_lock_irqsave(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ ++ /* check busy bit */ ++ header.full = sst_shim_read64(sst_drv_ctx->shim, SST_IPCX); ++ while (header.p.header_high.part.busy) { ++ if (loop_count > 10) { ++ pr_err("sst: Busy wait failed, cant send this msg\n"); ++ retval = -EBUSY; ++ goto out; ++ } ++ udelay(500); ++ loop_count++; ++ header.full = sst_shim_read64(sst_drv_ctx->shim, SST_IPCX); ++ } ++ pr_debug("sst: Post message: header = %x\n", ++ msg->mrfld_header.p.header_high.full); ++ pr_debug("sst: size = 0x%x\n", msg->mrfld_header.p.header_low_payload); ++ if (msg->mrfld_header.p.header_high.part.large) ++ memcpy_toio(sst_drv_ctx->mailbox + SST_MAILBOX_SEND, ++ msg->mailbox_data, msg->mrfld_header.p.header_low_payload); ++ ++ trace_sst_ipc("POST ->", msg->mrfld_header.p.header_high.full, ++ msg->mrfld_header.p.header_low_payload, ++ msg->mrfld_header.p.header_high.part.drv_id); ++ trace_sst_ipc_mailbox(msg->mailbox_data, msg->mrfld_header.p.header_low_payload); ++ sst_shim_write64(sst_drv_ctx->shim, SST_IPCX, msg->mrfld_header.full); ++ ++out: ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ kfree(msg->mailbox_data); ++ kfree(msg); ++ return retval; ++} ++ ++/* use this for trigger ops to post syncronous msgs ++ */ ++int sst_sync_post_message_mfld(struct ipc_post *msg) ++{ ++ union ipc_header header; ++ unsigned int loop_count = 0; ++ int retval = 0; ++ unsigned long irq_flags; ++ ++ pr_debug("Enter:%s\n", __func__); ++ spin_lock_irqsave(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ ++ /* check busy bit */ ++ header.full = sst_shim_read(sst_drv_ctx->shim, sst_drv_ctx->ipc_reg.ipcx); ++ while (header.part.busy) { ++ if (loop_count > 10) { ++ pr_err("busy wait failed, cant send this msg\n"); ++ retval = -EBUSY; ++ goto out; ++ } ++ udelay(500); ++ loop_count++; ++ header.full = sst_shim_read(sst_drv_ctx->shim, sst_drv_ctx->ipc_reg.ipcx); ++ } ++ pr_debug("sst: Post message: header = %x\n", msg->header.full); ++ if (msg->header.part.large) ++ memcpy_toio(sst_drv_ctx->mailbox + SST_MAILBOX_SEND, ++ msg->mailbox_data, msg->header.part.data); ++ sst_shim_write(sst_drv_ctx->shim, sst_drv_ctx->ipc_reg.ipcx, msg->header.full); ++ ++out: ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ kfree(msg->mailbox_data); ++ kfree(msg); ++ ++ return retval; ++} ++ ++/* ++ * sst_clear_interrupt - clear the SST FW interrupt ++ * ++ * This function clears the interrupt register after the interrupt ++ * bottom half is complete allowing next interrupt to arrive ++ */ ++void intel_sst_clear_intr_mfld(void) ++{ ++ union interrupt_reg isr; ++ union interrupt_reg imr; ++ union ipc_header clear_ipc; ++ unsigned long irq_flags; ++ ++ spin_lock_irqsave(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ imr.full = sst_shim_read(sst_drv_ctx->shim, SST_IMRX); ++ isr.full = sst_shim_read(sst_drv_ctx->shim, SST_ISRX); ++ /* write 1 to clear */; ++ isr.part.busy_interrupt = 1; ++ sst_shim_write(sst_drv_ctx->shim, SST_ISRX, isr.full); ++ /* Set IA done bit */ ++ clear_ipc.full = sst_shim_read(sst_drv_ctx->shim, sst_drv_ctx->ipc_reg.ipcd); ++ clear_ipc.part.busy = 0; ++ clear_ipc.part.done = 1; ++ clear_ipc.part.data = IPC_ACK_SUCCESS; ++ sst_shim_write(sst_drv_ctx->shim, sst_drv_ctx->ipc_reg.ipcd, clear_ipc.full); ++ /* un mask busy interrupt */ ++ imr.part.busy_interrupt = 0; ++ imr.part.done_interrupt = 0; ++ sst_shim_write(sst_drv_ctx->shim, SST_IMRX, imr.full); ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++} ++ ++ ++void intel_sst_clear_intr_mrfld(void) ++{ ++ union interrupt_reg_mrfld isr; ++ union interrupt_reg_mrfld imr; ++ union ipc_header_mrfld clear_ipc; ++ unsigned long irq_flags; ++ ++ spin_lock_irqsave(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ imr.full = sst_shim_read64(sst_drv_ctx->shim, SST_IMRX); ++ isr.full = sst_shim_read64(sst_drv_ctx->shim, SST_ISRX); ++ ++ /* write 1 to clear */ ++ isr.part.busy_interrupt = 1; ++ sst_shim_write64(sst_drv_ctx->shim, SST_ISRX, isr.full); ++ ++ /* Set IA done bit */ ++ clear_ipc.full = sst_shim_read64(sst_drv_ctx->shim, SST_IPCD); ++ ++ clear_ipc.p.header_high.part.busy = 0; ++ clear_ipc.p.header_high.part.done = 1; ++ clear_ipc.p.header_low_payload = IPC_ACK_SUCCESS; ++ sst_shim_write64(sst_drv_ctx->shim, SST_IPCD, clear_ipc.full); ++ /* un mask busy interrupt */ ++ imr.part.busy_interrupt = 0; ++ sst_shim_write64(sst_drv_ctx->shim, SST_IMRX, imr.full); ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++} ++ ++ ++/* ++ * process_fw_init - process the FW init msg ++ * ++ * @msg: IPC message mailbox data from FW ++ * ++ * This function processes the FW init msg from FW ++ * marks FW state and prints debug info of loaded FW ++ */ ++static void process_fw_init(void *msg) ++{ ++ struct ipc_header_fw_init *init = ++ (struct ipc_header_fw_init *)msg; ++ int retval = 0; ++ ++ pr_debug("*** FW Init msg came***\n"); ++ if (init->result) { ++ sst_drv_ctx->sst_state = SST_ERROR; ++ pr_debug("FW Init failed, Error %x\n", init->result); ++ pr_err("FW Init failed, Error %x\n", init->result); ++ retval = init->result; ++ goto ret; ++ } ++ pr_info("FW Version %02x.%02x.%02x.%02x\n", ++ init->fw_version.type, init->fw_version.major, ++ init->fw_version.minor, init->fw_version.build); ++ pr_info("Build date %s Time %s\n", ++ init->build_info.date, init->build_info.time); ++ ++ /* If there any runtime parameter to set, send it */ ++ if (sst_drv_ctx->runtime_param.param.addr) ++ sst_send_runtime_param(&(sst_drv_ctx->runtime_param.param)); ++ ++ret: ++ sst_wake_up_block(sst_drv_ctx, retval, FW_DWNL_ID, 0 , NULL, 0); ++} ++/** ++* sst_process_message_mfld - Processes message from SST ++* ++* @work: Pointer to work structure ++* ++* This function is scheduled by ISR ++* It take a msg from process_queue and does action based on msg ++*/ ++void sst_process_message_mfld(struct ipc_post *msg) ++{ ++ int str_id; ++ struct stream_info *stream; ++ ++ str_id = msg->header.part.str_id; ++ pr_debug("IPC process for %x\n", msg->header.full); ++ /* based on msg in list call respective handler */ ++ switch (msg->header.part.msg_id) { ++ case IPC_SST_PERIOD_ELAPSED: ++ if (sst_validate_strid(str_id)) { ++ pr_err("stream id %d invalid\n", str_id); ++ break; ++ } ++ stream = &sst_drv_ctx->streams[str_id]; ++ if (stream->period_elapsed) ++ stream->period_elapsed(stream->pcm_substream); ++ break; ++ case IPC_SST_BUF_UNDER_RUN: ++ case IPC_SST_BUF_OVER_RUN: ++ if (sst_validate_strid(str_id)) { ++ pr_err("stream id %d invalid\n", str_id); ++ break; ++ } ++ pr_err("Buffer under/overrun for %d\n", ++ msg->header.part.str_id); ++ pr_err("Got Underrun & not to send data...ignore\n"); ++ break; ++ ++ case IPC_SST_FRAGMENT_ELPASED: { ++ pr_debug("IPC_SST_FRAGMENT_ELPASED for %d", str_id); ++ sst_cdev_fragment_elapsed(str_id); ++ break; ++ } ++ ++ case IPC_IA_PRINT_STRING: ++ pr_debug("been asked to print something by fw\n"); ++ /* TBD */ ++ break; ++ ++ case IPC_IA_FW_INIT_CMPLT: { ++ /* send next data to FW */ ++ process_fw_init(msg->mailbox_data); ++ break; ++ } ++ ++ case IPC_SST_STREAM_PROCESS_FATAL_ERR: ++ if (sst_validate_strid(str_id)) { ++ pr_err("stream id %d invalid\n", str_id); ++ break; ++ } ++ pr_err("codec fatal error %x stream %d...\n", ++ msg->header.full, msg->header.part.str_id); ++ pr_err("Dropping the stream\n"); ++ sst_drop_stream(msg->header.part.str_id); ++ break; ++ default: ++ /* Illegal case */ ++ pr_err("Unhandled msg %x header %x\n", ++ msg->header.part.msg_id, msg->header.full); ++ } ++ return; ++} ++ ++/** ++* sst_process_message - Processes message from SST ++* ++* @work: Pointer to work structure ++* ++* This function is scheduled by ISR ++* It take a msg from process_queue and does action based on msg ++*/ ++ ++void sst_process_message_mrfld(struct ipc_post *msg) ++{ ++ int str_id; ++ ++ str_id = msg->mrfld_header.p.header_high.part.drv_id; ++ ++ pr_debug("IPC process message header %x payload %x\n", ++ msg->mrfld_header.p.header_high.full, ++ msg->mrfld_header.p.header_low_payload); ++ ++ return; ++} ++ ++#define VTSV_MAX_NUM_RESULTS 6 ++#define VTSV_SIZE_PER_RESULT 7 /* 7 16 bit words */ ++/* Max 6 results each of size 7 words + 1 num results word */ ++#define VTSV_MAX_TOTAL_RESULT_SIZE \ ++ (VTSV_MAX_NUM_RESULTS*VTSV_SIZE_PER_RESULT + 1) ++/* Each data word in the result is sent as a string in the format: ++DATAn=d, where n is the data word index varying from 0 to ++ VTSV_MAX_TOTAL_RESULT_SIZE-1 ++d = string representation of data in decimal format; ++ unsigned 16bit data needs max 5 chars ++So total data string size = 4("DATA")+2("n")+1("=") ++ +5("d")+1(null)+5(reserved) = 18 */ ++#define VTSV_DATA_STRING_SIZE 18 ++ ++static int send_vtsv_result_event(void *data, int size) ++{ ++ char *envp[VTSV_MAX_TOTAL_RESULT_SIZE+3]; ++ char res_size[30]; ++ char ev_type[30]; ++ char result[VTSV_MAX_TOTAL_RESULT_SIZE][VTSV_DATA_STRING_SIZE]; ++ int offset = 0; ++ u16 *tmp; ++ int i; ++ int ret; ++ ++ if (!data) { ++ pr_err("Data pointer Null into %s\n", __func__); ++ return -EINVAL; ++ } ++ size = size / (sizeof(u16)); /* Number of 16 bit data words*/ ++ if (size > VTSV_MAX_TOTAL_RESULT_SIZE) { ++ pr_err("VTSV result size exceeds expected value, no uevent sent\n"); ++ return -EINVAL; ++ } ++ ++ snprintf(ev_type, sizeof(res_size), "EVENT_TYPE=SST_VTSV"); ++ envp[offset++] = ev_type; ++ snprintf(res_size, sizeof(ev_type), "VTSV_RESULT_SIZE=%u", size); ++ envp[offset++] = res_size; ++ tmp = (u16 *)(data); ++ for (i = 0; i < size; i++) { ++ /* Driver assumes all data to be u16; The VTSV service ++ layer will type cast to u16 or s16 as appropriate for ++ a given data word*/ ++ snprintf(result[i], VTSV_DATA_STRING_SIZE, ++ "DATA%u=%u", i, *tmp++); ++ envp[offset++] = result[i]; ++ } ++ envp[offset] = NULL; ++ ret = kobject_uevent_env(&sst_drv_ctx->dev->kobj, KOBJ_CHANGE, envp); ++ if (ret) ++ pr_err("VTSV event send failed: ret = %d\n", ret); ++ return ret; ++} ++ ++static void process_fw_async_msg(struct ipc_post *msg) ++{ ++ u32 msg_id; ++ int str_id; ++ int res_size, ret; ++ u32 data_size, i; ++ void *data_offset; ++ struct stream_info *stream; ++ union ipc_header_high msg_high; ++ u32 msg_low, pipe_id; ++ ++ msg_high = msg->mrfld_header.p.header_high; ++ msg_low = msg->mrfld_header.p.header_low_payload; ++ msg_id = ((struct ipc_dsp_hdr *)msg->mailbox_data)->cmd_id; ++ data_offset = (msg->mailbox_data + sizeof(struct ipc_dsp_hdr)); ++ data_size = msg_low - (sizeof(struct ipc_dsp_hdr)); ++ ++ switch (msg_id) { ++ case IPC_SST_PERIOD_ELAPSED_MRFLD: ++ pipe_id = ((struct ipc_dsp_hdr *)msg->mailbox_data)->pipe_id; ++ str_id = get_stream_id_mrfld(pipe_id); ++ if (str_id > 0) { ++ pr_debug("Period elapsed rcvd for pipe id 0x%x\n", pipe_id); ++ stream = &sst_drv_ctx->streams[str_id]; ++ if (stream->period_elapsed) ++ stream->period_elapsed(stream->pcm_substream); ++ if (stream->compr_cb) ++ stream->compr_cb(stream->compr_cb_param); ++ } ++ break; ++ ++ case IPC_IA_DRAIN_STREAM_MRFLD: ++ pipe_id = ((struct ipc_dsp_hdr *)msg->mailbox_data)->pipe_id; ++ str_id = get_stream_id_mrfld(pipe_id); ++ if (str_id > 0) { ++ stream = &sst_drv_ctx->streams[str_id]; ++ if (stream->drain_notify) ++ stream->drain_notify(stream->drain_cb_param); ++ } ++ break; ++ ++ case IPC_IA_FW_ASYNC_ERR_MRFLD: ++ pr_err("FW sent async error msg:\n"); ++ for (i = 0; i < (data_size/4); i++) ++ pr_err("0x%x\n", (*((unsigned int *)data_offset + i))); ++ break; ++ ++ case IPC_IA_VTSV_DETECTED: ++ res_size = data_size; ++ ret = send_vtsv_result_event(data_offset, res_size); ++ if (ret) ++ pr_err("VTSV uevent send failed: %d\n", ret); ++ else ++ pr_debug("VTSV uevent sent\n"); ++ break; ++ ++ case IPC_IA_FW_INIT_CMPLT_MRFLD: ++ process_fw_init(data_offset); ++ break; ++ ++ case IPC_IA_BUF_UNDER_RUN_MRFLD: ++ pipe_id = ((struct ipc_dsp_hdr *)msg->mailbox_data)->pipe_id; ++ str_id = get_stream_id_mrfld(pipe_id); ++ if (str_id > 0) ++ pr_err("Buffer under-run for pipe:%#x str_id:%d\n", ++ pipe_id, str_id); ++ break; ++ ++ default: ++ pr_err("Unrecognized async msg from FW msg_id %#x\n", msg_id); ++ } ++} ++ ++void sst_process_reply_mrfld(struct ipc_post *msg) ++{ ++ unsigned int drv_id; ++ void *data; ++ union ipc_header_high msg_high; ++ u32 msg_low; ++ ++ msg_high = msg->mrfld_header.p.header_high; ++ msg_low = msg->mrfld_header.p.header_low_payload; ++ ++ pr_debug("IPC process message header %x payload %x\n", ++ msg->mrfld_header.p.header_high.full, ++ msg->mrfld_header.p.header_low_payload); ++ ++ drv_id = msg_high.part.drv_id; ++ ++ /* Check for async messages */ ++ if (drv_id == SST_ASYNC_DRV_ID) { ++ /* FW sent async large message */ ++ process_fw_async_msg(msg); ++ goto end; ++ } ++ ++ /* FW sent short error response for an IPC */ ++ if (msg_high.part.result && drv_id && !msg_high.part.large) { ++ /* 32-bit FW error code in msg_low */ ++ pr_err("FW sent error response 0x%x", msg_low); ++ sst_wake_up_block(sst_drv_ctx, msg_high.part.result, ++ msg_high.part.drv_id, ++ msg_high.part.msg_id, NULL, 0); ++ goto end; ++ } ++ ++ /* Process all valid responses */ ++ /* if it is a large message, the payload contains the size to ++ * copy from mailbox */ ++ if (msg_high.part.large) { ++ data = kzalloc(msg_low, GFP_KERNEL); ++ if (!data) ++ goto end; ++ memcpy(data, (void *) msg->mailbox_data, msg_low); ++ if (sst_wake_up_block(sst_drv_ctx, msg_high.part.result, ++ msg_high.part.drv_id, ++ msg_high.part.msg_id, data, msg_low)) ++ kfree(data); ++ } else { ++ sst_wake_up_block(sst_drv_ctx, msg_high.part.result, ++ msg_high.part.drv_id, ++ msg_high.part.msg_id, NULL, 0); ++ } ++ ++end: ++ return; ++} ++ ++/** ++* sst_process_reply - Processes reply message from SST ++* ++* @work: Pointer to work structure ++* ++* This function is scheduled by ISR ++* It take a reply msg from response_queue and ++* does action based on msg ++*/ ++void sst_process_reply_mfld(struct ipc_post *msg) ++{ ++ void *data; ++ int str_id; ++ struct stream_info *stream; ++ ++ ++ str_id = msg->header.part.str_id; ++ ++ pr_debug("sst: IPC process reply for %x\n", msg->header.full); ++ ++ /* handle drain notify first */ ++ if (msg->header.part.msg_id == IPC_IA_DRAIN_STREAM) { ++ pr_debug("drain message notify\n"); ++ if (str_id > 0) { ++ stream = &sst_drv_ctx->streams[str_id]; ++ if (stream->drain_notify) ++ stream->drain_notify(stream->drain_cb_param); ++ } ++ return; ++ } ++ ++ ++ if (!msg->header.part.large) { ++ if (!msg->header.part.data) ++ pr_debug("Success\n"); ++ else ++ pr_err("Error from firmware: %d\n", msg->header.part.data); ++ sst_wake_up_block(sst_drv_ctx, msg->header.part.data, ++ str_id, msg->header.part.msg_id, NULL, 0); ++ } else { ++ pr_debug("Allocating %d\n", msg->header.part.data); ++ data = kzalloc(msg->header.part.data, GFP_KERNEL); ++ if (!data) { ++ pr_err("sst: mem alloc failed\n"); ++ return; ++ } ++ ++ memcpy(data, (void *)msg->mailbox_data, msg->header.part.data); ++ if (sst_wake_up_block(sst_drv_ctx, 0, str_id, ++ msg->header.part.msg_id, data, ++ msg->header.part.data)) ++ kfree(data); ++ } ++ return; ++} +diff --git a/sound/soc/intel/sst/sst_pvt.c b/sound/soc/intel/sst/sst_pvt.c +new file mode 100644 +index 0000000..7638cb8 +--- /dev/null ++++ b/sound/soc/intel/sst/sst_pvt.c +@@ -0,0 +1,577 @@ ++/* ++ * sst_pvt.c - Intel SST Driver for audio engine ++ * ++ * Copyright (C) 2008-10 Intel Corp ++ * Authors: Vinod Koul ++ * Harsha Priya ++ * Dharageswari R ++ * KP Jeeja ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This file contains all private functions ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../sst_platform.h" ++#include "../platform_ipc_v2.h" ++#include "sst.h" ++ ++#define SST_EXCE_DUMP_BASE 0xFFFF2c00 ++#define SST_EXCE_DUMP_WORD 4 ++#define SST_EXCE_DUMP_LEN 32 ++#define SST_EXCE_DUMP_SIZE ((SST_EXCE_DUMP_LEN)*(SST_EXCE_DUMP_WORD)) ++#define SST_EXCE_DUMP_OFFSET 0xA00 ++/* ++ * sst_wait_interruptible - wait on event ++ * ++ * @sst_drv_ctx: Driver context ++ * @block: Driver block to wait on ++ * ++ * This function waits without a timeout (and is interruptable) for a ++ * given block event ++ */ ++int sst_wait_interruptible(struct intel_sst_drv *sst_drv_ctx, ++ struct sst_block *block) ++{ ++ int retval = 0; ++ ++ if (!wait_event_interruptible(sst_drv_ctx->wait_queue, ++ block->condition)) { ++ /* event wake */ ++ if (block->ret_code < 0) { ++ pr_err("stream failed %d\n", block->ret_code); ++ retval = -EBUSY; ++ } else { ++ pr_debug("event up\n"); ++ retval = 0; ++ } ++ } else { ++ pr_err("signal interrupted\n"); ++ retval = -EINTR; ++ } ++ return retval; ++ ++} ++ ++unsigned long long read_shim_data(struct intel_sst_drv *sst, int addr) ++{ ++ unsigned long long val = 0; ++ ++ switch (sst->pci_id) { ++ case SST_CLV_PCI_ID: ++ val = sst_shim_read(sst->shim, addr); ++ break; ++ case SST_MRFLD_PCI_ID: ++ case SST_BYT_PCI_ID: ++ val = sst_shim_read64(sst->shim, addr); ++ break; ++ } ++ return val; ++} ++ ++void write_shim_data(struct intel_sst_drv *sst, int addr, ++ unsigned long long data) ++{ ++ switch (sst->pci_id) { ++ case SST_CLV_PCI_ID: ++ sst_shim_write(sst->shim, addr, (u32) data); ++ break; ++ case SST_MRFLD_PCI_ID: ++ case SST_BYT_PCI_ID: ++ sst_shim_write64(sst->shim, addr, (u64) data); ++ break; ++ } ++} ++ ++ ++void dump_sst_shim(struct intel_sst_drv *sst) ++{ ++ unsigned long irq_flags; ++ ++ spin_lock_irqsave(&sst->ipc_spin_lock, irq_flags); ++ pr_err("audio shim registers:\n" ++ "CSR: %.8llx\n" ++ "PISR: %.8llx\n" ++ "PIMR: %.8llx\n" ++ "ISRX: %.8llx\n" ++ "ISRD: %.8llx\n" ++ "IMRX: %.8llx\n" ++ "IMRD: %.8llx\n" ++ "IPCX: %.8llx\n" ++ "IPCD: %.8llx\n" ++ "ISRSC: %.8llx\n" ++ "ISRLPESC: %.8llx\n" ++ "IMRSC: %.8llx\n" ++ "IMRLPESC: %.8llx\n" ++ "IPCSC: %.8llx\n" ++ "IPCLPESC: %.8llx\n" ++ "CLKCTL: %.8llx\n" ++ "CSR2: %.8llx\n", ++ read_shim_data(sst, SST_CSR), ++ read_shim_data(sst, SST_PISR), ++ read_shim_data(sst, SST_PIMR), ++ read_shim_data(sst, SST_ISRX), ++ read_shim_data(sst, SST_ISRD), ++ read_shim_data(sst, SST_IMRX), ++ read_shim_data(sst, SST_IMRD), ++ read_shim_data(sst, sst->ipc_reg.ipcx), ++ read_shim_data(sst, sst->ipc_reg.ipcd), ++ read_shim_data(sst, SST_ISRSC), ++ read_shim_data(sst, SST_ISRLPESC), ++ read_shim_data(sst, SST_IMRSC), ++ read_shim_data(sst, SST_IMRLPESC), ++ read_shim_data(sst, SST_IPCSC), ++ read_shim_data(sst, SST_IPCLPESC), ++ read_shim_data(sst, SST_CLKCTL), ++ read_shim_data(sst, SST_CSR2)); ++ spin_unlock_irqrestore(&sst->ipc_spin_lock, irq_flags); ++} ++ ++void reset_sst_shim(struct intel_sst_drv *sst) ++{ ++ union config_status_reg_mrfld csr; ++ ++ pr_err("Resetting few Shim registers\n"); ++ write_shim_data(sst, sst->ipc_reg.ipcx, 0x0); ++ write_shim_data(sst, sst->ipc_reg.ipcd, 0x0); ++ write_shim_data(sst, SST_ISRX, 0x0); ++ write_shim_data(sst, SST_ISRD, 0x0); ++ write_shim_data(sst, SST_IPCSC, 0x0); ++ write_shim_data(sst, SST_IPCLPESC, 0x0); ++ write_shim_data(sst, SST_ISRSC, 0x0); ++ write_shim_data(sst, SST_ISRLPESC, 0x0); ++ write_shim_data(sst, SST_PISR, 0x0); ++ ++ /* Reset the CSR value to the default value. i.e 0x1e40001*/ ++ csr.full = sst_shim_read64(sst_drv_ctx->shim, SST_CSR); ++ csr.part.xt_snoop = 0; ++ csr.full &= ~(0xf); ++ csr.full |= 0x01; ++ sst_shim_write64(sst_drv_ctx->shim, SST_CSR, csr.full); ++} ++ ++static void dump_sst_crash_area(void) ++{ ++ void __iomem *fw_dump_area; ++ u32 dump_word; ++ u8 i; ++ ++ /* dump the firmware SRAM where the exception details are stored */ ++ fw_dump_area = ioremap_nocache(SST_EXCE_DUMP_BASE, SST_EXCE_DUMP_SIZE); ++ ++ pr_err("Firmware exception dump begins:\n"); ++ pr_err("Exception start signature:%#x\n", readl(fw_dump_area + SST_EXCE_DUMP_WORD)); ++ pr_err("EXCCAUSE:\t\t\t%#x\n", readl(fw_dump_area + SST_EXCE_DUMP_WORD*2)); ++ pr_err("EXCVADDR:\t\t\t%#x\n", readl(fw_dump_area + (SST_EXCE_DUMP_WORD*3))); ++ pr_err("Firmware additional data:\n"); ++ ++ /* dump remaining FW debug data */ ++ for (i = 1; i < (SST_EXCE_DUMP_LEN-4+1); i++) { ++ dump_word = readl(fw_dump_area + (SST_EXCE_DUMP_WORD*3) ++ + (i*SST_EXCE_DUMP_WORD)); ++ pr_err("Data[%d]=%#x\n", i, dump_word); ++ } ++ iounmap(fw_dump_area); ++ pr_err("Firmware exception dump ends\n"); ++} ++ ++/** ++ * dump_ram_area - dumps the iram/dram into a local buff ++ * ++ * @sst : pointer to driver context ++ * @recovery : pointer to the struct containing buffers ++ * @iram : true if iram dump else false ++ * This function dumps the iram dram data into the respective buffers ++ */ ++static void dump_ram_area(struct intel_sst_drv *sst, ++ struct sst_dump_buf *dump_buf, enum sst_ram_type type) ++{ ++ if (type == SST_IRAM) { ++ pr_err("Iram dumped in buffer\n"); ++ memcpy_fromio(dump_buf->iram_buf.buf, sst->iram, ++ dump_buf->iram_buf.size); ++ } else { ++ pr_err("Dram dumped in buffer\n"); ++ memcpy_fromio(dump_buf->dram_buf.buf, sst->dram, ++ dump_buf->dram_buf.size); ++ } ++} ++ ++/*FIXME Disabling IRAM/DRAM dump for timeout issues */ ++static void sst_stream_recovery(struct intel_sst_drv *sst) ++{ ++ struct stream_info *str_info; ++ u8 i; ++ for (i = 1; i <= sst->info.max_streams; i++) { ++ pr_err("Audio: Stream %d, state %d\n", i, sst->streams[i].status); ++ if (sst->streams[i].status != STREAM_UN_INIT) { ++ str_info = &sst_drv_ctx->streams[i]; ++ if (str_info->pcm_substream) ++ snd_pcm_stop(str_info->pcm_substream, SNDRV_PCM_STATE_SETUP); ++ else if (str_info->compr_cb_param) ++ snd_compr_stop(str_info->compr_cb_param); ++ sst->streams[i].status = STREAM_RESET; ++ } ++ } ++} ++ ++static void sst_dump_ipc_dispatch_lists(struct intel_sst_drv *sst) ++{ ++ struct ipc_post *m, *_m; ++ unsigned long irq_flags; ++ ++ spin_lock_irqsave(&sst->ipc_spin_lock, irq_flags); ++ if (list_empty(&sst->ipc_dispatch_list)) ++ pr_err("ipc dispatch list is Empty\n"); ++ ++ list_for_each_entry_safe(m, _m, &sst->ipc_dispatch_list, node) { ++ pr_err("ipc-dispatch:pending msg header %#x\n", m->header.full); ++ list_del(&m->node); ++ kfree(m->mailbox_data); ++ kfree(m); ++ } ++ spin_unlock_irqrestore(&sst->ipc_spin_lock, irq_flags); ++} ++ ++static void sst_dump_rx_lists(struct intel_sst_drv *sst) ++{ ++ struct ipc_post *m, *_m; ++ unsigned long irq_flags; ++ ++ spin_lock_irqsave(&sst->rx_msg_lock, irq_flags); ++ if (list_empty(&sst->rx_list)) ++ pr_err("rx msg list is empty\n"); ++ ++ list_for_each_entry_safe(m, _m, &sst->rx_list, node) { ++ pr_err("rx: pending msg header %#x\n", m->header.full); ++ list_del(&m->node); ++ kfree(m->mailbox_data); ++ kfree(m); ++ } ++ spin_unlock_irqrestore(&sst->rx_msg_lock, irq_flags); ++} ++ ++/* num_dwords: should be multiple of 4 */ ++static void dump_buffer_fromio(void __iomem *from, ++ unsigned int num_dwords) ++{ ++ int i; ++ u32 val[4]; ++ ++ if (num_dwords % 4) { ++ pr_err("%s: num_dwords %d not multiple of 4\n", ++ __func__, num_dwords); ++ return; ++ } ++ ++ pr_err("****** Start *******\n"); ++ pr_err("Dump %d dwords, from location %p\n", num_dwords, from); ++ ++ for (i = 0; i < num_dwords; ) { ++ val[0] = ioread32(from + (i++ * 4)); ++ val[1] = ioread32(from + (i++ * 4)); ++ val[2] = ioread32(from + (i++ * 4)); ++ val[3] = ioread32(from + (i++ * 4)); ++ pr_err("%.8x %.8x %.8x %.8x\n", val[0], val[1], val[2], val[3]); ++ } ++ pr_err("****** End *********\n\n\n"); ++} ++ ++static void sst_stall_lpe_n_wait(struct intel_sst_drv *sst) ++{ ++ union config_status_reg_mrfld csr; ++ void __iomem *dma_reg0 = sst->debugfs.dma_reg[0]; ++ void __iomem *dma_reg1 = sst->debugfs.dma_reg[1]; ++ int offset = 0x3A0; /* ChEnReg of DMA */ ++ ++ ++ pr_err("Before stall: DMA_0 Ch_EN %#llx DMA_1 Ch_EN %#llx\n", ++ sst_reg_read64(dma_reg0, offset), ++ sst_reg_read64(dma_reg1, offset)); ++ ++ /* Stall LPE */ ++ csr.full = sst_shim_read64(sst->shim, SST_CSR); ++ csr.part.runstall = 1; ++ sst_shim_write64(sst->shim, SST_CSR, csr.full); ++ ++ /* A 5ms delay, before resetting the LPE */ ++ usleep_range(5000, 5100); ++ ++ pr_err("After stall: DMA_0 Ch_EN %#llx DMA_1 Ch_EN %#llx\n", ++ sst_reg_read64(dma_reg0, offset), ++ sst_reg_read64(dma_reg1, offset)); ++} ++ ++#if IS_ENABLED(CONFIG_INTEL_SCU_IPC) ++static void sst_send_scu_reset_ipc(struct intel_sst_drv *sst) ++{ ++ int ret = 0; ++ ++ /* Reset and power gate the LPE */ ++ ret = intel_scu_ipc_simple_command(IPC_SCU_LPE_RESET, 0); ++ if (ret) { ++ pr_err("Power gating LPE failed %d\n", ret); ++ reset_sst_shim(sst); ++ } else { ++ pr_err("LPE reset via SCU is success!!\n"); ++ pr_err("dump after LPE power cycle\n"); ++ dump_sst_shim(sst); ++ ++ /* Mask the DMA & SSP interrupts */ ++ sst_shim_write64(sst->shim, SST_IMRX, 0xFFFF0038); ++ } ++} ++#else ++static void sst_send_scu_reset_ipc(struct intel_sst_drv *sst) ++{ ++ pr_debug("%s: do nothing, just return\n", __func__); ++} ++#endif ++ ++#define SRAM_OFFSET_MRFLD 0xc00 ++#define NUM_DWORDS 256 ++void sst_do_recovery_mrfld(struct intel_sst_drv *sst) ++{ ++ char iram_event[30], dram_event[30], ddr_imr_event[65], event_type[30]; ++ char *envp[5]; ++ int env_offset = 0; ++ ++ /* ++ * setting firmware state as uninit so that the firmware will get ++ * redownloaded on next request.This is because firmare not responding ++ * for 1 sec is equalant to some unrecoverable error of FW. ++ */ ++ pr_err("Audio: Intel SST engine encountered an unrecoverable error\n"); ++ pr_err("Audio: trying to reset the dsp now\n"); ++ ++ mutex_lock(&sst->sst_lock); ++ sst->sst_state = SST_UN_INIT; ++ sst_stream_recovery(sst); ++ mutex_unlock(&sst->sst_lock); ++ ++ dump_stack(); ++ dump_sst_shim(sst); ++ ++ sst_stall_lpe_n_wait(sst); ++ ++ /* dump mailbox and sram */ ++ pr_err("Dumping Mailbox...\n"); ++ dump_buffer_fromio(sst->mailbox, NUM_DWORDS); ++ pr_err("Dumping SRAM...\n"); ++ dump_buffer_fromio(sst->mailbox + SRAM_OFFSET_MRFLD, NUM_DWORDS); ++ ++ if (sst_drv_ctx->ops->set_bypass) { ++ ++ sst_drv_ctx->ops->set_bypass(true); ++ dump_ram_area(sst, &(sst->dump_buf), SST_IRAM); ++ dump_ram_area(sst, &(sst->dump_buf), SST_DRAM); ++ sst_drv_ctx->ops->set_bypass(false); ++ ++ } ++ ++ snprintf(event_type, sizeof(event_type), "EVENT_TYPE=SST_RECOVERY"); ++ envp[env_offset++] = event_type; ++ snprintf(iram_event, sizeof(iram_event), "IRAM_DUMP_SIZE=%d", ++ sst->dump_buf.iram_buf.size); ++ envp[env_offset++] = iram_event; ++ snprintf(dram_event, sizeof(dram_event), "DRAM_DUMP_SIZE=%d", ++ sst->dump_buf.dram_buf.size); ++ envp[env_offset++] = dram_event; ++ ++ if (sst->ddr != NULL) { ++ snprintf(ddr_imr_event, sizeof(ddr_imr_event), ++ "DDR_IMR_DUMP_SIZE=%d DDR_IMR_ADDRESS=%p", (sst->ddr_end - sst->ddr_base), sst->ddr); ++ envp[env_offset++] = ddr_imr_event; ++ } ++ envp[env_offset] = NULL; ++ kobject_uevent_env(&sst->dev->kobj, KOBJ_CHANGE, envp); ++ pr_err("Recovery Uevent Sent!!\n"); ++ ++ /* Send IPC to SCU to power gate and reset the LPE */ ++ sst_send_scu_reset_ipc(sst); ++ ++ pr_err("reset the pvt id from val %d\n", sst_drv_ctx->pvt_id); ++ spin_lock(&sst_drv_ctx->pvt_id_lock); ++ sst_drv_ctx->pvt_id = 0; ++ spin_unlock(&sst_drv_ctx->pvt_id_lock); ++ sst_dump_ipc_dispatch_lists(sst_drv_ctx); ++ sst_dump_rx_lists(sst_drv_ctx); ++ ++ if (sst_drv_ctx->fw_in_mem) { ++ pr_err("Clearing the cached FW copy...\n"); ++ kfree(sst_drv_ctx->fw_in_mem); ++ sst_drv_ctx->fw_in_mem = NULL; ++ } ++} ++ ++void sst_do_recovery(struct intel_sst_drv *sst) ++{ ++ pr_err("Audio: Intel SST engine encountered an unrecoverable error\n"); ++ ++ dump_stack(); ++ dump_sst_shim(sst); ++ ++ if (sst->sst_state == SST_FW_RUNNING && ++ sst_drv_ctx->pci_id == SST_CLV_PCI_ID) ++ dump_sst_crash_area(); ++ ++ sst_dump_ipc_dispatch_lists(sst_drv_ctx); ++ ++} ++ ++/* ++ * sst_wait_timeout - wait on event for timeout ++ * ++ * @sst_drv_ctx: Driver context ++ * @block: Driver block to wait on ++ * ++ * This function waits with a timeout value (and is not interruptible) on a ++ * given block event ++ */ ++int sst_wait_timeout(struct intel_sst_drv *sst_drv_ctx, struct sst_block *block) ++{ ++ int retval = 0; ++ ++ /* NOTE: ++ Observed that FW processes the alloc msg and replies even ++ before the alloc thread has finished execution */ ++ pr_debug("sst: waiting for condition %x ipc %d drv_id %d\n", ++ block->condition, block->msg_id, block->drv_id); ++ if (wait_event_timeout(sst_drv_ctx->wait_queue, ++ block->condition, ++ msecs_to_jiffies(SST_BLOCK_TIMEOUT))) { ++ /* event wake */ ++ pr_debug("sst: Event wake %x\n", block->condition); ++ pr_debug("sst: message ret: %d\n", block->ret_code); ++ retval = -block->ret_code; ++ } else { ++ block->on = false; ++ pr_err("sst: Wait timed-out condition:%#x, msg_id:%#x fw_state %#x\n", ++ block->condition, block->msg_id, sst_drv_ctx->sst_state); ++ ++ if (sst_drv_ctx->sst_state == SST_FW_LOADED || ++ sst_drv_ctx->sst_state == SST_START_INIT) { ++ pr_err("Can't recover as timedout while downloading the FW\n"); ++ pr_err("reseting fw state to unint from %d ...\n", sst_drv_ctx->sst_state); ++ sst_drv_ctx->sst_state = SST_UN_INIT; ++ ++ dump_sst_shim(sst_drv_ctx); ++ ++ /* Reset & Power Off the LPE only for MRFLD */ ++ if (sst_drv_ctx->pci_id == SST_MRFLD_PCI_ID) { ++ sst_stall_lpe_n_wait(sst_drv_ctx); ++ ++ /* Send IPC to SCU to power gate and reset the LPE */ ++ sst_send_scu_reset_ipc(sst_drv_ctx); ++ } ++ ++ } else { ++ if (sst_drv_ctx->ops->do_recovery) ++ sst_drv_ctx->ops->do_recovery(sst_drv_ctx); ++ } ++ ++ retval = -EBUSY; ++ } ++ return retval; ++} ++ ++/* ++ * sst_create_ipc_msg - create a IPC message ++ * ++ * @arg: ipc message ++ * @large: large or short message ++ * ++ * this function allocates structures to send a large or short ++ * message to the firmware ++ */ ++int sst_create_ipc_msg(struct ipc_post **arg, bool large) ++{ ++ struct ipc_post *msg; ++ ++ msg = kzalloc(sizeof(struct ipc_post), GFP_ATOMIC); ++ if (!msg) { ++ pr_err("kzalloc ipc msg failed\n"); ++ return -ENOMEM; ++ } ++ if (large) { ++ msg->mailbox_data = kzalloc(SST_MAILBOX_SIZE, GFP_ATOMIC); ++ if (!msg->mailbox_data) { ++ kfree(msg); ++ pr_err("kzalloc mailbox_data failed"); ++ return -ENOMEM; ++ } ++ } else { ++ msg->mailbox_data = NULL; ++ } ++ msg->is_large = large; ++ *arg = msg; ++ return 0; ++} ++ ++/* ++ * sst_create_block_and_ipc_msg - Creates IPC message and sst block ++ * @arg: passed to sst_create_ipc_message API ++ * @large: large or short message ++ * @sst_drv_ctx: sst driver context ++ * @block: return block allocated ++ * @msg_id: IPC ++ * @drv_id: stream id or private id ++ */ ++int sst_create_block_and_ipc_msg(struct ipc_post **arg, bool large, ++ struct intel_sst_drv *sst_drv_ctx, struct sst_block **block, ++ u32 msg_id, u32 drv_id) ++{ ++ int retval = 0; ++ retval = sst_create_ipc_msg(arg, large); ++ if (retval) ++ return retval; ++ *block = sst_create_block(sst_drv_ctx, msg_id, drv_id); ++ if (*block == NULL) { ++ kfree(*arg); ++ return -ENOMEM; ++ } ++ return retval; ++} ++ ++/* ++ * sst_clean_stream - clean the stream context ++ * ++ * @stream: stream structure ++ * ++ * this function resets the stream contexts ++ * should be called in free ++ */ ++void sst_clean_stream(struct stream_info *stream) ++{ ++ stream->status = STREAM_UN_INIT; ++ stream->prev = STREAM_UN_INIT; ++ mutex_lock(&stream->lock); ++ stream->cumm_bytes = 0; ++ mutex_unlock(&stream->lock); ++} ++ +diff --git a/sound/soc/intel/sst/sst_stream.c b/sound/soc/intel/sst/sst_stream.c +new file mode 100644 +index 0000000..9e71b44 +--- /dev/null ++++ b/sound/soc/intel/sst/sst_stream.c +@@ -0,0 +1,831 @@ ++/* ++ * sst_stream.c - Intel SST Driver for audio engine ++ * ++ * Copyright (C) 2008-10 Intel Corp ++ * Authors: Vinod Koul ++ * Harsha Priya ++ * Dharageswari R ++ * KP Jeeja ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This file contains the stream operations of SST driver ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../sst_platform.h" ++#include "../platform_ipc_v2.h" ++#include "sst.h" ++#include "sst_trace.h" ++ ++/** ++ * sst_alloc_stream - Send msg for a new stream ID ++ * ++ * @params: stream params ++ * @stream_ops: operation of stream PB/capture ++ * @codec: codec for stream ++ * @device: device stream to be allocated for ++ * ++ * This function is called by any function which wants to start ++ * a new stream. This also check if a stream exists which is idle ++ * it initializes idle stream id to this request ++ */ ++int sst_alloc_stream_ctp(char *params, struct sst_block *block) ++{ ++ struct ipc_post *msg = NULL; ++ struct snd_sst_alloc_params alloc_param; ++ unsigned int pcm_slot = 0x03, num_ch; ++ int str_id; ++ struct snd_sst_params *str_params; ++ struct snd_sst_stream_params *sparams; ++ struct snd_sst_alloc_params_ext *aparams; ++ struct stream_info *str_info; ++ unsigned int stream_ops, device; ++ u8 codec; ++ ++ pr_debug("In %s\n", __func__); ++ ++ BUG_ON(!params); ++ str_params = (struct snd_sst_params *)params; ++ stream_ops = str_params->ops; ++ codec = str_params->codec; ++ device = str_params->device_type; ++ sparams = &str_params->sparams; ++ aparams = &str_params->aparams; ++ num_ch = sst_get_num_channel(str_params); ++ ++ pr_debug("period_size = %d\n", aparams->frag_size); ++ pr_debug("ring_buf_addr = 0x%x\n", aparams->ring_buf_info[0].addr); ++ pr_debug("ring_buf_size = %d\n", aparams->ring_buf_info[0].size); ++ pr_debug("In alloc device_type=%d\n", str_params->device_type); ++ pr_debug("In alloc sg_count =%d\n", aparams->sg_count); ++ ++ str_id = str_params->stream_id; ++ if (str_id <= 0) ++ return -EBUSY; ++ ++ /*allocate device type context*/ ++ sst_init_stream(&sst_drv_ctx->streams[str_id], codec, ++ str_id, stream_ops, pcm_slot); ++ /* send msg to FW to allocate a stream */ ++ if (sst_create_ipc_msg(&msg, true)) ++ return -ENOMEM; ++ ++ alloc_param.str_type.codec_type = codec; ++ alloc_param.str_type.str_type = str_params->stream_type; ++ alloc_param.str_type.operation = stream_ops; ++ alloc_param.str_type.protected_str = 0; /* non drm */ ++ alloc_param.str_type.time_slots = pcm_slot; ++ alloc_param.str_type.reserved = 0; ++ alloc_param.str_type.result = 0; ++ memcpy(&alloc_param.stream_params, sparams, ++ sizeof(struct snd_sst_stream_params)); ++ memcpy(&alloc_param.alloc_params, aparams, ++ sizeof(struct snd_sst_alloc_params_ext)); ++ block->drv_id = str_id; ++ block->msg_id = IPC_IA_ALLOC_STREAM; ++ sst_fill_header(&msg->header, IPC_IA_ALLOC_STREAM, 1, str_id); ++ msg->header.part.data = sizeof(alloc_param) + sizeof(u32); ++ memcpy(msg->mailbox_data, &msg->header, sizeof(u32)); ++ memcpy(msg->mailbox_data + sizeof(u32), &alloc_param, ++ sizeof(alloc_param)); ++ str_info = &sst_drv_ctx->streams[str_id]; ++ str_info->num_ch = num_ch; ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ return str_id; ++} ++ ++int sst_alloc_stream_mrfld(char *params, struct sst_block *block) ++{ ++ struct ipc_post *msg = NULL; ++ struct snd_sst_alloc_mrfld alloc_param; ++ struct ipc_dsp_hdr dsp_hdr; ++ struct snd_sst_params *str_params; ++ struct snd_sst_tstamp fw_tstamp; ++ unsigned int str_id, pipe_id, pvt_id, task_id; ++ u32 len = 0; ++ struct stream_info *str_info; ++ int i, num_ch; ++ ++ pr_debug("In %s\n", __func__); ++ BUG_ON(!params); ++ ++ str_params = (struct snd_sst_params *)params; ++ memset(&alloc_param, 0, sizeof(alloc_param)); ++ alloc_param.operation = str_params->ops; ++ alloc_param.codec_type = str_params->codec; ++ alloc_param.sg_count = str_params->aparams.sg_count; ++ alloc_param.ring_buf_info[0].addr = str_params->aparams.ring_buf_info[0].addr; ++ alloc_param.ring_buf_info[0].size = str_params->aparams.ring_buf_info[0].size; ++ alloc_param.frag_size = str_params->aparams.frag_size; ++ ++ memcpy(&alloc_param.codec_params, &str_params->sparams, ++ sizeof(struct snd_sst_stream_params)); ++ ++ /* fill channel map params for multichannel support. ++ * Ideally channel map should be received from upper layers ++ * for multichannel support. ++ * Currently hardcoding as per FW reqm. ++ */ ++ num_ch = sst_get_num_channel(str_params); ++ for (i = 0; i < 8; i++) { ++ if (i < num_ch) ++ alloc_param.codec_params.uc.pcm_params.channel_map[i] = i; ++ else ++ alloc_param.codec_params.uc.pcm_params.channel_map[i] = 0xFF; ++ } ++ ++ str_id = str_params->stream_id; ++ pipe_id = str_params->device_type; ++ task_id = str_params->task; ++ sst_drv_ctx->streams[str_id].pipe_id = pipe_id; ++ sst_drv_ctx->streams[str_id].task_id = task_id; ++ sst_drv_ctx->streams[str_id].num_ch = num_ch; ++ ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ if (sst_drv_ctx->info.lpe_viewpt_rqd) ++ alloc_param.ts = sst_drv_ctx->info.mailbox_start + ++ sst_drv_ctx->tstamp + (str_id * sizeof(fw_tstamp)); ++ else ++ alloc_param.ts = sst_drv_ctx->mailbox_add + ++ sst_drv_ctx->tstamp + (str_id * sizeof(fw_tstamp)); ++ ++ pr_debug("alloc tstamp location = 0x%x\n", alloc_param.ts); ++ pr_debug("assigned pipe id 0x%x to task %d\n", pipe_id, task_id); ++ ++ /*allocate device type context*/ ++ sst_init_stream(&sst_drv_ctx->streams[str_id], alloc_param.codec_type, ++ str_id, alloc_param.operation, 0); ++ /* send msg to FW to allocate a stream */ ++ if (sst_create_ipc_msg(&msg, true)) ++ return -ENOMEM; ++ ++ block->drv_id = pvt_id; ++ block->msg_id = IPC_CMD; ++ ++ sst_fill_header_mrfld(&msg->mrfld_header, IPC_CMD, ++ task_id, 1, pvt_id); ++ pr_debug("header:%x\n", msg->mrfld_header.p.header_high.full); ++ msg->mrfld_header.p.header_high.part.res_rqd = 1; ++ ++ len = msg->mrfld_header.p.header_low_payload = sizeof(alloc_param) + sizeof(dsp_hdr); ++ sst_fill_header_dsp(&dsp_hdr, IPC_IA_ALLOC_STREAM_MRFLD, pipe_id, sizeof(alloc_param)); ++ memcpy(msg->mailbox_data, &dsp_hdr, sizeof(dsp_hdr)); ++ memcpy(msg->mailbox_data + sizeof(dsp_hdr), &alloc_param, ++ sizeof(alloc_param)); ++ trace_sst_stream("ALLOC ->", str_id, pipe_id); ++ str_info = &sst_drv_ctx->streams[str_id]; ++ pr_debug("header:%x\n", msg->mrfld_header.p.header_high.full); ++ pr_debug("response rqd: %x", msg->mrfld_header.p.header_high.part.res_rqd); ++ pr_debug("calling post_message\n"); ++ pr_info("Alloc for str %d pipe %#x\n", str_id, pipe_id); ++ ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ return str_id; ++} ++ ++/** ++* sst_stream_stream - Send msg for a pausing stream ++* @str_id: stream ID ++* ++* This function is called by any function which wants to start ++* a stream. ++*/ ++int sst_start_stream(int str_id) ++{ ++ int retval = 0, pvt_id; ++ u32 len = 0; ++ struct ipc_post *msg = NULL; ++ struct ipc_dsp_hdr dsp_hdr; ++ struct stream_info *str_info; ++ ++ pr_debug("sst_start_stream for %d\n", str_id); ++ str_info = get_stream_info(str_id); ++ if (!str_info) ++ return -EINVAL; ++ if (str_info->status != STREAM_RUNNING) ++ return -EBADRQC; ++ ++ if (sst_create_ipc_msg(&msg, true)) ++ return -ENOMEM; ++ ++ if (!sst_drv_ctx->use_32bit_ops) { ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ pr_debug("pvt_id = %d, pipe id = %d, task = %d\n", ++ pvt_id, str_info->pipe_id, str_info->task_id); ++ sst_fill_header_mrfld(&msg->mrfld_header, IPC_CMD, ++ str_info->task_id, 1, pvt_id); ++ ++ len = sizeof(u16) + sizeof(dsp_hdr); ++ msg->mrfld_header.p.header_low_payload = len; ++ sst_fill_header_dsp(&dsp_hdr, IPC_IA_START_STREAM_MRFLD, ++ str_info->pipe_id, sizeof(u16)); ++ memcpy(msg->mailbox_data, &dsp_hdr, sizeof(dsp_hdr)); ++ memset(msg->mailbox_data + sizeof(dsp_hdr), 0, sizeof(u16)); ++ trace_sst_stream("START ->", str_id, str_info->pipe_id); ++ pr_info("Start for str %d pipe %#x\n", str_id, str_info->pipe_id); ++ ++ } else { ++ pr_debug("fill START_STREAM for CTP\n"); ++ sst_fill_header(&msg->header, IPC_IA_START_STREAM, 1, str_id); ++ msg->header.part.data = sizeof(u32) + sizeof(u32); ++ memcpy(msg->mailbox_data, &msg->header, sizeof(u32)); ++ memset(msg->mailbox_data + sizeof(u32), 0, sizeof(u32)); ++ } ++ sst_drv_ctx->ops->sync_post_message(msg); ++ return retval; ++} ++ ++int sst_send_byte_stream_mrfld(void *sbytes) ++{ ++ struct ipc_post *msg = NULL; ++ struct snd_sst_bytes_v2 *bytes = (struct snd_sst_bytes_v2 *) sbytes; ++ u32 length; ++ int pvt_id, ret = 0; ++ struct sst_block *block = NULL; ++ ++ pr_debug("%s: type:%u ipc_msg:%u block:%u task_id:%u pipe: %#x length:%#x\n", ++ __func__, bytes->type, bytes->ipc_msg, ++ bytes->block, bytes->task_id, ++ bytes->pipe_id, bytes->len); ++ ++ /* need some err check as this is user data, perhpas move this to the ++ * platform driver and pass the struct ++ */ ++ if (sst_create_ipc_msg(&msg, true)) ++ return -ENOMEM; ++ ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ sst_fill_header_mrfld(&msg->mrfld_header, bytes->ipc_msg, bytes->task_id, ++ 1, pvt_id); ++ msg->mrfld_header.p.header_high.part.res_rqd = bytes->block; ++ length = bytes->len; ++ msg->mrfld_header.p.header_low_payload = length; ++ pr_debug("length is %d\n", length); ++ memcpy(msg->mailbox_data, &bytes->bytes, bytes->len); ++ trace_sst_stream("BYTES ->", bytes->type, bytes->pipe_id); ++ if (bytes->block) { ++ block = sst_create_block(sst_drv_ctx, bytes->ipc_msg, pvt_id); ++ if (block == NULL) { ++ kfree(msg); ++ return -ENOMEM; ++ } ++ } ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ pr_debug("msg->mrfld_header.p.header_low_payload:%d", msg->mrfld_header.p.header_low_payload); ++ if (bytes->block) { ++ ret = sst_wait_timeout(sst_drv_ctx, block); ++ if (ret) { ++ pr_err("%s: fw returned err %d\n", __func__, ret); ++ sst_free_block(sst_drv_ctx, block); ++ return ret; ++ } ++ } ++ if (bytes->type == SND_SST_BYTES_GET) { ++ /* copy the reply and send back ++ * we need to update only sz and payload ++ */ ++ if (bytes->block) { ++ unsigned char *r = block->data; ++ pr_debug("read back %d bytes", bytes->len); ++ memcpy(bytes->bytes, r, bytes->len); ++ trace_sst_stream("BYTES <-", bytes->type, bytes->pipe_id); ++ } ++ } ++ if (bytes->block) ++ sst_free_block(sst_drv_ctx, block); ++ return 0; ++} ++ ++int sst_send_probe_bytes(struct intel_sst_drv *sst) ++{ ++ struct ipc_post *msg = NULL; ++ struct sst_block *block; ++ int ret_val = 0; ++ ++ ret_val = sst_create_block_and_ipc_msg(&msg, true, sst, ++ &block, IPC_IA_DBG_SET_PROBE_PARAMS, 0); ++ if (ret_val) { ++ pr_err("Can't allocate block/msg: Probe Byte Stream\n"); ++ return ret_val; ++ } ++ ++ sst_fill_header(&msg->header, IPC_IA_DBG_SET_PROBE_PARAMS, 1, 0); ++ ++ msg->header.part.data = sizeof(u32) + sst->probe_bytes->len; ++ memcpy(msg->mailbox_data, &msg->header.full, sizeof(u32)); ++ memcpy(msg->mailbox_data + sizeof(u32), sst->probe_bytes->bytes, ++ sst->probe_bytes->len); ++ ++ sst_add_to_dispatch_list_and_post(sst, msg); ++ ret_val = sst_wait_timeout(sst, block); ++ sst_free_block(sst, block); ++ if (ret_val) ++ pr_err("set probe stream param..timeout!\n"); ++ return ret_val; ++} ++ ++/* ++ * sst_pause_stream - Send msg for a pausing stream ++ * @str_id: stream ID ++ * ++ * This function is called by any function which wants to pause ++ * an already running stream. ++ */ ++int sst_pause_stream(int str_id) ++{ ++ int retval = 0, pvt_id, len; ++ struct ipc_post *msg = NULL; ++ struct stream_info *str_info; ++ struct intel_sst_ops *ops; ++ struct sst_block *block; ++ struct ipc_dsp_hdr dsp_hdr; ++ ++ pr_debug("SST DBG:sst_pause_stream for %d\n", str_id); ++ str_info = get_stream_info(str_id); ++ if (!str_info) ++ return -EINVAL; ++ ops = sst_drv_ctx->ops; ++ if (str_info->status == STREAM_PAUSED) ++ return 0; ++ if (str_info->status == STREAM_RUNNING || ++ str_info->status == STREAM_INIT) { ++ if (str_info->prev == STREAM_UN_INIT) ++ return -EBADRQC; ++ if (!sst_drv_ctx->use_32bit_ops) { ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ retval = sst_create_block_and_ipc_msg(&msg, true, ++ sst_drv_ctx, &block, IPC_CMD, pvt_id); ++ if (retval) ++ return retval; ++ sst_fill_header_mrfld(&msg->mrfld_header, IPC_CMD, ++ str_info->task_id, 1, pvt_id); ++ msg->mrfld_header.p.header_high.part.res_rqd = 1; ++ len = sizeof(dsp_hdr); ++ msg->mrfld_header.p.header_low_payload = len; ++ sst_fill_header_dsp(&dsp_hdr, IPC_IA_PAUSE_STREAM_MRFLD, ++ str_info->pipe_id, 0); ++ memcpy(msg->mailbox_data, &dsp_hdr, sizeof(dsp_hdr)); ++ trace_sst_stream("PAUSE ->", str_id, str_info->pipe_id); ++ } else { ++ retval = sst_create_block_and_ipc_msg(&msg, false, ++ sst_drv_ctx, &block, ++ IPC_IA_PAUSE_STREAM, str_id); ++ if (retval) ++ return retval; ++ sst_fill_header(&msg->header, IPC_IA_PAUSE_STREAM, ++ 0, str_id); ++ } ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ retval = sst_wait_timeout(sst_drv_ctx, block); ++ sst_free_block(sst_drv_ctx, block); ++ if (retval == 0) { ++ str_info->prev = str_info->status; ++ str_info->status = STREAM_PAUSED; ++ } else if (retval == SST_ERR_INVALID_STREAM_ID) { ++ retval = -EINVAL; ++ mutex_lock(&sst_drv_ctx->stream_lock); ++ sst_clean_stream(str_info); ++ mutex_unlock(&sst_drv_ctx->stream_lock); ++ } ++ } else { ++ retval = -EBADRQC; ++ pr_debug("SST DBG:BADRQC for stream\n "); ++ } ++ ++ return retval; ++} ++ ++/** ++ * sst_resume_stream - Send msg for resuming stream ++ * @str_id: stream ID ++ * ++ * This function is called by any function which wants to resume ++ * an already paused stream. ++ */ ++int sst_resume_stream(int str_id) ++{ ++ int retval = 0; ++ struct ipc_post *msg = NULL; ++ struct stream_info *str_info; ++ struct intel_sst_ops *ops; ++ struct sst_block *block = NULL; ++ int pvt_id, len; ++ struct ipc_dsp_hdr dsp_hdr; ++ ++ pr_debug("SST DBG:sst_resume_stream for %d\n", str_id); ++ str_info = get_stream_info(str_id); ++ if (!str_info) ++ return -EINVAL; ++ ops = sst_drv_ctx->ops; ++ if (str_info->status == STREAM_RUNNING) ++ return 0; ++ if (str_info->status == STREAM_PAUSED) { ++ if (!sst_drv_ctx->use_32bit_ops) { ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ retval = sst_create_block_and_ipc_msg(&msg, true, ++ sst_drv_ctx, &block, IPC_CMD, pvt_id); ++ if (retval) ++ return retval; ++ sst_fill_header_mrfld(&msg->mrfld_header, IPC_CMD, ++ str_info->task_id, 1, pvt_id); ++ msg->mrfld_header.p.header_high.part.res_rqd = 1; ++ len = sizeof(dsp_hdr); ++ msg->mrfld_header.p.header_low_payload = len; ++ sst_fill_header_dsp(&dsp_hdr, ++ IPC_IA_RESUME_STREAM_MRFLD, ++ str_info->pipe_id, 0); ++ memcpy(msg->mailbox_data, &dsp_hdr, sizeof(dsp_hdr)); ++ trace_sst_stream("RESUME->", str_id, str_info->pipe_id); ++ } else { ++ retval = sst_create_block_and_ipc_msg(&msg, false, ++ sst_drv_ctx, &block, ++ IPC_IA_RESUME_STREAM, str_id); ++ if (retval) ++ return retval; ++ sst_fill_header(&msg->header, IPC_IA_RESUME_STREAM, ++ 0, str_id); ++ } ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ retval = sst_wait_timeout(sst_drv_ctx, block); ++ sst_free_block(sst_drv_ctx, block); ++ if (!retval) { ++ if (str_info->prev == STREAM_RUNNING) ++ str_info->status = STREAM_RUNNING; ++ else ++ str_info->status = STREAM_INIT; ++ str_info->prev = STREAM_PAUSED; ++ } else if (retval == -SST_ERR_INVALID_STREAM_ID) { ++ retval = -EINVAL; ++ mutex_lock(&sst_drv_ctx->stream_lock); ++ sst_clean_stream(str_info); ++ mutex_unlock(&sst_drv_ctx->stream_lock); ++ } ++ } else { ++ retval = -EBADRQC; ++ pr_err("SST ERR: BADQRC for stream\n"); ++ } ++ ++ return retval; ++} ++ ++ ++/** ++ * sst_drop_stream - Send msg for stopping stream ++ * @str_id: stream ID ++ * ++ * This function is called by any function which wants to stop ++ * a stream. ++ */ ++int sst_drop_stream(int str_id) ++{ ++ int retval = 0, pvt_id; ++ struct stream_info *str_info; ++ struct ipc_post *msg = NULL; ++ struct ipc_dsp_hdr dsp_hdr; ++ ++ pr_debug("SST DBG:sst_drop_stream for %d\n", str_id); ++ str_info = get_stream_info(str_id); ++ if (!str_info) ++ return -EINVAL; ++ ++ if (str_info->status != STREAM_UN_INIT) { ++ ++ if (sst_drv_ctx->use_32bit_ops == true) { ++ str_info->prev = STREAM_UN_INIT; ++ str_info->status = STREAM_INIT; ++ str_info->cumm_bytes = 0; ++ sst_send_sync_msg(IPC_IA_DROP_STREAM, str_id); ++ } else { ++ if (sst_create_ipc_msg(&msg, true)) ++ return -ENOMEM; ++ str_info->prev = STREAM_UN_INIT; ++ str_info->status = STREAM_INIT; ++ str_info->cumm_bytes = 0; ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ sst_fill_header_mrfld(&msg->mrfld_header, IPC_CMD, ++ str_info->task_id, 1, pvt_id); ++ ++ msg->mrfld_header.p.header_low_payload = sizeof(dsp_hdr); ++ sst_fill_header_dsp(&dsp_hdr, IPC_IA_DROP_STREAM_MRFLD, ++ str_info->pipe_id, 0); ++ memcpy(msg->mailbox_data, &dsp_hdr, sizeof(dsp_hdr)); ++ trace_sst_stream("STOP ->", str_id, str_info->pipe_id); ++ pr_info("Stop for str %d pipe %#x\n", str_id, str_info->pipe_id); ++ ++ sst_drv_ctx->ops->sync_post_message(msg); ++ } ++ } else { ++ retval = -EBADRQC; ++ pr_debug("BADQRC for stream, state %x\n", str_info->status); ++ } ++ return retval; ++} ++ ++/** ++ * sst_next_track: notify next track ++ * @str_id: stream ID ++ * ++ * This function is called by any function which wants to ++ * set next track. Current this is NOP as FW doest care ++ */ ++int sst_next_track(void) ++{ ++ pr_debug("SST DBG: next_track"); ++ return 0; ++} ++ ++/** ++* sst_drain_stream - Send msg for draining stream ++* @str_id: stream ID ++* ++* This function is called by any function which wants to drain ++* a stream. ++*/ ++int sst_drain_stream(int str_id, bool partial_drain) ++{ ++ int retval = 0, pvt_id, len; ++ struct ipc_post *msg = NULL; ++ struct stream_info *str_info; ++ struct intel_sst_ops *ops; ++ struct sst_block *block = NULL; ++ struct ipc_dsp_hdr dsp_hdr; ++ ++ pr_debug("SST DBG:sst_drain_stream for %d\n", str_id); ++ str_info = get_stream_info(str_id); ++ if (!str_info) ++ return -EINVAL; ++ ops = sst_drv_ctx->ops; ++ if (str_info->status != STREAM_RUNNING && ++ str_info->status != STREAM_INIT && ++ str_info->status != STREAM_PAUSED) { ++ pr_err("SST ERR: BADQRC for stream = %d\n", ++ str_info->status); ++ return -EBADRQC; ++ } ++ ++ if (!sst_drv_ctx->use_32bit_ops) { ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ retval = sst_create_block_and_ipc_msg(&msg, true, ++ sst_drv_ctx, &block, IPC_CMD, pvt_id); ++ if (retval) ++ return retval; ++ sst_fill_header_mrfld(&msg->mrfld_header, IPC_CMD, ++ str_info->task_id, 1, pvt_id); ++ pr_debug("header:%x\n", ++ (unsigned int)msg->mrfld_header.p.header_high.full); ++ msg->mrfld_header.p.header_high.part.res_rqd = 1; ++ ++ len = sizeof(u8) + sizeof(dsp_hdr); ++ msg->mrfld_header.p.header_low_payload = len; ++ sst_fill_header_dsp(&dsp_hdr, IPC_IA_DRAIN_STREAM_MRFLD, ++ str_info->pipe_id, sizeof(u8)); ++ memcpy(msg->mailbox_data, &dsp_hdr, sizeof(dsp_hdr)); ++ memcpy(msg->mailbox_data + sizeof(dsp_hdr), ++ &partial_drain, sizeof(u8)); ++ trace_sst_stream("DRAIN ->", str_id, str_info->pipe_id); ++ } else { ++ retval = sst_create_block_and_ipc_msg(&msg, false, ++ sst_drv_ctx, &block, ++ IPC_IA_DRAIN_STREAM, str_id); ++ if (retval) ++ return retval; ++ sst_fill_header(&msg->header, IPC_IA_DRAIN_STREAM, 0, str_id); ++ msg->header.part.data = partial_drain; ++ } ++ sst_add_to_dispatch_list_and_post(sst_drv_ctx, msg); ++ /* with new non blocked drain implementation in core we dont need to ++ * wait for respsonse, and need to only invoke callback for drain ++ * complete ++ */ ++ ++ sst_free_block(sst_drv_ctx, block); ++ return retval; ++} ++ ++/** ++ * sst_free_stream - Frees a stream ++ * @str_id: stream ID ++ * ++ * This function is called by any function which wants to free ++ * a stream. ++ */ ++int sst_free_stream(int str_id) ++{ ++ int retval = 0; ++ unsigned int pvt_id; ++ struct ipc_post *msg = NULL; ++ struct stream_info *str_info; ++ struct intel_sst_ops *ops; ++ unsigned long irq_flags; ++ struct ipc_dsp_hdr dsp_hdr; ++ struct sst_block *block; ++ ++ pr_debug("SST DBG:sst_free_stream for %d\n", str_id); ++ ++ mutex_lock(&sst_drv_ctx->sst_lock); ++ if (sst_drv_ctx->sst_state == SST_UN_INIT) { ++ mutex_unlock(&sst_drv_ctx->sst_lock); ++ return -ENODEV; ++ } ++ mutex_unlock(&sst_drv_ctx->sst_lock); ++ str_info = get_stream_info(str_id); ++ if (!str_info) ++ return -EINVAL; ++ ops = sst_drv_ctx->ops; ++ ++ mutex_lock(&str_info->lock); ++ if (str_info->status != STREAM_UN_INIT) { ++ str_info->prev = str_info->status; ++ str_info->status = STREAM_UN_INIT; ++ mutex_unlock(&str_info->lock); ++ ++ if (!sst_drv_ctx->use_32bit_ops) { ++ pvt_id = sst_assign_pvt_id(sst_drv_ctx); ++ retval = sst_create_block_and_ipc_msg(&msg, true, ++ sst_drv_ctx, &block, IPC_CMD, pvt_id); ++ if (retval) ++ return retval; ++ ++ sst_fill_header_mrfld(&msg->mrfld_header, IPC_CMD, ++ str_info->task_id, 1, pvt_id); ++ msg->mrfld_header.p.header_low_payload = ++ sizeof(dsp_hdr); ++ sst_fill_header_dsp(&dsp_hdr, IPC_IA_FREE_STREAM_MRFLD, ++ str_info->pipe_id, 0); ++ memcpy(msg->mailbox_data, &dsp_hdr, sizeof(dsp_hdr)); ++ trace_sst_stream("FREE ->", str_id, str_info->pipe_id); ++ pr_info("Free for str %d pipe %#x\n", str_id, str_info->pipe_id); ++ ++ } else { ++ retval = sst_create_block_and_ipc_msg(&msg, false, ++ sst_drv_ctx, &block, ++ IPC_IA_FREE_STREAM, str_id); ++ if (retval) ++ return retval; ++ sst_fill_header(&msg->header, IPC_IA_FREE_STREAM, ++ 0, str_id); ++ } ++ spin_lock_irqsave(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ list_add_tail(&msg->node, &sst_drv_ctx->ipc_dispatch_list); ++ spin_unlock_irqrestore(&sst_drv_ctx->ipc_spin_lock, irq_flags); ++ if (!sst_drv_ctx->use_32bit_ops) { ++ /*FIXME: do we need to wake up drain stream here, ++ * how to get the pvt_id and msg_id ++ */ ++ } else { ++ sst_wake_up_block(sst_drv_ctx, 0, str_id, ++ IPC_IA_DRAIN_STREAM, NULL, 0); ++ } ++ ops->post_message(&sst_drv_ctx->ipc_post_msg_wq); ++ retval = sst_wait_timeout(sst_drv_ctx, block); ++ pr_debug("sst: wait for free returned %d\n", retval); ++ mutex_lock(&sst_drv_ctx->stream_lock); ++ sst_clean_stream(str_info); ++ mutex_unlock(&sst_drv_ctx->stream_lock); ++ pr_debug("SST DBG:Stream freed\n"); ++ sst_free_block(sst_drv_ctx, block); ++ } else { ++ mutex_unlock(&str_info->lock); ++ retval = -EBADRQC; ++ pr_debug("SST DBG:BADQRC for stream\n"); ++ } ++ ++ return retval; ++} ++ ++int sst_request_vtsv_file(char *fname, struct intel_sst_drv *ctx, ++ void **out_file, u32 *out_size) ++{ ++ int retval = 0; ++ const struct firmware *file; ++ void *ddr_virt_addr; ++ unsigned long file_base; ++ ++ if (!ctx->pdata->lib_info) { ++ pr_err("lib_info pointer NULL\n"); ++ return -EINVAL; ++ } ++ ++ pr_debug("Requesting VTSV file %s now...\n", fname); ++ retval = request_firmware(&file, fname, ctx->dev); ++ if (file == NULL) { ++ pr_err("VTSV file is returning as null\n"); ++ return -EINVAL; ++ } ++ if (retval) { ++ pr_err("request fw failed %d\n", retval); ++ return retval; ++ } ++ ++ if ((*out_file == NULL) || (*out_size < file->size)) { ++ retval = sst_get_next_lib_mem(&ctx->lib_mem_mgr, file->size, ++ &file_base); ++ *out_file = (void *)file_base; ++ } ++ ddr_virt_addr = (unsigned char *)ctx->ddr + ++ (unsigned long)(*out_file - ctx->pdata->lib_info->mod_base); ++ memcpy(ddr_virt_addr, file->data, file->size); ++ ++ *out_size = file->size; ++ release_firmware(file); ++ return 0; ++} ++ ++int sst_format_vtsv_message(struct intel_sst_drv *ctx, ++ struct ipc_post **msgptr, struct sst_block **block) ++{ ++ int retval = 0, pvt_id, len; ++ struct ipc_dsp_hdr dsp_hdr; ++ struct snd_sst_vtsv_info vinfo; ++ struct ipc_post *msg; ++ ++ BUG_ON((unsigned long)(ctx->vcache.file1_in_mem) & 0xffffffff00000000ULL); ++ BUG_ON((unsigned long)(ctx->vcache.file2_in_mem) & 0xffffffff00000000ULL); ++ ++ vinfo.vfiles[0].addr = (u32)((unsigned long)ctx->vcache.file1_in_mem ++ & 0xffffffff); ++ vinfo.vfiles[0].size = ctx->vcache.size1; ++ vinfo.vfiles[1].addr = (u32)((unsigned long)ctx->vcache.file2_in_mem ++ & 0xffffffff); ++ vinfo.vfiles[1].size = ctx->vcache.size2; ++ ++ /* Create the vtsv message */ ++ pvt_id = sst_assign_pvt_id(ctx); ++ retval = sst_create_block_and_ipc_msg(msgptr, true, ++ ctx, block, IPC_CMD, pvt_id); ++ if (retval) ++ return retval; ++ msg = *msgptr; ++ sst_fill_header_mrfld(&msg->mrfld_header, IPC_CMD, ++ SST_TASK_ID_AWARE, 1, pvt_id); ++ pr_debug("header:%x\n", ++ (unsigned int)msg->mrfld_header.p.header_high.full); ++ msg->mrfld_header.p.header_high.part.res_rqd = 1; ++ ++ len = sizeof(vinfo) + sizeof(dsp_hdr); ++ msg->mrfld_header.p.header_low_payload = len; ++ sst_fill_header_dsp(&dsp_hdr, IPC_IA_VTSV_UPDATE_MODULES, ++ PIPE_VAD_OUT, sizeof(u8)); ++ dsp_hdr.mod_id = SST_ALGO_VTSV; ++ memcpy(msg->mailbox_data, &dsp_hdr, sizeof(dsp_hdr)); ++ memcpy(msg->mailbox_data + sizeof(dsp_hdr), ++ &vinfo, sizeof(vinfo)); ++ return 0; ++} ++ ++int sst_send_vtsv_data_to_fw(struct intel_sst_drv *ctx) ++{ ++ int retval = 0; ++ struct ipc_post *msg = NULL; ++ struct sst_block *block = NULL; ++ ++ /* Download both the data files */ ++ retval = sst_request_vtsv_file("vtsv_net.bin", ctx, ++ &ctx->vcache.file1_in_mem, &ctx->vcache.size1); ++ if (retval) { ++ pr_err("vtsv data file1 request failed %d\n", retval); ++ return retval; ++ } ++ ++ retval = sst_request_vtsv_file("vtsv_grammar.bin", ctx, ++ &ctx->vcache.file2_in_mem, &ctx->vcache.size2); ++ if (retval) { ++ pr_err("vtsv data file2 request failed %d\n", retval); ++ return retval; ++ } ++ ++ retval = sst_format_vtsv_message(ctx, &msg, &block); ++ if (retval) { ++ pr_err("vtsv msg format failed %d\n", retval); ++ return retval; ++ } ++ sst_add_to_dispatch_list_and_post(ctx, msg); ++ retval = sst_wait_timeout(ctx, block); ++ if (retval) ++ pr_err("vtsv msg send to fw failed %d\n", retval); ++ ++ sst_free_block(ctx, block); ++ return retval; ++} +diff --git a/sound/soc/intel/sst/sst_trace.h b/sound/soc/intel/sst/sst_trace.h +new file mode 100644 +index 0000000..8d34ef3 +--- /dev/null ++++ b/sound/soc/intel/sst/sst_trace.h +@@ -0,0 +1,147 @@ ++/* ++ * sst_trace.h - Intel SST Driver tracing support ++ * ++ * Copyright (C) 2013 Intel Corp ++ * Authors: Omair Mohammed Abdullah ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ */ ++ ++#undef TRACE_SYSTEM ++#define TRACE_SYSTEM sst ++ ++#if !defined(_TRACE_SST_H) || defined(TRACE_HEADER_MULTI_READ) ++#define _TRACE_SST_H ++ ++#include ++#include ++#include ++ ++TRACE_EVENT(sst_ipc, ++ ++ TP_PROTO(const char *msg, u32 header_high, u32 header_low, int pvt_id), ++ ++ TP_ARGS(msg, header_high, header_low, pvt_id), ++ ++ TP_STRUCT__entry( ++ __string(info_msg, msg) ++ __field(unsigned int, val_l) ++ __field(unsigned int, val_h) ++ __field(unsigned int, id) ++ ), ++ ++ TP_fast_assign( ++ __assign_str(info_msg, msg); ++ __entry->val_l = header_low; ++ __entry->val_h = header_high; ++ __entry->id = pvt_id; ++ ), ++ ++ TP_printk("\t%s\t [%2u] = %#8.8x:%.4x", __get_str(info_msg), ++ (unsigned int)__entry->id, ++ (unsigned int)__entry->val_h, (unsigned int)__entry->val_l) ++ ++); ++ ++TRACE_EVENT(sst_stream, ++ ++ TP_PROTO(const char *msg, int str_id, int pipe_id), ++ ++ TP_ARGS(msg, str_id, pipe_id), ++ ++ TP_STRUCT__entry( ++ __string(info_msg, msg) ++ __field(unsigned int, str_id) ++ __field(unsigned int, pipe_id) ++ ), ++ ++ TP_fast_assign( ++ __assign_str(info_msg, msg); ++ __entry->str_id = str_id; ++ __entry->pipe_id = pipe_id; ++ ), ++ ++ TP_printk("\t%s\t str = %2u, pipe = %#x", __get_str(info_msg), ++ (unsigned int)__entry->str_id, (unsigned int)__entry->pipe_id) ++); ++ ++TRACE_EVENT(sst_ipc_mailbox, ++ ++ TP_PROTO(const char *mailbox, int mbox_len), ++ ++ TP_ARGS(mailbox, mbox_len), ++ ++ TP_STRUCT__entry( ++ __dynamic_array(char, mbox, (3 * mbox_len)) ++ ), ++ ++ TP_fast_assign( ++ sst_dump_to_buffer(mailbox, mbox_len, ++ __get_dynamic_array(mbox)); ++ ), ++ ++ TP_printk(" %s", __get_str(mbox)) ++ ++); ++ ++TRACE_EVENT(sst_lib_download, ++ ++ TP_PROTO(const char *msg, const char *lib_name), ++ ++ TP_ARGS(msg, lib_name), ++ ++ TP_STRUCT__entry( ++ __string(info_msg, msg) ++ __string(info_lib_name, lib_name) ++ ), ++ ++ TP_fast_assign( ++ __assign_str(info_msg, msg); ++ __assign_str(info_lib_name, lib_name); ++ ), ++ ++ TP_printk("\t%s %s", __get_str(info_msg), ++ __get_str(info_lib_name)) ++); ++ ++TRACE_EVENT(sst_fw_download, ++ ++ TP_PROTO(const char *msg, int fw_state), ++ ++ TP_ARGS(msg, fw_state), ++ ++ TP_STRUCT__entry( ++ __string(info_msg, msg) ++ __field(unsigned int, fw_state) ++ ), ++ ++ TP_fast_assign( ++ __assign_str(info_msg, msg); ++ __entry->fw_state = fw_state; ++ ), ++ ++ TP_printk("\t%s\tFW state = %d", __get_str(info_msg), ++ (unsigned int)__entry->fw_state) ++); ++ ++#endif /* _TRACE_SST_H */ ++ ++/* This part must be outside protection */ ++#undef TRACE_INCLUDE_PATH ++#define TRACE_INCLUDE_PATH . ++#define TRACE_INCLUDE_FILE sst_trace ++#include +diff --git a/sound/soc/intel/sst_platform.h b/sound/soc/intel/sst_platform.h +new file mode 100644 +index 0000000..5d231b5 +--- /dev/null ++++ b/sound/soc/intel/sst_platform.h +@@ -0,0 +1,155 @@ ++/* ++ * sst_platform.h - Intel MID Platform driver header file ++ * ++ * Copyright (C) 2010 Intel Corp ++ * Author: Vinod Koul ++ * Author: Harsha Priya ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * ++ */ ++ ++#ifndef __SST_PLATFORM_H__ ++#define __SST_PLATFORM_H__ ++ ++#include ++ ++#define SST_MAX_BIN_BYTES 1024 ++ ++struct sst_data; ++ ++enum sst_audio_device_type { ++ SND_SST_DEVICE_HEADSET = 1, ++ SND_SST_DEVICE_IHF, ++ SND_SST_DEVICE_VIBRA, ++ SND_SST_DEVICE_HAPTIC, ++ SND_SST_DEVICE_CAPTURE, ++ SND_SST_DEVICE_COMPRESS, ++}; ++ ++enum snd_sst_input_stream { ++ SST_INPUT_STREAM_NONE = 0x0, ++ SST_INPUT_STREAM_PCM = 0x6, ++ SST_INPUT_STREAM_COMPRESS = 0x8, ++ SST_INPUT_STREAM_MIXED = 0xE, ++}; ++ ++enum sst_stream_ops { ++ STREAM_OPS_PLAYBACK = 0, /* Decode */ ++ STREAM_OPS_CAPTURE, /* Encode */ ++ STREAM_OPS_COMPRESSED_PATH, /* Offload playback/capture */ ++ ++}; ++enum snd_sst_stream_type { ++ SST_STREAM_DEVICE_HS = 32, ++ SST_STREAM_DEVICE_IHF = 33, ++ SST_STREAM_DEVICE_MIC0 = 34, ++ SST_STREAM_DEVICE_MIC1 = 35, ++}; ++ ++enum sst_controls { ++ SST_SND_ALLOC = 0x1000, ++ SST_SND_PAUSE = 0x1001, ++ SST_SND_RESUME = 0x1002, ++ SST_SND_DROP = 0x1003, ++ SST_SND_FREE = 0x1004, ++ SST_SND_BUFFER_POINTER = 0x1005, ++ SST_SND_STREAM_INIT = 0x1006, ++ SST_SND_START = 0x1007, ++ SST_SET_RUNTIME_PARAMS = 0x1008, ++ SST_SET_ALGO_PARAMS = 0x1009, ++ SST_SET_BYTE_STREAM = 0x100A, ++ SST_GET_BYTE_STREAM = 0x100B, ++ SST_SET_SSP_CONFIG = 0x100C, ++ SST_SET_PROBE_BYTE_STREAM = 0x100D, ++ SST_GET_PROBE_BYTE_STREAM = 0x100E, ++ SST_SET_VTSV_INFO = 0x100F, ++}; ++ ++struct pcm_stream_info { ++ int str_id; ++ void *mad_substream; ++ void (*period_elapsed) (void *mad_substream); ++ unsigned long long buffer_ptr; ++ unsigned long long pcm_delay; ++ int sfreq; ++}; ++ ++struct sst_compress_cb { ++ void *param; ++ void (*compr_cb)(void *param); ++ void *drain_cb_param; ++ void (*drain_notify)(void *param); ++ ++}; ++ ++struct snd_sst_params; ++ ++struct compress_sst_ops { ++ const char *name; ++ int (*open) (struct snd_sst_params *str_params, ++ struct sst_compress_cb *cb); ++ int (*control) (unsigned int cmd, unsigned int str_id); ++ int (*tstamp) (unsigned int str_id, struct snd_compr_tstamp *tstamp); ++ int (*ack) (unsigned int str_id, unsigned long bytes); ++ int (*close) (unsigned int str_id); ++ int (*get_caps) (struct snd_compr_caps *caps); ++ int (*get_codec_caps) (struct snd_compr_codec_caps *codec); ++ int (*set_metadata) (unsigned int str_id, struct snd_compr_metadata *metadata); ++ ++}; ++ ++enum lpe_param_types_mixer { ++ SST_ALGO_PARAM_MIXER_STREAM_CFG = 0x801, ++}; ++ ++struct mad_ops_wq { ++ int stream_id; ++ enum sst_controls control_op; ++ struct work_struct wq; ++}; ++ ++struct sst_ops { ++ int (*open) (struct snd_sst_params *str_param); ++ int (*device_control) (int cmd, void *arg); ++ int (*set_generic_params) (enum sst_controls cmd, void *arg); ++ int (*close) (unsigned int str_id); ++ int (*power) (bool state); ++}; ++ ++struct sst_runtime_stream { ++ int stream_status; ++ unsigned int id; ++ size_t bytes_written; ++ struct pcm_stream_info stream_info; ++ struct sst_ops *ops; ++ struct compress_sst_ops *compr_ops; ++ spinlock_t status_lock; ++}; ++ ++struct sst_device { ++ char *name; ++ struct device *dev; ++ struct sst_ops *ops; ++ struct platform_device *pdev; ++ struct compress_sst_ops *compr_ops; ++}; ++ ++int sst_register_dsp(struct sst_device *sst); ++int sst_unregister_dsp(struct sst_device *sst); ++#endif +diff --git a/sound/soc/intel/sst_platform_pvt.h b/sound/soc/intel/sst_platform_pvt.h +new file mode 100644 +index 0000000..f74dd9c +--- /dev/null ++++ b/sound/soc/intel/sst_platform_pvt.h +@@ -0,0 +1,127 @@ ++/* ++ * sst_platform_pvt.h - Intel MID Platform driver header file ++ * ++ * Copyright (C) 2010 Intel Corp ++ * Author: Vinod Koul ++ * Author: Harsha Priya ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. ++ * ++ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ++ * ++ * ++ */ ++ ++#ifndef __SST_PLATFORM_PVT_H__ ++#define __SST_PLATFORM_PVT_H__ ++ ++/* TODO rmv this global */ ++extern struct sst_device *sst_dsp; ++ ++#define SST_MONO 1 ++#define SST_STEREO 2 ++ ++#define SST_MIN_RATE 8000 ++#define SST_MAX_RATE 48000 ++#define SST_MIN_CHANNEL 1 ++#define SST_MAX_CHANNEL 2 ++ ++#define SST_MAX_BUFFER 96000 /*500ms@48K,16bit,2ch - CLV*/ ++#define SST_MIN_PERIOD_BYTES 1536 /*24ms@16K,16bit,2ch - For VoIP on Mrfld*/ ++#define SST_MAX_PERIOD_BYTES 48000 /*250ms@48K,16bit,2ch - CLV*/ ++ ++#define SST_MIN_PERIODS 2 ++#define SST_MAX_PERIODS 50 ++#define SST_FIFO_SIZE 0 ++#define SST_CODEC_TYPE_PCM 1 ++ ++#define SST_HEADSET_DAI "Headset-cpu-dai" ++#define SST_SPEAKER_DAI "Speaker-cpu-dai" ++#define SST_VOICE_DAI "Voice-cpu-dai" ++#define SST_VIRTUAL_DAI "Virtual-cpu-dai" ++#define SST_LOOPBACK_DAI "Loopback-cpu-dai" ++#define SST_POWER_DAI "Power-cpu-dai" ++#define SST_COMPRESS_DAI "Compress-cpu-dai" ++#define SST_PROBE_DAI "Probe-cpu-dai" ++#define SST_VOIP_DAI "Voip-cpu-dai" ++#define SST_DEEPBUFFER_DAI "Deepbuffer-cpu-dai" ++#define SST_LOWLATENCY_DAI "Lowlatency-cpu-dai" ++ ++struct sst_device; ++ ++enum sst_drv_status { ++ SST_PLATFORM_UNINIT, ++ SST_PLATFORM_INIT, ++ SST_PLATFORM_RUNNING, ++ SST_PLATFORM_PAUSED, ++ SST_PLATFORM_DROPPED, ++}; ++ ++#define SST_PIPE_CONTROL 0x0 ++#define SST_COMPRESS_VOL 0x01 ++ ++int sst_platform_clv_init(struct snd_soc_platform *platform); ++int sst_dsp_init(struct snd_soc_platform *platform); ++int sst_dsp_init_v2_dpcm(struct snd_soc_platform *platform); ++int sst_send_pipe_gains(struct snd_soc_dai *dai, int stream, int mute); ++ ++unsigned int sst_soc_read(struct snd_soc_platform *platform, unsigned int reg); ++int sst_soc_write(struct snd_soc_platform *platform, unsigned int reg, unsigned int val); ++unsigned int sst_reg_read(struct sst_data *sst, unsigned int reg, ++ unsigned int shift, unsigned int max); ++unsigned int sst_reg_write(struct sst_data *sst, unsigned int reg, ++ unsigned int shift, unsigned int max, unsigned int val); ++ ++int sst_algo_int_ctl_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo); ++void sst_set_stream_status(struct sst_runtime_stream *stream, int state); ++int sst_fill_stream_params(void *substream, const struct sst_data *ctx, ++ struct snd_sst_params *str_params, bool is_compress); ++int sst_dpcm_probe_send(struct snd_soc_platform *platform, u16 probe_pipe, ++ int substream, int direction, bool on); ++int sst_byte_control_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol); ++int sst_byte_control_set(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol); ++ ++struct sst_algo_int_control_v2 { ++ struct soc_mixer_control mc; ++ u16 module_id; /* module identifieer */ ++ u16 pipe_id; /* location info: pipe_id + instance_id */ ++ u16 instance_id; ++ unsigned int value; /* Value received is stored here */ ++}; ++ ++struct sst_lowlatency_deepbuff { ++ /* Thresholds for low latency & deep buffer */ ++ unsigned long *low_latency; ++ unsigned long *deep_buffer; ++ unsigned long period_time; ++}; ++ ++struct sst_data { ++ struct platform_device *pdev; ++ struct sst_platform_data *pdata; ++ unsigned int lpe_mixer_input_ihf; ++ unsigned int lpe_mixer_input_hs; ++ u32 *widget; ++ char *byte_stream; ++ struct mutex lock; ++ /* Pipe_id for probe_stream to be saved in stream map */ ++ u8 pipe_id; ++ bool vtsv_enroll; ++ struct sst_lowlatency_deepbuff ll_db; ++}; ++#endif +diff --git a/sound/soc/mid-x86/Kconfig b/sound/soc/mid-x86/Kconfig +deleted file mode 100644 +index 61c10bf..0000000 +--- a/sound/soc/mid-x86/Kconfig ++++ /dev/null +@@ -1,13 +0,0 @@ +-config SND_MFLD_MACHINE +- tristate "SOC Machine Audio driver for Intel Medfield MID platform" +- depends on INTEL_SCU_IPC +- select SND_SOC_SN95031 +- select SND_SST_PLATFORM +- help +- This adds support for ASoC machine driver for Intel(R) MID Medfield platform +- used as alsa device in audio substem in Intel(R) MID devices +- Say Y if you have such a device +- If unsure select "N". +- +-config SND_SST_PLATFORM +- tristate +diff --git a/sound/soc/mid-x86/Makefile b/sound/soc/mid-x86/Makefile +deleted file mode 100644 +index 6398833..0000000 +--- a/sound/soc/mid-x86/Makefile ++++ /dev/null +@@ -1,5 +0,0 @@ +-snd-soc-sst-platform-objs := sst_platform.o +-snd-soc-mfld-machine-objs := mfld_machine.o +- +-obj-$(CONFIG_SND_SST_PLATFORM) += snd-soc-sst-platform.o +-obj-$(CONFIG_SND_MFLD_MACHINE) += snd-soc-mfld-machine.o +diff --git a/sound/soc/mid-x86/mfld_machine.c b/sound/soc/mid-x86/mfld_machine.c +deleted file mode 100644 +index 4139116..0000000 +--- a/sound/soc/mid-x86/mfld_machine.c ++++ /dev/null +@@ -1,447 +0,0 @@ +-/* +- * mfld_machine.c - ASoc Machine driver for Intel Medfield MID platform +- * +- * Copyright (C) 2010 Intel Corp +- * Author: Vinod Koul +- * Author: Harsha Priya +- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; version 2 of the License. +- * +- * This program is distributed in the hope that it will be useful, but +- * WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +- * General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License along +- * with this program; if not, write to the Free Software Foundation, Inc., +- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +- * +- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +- */ +- +-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include "../codecs/sn95031.h" +- +-#define MID_MONO 1 +-#define MID_STEREO 2 +-#define MID_MAX_CAP 5 +-#define MFLD_JACK_INSERT 0x04 +- +-enum soc_mic_bias_zones { +- MFLD_MV_START = 0, +- /* mic bias volutage range for Headphones*/ +- MFLD_MV_HP = 400, +- /* mic bias volutage range for American Headset*/ +- MFLD_MV_AM_HS = 650, +- /* mic bias volutage range for Headset*/ +- MFLD_MV_HS = 2000, +- MFLD_MV_UNDEFINED, +-}; +- +-static unsigned int hs_switch; +-static unsigned int lo_dac; +- +-struct mfld_mc_private { +- void __iomem *int_base; +- u8 interrupt_status; +-}; +- +-struct snd_soc_jack mfld_jack; +- +-/*Headset jack detection DAPM pins */ +-static struct snd_soc_jack_pin mfld_jack_pins[] = { +- { +- .pin = "Headphones", +- .mask = SND_JACK_HEADPHONE, +- }, +- { +- .pin = "AMIC1", +- .mask = SND_JACK_MICROPHONE, +- }, +-}; +- +-/* jack detection voltage zones */ +-static struct snd_soc_jack_zone mfld_zones[] = { +- {MFLD_MV_START, MFLD_MV_AM_HS, SND_JACK_HEADPHONE}, +- {MFLD_MV_AM_HS, MFLD_MV_HS, SND_JACK_HEADSET}, +-}; +- +-/* sound card controls */ +-static const char *headset_switch_text[] = {"Earpiece", "Headset"}; +- +-static const char *lo_text[] = {"Vibra", "Headset", "IHF", "None"}; +- +-static const struct soc_enum headset_enum = +- SOC_ENUM_SINGLE_EXT(2, headset_switch_text); +- +-static const struct soc_enum lo_enum = +- SOC_ENUM_SINGLE_EXT(4, lo_text); +- +-static int headset_get_switch(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_value *ucontrol) +-{ +- ucontrol->value.integer.value[0] = hs_switch; +- return 0; +-} +- +-static int headset_set_switch(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_value *ucontrol) +-{ +- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); +- +- if (ucontrol->value.integer.value[0] == hs_switch) +- return 0; +- +- if (ucontrol->value.integer.value[0]) { +- pr_debug("hs_set HS path\n"); +- snd_soc_dapm_enable_pin(&codec->dapm, "Headphones"); +- snd_soc_dapm_disable_pin(&codec->dapm, "EPOUT"); +- } else { +- pr_debug("hs_set EP path\n"); +- snd_soc_dapm_disable_pin(&codec->dapm, "Headphones"); +- snd_soc_dapm_enable_pin(&codec->dapm, "EPOUT"); +- } +- snd_soc_dapm_sync(&codec->dapm); +- hs_switch = ucontrol->value.integer.value[0]; +- +- return 0; +-} +- +-static void lo_enable_out_pins(struct snd_soc_codec *codec) +-{ +- snd_soc_dapm_enable_pin(&codec->dapm, "IHFOUTL"); +- snd_soc_dapm_enable_pin(&codec->dapm, "IHFOUTR"); +- snd_soc_dapm_enable_pin(&codec->dapm, "LINEOUTL"); +- snd_soc_dapm_enable_pin(&codec->dapm, "LINEOUTR"); +- snd_soc_dapm_enable_pin(&codec->dapm, "VIB1OUT"); +- snd_soc_dapm_enable_pin(&codec->dapm, "VIB2OUT"); +- if (hs_switch) { +- snd_soc_dapm_enable_pin(&codec->dapm, "Headphones"); +- snd_soc_dapm_disable_pin(&codec->dapm, "EPOUT"); +- } else { +- snd_soc_dapm_disable_pin(&codec->dapm, "Headphones"); +- snd_soc_dapm_enable_pin(&codec->dapm, "EPOUT"); +- } +-} +- +-static int lo_get_switch(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_value *ucontrol) +-{ +- ucontrol->value.integer.value[0] = lo_dac; +- return 0; +-} +- +-static int lo_set_switch(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_value *ucontrol) +-{ +- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); +- +- if (ucontrol->value.integer.value[0] == lo_dac) +- return 0; +- +- /* we dont want to work with last state of lineout so just enable all +- * pins and then disable pins not required +- */ +- lo_enable_out_pins(codec); +- switch (ucontrol->value.integer.value[0]) { +- case 0: +- pr_debug("set vibra path\n"); +- snd_soc_dapm_disable_pin(&codec->dapm, "VIB1OUT"); +- snd_soc_dapm_disable_pin(&codec->dapm, "VIB2OUT"); +- snd_soc_update_bits(codec, SN95031_LOCTL, 0x66, 0); +- break; +- +- case 1: +- pr_debug("set hs path\n"); +- snd_soc_dapm_disable_pin(&codec->dapm, "Headphones"); +- snd_soc_dapm_disable_pin(&codec->dapm, "EPOUT"); +- snd_soc_update_bits(codec, SN95031_LOCTL, 0x66, 0x22); +- break; +- +- case 2: +- pr_debug("set spkr path\n"); +- snd_soc_dapm_disable_pin(&codec->dapm, "IHFOUTL"); +- snd_soc_dapm_disable_pin(&codec->dapm, "IHFOUTR"); +- snd_soc_update_bits(codec, SN95031_LOCTL, 0x66, 0x44); +- break; +- +- case 3: +- pr_debug("set null path\n"); +- snd_soc_dapm_disable_pin(&codec->dapm, "LINEOUTL"); +- snd_soc_dapm_disable_pin(&codec->dapm, "LINEOUTR"); +- snd_soc_update_bits(codec, SN95031_LOCTL, 0x66, 0x66); +- break; +- } +- snd_soc_dapm_sync(&codec->dapm); +- lo_dac = ucontrol->value.integer.value[0]; +- return 0; +-} +- +-static const struct snd_kcontrol_new mfld_snd_controls[] = { +- SOC_ENUM_EXT("Playback Switch", headset_enum, +- headset_get_switch, headset_set_switch), +- SOC_ENUM_EXT("Lineout Mux", lo_enum, +- lo_get_switch, lo_set_switch), +-}; +- +-static const struct snd_soc_dapm_widget mfld_widgets[] = { +- SND_SOC_DAPM_HP("Headphones", NULL), +- SND_SOC_DAPM_MIC("Mic", NULL), +-}; +- +-static const struct snd_soc_dapm_route mfld_map[] = { +- {"Headphones", NULL, "HPOUTR"}, +- {"Headphones", NULL, "HPOUTL"}, +- {"Mic", NULL, "AMIC1"}, +-}; +- +-static void mfld_jack_check(unsigned int intr_status) +-{ +- struct mfld_jack_data jack_data; +- +- jack_data.mfld_jack = &mfld_jack; +- jack_data.intr_id = intr_status; +- +- sn95031_jack_detection(&jack_data); +- /* TODO: add american headset detection post gpiolib support */ +-} +- +-static int mfld_init(struct snd_soc_pcm_runtime *runtime) +-{ +- struct snd_soc_codec *codec = runtime->codec; +- struct snd_soc_dapm_context *dapm = &codec->dapm; +- int ret_val; +- +- /* Add jack sense widgets */ +- snd_soc_dapm_new_controls(dapm, mfld_widgets, ARRAY_SIZE(mfld_widgets)); +- +- /* Set up the map */ +- snd_soc_dapm_add_routes(dapm, mfld_map, ARRAY_SIZE(mfld_map)); +- +- /* always connected */ +- snd_soc_dapm_enable_pin(dapm, "Headphones"); +- snd_soc_dapm_enable_pin(dapm, "Mic"); +- +- ret_val = snd_soc_add_codec_controls(codec, mfld_snd_controls, +- ARRAY_SIZE(mfld_snd_controls)); +- if (ret_val) { +- pr_err("soc_add_controls failed %d", ret_val); +- return ret_val; +- } +- /* default is earpiece pin, userspace sets it explcitly */ +- snd_soc_dapm_disable_pin(dapm, "Headphones"); +- /* default is lineout NC, userspace sets it explcitly */ +- snd_soc_dapm_disable_pin(dapm, "LINEOUTL"); +- snd_soc_dapm_disable_pin(dapm, "LINEOUTR"); +- lo_dac = 3; +- hs_switch = 0; +- /* we dont use linein in this so set to NC */ +- snd_soc_dapm_disable_pin(dapm, "LINEINL"); +- snd_soc_dapm_disable_pin(dapm, "LINEINR"); +- +- /* Headset and button jack detection */ +- ret_val = snd_soc_jack_new(codec, "Intel(R) MID Audio Jack", +- SND_JACK_HEADSET | SND_JACK_BTN_0 | +- SND_JACK_BTN_1, &mfld_jack); +- if (ret_val) { +- pr_err("jack creation failed\n"); +- return ret_val; +- } +- +- ret_val = snd_soc_jack_add_pins(&mfld_jack, +- ARRAY_SIZE(mfld_jack_pins), mfld_jack_pins); +- if (ret_val) { +- pr_err("adding jack pins failed\n"); +- return ret_val; +- } +- ret_val = snd_soc_jack_add_zones(&mfld_jack, +- ARRAY_SIZE(mfld_zones), mfld_zones); +- if (ret_val) { +- pr_err("adding jack zones failed\n"); +- return ret_val; +- } +- +- /* we want to check if anything is inserted at boot, +- * so send a fake event to codec and it will read adc +- * to find if anything is there or not */ +- mfld_jack_check(MFLD_JACK_INSERT); +- return ret_val; +-} +- +-static struct snd_soc_dai_link mfld_msic_dailink[] = { +- { +- .name = "Medfield Headset", +- .stream_name = "Headset", +- .cpu_dai_name = "Headset-cpu-dai", +- .codec_dai_name = "SN95031 Headset", +- .codec_name = "sn95031", +- .platform_name = "sst-platform", +- .init = mfld_init, +- }, +- { +- .name = "Medfield Speaker", +- .stream_name = "Speaker", +- .cpu_dai_name = "Speaker-cpu-dai", +- .codec_dai_name = "SN95031 Speaker", +- .codec_name = "sn95031", +- .platform_name = "sst-platform", +- .init = NULL, +- }, +- { +- .name = "Medfield Vibra", +- .stream_name = "Vibra1", +- .cpu_dai_name = "Vibra1-cpu-dai", +- .codec_dai_name = "SN95031 Vibra1", +- .codec_name = "sn95031", +- .platform_name = "sst-platform", +- .init = NULL, +- }, +- { +- .name = "Medfield Haptics", +- .stream_name = "Vibra2", +- .cpu_dai_name = "Vibra2-cpu-dai", +- .codec_dai_name = "SN95031 Vibra2", +- .codec_name = "sn95031", +- .platform_name = "sst-platform", +- .init = NULL, +- }, +- { +- .name = "Medfield Compress", +- .stream_name = "Speaker", +- .cpu_dai_name = "Compress-cpu-dai", +- .codec_dai_name = "SN95031 Speaker", +- .codec_name = "sn95031", +- .platform_name = "sst-platform", +- .init = NULL, +- }, +-}; +- +-/* SoC card */ +-static struct snd_soc_card snd_soc_card_mfld = { +- .name = "medfield_audio", +- .owner = THIS_MODULE, +- .dai_link = mfld_msic_dailink, +- .num_links = ARRAY_SIZE(mfld_msic_dailink), +-}; +- +-static irqreturn_t snd_mfld_jack_intr_handler(int irq, void *dev) +-{ +- struct mfld_mc_private *mc_private = (struct mfld_mc_private *) dev; +- +- memcpy_fromio(&mc_private->interrupt_status, +- ((void *)(mc_private->int_base)), +- sizeof(u8)); +- return IRQ_WAKE_THREAD; +-} +- +-static irqreturn_t snd_mfld_jack_detection(int irq, void *data) +-{ +- struct mfld_mc_private *mc_drv_ctx = (struct mfld_mc_private *) data; +- +- if (mfld_jack.codec == NULL) +- return IRQ_HANDLED; +- mfld_jack_check(mc_drv_ctx->interrupt_status); +- +- return IRQ_HANDLED; +-} +- +-static int snd_mfld_mc_probe(struct platform_device *pdev) +-{ +- int ret_val = 0, irq; +- struct mfld_mc_private *mc_drv_ctx; +- struct resource *irq_mem; +- +- pr_debug("snd_mfld_mc_probe called\n"); +- +- /* retrive the irq number */ +- irq = platform_get_irq(pdev, 0); +- +- /* audio interrupt base of SRAM location where +- * interrupts are stored by System FW */ +- mc_drv_ctx = kzalloc(sizeof(*mc_drv_ctx), GFP_ATOMIC); +- if (!mc_drv_ctx) { +- pr_err("allocation failed\n"); +- return -ENOMEM; +- } +- +- irq_mem = platform_get_resource_byname( +- pdev, IORESOURCE_MEM, "IRQ_BASE"); +- if (!irq_mem) { +- pr_err("no mem resource given\n"); +- ret_val = -ENODEV; +- goto unalloc; +- } +- mc_drv_ctx->int_base = ioremap_nocache(irq_mem->start, +- resource_size(irq_mem)); +- if (!mc_drv_ctx->int_base) { +- pr_err("Mapping of cache failed\n"); +- ret_val = -ENOMEM; +- goto unalloc; +- } +- /* register for interrupt */ +- ret_val = request_threaded_irq(irq, snd_mfld_jack_intr_handler, +- snd_mfld_jack_detection, +- IRQF_SHARED, pdev->dev.driver->name, mc_drv_ctx); +- if (ret_val) { +- pr_err("cannot register IRQ\n"); +- goto unalloc; +- } +- /* register the soc card */ +- snd_soc_card_mfld.dev = &pdev->dev; +- ret_val = snd_soc_register_card(&snd_soc_card_mfld); +- if (ret_val) { +- pr_debug("snd_soc_register_card failed %d\n", ret_val); +- goto freeirq; +- } +- platform_set_drvdata(pdev, mc_drv_ctx); +- pr_debug("successfully exited probe\n"); +- return ret_val; +- +-freeirq: +- free_irq(irq, mc_drv_ctx); +-unalloc: +- kfree(mc_drv_ctx); +- return ret_val; +-} +- +-static int snd_mfld_mc_remove(struct platform_device *pdev) +-{ +- struct mfld_mc_private *mc_drv_ctx = platform_get_drvdata(pdev); +- +- pr_debug("snd_mfld_mc_remove called\n"); +- free_irq(platform_get_irq(pdev, 0), mc_drv_ctx); +- snd_soc_unregister_card(&snd_soc_card_mfld); +- kfree(mc_drv_ctx); +- platform_set_drvdata(pdev, NULL); +- return 0; +-} +- +-static struct platform_driver snd_mfld_mc_driver = { +- .driver = { +- .owner = THIS_MODULE, +- .name = "msic_audio", +- }, +- .probe = snd_mfld_mc_probe, +- .remove = snd_mfld_mc_remove, +-}; +- +-module_platform_driver(snd_mfld_mc_driver); +- +-MODULE_DESCRIPTION("ASoC Intel(R) MID Machine driver"); +-MODULE_AUTHOR("Vinod Koul "); +-MODULE_AUTHOR("Harsha Priya "); +-MODULE_LICENSE("GPL v2"); +-MODULE_ALIAS("platform:msic-audio"); +diff --git a/sound/soc/mid-x86/sst_dsp.h b/sound/soc/mid-x86/sst_dsp.h +deleted file mode 100644 +index 0fce1de..0000000 +--- a/sound/soc/mid-x86/sst_dsp.h ++++ /dev/null +@@ -1,134 +0,0 @@ +-#ifndef __SST_DSP_H__ +-#define __SST_DSP_H__ +-/* +- * sst_dsp.h - Intel SST Driver for audio engine +- * +- * Copyright (C) 2008-12 Intel Corporation +- * Authors: Vinod Koul +- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; version 2 of the License. +- * +- * This program is distributed in the hope that it will be useful, but +- * WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +- * General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License along +- * with this program; if not, write to the Free Software Foundation, Inc., +- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +- * +- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +- */ +- +-enum sst_codec_types { +- /* AUDIO/MUSIC CODEC Type Definitions */ +- SST_CODEC_TYPE_UNKNOWN = 0, +- SST_CODEC_TYPE_PCM, /* Pass through Audio codec */ +- SST_CODEC_TYPE_MP3, +- SST_CODEC_TYPE_MP24, +- SST_CODEC_TYPE_AAC, +- SST_CODEC_TYPE_AACP, +- SST_CODEC_TYPE_eAACP, +-}; +- +-enum stream_type { +- SST_STREAM_TYPE_NONE = 0, +- SST_STREAM_TYPE_MUSIC = 1, +-}; +- +-struct snd_pcm_params { +- u16 codec; /* codec type */ +- u8 num_chan; /* 1=Mono, 2=Stereo */ +- u8 pcm_wd_sz; /* 16/24 - bit*/ +- u32 reserved; /* Bitrate in bits per second */ +- u32 sfreq; /* Sampling rate in Hz */ +- u8 use_offload_path; +- u8 reserved2; +- u16 reserved3; +- u8 channel_map[8]; +-} __packed; +- +-/* MP3 Music Parameters Message */ +-struct snd_mp3_params { +- u16 codec; +- u8 num_chan; /* 1=Mono, 2=Stereo */ +- u8 pcm_wd_sz; /* 16/24 - bit*/ +- u8 crc_check; /* crc_check - disable (0) or enable (1) */ +- u8 reserved1; /* unused*/ +- u16 reserved2; /* Unused */ +-} __packed; +- +-#define AAC_BIT_STREAM_ADTS 0 +-#define AAC_BIT_STREAM_ADIF 1 +-#define AAC_BIT_STREAM_RAW 2 +- +-/* AAC Music Parameters Message */ +-struct snd_aac_params { +- u16 codec; +- u8 num_chan; /* 1=Mono, 2=Stereo*/ +- u8 pcm_wd_sz; /* 16/24 - bit*/ +- u8 bdownsample; /*SBR downsampling 0 - disable 1 -enabled AAC+ only */ +- u8 bs_format; /* input bit stream format adts=0, adif=1, raw=2 */ +- u16 reser2; +- u32 externalsr; /*sampling rate of basic AAC raw bit stream*/ +- u8 sbr_signalling;/*disable/enable/set automode the SBR tool.AAC+*/ +- u8 reser1; +- u16 reser3; +-} __packed; +- +-/* WMA Music Parameters Message */ +-struct snd_wma_params { +- u16 codec; +- u8 num_chan; /* 1=Mono, 2=Stereo */ +- u8 pcm_wd_sz; /* 16/24 - bit*/ +- u32 brate; /* Use the hard coded value. */ +- u32 sfreq; /* Sampling freq eg. 8000, 441000, 48000 */ +- u32 channel_mask; /* Channel Mask */ +- u16 format_tag; /* Format Tag */ +- u16 block_align; /* packet size */ +- u16 wma_encode_opt;/* Encoder option */ +- u8 op_align; /* op align 0- 16 bit, 1- MSB, 2 LSB */ +- u8 reserved; /* reserved */ +-} __packed; +- +-/* Codec params struture */ +-union snd_sst_codec_params { +- struct snd_pcm_params pcm_params; +- struct snd_mp3_params mp3_params; +- struct snd_aac_params aac_params; +- struct snd_wma_params wma_params; +-} __packed; +- +-/* Address and size info of a frame buffer */ +-struct sst_address_info { +- u32 addr; /* Address at IA */ +- u32 size; /* Size of the buffer */ +-}; +- +-struct snd_sst_alloc_params_ext { +- struct sst_address_info ring_buf_info[8]; +- u8 sg_count; +- u8 reserved; +- u16 reserved2; +- u32 frag_size; /*Number of samples after which period elapsed +- message is sent valid only if path = 0*/ +-} __packed; +- +-struct snd_sst_stream_params { +- union snd_sst_codec_params uc; +-} __packed; +- +-struct snd_sst_params { +- u32 stream_id; +- u8 codec; +- u8 ops; +- u8 stream_type; +- u8 device_type; +- struct snd_sst_stream_params sparams; +- struct snd_sst_alloc_params_ext aparams; +-}; +- +-#endif /* __SST_DSP_H__ */ +diff --git a/sound/soc/mid-x86/sst_platform.c b/sound/soc/mid-x86/sst_platform.c +deleted file mode 100644 +index 392fc0b..0000000 +--- a/sound/soc/mid-x86/sst_platform.c ++++ /dev/null +@@ -1,733 +0,0 @@ +-/* +- * sst_platform.c - Intel MID Platform driver +- * +- * Copyright (C) 2010-2013 Intel Corp +- * Author: Vinod Koul +- * Author: Harsha Priya +- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; version 2 of the License. +- * +- * This program is distributed in the hope that it will be useful, but +- * WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +- * General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License along +- * with this program; if not, write to the Free Software Foundation, Inc., +- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +- * +- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +- * +- * +- */ +-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include "sst_platform.h" +- +-static struct sst_device *sst; +-static DEFINE_MUTEX(sst_lock); +- +-int sst_register_dsp(struct sst_device *dev) +-{ +- BUG_ON(!dev); +- if (!try_module_get(dev->dev->driver->owner)) +- return -ENODEV; +- mutex_lock(&sst_lock); +- if (sst) { +- pr_err("we already have a device %s\n", sst->name); +- module_put(dev->dev->driver->owner); +- mutex_unlock(&sst_lock); +- return -EEXIST; +- } +- pr_debug("registering device %s\n", dev->name); +- sst = dev; +- mutex_unlock(&sst_lock); +- return 0; +-} +-EXPORT_SYMBOL_GPL(sst_register_dsp); +- +-int sst_unregister_dsp(struct sst_device *dev) +-{ +- BUG_ON(!dev); +- if (dev != sst) +- return -EINVAL; +- +- mutex_lock(&sst_lock); +- +- if (!sst) { +- mutex_unlock(&sst_lock); +- return -EIO; +- } +- +- module_put(sst->dev->driver->owner); +- pr_debug("unreg %s\n", sst->name); +- sst = NULL; +- mutex_unlock(&sst_lock); +- return 0; +-} +-EXPORT_SYMBOL_GPL(sst_unregister_dsp); +- +-static struct snd_pcm_hardware sst_platform_pcm_hw = { +- .info = (SNDRV_PCM_INFO_INTERLEAVED | +- SNDRV_PCM_INFO_DOUBLE | +- SNDRV_PCM_INFO_PAUSE | +- SNDRV_PCM_INFO_RESUME | +- SNDRV_PCM_INFO_MMAP| +- SNDRV_PCM_INFO_MMAP_VALID | +- SNDRV_PCM_INFO_BLOCK_TRANSFER | +- SNDRV_PCM_INFO_SYNC_START), +- .formats = (SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_U16 | +- SNDRV_PCM_FMTBIT_S24 | SNDRV_PCM_FMTBIT_U24 | +- SNDRV_PCM_FMTBIT_S32 | SNDRV_PCM_FMTBIT_U32), +- .rates = (SNDRV_PCM_RATE_8000| +- SNDRV_PCM_RATE_44100 | +- SNDRV_PCM_RATE_48000), +- .rate_min = SST_MIN_RATE, +- .rate_max = SST_MAX_RATE, +- .channels_min = SST_MIN_CHANNEL, +- .channels_max = SST_MAX_CHANNEL, +- .buffer_bytes_max = SST_MAX_BUFFER, +- .period_bytes_min = SST_MIN_PERIOD_BYTES, +- .period_bytes_max = SST_MAX_PERIOD_BYTES, +- .periods_min = SST_MIN_PERIODS, +- .periods_max = SST_MAX_PERIODS, +- .fifo_size = SST_FIFO_SIZE, +-}; +- +-/* MFLD - MSIC */ +-static struct snd_soc_dai_driver sst_platform_dai[] = { +-{ +- .name = "Headset-cpu-dai", +- .id = 0, +- .playback = { +- .channels_min = SST_STEREO, +- .channels_max = SST_STEREO, +- .rates = SNDRV_PCM_RATE_48000, +- .formats = SNDRV_PCM_FMTBIT_S24_LE, +- }, +- .capture = { +- .channels_min = 1, +- .channels_max = 5, +- .rates = SNDRV_PCM_RATE_48000, +- .formats = SNDRV_PCM_FMTBIT_S24_LE, +- }, +-}, +-{ +- .name = "Speaker-cpu-dai", +- .id = 1, +- .playback = { +- .channels_min = SST_MONO, +- .channels_max = SST_STEREO, +- .rates = SNDRV_PCM_RATE_48000, +- .formats = SNDRV_PCM_FMTBIT_S24_LE, +- }, +-}, +-{ +- .name = "Vibra1-cpu-dai", +- .id = 2, +- .playback = { +- .channels_min = SST_MONO, +- .channels_max = SST_MONO, +- .rates = SNDRV_PCM_RATE_48000, +- .formats = SNDRV_PCM_FMTBIT_S24_LE, +- }, +-}, +-{ +- .name = "Vibra2-cpu-dai", +- .id = 3, +- .playback = { +- .channels_min = SST_MONO, +- .channels_max = SST_STEREO, +- .rates = SNDRV_PCM_RATE_48000, +- .formats = SNDRV_PCM_FMTBIT_S24_LE, +- }, +-}, +-{ +- .name = "Compress-cpu-dai", +- .compress_dai = 1, +- .playback = { +- .channels_min = SST_STEREO, +- .channels_max = SST_STEREO, +- .rates = SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000, +- .formats = SNDRV_PCM_FMTBIT_S16_LE, +- }, +-}, +-}; +- +-static const struct snd_soc_component_driver sst_component = { +- .name = "sst", +-}; +- +-/* helper functions */ +-static inline void sst_set_stream_status(struct sst_runtime_stream *stream, +- int state) +-{ +- unsigned long flags; +- spin_lock_irqsave(&stream->status_lock, flags); +- stream->stream_status = state; +- spin_unlock_irqrestore(&stream->status_lock, flags); +-} +- +-static inline int sst_get_stream_status(struct sst_runtime_stream *stream) +-{ +- int state; +- unsigned long flags; +- +- spin_lock_irqsave(&stream->status_lock, flags); +- state = stream->stream_status; +- spin_unlock_irqrestore(&stream->status_lock, flags); +- return state; +-} +- +-static void sst_fill_pcm_params(struct snd_pcm_substream *substream, +- struct sst_pcm_params *param) +-{ +- +- param->codec = SST_CODEC_TYPE_PCM; +- param->num_chan = (u8) substream->runtime->channels; +- param->pcm_wd_sz = substream->runtime->sample_bits; +- param->reserved = 0; +- param->sfreq = substream->runtime->rate; +- param->ring_buffer_size = snd_pcm_lib_buffer_bytes(substream); +- param->period_count = substream->runtime->period_size; +- param->ring_buffer_addr = virt_to_phys(substream->dma_buffer.area); +- pr_debug("period_cnt = %d\n", param->period_count); +- pr_debug("sfreq= %d, wd_sz = %d\n", param->sfreq, param->pcm_wd_sz); +-} +- +-static int sst_platform_alloc_stream(struct snd_pcm_substream *substream) +-{ +- struct sst_runtime_stream *stream = +- substream->runtime->private_data; +- struct sst_pcm_params param = {0}; +- struct sst_stream_params str_params = {0}; +- int ret_val; +- +- /* set codec params and inform SST driver the same */ +- sst_fill_pcm_params(substream, ¶m); +- substream->runtime->dma_area = substream->dma_buffer.area; +- str_params.sparams = param; +- str_params.codec = param.codec; +- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { +- str_params.ops = STREAM_OPS_PLAYBACK; +- str_params.device_type = substream->pcm->device + 1; +- pr_debug("Playbck stream,Device %d\n", +- substream->pcm->device); +- } else { +- str_params.ops = STREAM_OPS_CAPTURE; +- str_params.device_type = SND_SST_DEVICE_CAPTURE; +- pr_debug("Capture stream,Device %d\n", +- substream->pcm->device); +- } +- ret_val = stream->ops->open(&str_params); +- pr_debug("SST_SND_PLAY/CAPTURE ret_val = %x\n", ret_val); +- if (ret_val < 0) +- return ret_val; +- +- stream->stream_info.str_id = ret_val; +- pr_debug("str id : %d\n", stream->stream_info.str_id); +- return ret_val; +-} +- +-static void sst_period_elapsed(void *mad_substream) +-{ +- struct snd_pcm_substream *substream = mad_substream; +- struct sst_runtime_stream *stream; +- int status; +- +- if (!substream || !substream->runtime) +- return; +- stream = substream->runtime->private_data; +- if (!stream) +- return; +- status = sst_get_stream_status(stream); +- if (status != SST_PLATFORM_RUNNING) +- return; +- snd_pcm_period_elapsed(substream); +-} +- +-static int sst_platform_init_stream(struct snd_pcm_substream *substream) +-{ +- struct sst_runtime_stream *stream = +- substream->runtime->private_data; +- int ret_val; +- +- pr_debug("setting buffer ptr param\n"); +- sst_set_stream_status(stream, SST_PLATFORM_INIT); +- stream->stream_info.period_elapsed = sst_period_elapsed; +- stream->stream_info.mad_substream = substream; +- stream->stream_info.buffer_ptr = 0; +- stream->stream_info.sfreq = substream->runtime->rate; +- ret_val = stream->ops->device_control( +- SST_SND_STREAM_INIT, &stream->stream_info); +- if (ret_val) +- pr_err("control_set ret error %d\n", ret_val); +- return ret_val; +- +-} +-/* end -- helper functions */ +- +-static int sst_platform_open(struct snd_pcm_substream *substream) +-{ +- struct snd_pcm_runtime *runtime = substream->runtime; +- struct sst_runtime_stream *stream; +- int ret_val; +- +- pr_debug("sst_platform_open called\n"); +- +- snd_soc_set_runtime_hwparams(substream, &sst_platform_pcm_hw); +- ret_val = snd_pcm_hw_constraint_integer(runtime, +- SNDRV_PCM_HW_PARAM_PERIODS); +- if (ret_val < 0) +- return ret_val; +- +- stream = kzalloc(sizeof(*stream), GFP_KERNEL); +- if (!stream) +- return -ENOMEM; +- spin_lock_init(&stream->status_lock); +- +- /* get the sst ops */ +- mutex_lock(&sst_lock); +- if (!sst) { +- pr_err("no device available to run\n"); +- mutex_unlock(&sst_lock); +- kfree(stream); +- return -ENODEV; +- } +- if (!try_module_get(sst->dev->driver->owner)) { +- mutex_unlock(&sst_lock); +- kfree(stream); +- return -ENODEV; +- } +- stream->ops = sst->ops; +- mutex_unlock(&sst_lock); +- +- stream->stream_info.str_id = 0; +- sst_set_stream_status(stream, SST_PLATFORM_INIT); +- stream->stream_info.mad_substream = substream; +- /* allocate memory for SST API set */ +- runtime->private_data = stream; +- +- return 0; +-} +- +-static int sst_platform_close(struct snd_pcm_substream *substream) +-{ +- struct sst_runtime_stream *stream; +- int ret_val = 0, str_id; +- +- pr_debug("sst_platform_close called\n"); +- stream = substream->runtime->private_data; +- str_id = stream->stream_info.str_id; +- if (str_id) +- ret_val = stream->ops->close(str_id); +- module_put(sst->dev->driver->owner); +- kfree(stream); +- return ret_val; +-} +- +-static int sst_platform_pcm_prepare(struct snd_pcm_substream *substream) +-{ +- struct sst_runtime_stream *stream; +- int ret_val = 0, str_id; +- +- pr_debug("sst_platform_pcm_prepare called\n"); +- stream = substream->runtime->private_data; +- str_id = stream->stream_info.str_id; +- if (stream->stream_info.str_id) { +- ret_val = stream->ops->device_control( +- SST_SND_DROP, &str_id); +- return ret_val; +- } +- +- ret_val = sst_platform_alloc_stream(substream); +- if (ret_val < 0) +- return ret_val; +- snprintf(substream->pcm->id, sizeof(substream->pcm->id), +- "%d", stream->stream_info.str_id); +- +- ret_val = sst_platform_init_stream(substream); +- if (ret_val) +- return ret_val; +- substream->runtime->hw.info = SNDRV_PCM_INFO_BLOCK_TRANSFER; +- return ret_val; +-} +- +-static int sst_platform_pcm_trigger(struct snd_pcm_substream *substream, +- int cmd) +-{ +- int ret_val = 0, str_id; +- struct sst_runtime_stream *stream; +- int str_cmd, status; +- +- pr_debug("sst_platform_pcm_trigger called\n"); +- stream = substream->runtime->private_data; +- str_id = stream->stream_info.str_id; +- switch (cmd) { +- case SNDRV_PCM_TRIGGER_START: +- pr_debug("sst: Trigger Start\n"); +- str_cmd = SST_SND_START; +- status = SST_PLATFORM_RUNNING; +- stream->stream_info.mad_substream = substream; +- break; +- case SNDRV_PCM_TRIGGER_STOP: +- pr_debug("sst: in stop\n"); +- str_cmd = SST_SND_DROP; +- status = SST_PLATFORM_DROPPED; +- break; +- case SNDRV_PCM_TRIGGER_PAUSE_PUSH: +- pr_debug("sst: in pause\n"); +- str_cmd = SST_SND_PAUSE; +- status = SST_PLATFORM_PAUSED; +- break; +- case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: +- pr_debug("sst: in pause release\n"); +- str_cmd = SST_SND_RESUME; +- status = SST_PLATFORM_RUNNING; +- break; +- default: +- return -EINVAL; +- } +- ret_val = stream->ops->device_control(str_cmd, &str_id); +- if (!ret_val) +- sst_set_stream_status(stream, status); +- +- return ret_val; +-} +- +- +-static snd_pcm_uframes_t sst_platform_pcm_pointer +- (struct snd_pcm_substream *substream) +-{ +- struct sst_runtime_stream *stream; +- int ret_val, status; +- struct pcm_stream_info *str_info; +- +- stream = substream->runtime->private_data; +- status = sst_get_stream_status(stream); +- if (status == SST_PLATFORM_INIT) +- return 0; +- str_info = &stream->stream_info; +- ret_val = stream->ops->device_control( +- SST_SND_BUFFER_POINTER, str_info); +- if (ret_val) { +- pr_err("sst: error code = %d\n", ret_val); +- return ret_val; +- } +- return stream->stream_info.buffer_ptr; +-} +- +-static int sst_platform_pcm_hw_params(struct snd_pcm_substream *substream, +- struct snd_pcm_hw_params *params) +-{ +- snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); +- memset(substream->runtime->dma_area, 0, params_buffer_bytes(params)); +- +- return 0; +-} +- +-static int sst_platform_pcm_hw_free(struct snd_pcm_substream *substream) +-{ +- return snd_pcm_lib_free_pages(substream); +-} +- +-static struct snd_pcm_ops sst_platform_ops = { +- .open = sst_platform_open, +- .close = sst_platform_close, +- .ioctl = snd_pcm_lib_ioctl, +- .prepare = sst_platform_pcm_prepare, +- .trigger = sst_platform_pcm_trigger, +- .pointer = sst_platform_pcm_pointer, +- .hw_params = sst_platform_pcm_hw_params, +- .hw_free = sst_platform_pcm_hw_free, +-}; +- +-static void sst_pcm_free(struct snd_pcm *pcm) +-{ +- pr_debug("sst_pcm_free called\n"); +- snd_pcm_lib_preallocate_free_for_all(pcm); +-} +- +-static int sst_pcm_new(struct snd_soc_pcm_runtime *rtd) +-{ +- struct snd_pcm *pcm = rtd->pcm; +- int retval = 0; +- +- pr_debug("sst_pcm_new called\n"); +- if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream || +- pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { +- retval = snd_pcm_lib_preallocate_pages_for_all(pcm, +- SNDRV_DMA_TYPE_CONTINUOUS, +- snd_dma_continuous_data(GFP_KERNEL), +- SST_MIN_BUFFER, SST_MAX_BUFFER); +- if (retval) { +- pr_err("dma buffer allocationf fail\n"); +- return retval; +- } +- } +- return retval; +-} +- +-/* compress stream operations */ +-static void sst_compr_fragment_elapsed(void *arg) +-{ +- struct snd_compr_stream *cstream = (struct snd_compr_stream *)arg; +- +- pr_debug("fragment elapsed by driver\n"); +- if (cstream) +- snd_compr_fragment_elapsed(cstream); +-} +- +-static int sst_platform_compr_open(struct snd_compr_stream *cstream) +-{ +- +- int ret_val = 0; +- struct snd_compr_runtime *runtime = cstream->runtime; +- struct sst_runtime_stream *stream; +- +- stream = kzalloc(sizeof(*stream), GFP_KERNEL); +- if (!stream) +- return -ENOMEM; +- +- spin_lock_init(&stream->status_lock); +- +- /* get the sst ops */ +- if (!sst || !try_module_get(sst->dev->driver->owner)) { +- pr_err("no device available to run\n"); +- ret_val = -ENODEV; +- goto out_ops; +- } +- stream->compr_ops = sst->compr_ops; +- +- stream->id = 0; +- sst_set_stream_status(stream, SST_PLATFORM_INIT); +- runtime->private_data = stream; +- return 0; +-out_ops: +- kfree(stream); +- return ret_val; +-} +- +-static int sst_platform_compr_free(struct snd_compr_stream *cstream) +-{ +- struct sst_runtime_stream *stream; +- int ret_val = 0, str_id; +- +- stream = cstream->runtime->private_data; +- /*need to check*/ +- str_id = stream->id; +- if (str_id) +- ret_val = stream->compr_ops->close(str_id); +- module_put(sst->dev->driver->owner); +- kfree(stream); +- pr_debug("%s: %d\n", __func__, ret_val); +- return 0; +-} +- +-static int sst_platform_compr_set_params(struct snd_compr_stream *cstream, +- struct snd_compr_params *params) +-{ +- struct sst_runtime_stream *stream; +- int retval; +- struct snd_sst_params str_params; +- struct sst_compress_cb cb; +- +- stream = cstream->runtime->private_data; +- /* construct fw structure for this*/ +- memset(&str_params, 0, sizeof(str_params)); +- +- str_params.ops = STREAM_OPS_PLAYBACK; +- str_params.stream_type = SST_STREAM_TYPE_MUSIC; +- str_params.device_type = SND_SST_DEVICE_COMPRESS; +- +- switch (params->codec.id) { +- case SND_AUDIOCODEC_MP3: { +- str_params.codec = SST_CODEC_TYPE_MP3; +- str_params.sparams.uc.mp3_params.codec = SST_CODEC_TYPE_MP3; +- str_params.sparams.uc.mp3_params.num_chan = params->codec.ch_in; +- str_params.sparams.uc.mp3_params.pcm_wd_sz = 16; +- break; +- } +- +- case SND_AUDIOCODEC_AAC: { +- str_params.codec = SST_CODEC_TYPE_AAC; +- str_params.sparams.uc.aac_params.codec = SST_CODEC_TYPE_AAC; +- str_params.sparams.uc.aac_params.num_chan = params->codec.ch_in; +- str_params.sparams.uc.aac_params.pcm_wd_sz = 16; +- if (params->codec.format == SND_AUDIOSTREAMFORMAT_MP4ADTS) +- str_params.sparams.uc.aac_params.bs_format = +- AAC_BIT_STREAM_ADTS; +- else if (params->codec.format == SND_AUDIOSTREAMFORMAT_RAW) +- str_params.sparams.uc.aac_params.bs_format = +- AAC_BIT_STREAM_RAW; +- else { +- pr_err("Undefined format%d\n", params->codec.format); +- return -EINVAL; +- } +- str_params.sparams.uc.aac_params.externalsr = +- params->codec.sample_rate; +- break; +- } +- +- default: +- pr_err("codec not supported, id =%d\n", params->codec.id); +- return -EINVAL; +- } +- +- str_params.aparams.ring_buf_info[0].addr = +- virt_to_phys(cstream->runtime->buffer); +- str_params.aparams.ring_buf_info[0].size = +- cstream->runtime->buffer_size; +- str_params.aparams.sg_count = 1; +- str_params.aparams.frag_size = cstream->runtime->fragment_size; +- +- cb.param = cstream; +- cb.compr_cb = sst_compr_fragment_elapsed; +- +- retval = stream->compr_ops->open(&str_params, &cb); +- if (retval < 0) { +- pr_err("stream allocation failed %d\n", retval); +- return retval; +- } +- +- stream->id = retval; +- return 0; +-} +- +-static int sst_platform_compr_trigger(struct snd_compr_stream *cstream, int cmd) +-{ +- struct sst_runtime_stream *stream = +- cstream->runtime->private_data; +- +- return stream->compr_ops->control(cmd, stream->id); +-} +- +-static int sst_platform_compr_pointer(struct snd_compr_stream *cstream, +- struct snd_compr_tstamp *tstamp) +-{ +- struct sst_runtime_stream *stream; +- +- stream = cstream->runtime->private_data; +- stream->compr_ops->tstamp(stream->id, tstamp); +- tstamp->byte_offset = tstamp->copied_total % +- (u32)cstream->runtime->buffer_size; +- pr_debug("calc bytes offset/copied bytes as %d\n", tstamp->byte_offset); +- return 0; +-} +- +-static int sst_platform_compr_ack(struct snd_compr_stream *cstream, +- size_t bytes) +-{ +- struct sst_runtime_stream *stream; +- +- stream = cstream->runtime->private_data; +- stream->compr_ops->ack(stream->id, (unsigned long)bytes); +- stream->bytes_written += bytes; +- +- return 0; +-} +- +-static int sst_platform_compr_get_caps(struct snd_compr_stream *cstream, +- struct snd_compr_caps *caps) +-{ +- struct sst_runtime_stream *stream = +- cstream->runtime->private_data; +- +- return stream->compr_ops->get_caps(caps); +-} +- +-static int sst_platform_compr_get_codec_caps(struct snd_compr_stream *cstream, +- struct snd_compr_codec_caps *codec) +-{ +- struct sst_runtime_stream *stream = +- cstream->runtime->private_data; +- +- return stream->compr_ops->get_codec_caps(codec); +-} +- +-static int sst_platform_compr_set_metadata(struct snd_compr_stream *cstream, +- struct snd_compr_metadata *metadata) +-{ +- struct sst_runtime_stream *stream = +- cstream->runtime->private_data; +- +- return stream->compr_ops->set_metadata(stream->id, metadata); +-} +- +-static struct snd_compr_ops sst_platform_compr_ops = { +- +- .open = sst_platform_compr_open, +- .free = sst_platform_compr_free, +- .set_params = sst_platform_compr_set_params, +- .set_metadata = sst_platform_compr_set_metadata, +- .trigger = sst_platform_compr_trigger, +- .pointer = sst_platform_compr_pointer, +- .ack = sst_platform_compr_ack, +- .get_caps = sst_platform_compr_get_caps, +- .get_codec_caps = sst_platform_compr_get_codec_caps, +-}; +- +-static struct snd_soc_platform_driver sst_soc_platform_drv = { +- .ops = &sst_platform_ops, +- .compr_ops = &sst_platform_compr_ops, +- .pcm_new = sst_pcm_new, +- .pcm_free = sst_pcm_free, +-}; +- +-static int sst_platform_probe(struct platform_device *pdev) +-{ +- int ret; +- +- pr_debug("sst_platform_probe called\n"); +- sst = NULL; +- ret = snd_soc_register_platform(&pdev->dev, &sst_soc_platform_drv); +- if (ret) { +- pr_err("registering soc platform failed\n"); +- return ret; +- } +- +- ret = snd_soc_register_component(&pdev->dev, &sst_component, +- sst_platform_dai, ARRAY_SIZE(sst_platform_dai)); +- if (ret) { +- pr_err("registering cpu dais failed\n"); +- snd_soc_unregister_platform(&pdev->dev); +- } +- return ret; +-} +- +-static int sst_platform_remove(struct platform_device *pdev) +-{ +- +- snd_soc_unregister_component(&pdev->dev); +- snd_soc_unregister_platform(&pdev->dev); +- pr_debug("sst_platform_remove success\n"); +- return 0; +-} +- +-static struct platform_driver sst_platform_driver = { +- .driver = { +- .name = "sst-platform", +- .owner = THIS_MODULE, +- }, +- .probe = sst_platform_probe, +- .remove = sst_platform_remove, +-}; +- +-module_platform_driver(sst_platform_driver); +- +-MODULE_DESCRIPTION("ASoC Intel(R) MID Platform driver"); +-MODULE_AUTHOR("Vinod Koul "); +-MODULE_AUTHOR("Harsha Priya "); +-MODULE_LICENSE("GPL v2"); +-MODULE_ALIAS("platform:sst-platform"); +diff --git a/sound/soc/mid-x86/sst_platform.h b/sound/soc/mid-x86/sst_platform.h +deleted file mode 100644 +index cacc906..0000000 +--- a/sound/soc/mid-x86/sst_platform.h ++++ /dev/null +@@ -1,157 +0,0 @@ +-/* +- * sst_platform.h - Intel MID Platform driver header file +- * +- * Copyright (C) 2010 Intel Corp +- * Author: Vinod Koul +- * Author: Harsha Priya +- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; version 2 of the License. +- * +- * This program is distributed in the hope that it will be useful, but +- * WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +- * General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License along +- * with this program; if not, write to the Free Software Foundation, Inc., +- * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +- * +- * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +- * +- * +- */ +- +-#ifndef __SST_PLATFORMDRV_H__ +-#define __SST_PLATFORMDRV_H__ +- +-#include "sst_dsp.h" +- +-#define SST_MONO 1 +-#define SST_STEREO 2 +-#define SST_MAX_CAP 5 +- +-#define SST_MIN_RATE 8000 +-#define SST_MAX_RATE 48000 +-#define SST_MIN_CHANNEL 1 +-#define SST_MAX_CHANNEL 5 +-#define SST_MAX_BUFFER (800*1024) +-#define SST_MIN_BUFFER (800*1024) +-#define SST_MIN_PERIOD_BYTES 32 +-#define SST_MAX_PERIOD_BYTES SST_MAX_BUFFER +-#define SST_MIN_PERIODS 2 +-#define SST_MAX_PERIODS (1024*2) +-#define SST_FIFO_SIZE 0 +- +-struct pcm_stream_info { +- int str_id; +- void *mad_substream; +- void (*period_elapsed) (void *mad_substream); +- unsigned long long buffer_ptr; +- int sfreq; +-}; +- +-enum sst_drv_status { +- SST_PLATFORM_INIT = 1, +- SST_PLATFORM_STARTED, +- SST_PLATFORM_RUNNING, +- SST_PLATFORM_PAUSED, +- SST_PLATFORM_DROPPED, +-}; +- +-enum sst_controls { +- SST_SND_ALLOC = 0x00, +- SST_SND_PAUSE = 0x01, +- SST_SND_RESUME = 0x02, +- SST_SND_DROP = 0x03, +- SST_SND_FREE = 0x04, +- SST_SND_BUFFER_POINTER = 0x05, +- SST_SND_STREAM_INIT = 0x06, +- SST_SND_START = 0x07, +- SST_MAX_CONTROLS = 0x07, +-}; +- +-enum sst_stream_ops { +- STREAM_OPS_PLAYBACK = 0, +- STREAM_OPS_CAPTURE, +-}; +- +-enum sst_audio_device_type { +- SND_SST_DEVICE_HEADSET = 1, +- SND_SST_DEVICE_IHF, +- SND_SST_DEVICE_VIBRA, +- SND_SST_DEVICE_HAPTIC, +- SND_SST_DEVICE_CAPTURE, +- SND_SST_DEVICE_COMPRESS, +-}; +- +-/* PCM Parameters */ +-struct sst_pcm_params { +- u16 codec; /* codec type */ +- u8 num_chan; /* 1=Mono, 2=Stereo */ +- u8 pcm_wd_sz; /* 16/24 - bit*/ +- u32 reserved; /* Bitrate in bits per second */ +- u32 sfreq; /* Sampling rate in Hz */ +- u32 ring_buffer_size; +- u32 period_count; /* period elapsed in samples*/ +- u32 ring_buffer_addr; +-}; +- +-struct sst_stream_params { +- u32 result; +- u32 stream_id; +- u8 codec; +- u8 ops; +- u8 stream_type; +- u8 device_type; +- struct sst_pcm_params sparams; +-}; +- +-struct sst_compress_cb { +- void *param; +- void (*compr_cb)(void *param); +-}; +- +-struct compress_sst_ops { +- const char *name; +- int (*open) (struct snd_sst_params *str_params, +- struct sst_compress_cb *cb); +- int (*control) (unsigned int cmd, unsigned int str_id); +- int (*tstamp) (unsigned int str_id, struct snd_compr_tstamp *tstamp); +- int (*ack) (unsigned int str_id, unsigned long bytes); +- int (*close) (unsigned int str_id); +- int (*get_caps) (struct snd_compr_caps *caps); +- int (*get_codec_caps) (struct snd_compr_codec_caps *codec); +- int (*set_metadata) (unsigned int str_id, +- struct snd_compr_metadata *mdata); +- +-}; +- +-struct sst_ops { +- int (*open) (struct sst_stream_params *str_param); +- int (*device_control) (int cmd, void *arg); +- int (*close) (unsigned int str_id); +-}; +- +-struct sst_runtime_stream { +- int stream_status; +- unsigned int id; +- size_t bytes_written; +- struct pcm_stream_info stream_info; +- struct sst_ops *ops; +- struct compress_sst_ops *compr_ops; +- spinlock_t status_lock; +-}; +- +-struct sst_device { +- char *name; +- struct device *dev; +- struct sst_ops *ops; +- struct compress_sst_ops *compr_ops; +-}; +- +-int sst_register_dsp(struct sst_device *sst); +-int sst_unregister_dsp(struct sst_device *sst); +-#endif +diff --git a/sound/soc/soc-compress.c b/sound/soc/soc-compress.c +index 06a8000..7201146 100644 +--- a/sound/soc/soc-compress.c ++++ b/sound/soc/soc-compress.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + + static int soc_compr_open(struct snd_compr_stream *cstream) + { +@@ -75,6 +76,98 @@ out: + return ret; + } + ++static int soc_compr_open_fe(struct snd_compr_stream *cstream) ++{ ++ struct snd_soc_pcm_runtime *fe = cstream->private_data; ++ struct snd_pcm_substream *fe_substream = fe->pcm->streams[0].substream; ++ struct snd_soc_platform *platform = fe->platform; ++ struct snd_soc_dai *cpu_dai = fe->cpu_dai; ++ struct snd_soc_dai *codec_dai = fe->codec_dai; ++ struct snd_soc_dpcm *dpcm; ++ struct snd_soc_dapm_widget_list *list; ++ int stream; ++ int ret = 0; ++ ++ if (cstream->direction == SND_COMPRESS_PLAYBACK) ++ stream = SNDRV_PCM_STREAM_PLAYBACK; ++ else ++ stream = SNDRV_PCM_STREAM_CAPTURE; ++ ++ mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); ++ ++ if (platform->driver->compr_ops && platform->driver->compr_ops->open) { ++ ret = platform->driver->compr_ops->open(cstream); ++ if (ret < 0) { ++ pr_err("compress asoc: can't open platform %s\n", platform->name); ++ goto out; ++ } ++ } ++ ++ if (fe->dai_link->compr_ops && fe->dai_link->compr_ops->startup) { ++ ret = fe->dai_link->compr_ops->startup(cstream); ++ if (ret < 0) { ++ pr_err("compress asoc: %s startup failed\n", fe->dai_link->name); ++ goto machine_err; ++ } ++ } ++ ++ fe->dpcm[stream].runtime = fe_substream->runtime; ++ ++ if (dpcm_path_get(fe, stream, &list) <= 0) { ++ dev_dbg(fe->dev, "ASoC: %s no valid %s route\n", ++ fe->dai_link->name, stream ? "capture" : "playback"); ++ } ++ ++ /* calculate valid and active FE <-> BE dpcms */ ++ dpcm_process_paths(fe, stream, &list, 1); ++ ++ fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_FE; ++ ++ ret = dpcm_be_dai_startup(fe, stream); ++ if (ret < 0) { ++ /* clean up all links */ ++ list_for_each_entry(dpcm, &fe->dpcm[stream].be_clients, list_be) ++ dpcm->state = SND_SOC_DPCM_LINK_STATE_FREE; ++ ++ dpcm_be_disconnect(fe, stream); ++ fe->dpcm[stream].runtime = NULL; ++ goto fe_err; ++ } ++ ++ dpcm_clear_pending_state(fe, stream); ++ dpcm_path_put(&list); ++ ++ fe->dpcm[stream].state = SND_SOC_DPCM_STATE_OPEN; ++ fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; ++ ++ if (cstream->direction == SND_COMPRESS_PLAYBACK) { ++ cpu_dai->playback_active++; ++ codec_dai->playback_active++; ++ } else { ++ cpu_dai->capture_active++; ++ codec_dai->capture_active++; ++ } ++ ++ cpu_dai->active++; ++ codec_dai->active++; ++ fe->codec->active++; ++ ++ mutex_unlock(&fe->card->mutex); ++ ++ return 0; ++ ++fe_err: ++ if (fe->dai_link->compr_ops && fe->dai_link->compr_ops->shutdown) ++ fe->dai_link->compr_ops->shutdown(cstream); ++machine_err: ++ if (platform->driver->compr_ops && platform->driver->compr_ops->free) ++ platform->driver->compr_ops->free(cstream); ++out: ++ fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; ++ mutex_unlock(&fe->card->mutex); ++ return ret; ++} ++ + /* + * Power down the audio subsystem pmdown_time msecs after close is called. + * This is to ensure there are no pops or clicks in between any music tracks +@@ -88,18 +181,17 @@ static void close_delayed_work(struct work_struct *work) + + mutex_lock_nested(&rtd->pcm_mutex, rtd->pcm_subclass); + +- dev_dbg(rtd->dev, "ASoC: pop wq checking: %s status: %s waiting: %s\n", +- codec_dai->driver->playback.stream_name, +- codec_dai->playback_active ? "active" : "inactive", +- rtd->pop_wait ? "yes" : "no"); ++ dev_dbg (rtd->dev, "ASoC: pop wq checking: %s status: %s waiting: %s\n", ++ codec_dai->driver->playback.stream_name, ++ codec_dai->playback_active ? "active" : "inactive", ++ rtd->pop_wait ? "yes" : "no"); + + /* are we waiting on this codec DAI stream */ +- if (rtd->pop_wait == 1) { ++ if (rtd->pop_wait == 1 && !codec_dai->active) { + rtd->pop_wait = 0; + snd_soc_dapm_stream_event(rtd, SNDRV_PCM_STREAM_PLAYBACK, + SND_SOC_DAPM_STREAM_STOP); + } +- + mutex_unlock(&rtd->pcm_mutex); + } + +@@ -120,8 +212,8 @@ static int soc_compr_free(struct snd_compr_stream *cstream) + cpu_dai->capture_active--; + codec_dai->capture_active--; + } +- +- snd_soc_dai_digital_mute(codec_dai, 1, cstream->direction); ++ if (!codec_dai->playback_active) ++ snd_soc_dai_digital_mute(codec_dai, 1, cstream->direction); + + cpu_dai->active--; + codec_dai->active--; +@@ -133,7 +225,6 @@ static int soc_compr_free(struct snd_compr_stream *cstream) + if (!codec_dai->active) + codec_dai->rate = 0; + +- + if (rtd->dai_link->compr_ops && rtd->dai_link->compr_ops->shutdown) + rtd->dai_link->compr_ops->shutdown(cstream); + +@@ -141,7 +232,8 @@ static int soc_compr_free(struct snd_compr_stream *cstream) + platform->driver->compr_ops->free(cstream); + cpu_dai->runtime = NULL; + +- if (cstream->direction == SND_COMPRESS_PLAYBACK) { ++ if (cstream->direction == SND_COMPRESS_PLAYBACK ++ && !codec_dai->playback_active) { + if (!rtd->pmdown_time || codec->ignore_pmdown_time || + rtd->dai_link->ignore_pmdown_time) { + snd_soc_dapm_stream_event(rtd, +@@ -152,7 +244,8 @@ static int soc_compr_free(struct snd_compr_stream *cstream) + schedule_delayed_work(&rtd->delayed_work, + msecs_to_jiffies(rtd->pmdown_time)); + } +- } else { ++ } else if (cstream->direction == SND_COMPRESS_CAPTURE ++ && !codec_dai->capture_active) { + /* capture streams can be powered down now */ + snd_soc_dapm_stream_event(rtd, + SNDRV_PCM_STREAM_CAPTURE, +@@ -163,15 +256,97 @@ static int soc_compr_free(struct snd_compr_stream *cstream) + return 0; + } + ++static int soc_compr_free_fe(struct snd_compr_stream *cstream) ++{ ++ struct snd_soc_pcm_runtime *fe = cstream->private_data; ++ struct snd_soc_platform *platform = fe->platform; ++ struct snd_soc_dai *cpu_dai = fe->cpu_dai; ++ struct snd_soc_dai *codec_dai = fe->codec_dai; ++ struct snd_soc_dpcm *dpcm; ++ int stream, ret; ++ ++ mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); ++ ++ if (cstream->direction == SND_COMPRESS_PLAYBACK) { ++ stream = SNDRV_PCM_STREAM_PLAYBACK; ++ cpu_dai->playback_active--; ++ codec_dai->playback_active--; ++ } else { ++ stream = SNDRV_PCM_STREAM_CAPTURE; ++ cpu_dai->capture_active--; ++ codec_dai->capture_active--; ++ } ++ ++ cpu_dai->active--; ++ codec_dai->active--; ++ fe->codec->active--; ++ ++ snd_soc_dai_digital_mute(cpu_dai, 1, stream); ++ ++ fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_FE; ++ ++ ret = dpcm_be_dai_hw_free(fe, stream); ++ if (ret < 0) ++ dev_err(fe->dev, "compressed hw_free failed %d\n", ret); ++ ++ ret = dpcm_be_dai_shutdown(fe, stream); ++ ++ /* mark FE's links ready to prune */ ++ list_for_each_entry(dpcm, &fe->dpcm[stream].be_clients, list_be) ++ dpcm->state = SND_SOC_DPCM_LINK_STATE_FREE; ++ ++ if (stream == SNDRV_PCM_STREAM_PLAYBACK) ++ dpcm_dapm_stream_event(fe, stream, SND_SOC_DAPM_STREAM_STOP); ++ else ++ dpcm_dapm_stream_event(fe, stream, SND_SOC_DAPM_STREAM_STOP); ++ ++ fe->dpcm[stream].state = SND_SOC_DPCM_STATE_CLOSE; ++ fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; ++ ++ dpcm_be_disconnect(fe, stream); ++ ++ fe->dpcm[stream].runtime = NULL; ++ ++ if (fe->dai_link->compr_ops && fe->dai_link->compr_ops->shutdown) ++ fe->dai_link->compr_ops->shutdown(cstream); ++ ++ if (platform->driver->compr_ops && platform->driver->compr_ops->free) ++ platform->driver->compr_ops->free(cstream); ++ ++ mutex_unlock(&fe->card->mutex); ++ return 0; ++} ++ + static int soc_compr_trigger(struct snd_compr_stream *cstream, int cmd) + { + + struct snd_soc_pcm_runtime *rtd = cstream->private_data; + struct snd_soc_platform *platform = rtd->platform; +- struct snd_soc_dai *codec_dai = rtd->codec_dai; + int ret = 0; + +- mutex_lock_nested(&rtd->pcm_mutex, rtd->pcm_subclass); ++ if (platform->driver->compr_ops && platform->driver->compr_ops->trigger) { ++ ret = platform->driver->compr_ops->trigger(cstream, cmd); ++ if (ret < 0) ++ goto out; ++ } ++ ++out: ++ return ret; ++} ++ ++static int soc_compr_trigger_fe(struct snd_compr_stream *cstream, int cmd) ++{ ++ struct snd_soc_pcm_runtime *fe = cstream->private_data; ++ struct snd_soc_platform *platform = fe->platform; ++ int ret = 0, stream; ++ ++ if (cstream->direction == SND_COMPRESS_PLAYBACK) ++ stream = SNDRV_PCM_STREAM_PLAYBACK; ++ else ++ stream = SNDRV_PCM_STREAM_CAPTURE; ++ ++ ++ mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); + + if (platform->driver->compr_ops && platform->driver->compr_ops->trigger) { + ret = platform->driver->compr_ops->trigger(cstream, cmd); +@@ -179,17 +354,28 @@ static int soc_compr_trigger(struct snd_compr_stream *cstream, int cmd) + goto out; + } + ++ fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_FE; ++ ++ ret = dpcm_be_dai_trigger(fe, stream, cmd); ++ + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: +- snd_soc_dai_digital_mute(codec_dai, 0, cstream->direction); ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ fe->dpcm[stream].state = SND_SOC_DPCM_STATE_START; + break; + case SNDRV_PCM_TRIGGER_STOP: +- snd_soc_dai_digital_mute(codec_dai, 1, cstream->direction); ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ fe->dpcm[stream].state = SND_SOC_DPCM_STATE_STOP; ++ break; ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ fe->dpcm[stream].state = SND_SOC_DPCM_STATE_PAUSED; + break; + } + + out: +- mutex_unlock(&rtd->pcm_mutex); ++ fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; ++ mutex_unlock(&fe->card->mutex); + return ret; + } + +@@ -220,23 +406,88 @@ static int soc_compr_set_params(struct snd_compr_stream *cstream, + goto err; + } + +- if (cstream->direction == SND_COMPRESS_PLAYBACK) +- snd_soc_dapm_stream_event(rtd, SNDRV_PCM_STREAM_PLAYBACK, +- SND_SOC_DAPM_STREAM_START); +- else +- snd_soc_dapm_stream_event(rtd, SNDRV_PCM_STREAM_CAPTURE, ++ /* cancel any delayed stream shutdown that is pending */ ++ if (cstream->direction == SND_COMPRESS_PLAYBACK ++ && rtd->pop_wait) { ++ rtd->pop_wait = 0; ++ cancel_delayed_work(&rtd->delayed_work); ++ } ++ ++ snd_soc_dapm_stream_event(rtd, SNDRV_PCM_STREAM_PLAYBACK, + SND_SOC_DAPM_STREAM_START); + +- /* cancel any delayed stream shutdown that is pending */ +- rtd->pop_wait = 0; ++ snd_soc_dai_digital_mute(rtd->codec_dai, 0, cstream->direction); ++err: + mutex_unlock(&rtd->pcm_mutex); ++ return ret; ++} + +- cancel_delayed_work_sync(&rtd->delayed_work); ++static int soc_compr_set_params_fe(struct snd_compr_stream *cstream, ++ struct snd_compr_params *params) ++{ ++ struct snd_soc_pcm_runtime *fe = cstream->private_data; ++ struct snd_pcm_substream *fe_substream = fe->pcm->streams[0].substream; ++ struct snd_soc_platform *platform = fe->platform; ++ struct snd_soc_dai *cpu_dai = fe->cpu_dai; ++ struct snd_soc_dai *codec_dai = fe->codec_dai; + +- return ret; ++ struct snd_pcm_hw_params *hw_params; ++ int ret = 0, stream; + +-err: +- mutex_unlock(&rtd->pcm_mutex); ++ if (cstream->direction == SND_COMPRESS_PLAYBACK) ++ stream = SNDRV_PCM_STREAM_PLAYBACK; ++ else ++ stream = SNDRV_PCM_STREAM_CAPTURE; ++ ++ hw_params = kzalloc(sizeof(*hw_params), GFP_KERNEL); ++ if (hw_params == NULL) ++ return -ENOMEM; ++ ++ mutex_lock_nested(&fe->card->mutex, SND_SOC_CARD_CLASS_RUNTIME); ++ ++ /* first we call set_params for the platform driver ++ * this should configure the soc side ++ * if the machine has compressed ops then we call that as well ++ * expectation is that platform and machine will configure everything ++ * for this compress path, like configuring pcm port for codec ++ */ ++ if (platform->driver->compr_ops && platform->driver->compr_ops->set_params) { ++ ret = platform->driver->compr_ops->set_params(cstream, params); ++ if (ret < 0) ++ goto out; ++ } ++ ++ if (fe->dai_link->compr_ops && fe->dai_link->compr_ops->set_params) { ++ ret = fe->dai_link->compr_ops->set_params(cstream); ++ if (ret < 0) ++ goto out; ++ } ++ ++ memcpy(&fe->dpcm[fe_substream->stream].hw_params, params, ++ sizeof(struct snd_pcm_hw_params)); ++ ++ fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_FE; ++ ++ ret = dpcm_be_dai_hw_params(fe, stream); ++ if (ret < 0) ++ goto out; ++ ++ ret = dpcm_be_dai_prepare(fe, stream); ++ if (ret < 0) ++ goto out; ++ ++ if (stream == SNDRV_PCM_STREAM_PLAYBACK) ++ dpcm_dapm_stream_event(fe, stream, SND_SOC_DAPM_STREAM_START); ++ else ++ dpcm_dapm_stream_event(fe, stream, SND_SOC_DAPM_STREAM_START); ++ ++ fe->dpcm[stream].state = SND_SOC_DPCM_STATE_PREPARE; ++ ++ snd_soc_dai_digital_mute(cpu_dai, 0, stream); ++ ++out: ++ fe->dpcm[stream].runtime_update = SND_SOC_DPCM_UPDATE_NO; ++ mutex_unlock(&fe->card->mutex); + return ret; + } + +@@ -359,6 +610,7 @@ static int sst_compr_get_metadata(struct snd_compr_stream *cstream, + + return ret; + } ++ + /* ASoC Compress operations */ + static struct snd_compr_ops soc_compr_ops = { + .open = soc_compr_open, +@@ -374,6 +626,21 @@ static struct snd_compr_ops soc_compr_ops = { + .get_codec_caps = soc_compr_get_codec_caps + }; + ++/* ASoC Dynamic Compress operations */ ++static struct snd_compr_ops soc_compr_dyn_ops = { ++ .open = soc_compr_open_fe, ++ .free = soc_compr_free_fe, ++ .set_params = soc_compr_set_params_fe, ++ .get_params = soc_compr_get_params, ++ .set_metadata = sst_compr_set_metadata, ++ .get_metadata = sst_compr_get_metadata, ++ .trigger = soc_compr_trigger_fe, ++ .pointer = soc_compr_pointer, ++ .ack = soc_compr_ack, ++ .get_caps = soc_compr_get_caps, ++ .get_codec_caps = soc_compr_get_codec_caps ++}; ++ + /* create a new compress */ + int soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) + { +@@ -382,6 +649,7 @@ int soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) + struct snd_soc_dai *codec_dai = rtd->codec_dai; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_compr *compr; ++ struct snd_pcm *be_pcm; + char new_name[64]; + int ret = 0, direction = 0; + +@@ -409,7 +677,26 @@ int soc_new_compress(struct snd_soc_pcm_runtime *rtd, int num) + ret = -ENOMEM; + goto compr_err; + } +- memcpy(compr->ops, &soc_compr_ops, sizeof(soc_compr_ops)); ++ ++ if (rtd->dai_link->dynamic) { ++ snprintf(new_name, sizeof(new_name), "(%s)", ++ rtd->dai_link->stream_name); ++ ++ ret = snd_pcm_new_internal(rtd->card->snd_card, new_name, num, ++ 1, 0, &be_pcm); ++ if (ret < 0) { ++ dev_err(rtd->card->dev, "ASoC: can't create compressed for %s\n", ++ rtd->dai_link->name); ++ goto compr_err; ++ } ++ ++ rtd->pcm = be_pcm; ++ rtd->fe_compr = 1; ++ be_pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->private_data = rtd; ++ /*be_pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream->private_data = rtd;*/ ++ memcpy(compr->ops, &soc_compr_dyn_ops, sizeof(soc_compr_dyn_ops)); ++ } else ++ memcpy(compr->ops, &soc_compr_ops, sizeof(soc_compr_ops)); + + /* Add copy callback for not memory mapped DSPs */ + if (platform->driver->compr_ops && platform->driver->compr_ops->copy) +diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c +index d56bbea..717e6e9 100644 +--- a/sound/soc/soc-core.c ++++ b/sound/soc/soc-core.c +@@ -530,6 +530,15 @@ static int soc_ac97_dev_register(struct snd_soc_codec *codec) + } + #endif + ++static void codec2codec_close_delayed_work(struct work_struct *work) ++{ ++ /* Currently nothing to do for c2c links ++ * Since c2c links are internal nodes in the DAPM graph and ++ * don't interface with the outside world or application layer ++ * we don't have to do any special handling on close. ++ */ ++} ++ + #ifdef CONFIG_PM_SLEEP + /* powers down audio subsystem for suspend */ + int snd_soc_suspend(struct device *dev) +@@ -1163,6 +1172,11 @@ static int soc_probe_platform(struct snd_soc_card *card, + if (dai->dev != platform->dev) + continue; + ++ /* dummy platform doesn't have and DAIs, don't add dummy-codec ++ * widgets here (since dev is the same) ++ */ ++ if (!strcmp(dai->name, "snd-soc-dummy-dai")) ++ continue; + snd_soc_dapm_new_dai_widgets(&platform->dapm, dai); + } + +@@ -1224,9 +1238,6 @@ static int soc_post_component_init(struct snd_soc_card *card, + } + rtd->card = card; + +- /* Make sure all DAPM widgets are instantiated */ +- snd_soc_dapm_new_widgets(&codec->dapm); +- + /* machine controls, routes and widgets are not prefixed */ + temp = codec->name_prefix; + codec->name_prefix = NULL; +@@ -1362,7 +1373,6 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order) + return -ENODEV; + + list_add(&cpu_dai->dapm.list, &card->dapm_list); +- snd_soc_dapm_new_dai_widgets(&cpu_dai->dapm, cpu_dai); + } + + if (cpu_dai->driver->probe) { +@@ -1429,6 +1439,9 @@ static int soc_probe_link_dais(struct snd_soc_card *card, int num, int order) + return ret; + } + } else { ++ INIT_DELAYED_WORK(&rtd->delayed_work, ++ codec2codec_close_delayed_work); ++ + /* link the DAI widgets */ + play_w = codec_dai->playback_widget; + capture_w = cpu_dai->capture_widget; +@@ -1717,8 +1730,6 @@ static int snd_soc_instantiate_card(struct snd_soc_card *card) + snd_soc_dapm_add_routes(&card->dapm, card->dapm_routes, + card->num_dapm_routes); + +- snd_soc_dapm_new_widgets(&card->dapm); +- + for (i = 0; i < card->num_links; i++) { + dai_link = &card->dai_link[i]; + dai_fmt = dai_link->dai_fmt; +@@ -3174,6 +3185,19 @@ out: + } + EXPORT_SYMBOL_GPL(snd_soc_bytes_put); + ++int snd_soc_info_bytes_ext(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *ucontrol) ++{ ++ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); ++ struct soc_bytes_ext *params = (void *)kcontrol->private_value; ++ ++ ucontrol->type = SNDRV_CTL_ELEM_TYPE_BYTES; ++ ucontrol->count = params->max; ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(snd_soc_info_bytes_ext); ++ + /** + * snd_soc_info_xr_sx - signed multi register info callback + * @kcontrol: mreg control +diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c +index 3606383..86891a3 100644 +--- a/sound/soc/soc-dapm.c ++++ b/sound/soc/soc-dapm.c +@@ -172,6 +172,17 @@ static inline struct snd_soc_dapm_widget *dapm_cnew_widget( + return kmemdup(_widget, sizeof(*_widget), GFP_KERNEL); + } + ++/** ++ * snd_soc_dapm_kcontrol_codec() - Returns the codec associated to a kcontrol ++ * @kcontrol: The kcontrol ++ */ ++struct snd_soc_codec *snd_soc_dapm_kcontrol_codec(struct snd_kcontrol *kcontrol) ++{ ++ struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); ++ return wlist->widgets[0]->codec; ++} ++EXPORT_SYMBOL_GPL(snd_soc_dapm_kcontrol_codec); ++ + /* get snd_card from DAPM context */ + static inline struct snd_card *dapm_get_snd_card( + struct snd_soc_dapm_context *dapm) +@@ -3440,7 +3451,7 @@ int snd_soc_dapm_link_dai_widgets(struct snd_soc_card *card) + break; + } + +- if (!w->sname) ++ if (!w->sname || !strstr(w->sname, dai_w->name)) + continue; + + if (dai->driver->playback.stream_name && +diff --git a/sound/soc/soc-jack.c b/sound/soc/soc-jack.c +index 0bb5ccc..9fd4ed8 100644 +--- a/sound/soc/soc-jack.c ++++ b/sound/soc/soc-jack.c +@@ -65,6 +65,7 @@ void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask) + struct snd_soc_codec *codec; + struct snd_soc_dapm_context *dapm; + struct snd_soc_jack_pin *pin; ++ unsigned int sync = 0; + int enable; + + trace_snd_soc_jack_report(jack, mask, status); +@@ -92,12 +93,16 @@ void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask) + snd_soc_dapm_enable_pin(dapm, pin->pin); + else + snd_soc_dapm_disable_pin(dapm, pin->pin); ++ ++ /* we need to sync for this case only */ ++ sync = 1; + } + + /* Report before the DAPM sync to help users updating micbias status */ + blocking_notifier_call_chain(&jack->notifier, jack->status, jack); + +- snd_soc_dapm_sync(dapm); ++ if (sync) ++ snd_soc_dapm_sync(dapm); + + snd_jack_report(jack->jack, jack->status); + +@@ -318,10 +323,13 @@ int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count, + INIT_DELAYED_WORK(&gpios[i].work, gpio_work); + gpios[i].jack = jack; + ++ if (!gpios[i].irq_flags) ++ gpios[i].irq_flags = ++ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING; ++ + ret = request_any_context_irq(gpio_to_irq(gpios[i].gpio), + gpio_handler, +- IRQF_TRIGGER_RISING | +- IRQF_TRIGGER_FALLING, ++ gpios[i].irq_flags, + gpios[i].name, + &gpios[i]); + if (ret < 0) +diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c +index ccb6be4..fc27d27 100644 +--- a/sound/soc/soc-pcm.c ++++ b/sound/soc/soc-pcm.c +@@ -34,7 +34,7 @@ + #define DPCM_MAX_BE_USERS 8 + + /* DPCM stream event, send event to FE and all active BEs. */ +-static int dpcm_dapm_stream_event(struct snd_soc_pcm_runtime *fe, int dir, ++int dpcm_dapm_stream_event(struct snd_soc_pcm_runtime *fe, int dir, + int event) + { + struct snd_soc_dpcm *dpcm; +@@ -337,7 +337,7 @@ static void close_delayed_work(struct work_struct *work) + rtd->pop_wait ? "yes" : "no"); + + /* are we waiting on this codec DAI stream */ +- if (rtd->pop_wait == 1) { ++ if (rtd->pop_wait == 1 && !codec_dai->active) { + rtd->pop_wait = 0; + snd_soc_dapm_stream_event(rtd, SNDRV_PCM_STREAM_PLAYBACK, + SND_SOC_DAPM_STREAM_STOP); +@@ -383,7 +383,10 @@ static int soc_pcm_close(struct snd_pcm_substream *substream) + /* Muting the DAC suppresses artifacts caused during digital + * shutdown, for example from stopping clocks. + */ +- snd_soc_dai_digital_mute(codec_dai, 1, substream->stream); ++ if (!codec_dai->playback_active) ++ snd_soc_dai_digital_mute(codec_dai, 1, substream->stream); ++ ++ snd_soc_dai_digital_mute(cpu_dai, 1, substream->stream); + + if (cpu_dai->driver->ops->shutdown) + cpu_dai->driver->ops->shutdown(substream, cpu_dai); +@@ -398,7 +401,8 @@ static int soc_pcm_close(struct snd_pcm_substream *substream) + platform->driver->ops->close(substream); + cpu_dai->runtime = NULL; + +- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { ++ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ++ && !codec_dai->playback_active) { + if (!rtd->pmdown_time || codec->ignore_pmdown_time || + rtd->dai_link->ignore_pmdown_time) { + /* powered down playback stream now */ +@@ -411,14 +415,14 @@ static int soc_pcm_close(struct snd_pcm_substream *substream) + schedule_delayed_work(&rtd->delayed_work, + msecs_to_jiffies(rtd->pmdown_time)); + } +- } else { ++ } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE ++ && !codec_dai->capture_active) { + /* capture streams can be powered down now */ + snd_soc_dapm_stream_event(rtd, SNDRV_PCM_STREAM_CAPTURE, + SND_SOC_DAPM_STREAM_STOP); + } + + mutex_unlock(&rtd->pcm_mutex); +- + pm_runtime_put(platform->dev); + pm_runtime_put(codec_dai->dev); + pm_runtime_put(cpu_dai->dev); +@@ -488,6 +492,7 @@ static int soc_pcm_prepare(struct snd_pcm_substream *substream) + SND_SOC_DAPM_STREAM_START); + + snd_soc_dai_digital_mute(codec_dai, 0, substream->stream); ++ snd_soc_dai_digital_mute(cpu_dai, 0, substream->stream); + + out: + mutex_unlock(&rtd->pcm_mutex); +@@ -757,7 +762,7 @@ static void dpcm_be_reparent(struct snd_soc_pcm_runtime *fe, + } + + /* disconnect a BE and FE */ +-static void dpcm_be_disconnect(struct snd_soc_pcm_runtime *fe, int stream) ++void dpcm_be_disconnect(struct snd_soc_pcm_runtime *fe, int stream) + { + struct snd_soc_dpcm *dpcm, *d; + +@@ -853,7 +858,7 @@ static int widget_in_list(struct snd_soc_dapm_widget_list *list, + return 0; + } + +-static int dpcm_path_get(struct snd_soc_pcm_runtime *fe, ++int dpcm_path_get(struct snd_soc_pcm_runtime *fe, + int stream, struct snd_soc_dapm_widget_list **list_) + { + struct snd_soc_dai *cpu_dai = fe->cpu_dai; +@@ -875,11 +880,6 @@ static int dpcm_path_get(struct snd_soc_pcm_runtime *fe, + return paths; + } + +-static inline void dpcm_path_put(struct snd_soc_dapm_widget_list **list) +-{ +- kfree(*list); +-} +- + static int dpcm_prune_paths(struct snd_soc_pcm_runtime *fe, int stream, + struct snd_soc_dapm_widget_list **list_) + { +@@ -949,7 +949,7 @@ static int dpcm_add_paths(struct snd_soc_pcm_runtime *fe, int stream, + continue; + + /* don't connect if FE is not running */ +- if (!fe->dpcm[stream].runtime) ++ if (!fe->dpcm[stream].runtime && !fe->fe_compr) + continue; + + /* newly connected FE and BE */ +@@ -974,7 +974,7 @@ static int dpcm_add_paths(struct snd_soc_pcm_runtime *fe, int stream, + * Find the corresponding BE DAIs that source or sink audio to this + * FE substream. + */ +-static int dpcm_process_paths(struct snd_soc_pcm_runtime *fe, ++int dpcm_process_paths(struct snd_soc_pcm_runtime *fe, + int stream, struct snd_soc_dapm_widget_list **list, int new) + { + if (new) +@@ -983,7 +983,7 @@ static int dpcm_process_paths(struct snd_soc_pcm_runtime *fe, + return dpcm_prune_paths(fe, stream, list); + } + +-static void dpcm_clear_pending_state(struct snd_soc_pcm_runtime *fe, int stream) ++void dpcm_clear_pending_state(struct snd_soc_pcm_runtime *fe, int stream) + { + struct snd_soc_dpcm *dpcm; + +@@ -1021,7 +1021,7 @@ static void dpcm_be_dai_startup_unwind(struct snd_soc_pcm_runtime *fe, + } + } + +-static int dpcm_be_dai_startup(struct snd_soc_pcm_runtime *fe, int stream) ++int dpcm_be_dai_startup(struct snd_soc_pcm_runtime *fe, int stream) + { + struct snd_soc_dpcm *dpcm; + int err, count = 0; +@@ -1149,7 +1149,6 @@ static int dpcm_fe_dai_startup(struct snd_pcm_substream *fe_substream) + } + + fe->dpcm[stream].state = SND_SOC_DPCM_STATE_OPEN; +- + dpcm_set_fe_runtime(fe_substream); + snd_pcm_limit_hw_rates(runtime); + +@@ -1163,7 +1162,7 @@ be_err: + return ret; + } + +-static int dpcm_be_dai_shutdown(struct snd_soc_pcm_runtime *fe, int stream) ++int dpcm_be_dai_shutdown(struct snd_soc_pcm_runtime *fe, int stream) + { + struct snd_soc_dpcm *dpcm; + +@@ -1224,7 +1223,7 @@ static int dpcm_fe_dai_shutdown(struct snd_pcm_substream *substream) + return 0; + } + +-static int dpcm_be_dai_hw_free(struct snd_soc_pcm_runtime *fe, int stream) ++int dpcm_be_dai_hw_free(struct snd_soc_pcm_runtime *fe, int stream) + { + struct snd_soc_dpcm *dpcm; + +@@ -1289,7 +1288,7 @@ static int dpcm_fe_dai_hw_free(struct snd_pcm_substream *substream) + return 0; + } + +-static int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int stream) ++int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int stream) + { + struct snd_soc_dpcm *dpcm; + int ret; +@@ -1395,7 +1394,7 @@ static int dpcm_fe_dai_hw_params(struct snd_pcm_substream *substream, + if (ret < 0) { + dev_err(fe->dev,"ASoC: hw_params FE failed %d\n", ret); + dpcm_be_dai_hw_free(fe, stream); +- } else ++ } else + fe->dpcm[stream].state = SND_SOC_DPCM_STATE_HW_PARAMS; + + out: +@@ -1419,7 +1418,7 @@ static int dpcm_do_trigger(struct snd_soc_dpcm *dpcm, + return ret; + } + +-static int dpcm_be_dai_trigger(struct snd_soc_pcm_runtime *fe, int stream, ++int dpcm_be_dai_trigger(struct snd_soc_pcm_runtime *fe, int stream, + int cmd) + { + struct snd_soc_dpcm *dpcm; +@@ -1511,7 +1510,6 @@ static int dpcm_be_dai_trigger(struct snd_soc_pcm_runtime *fe, int stream, + + return ret; + } +-EXPORT_SYMBOL_GPL(dpcm_be_dai_trigger); + + static int dpcm_fe_dai_trigger(struct snd_pcm_substream *substream, int cmd) + { +@@ -1587,7 +1585,7 @@ out: + return ret; + } + +-static int dpcm_be_dai_prepare(struct snd_soc_pcm_runtime *fe, int stream) ++int dpcm_be_dai_prepare(struct snd_soc_pcm_runtime *fe, int stream) + { + struct snd_soc_dpcm *dpcm; + int ret = 0; +@@ -2011,17 +2009,36 @@ int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num) + int ret = 0, playback = 0, capture = 0; + + if (rtd->dai_link->dynamic || rtd->dai_link->no_pcm) { +- if (cpu_dai->driver->playback.channels_min) +- playback = 1; +- if (cpu_dai->driver->capture.channels_min) +- capture = 1; ++ if (cpu_dai->driver->playback.channels_min) { ++ if (rtd->dai_link->playback_count) ++ playback = rtd->dai_link->playback_count; ++ else ++ playback = 1; ++ } ++ ++ if (cpu_dai->driver->capture.channels_min) { ++ if (rtd->dai_link->capture_count) ++ capture = rtd->dai_link->capture_count; ++ else ++ capture = 1; ++ } + } else { + if (codec_dai->driver->playback.channels_min && +- cpu_dai->driver->playback.channels_min) +- playback = 1; ++ cpu_dai->driver->playback.channels_min) { ++ if (rtd->dai_link->playback_count) ++ playback = rtd->dai_link->playback_count; ++ else ++ playback = 1; ++ } ++ + if (codec_dai->driver->capture.channels_min && +- cpu_dai->driver->capture.channels_min) +- capture = 1; ++ cpu_dai->driver->capture.channels_min) { ++ if (rtd->dai_link->capture_count) ++ capture = rtd->dai_link->capture_count; ++ else ++ capture = 1; ++ } ++ + } + + /* create the PCM */ +diff --git a/sound/soc/soc-utils.c b/sound/soc/soc-utils.c +index 4b3be6c..8ecf448 100644 +--- a/sound/soc/soc-utils.c ++++ b/sound/soc/soc-utils.c +@@ -75,7 +75,11 @@ static const struct snd_pcm_hardware dummy_dma_hardware = { + + static int dummy_dma_open(struct snd_pcm_substream *substream) + { +- snd_soc_set_runtime_hwparams(substream, &dummy_dma_hardware); ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ ++ /* BE's dont need dummy params */ ++ if (!rtd->dai_link->no_pcm) ++ snd_soc_set_runtime_hwparams(substream, &dummy_dma_hardware); + + return 0; + } +@@ -89,7 +93,28 @@ static struct snd_soc_platform_driver dummy_platform = { + .ops = &dummy_dma_ops, + }; + +-static struct snd_soc_codec_driver dummy_codec; ++static struct snd_soc_dapm_widget dapm_widgets[] = { ++ SND_SOC_DAPM_INPUT("Dummy Input"), ++ SND_SOC_DAPM_OUTPUT("Dummy Output"), ++}; ++ ++static struct snd_soc_dapm_route intercon[] = { ++ { "Dummy Output", NULL, "Dummy Playback"}, ++ { "Dummy Capture", NULL, "Dummy Input"}, ++}; ++ ++static int dummy_codec_probe(struct snd_soc_codec *codec) ++{ ++ struct snd_soc_dapm_context *dapm = &codec->dapm; ++ snd_soc_dapm_new_controls(dapm, dapm_widgets, ++ ARRAY_SIZE(dapm_widgets)); ++ snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon)); ++ return 0; ++} ++ ++static struct snd_soc_codec_driver dummy_codec = { ++ .probe = dummy_codec_probe, ++}; + + #define STUB_RATES SNDRV_PCM_RATE_8000_192000 + #define STUB_FORMATS (SNDRV_PCM_FMTBIT_S8 | \ +@@ -101,17 +126,18 @@ static struct snd_soc_codec_driver dummy_codec; + SNDRV_PCM_FMTBIT_S32_LE | \ + SNDRV_PCM_FMTBIT_U32_LE | \ + SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE) ++ + static struct snd_soc_dai_driver dummy_dai = { + .name = "snd-soc-dummy-dai", + .playback = { +- .stream_name = "Playback", ++ .stream_name = "Dummy Playback", + .channels_min = 1, + .channels_max = 384, + .rates = STUB_RATES, + .formats = STUB_FORMATS, + }, + .capture = { +- .stream_name = "Capture", ++ .stream_name = "Dummy Capture", + .channels_min = 1, + .channels_max = 384, + .rates = STUB_RATES, -- 1.7.9.5 diff --git a/device-software/meta-edison/recipes-kernel/linux/linux-yocto_3.10.bbappend b/device-software/meta-edison/recipes-kernel/linux/linux-yocto_3.10.bbappend index 9d1778c..422c09d 100644 --- a/device-software/meta-edison/recipes-kernel/linux/linux-yocto_3.10.bbappend +++ b/device-software/meta-edison/recipes-kernel/linux/linux-yocto_3.10.bbappend @@ -6,13 +6,3 @@ SRCREV_meta = "6ad20f049abd52b515a8e0a4664861cfd331f684" SRC_URI += "file://defconfig" SRC_URI += "file://upstream_to_edison.patch" -do_configure() { - cp "${WORKDIR}/defconfig" "${B}/.config" -} -do_kernel_configme() { - cp "${WORKDIR}/defconfig" "${B}/.config" -} -do_patch() { - cd ${S} - git am "${WORKDIR}/upstream_to_edison.patch" -} diff --git a/device-software/setup.sh b/device-software/setup.sh index d155994..9d89394 100755 --- a/device-software/setup.sh +++ b/device-software/setup.sh @@ -33,14 +33,15 @@ DISTRO = "poky-edison" USER_CLASSES ?= "buildstats image-mklibs image-prelink" PATCHRESOLVE = "noop" CONF_VERSION = "1" -EDISONREPO_TOP_DIR = "$my_dir" +EDISONREPO_TOP_DIR = "$top_repo_dir" DL_DIR ?= "$my_dl_dir" SSTATE_DIR ?= "$my_sstate_dir" BUILDNAME = "$my_build_name" LICENSE_FLAGS_WHITELIST += "commercial" COPY_LIC_MANIFEST = "1" COPY_LIC_DIRS = "1" -FILESYSTEM_PERMS_TABLES = "$my_dir/device-software/meta-edison-distro/files/fs-perms.txt" +FILESYSTEM_PERMS_TABLES = "$top_repo_dir/device-software/meta-edison-distro/files/fs-perms.txt" +$extra_package_type $extra_archiving $extra_conf EOF @@ -69,11 +70,11 @@ BBLAYERS ?= " \\ $poky_dir/meta \\ $poky_dir/meta-yocto \\ $poky_dir/meta-yocto-bsp \\ - $my_dir/device-software/meta-edison \\ - $my_dir/device-software/meta-edison-distro \\ - $my_dir/device-software/meta-edison-middleware \\ - $my_dir/device-software/meta-edison-arduino \\ - $my_dir/device-software/meta-edison-devtools \\ + $top_repo_dir/device-software/meta-edison \\ + $top_repo_dir/device-software/meta-edison-distro \\ + $top_repo_dir/device-software/meta-edison-middleware \\ + $top_repo_dir/device-software/meta-edison-arduino \\ + $top_repo_dir/device-software/meta-edison-devtools \\ $extra_layers " BBLAYERS_NON_REMOVABLE ?= " \\ @@ -112,17 +113,20 @@ function usage() echo -e "\t--sdk_host=$my_sdk_host\t\tchoose host machine on which the generated SDK and cross compiler will be run. Must be one of [$all_sdk_hosts]" echo -e "\t-l --list_sdk_hosts\t\tlist availables sdk host supported machines" echo -e "\t--create_src_archive\t\twhen set, copies sources of all deployed packages into build/tmp/deploy/sources" + echo -e "\t--deb_packages\t\twhen set, use .deb package format instead of .ipk" echo "" } main() { - my_dir=$(dirname $(dirname $(readlink -f $0))) + top_repo_dir=$(dirname $(dirname $(readlink -f $0))) + my_build_dir=$top_repo_dir my_dl_dir="\${TOPDIR}/downloads" my_sstate_dir="\${TOPDIR}/sstate-cache" my_bb_number_thread=4 my_parallel_make=4 my_build_name="Custom Edison build by $USER@$HOSTNAME "$(date +"%F %H:%M:%S %Z") all_sdk_hosts="linux32 linux64 win32 win64 macosx" + extra_package_type="" #probe my_sdk_host from uname plat=$(uname -s | tr '[:upper:]' '[:lower:]') @@ -135,7 +139,7 @@ main() { my_sdk_host="$plat$arch" my_mode="external" - if [ -d "$my_dir/linux-kernel" ]; then + if [ -d "$top_repo_dir/linux-kernel" ]; then my_mode="devenv" fi @@ -153,6 +157,9 @@ ARCHIVER_MODE[src] = \"original\" COPYLEFT_LICENSE_INCLUDE = 'GPL* LGPL*' " ;; + --deb_packages) + extra_package_type="PACKAGE_CLASSES = \"package_deb\"" + ;; --dl_dir) check_path my_dl_dir=$(readlink -f "$VALUE") @@ -173,6 +180,9 @@ COPYLEFT_LICENSE_INCLUDE = 'GPL* LGPL*' --build_name) my_build_name=$VALUE ;; + --build_dir) + my_build_dir=$VALUE + ;; -l | --list_sdk_hosts) echo $all_sdk_hosts exit @@ -195,7 +205,7 @@ COPYLEFT_LICENSE_INCLUDE = 'GPL* LGPL*' echo "We are building in devenv mode, i.e. with dependency on teamforge internal servers" echo "and yocto recipes assuming local sources for some package." echo "You can change this by passing the --mode=external option to this script." - do_append_layer + do_append_layer $top_repo_dir/device-software/meta-edison-devenv else if [ "$my_mode" = "external" ] then @@ -228,38 +238,39 @@ COPYLEFT_LICENSE_INCLUDE = 'GPL* LGPL*' ;; esac - poky_dir=$my_dir/poky + poky_dir=$my_build_dir/poky # Re-create the poky dir from archive - echo "Extracting upstream Yocto tools in the poky/ directory from archive" + echo "Extracting upstream Yocto tools in the $poky_dir directory from archive" rm -rf $poky_dir - tar -xjf $my_dir/device-software/utils/poky-daisy-11.0.0.tar.bz2 - mv poky-daisy-11.0.0 $poky_dir + tar -xjf $top_repo_dir/device-software/utils/poky-daisy-11.0.1.tar.bz2 + mv poky-daisy-11.0.1 $poky_dir # Apply patch on top of it allowing to perform build in external source directory #echo "Applying patch on it" cd $poky_dir - git apply --whitespace=nowarn $my_dir/device-software/utils/fix-gcc49-binutils.patch - git apply $my_dir/device-software/utils/0001-kernel-kernel-yocto-fix-external-src-builds-when-S-B-poky-dora.patch - git apply $my_dir/device-software/utils/gcc-Clean-up-configure_prepend-and-fix-for-mingw.patch - git apply $my_dir/device-software/utils/sdk-populate-clean-broken-links.patch - git apply $my_dir/device-software/utils/fix-sshd-varloglastlog-warning.patch - git apply --whitespace=nowarn $my_dir/device-software/utils/0001-bash-fix-CVE-2014-6271.patch - git apply --whitespace=nowarn $my_dir/device-software/utils/0002-bash-Fix-CVE-2014-7169.patch + git apply $top_repo_dir/device-software/utils/0001-kernel-kernel-yocto-fix-external-src-builds-when-S-B-poky-dora.patch + git apply $top_repo_dir/device-software/utils/sdk-populate-clean-broken-links.patch + git apply --whitespace=nowarn $top_repo_dir/device-software/utils/0001-bash-fix-CVE-2014-6271.patch + git apply --whitespace=nowarn $top_repo_dir/device-software/utils/0002-bash-Fix-CVE-2014-7169.patch + git apply $top_repo_dir/device-software/utils/0001-libarchive-avoid-dependency-on-e2fsprogs.patch + git apply --whitespace=nowarn $top_repo_dir/device-software/utils/0001-busybox-handle-syslog-related-files-properly.patch + git apply $top_repo_dir/device-software/utils/0001-openssh-avoid-screen-sessions-being-killed-on-discon.patch + git apply $top_repo_dir/device-software/utils/handle_bash_func.patch mingw_dir=$poky_dir/meta-mingw echo "Unpacking Mingw layer to poky/meta-mingw/ directory from archive" mkdir -p $mingw_dir - ( cd $mingw_dir && tar -xjf $my_dir/device-software/utils/mingw-daisy.tar.bz2) + ( cd $mingw_dir && tar -xjf $top_repo_dir/device-software/utils/mingw-daisy.tar.bz2) darwin_dir=$poky_dir/meta-darwin echo "Unpacking Darwin layer to poky/meta-darwin/ directory from archive" mkdir -p $darwin_dir - ( cd $darwin_dir && tar -xjf $my_dir/device-software/utils/darwin-daisy.tar.bz2) + ( cd $darwin_dir && tar -xjf $top_repo_dir/device-software/utils/darwin-daisy.tar.bz2) if [[ $my_sdk_host == win* ]] then - do_append_layer $my_dir/device-software/meta-mingw + do_append_layer $top_repo_dir/device-software/meta-mingw do_append_layer $mingw_dir fi @@ -269,9 +280,9 @@ COPYLEFT_LICENSE_INCLUDE = 'GPL* LGPL*' fi echo "Initializing yocto build environment" - source oe-init-build-env $my_dir/build > /dev/null + source oe-init-build-env $my_build_dir/build > /dev/null - yocto_conf_dir=$my_dir/build/conf + yocto_conf_dir=$my_build_dir/build/conf echo "Setting up yocto configuration file (in build/conf/local.conf)" do_bblayers_conf @@ -280,6 +291,7 @@ COPYLEFT_LICENSE_INCLUDE = 'GPL* LGPL*' echo "** Success **" echo "SDK will be generated for $my_sdk_host host" echo "Now run these two commands to setup and build the flashable image:" + echo "cd $my_build_dir" echo "source poky/oe-init-build-env" echo "bitbake edison-image" echo "*************" diff --git a/device-software/utils/0001-busybox-handle-syslog-related-files-properly.patch b/device-software/utils/0001-busybox-handle-syslog-related-files-properly.patch new file mode 100644 index 0000000..4ce90ef --- /dev/null +++ b/device-software/utils/0001-busybox-handle-syslog-related-files-properly.patch @@ -0,0 +1,74 @@ +From 5d6ffdc47565cb7405edabcf8cb8ba1fe3c84f31 Mon Sep 17 00:00:00 2001 +From: Chen Qi +Date: Fri, 13 Jun 2014 13:42:33 +0800 +Subject: [PATCH] busybox: handle syslog related files properly + +If CONFIG_SYSLOGD is not enabled, then the related service file should +not be installed as it will always fail at system start-up. The error +message is as following. + + [FAILED] Failed to start System Logging Service. + +The same logic applies to CONFIG_KLOGD. + +So we should first check the configuration before we install these +service files. + +[YOCTO #5302] + +(From OE-Core rev: b44e291a87539fbb8e6da1a16c56f425a417e7bd) + +Signed-off-by: Chen Qi +Signed-off-by: Saul Wold +Signed-off-by: Richard Purdie +--- + meta/recipes-core/busybox/busybox.inc | 25 ++++++++++++++----------- + 1 file changed, 14 insertions(+), 14 deletions(-) + +diff --git a/meta/recipes-core/busybox/busybox.inc b/meta/recipes-core/busybox/busybox.inc +index f6cb039..bd66e4f 100644 +--- a/meta/recipes-core/busybox/busybox.inc ++++ b/meta/recipes-core/busybox/busybox.inc +@@ -40,6 +40,3 @@ + INITSCRIPT_NAME_${PN}-udhcpd = "busybox-udhcpd" + +-SYSTEMD_PACKAGES = "${PN}-syslog" +-SYSTEMD_SERVICE_${PN}-syslog = "busybox-syslog.service" +- + CONFFILES_${PN}-syslog = "${sysconfdir}/syslog-startup.conf.${BPN}" +@@ -274,18 +274,21 @@ do_install () { + fi + + if ${@base_contains('DISTRO_FEATURES','systemd','true','false',d)}; then +- install -d ${D}${systemd_unitdir}/system +- sed 's,@base_sbindir@,${base_sbindir},g' < ${WORKDIR}/busybox-syslog.service.in \ +- > ${D}${systemd_unitdir}/system/busybox-syslog.service +- sed 's,@base_sbindir@,${base_sbindir},g' < ${WORKDIR}/busybox-klogd.service.in \ +- > ${D}${systemd_unitdir}/system/busybox-klogd.service +- +- if [ -f ${WORKDIR}/busybox-syslog.default ] ; then +- install -d ${D}${sysconfdir}/default +- install -m 0644 ${WORKDIR}/busybox-syslog.default ${D}${sysconfdir}/default/busybox-syslog ++ if grep -q "CONFIG_SYSLOGD=y" ${B}/.config; then ++ install -d ${D}${systemd_unitdir}/system ++ sed 's,@base_sbindir@,${base_sbindir},g' < ${WORKDIR}/busybox-syslog.service.in \ ++ > ${D}${systemd_unitdir}/system/busybox-syslog.service ++ if [ -f ${WORKDIR}/busybox-syslog.default ] ; then ++ install -d ${D}${sysconfdir}/default ++ install -m 0644 ${WORKDIR}/busybox-syslog.default ${D}${sysconfdir}/default/busybox-syslog ++ fi ++ ln -sf /dev/null ${D}${systemd_unitdir}/system/syslog.service ++ fi ++ if grep -q "CONFIG_KLOGD=y" ${B}/.config; then ++ install -d ${D}${systemd_unitdir}/system ++ sed 's,@base_sbindir@,${base_sbindir},g' < ${WORKDIR}/busybox-klogd.service.in \ ++ > ${D}${systemd_unitdir}/system/busybox-klogd.service + fi +- +- ln -sf /dev/null ${D}${systemd_unitdir}/system/syslog.service + fi + + # Remove the sysvinit specific configuration file for systemd systems to avoid confusion +-- +1.7.9.5 + diff --git a/device-software/utils/0001-kernel-kernel-yocto-fix-external-src-builds-when-S-B-poky-dora.patch b/device-software/utils/0001-kernel-kernel-yocto-fix-external-src-builds-when-S-B-poky-dora.patch index 09f609f..1b62161 100644 --- a/device-software/utils/0001-kernel-kernel-yocto-fix-external-src-builds-when-S-B-poky-dora.patch +++ b/device-software/utils/0001-kernel-kernel-yocto-fix-external-src-builds-when-S-B-poky-dora.patch @@ -15,6 +15,7 @@ accessing files. Signed-off-by: Khem Raj Signed-off-by: Bruce Ashfield Signed-off-by: Fabien Chereau +Signed-off-by: Simon Desfarges --- meta/classes/kernel.bbclass | 63 +++++++++++++++++++++++++-------------------- 1 file changed, 35 insertions(+), 28 deletions(-) @@ -63,7 +64,7 @@ index 19b159b..8914f04 100644 # + pwd="$PWD" + cd "${B}" - find . -depth -not -name "*.cmd" -not -name "*.o" -not -path "./Documentation*" -not -path "./.*" -print0 | cpio --null -pdlu $kerneldir + find . -depth -not -name "*.cmd" -not -name "*.o" -not -path "./Documentation*" -not -path "./source*" -not -path "./.*" -print0 | cpio --null -pdlu $kerneldir - cp .config $kerneldir + cp ${B}/.config $kerneldir if [ "${S}" != "${B}" ]; then diff --git a/device-software/utils/0001-libarchive-avoid-dependency-on-e2fsprogs.patch b/device-software/utils/0001-libarchive-avoid-dependency-on-e2fsprogs.patch new file mode 100644 index 0000000..5bbe1f0 --- /dev/null +++ b/device-software/utils/0001-libarchive-avoid-dependency-on-e2fsprogs.patch @@ -0,0 +1,55 @@ +From f0b9a7cf9f80be1917e45266fa201f464a28c1e5 Mon Sep 17 00:00:00 2001 +From: Paul Eggleton +Date: Thu, 5 Jun 2014 10:46:16 +0100 +Subject: [PATCH] libarchive: avoid dependency on e2fsprogs + +libarchive's configure script looks for ext2fs/ext2_fs.h in order to use +some defines for file attributes support if present (but doesn't link to +any additional libraries.) There is no configure option to disable this, +and if e2fsprogs is rebuilding between do_configure and do_compile you +can currently get a failure. Because it doesn't need anything else from +e2fsprogs, and e2fsprogs isn't currently buildable for nativesdk anyway, +copy the headers in from e2fsprogs-native which we're likely to have +built already (and add it to DEPENDS just to be sure we have.) + +Fixes [YOCTO #6268]. + +(From OE-Core rev: ad754e46ad477acfbe7543187a5c38bc333b8612) + +Signed-off-by: Paul Eggleton +Signed-off-by: Saul Wold +Signed-off-by: Richard Purdie +--- + .../libarchive/libarchive_3.1.2.bb | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/meta/recipes-extended/libarchive/libarchive_3.1.2.bb b/meta/recipes-extended/libarchive/libarchive_3.1.2.bb +index 3e6cdb4..2a2d0f9 100644 +--- a/meta/recipes-extended/libarchive/libarchive_3.1.2.bb ++++ b/meta/recipes-extended/libarchive/libarchive_3.1.2.bb +@@ -5,6 +5,8 @@ SECTION = "devel" + LICENSE = "BSD" + LIC_FILES_CHKSUM = "file://COPYING;md5=b4e3ffd607d6686c6cb2f63394370841" + ++DEPENDS = "e2fsprogs-native" ++ + PACKAGECONFIG ?= "libxml2 zlib bz2" + + PACKAGECONFIG_append_class-target = "\ +@@ -36,4 +38,13 @@ SRC_URI[sha256sum] = "eb87eacd8fe49e8d90c8fdc189813023ccc319c5e752b01fb6ad0cc7b2 + + inherit autotools-brokensep lib_package + ++CPPFLAGS += "-I${WORKDIR}/extra-includes" ++ ++do_configure[cleandirs] += "${WORKDIR}/extra-includes" ++do_configure_prepend() { ++ # We just need the headers for some type constants, so no need to ++ # build all of e2fsprogs for the target ++ cp -R ${STAGING_INCDIR_NATIVE}/ext2fs ${WORKDIR}/extra-includes/ ++} ++ + BBCLASSEXTEND = "native nativesdk" +-- +1.7.9.5 + diff --git a/device-software/utils/0001-openssh-avoid-screen-sessions-being-killed-on-discon.patch b/device-software/utils/0001-openssh-avoid-screen-sessions-being-killed-on-discon.patch new file mode 100644 index 0000000..acc7162 --- /dev/null +++ b/device-software/utils/0001-openssh-avoid-screen-sessions-being-killed-on-discon.patch @@ -0,0 +1,36 @@ +From 6c576a4ac85307a5c851bee91a567cae3ea5a43b Mon Sep 17 00:00:00 2001 +From: Paul Eggleton +Date: Wed, 5 Nov 2014 21:08:51 -0800 +Subject: [PATCH] openssh: avoid screen sessions being killed on disconnect + with systemd + +Tell systemd just to kill the sshd process when the ssh connection drops +instead of the entire cgroup for sshd, so that any screen sessions (and +more to the point, processes within them) do not get killed. + +(This is what the Fedora sshd service file does, and what we're already +doing in the dropbear service file). + +(From OE-Core master rev: 3c238dff41fbd3687457989c7b17d22b2cc844be) + +(From OE-Core rev: 6e6aeb7cca52b92a0c8013473e2b8bb18738a119) + +Signed-off-by: Paul Eggleton +Signed-off-by: Ross Burton +Signed-off-by: Richard Purdie +--- + .../openssh/openssh/sshd@.service | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/meta/recipes-connectivity/openssh/openssh/sshd@.service b/meta/recipes-connectivity/openssh/openssh/sshd@.service +index 4eda659..bb2d68e 100644 +--- a/meta/recipes-connectivity/openssh/openssh/sshd@.service ++++ b/meta/recipes-connectivity/openssh/openssh/sshd@.service +@@ -8,3 +8,4 @@ ExecStart=-@SBINDIR@/sshd -i + ExecReload=@BASE_BINDIR@/kill -HUP $MAINPID + StandardInput=socket + StandardError=syslog ++KillMode=process +-- +1.7.9.5 + diff --git a/device-software/utils/Makefile.mk b/device-software/utils/Makefile.mk new file mode 100644 index 0000000..674b962 --- /dev/null +++ b/device-software/utils/Makefile.mk @@ -0,0 +1,182 @@ +# Top level makefile, repo tool should create a link on this file at the root +# of the build environement. + +.DEFAULT_GOAL := image + +# Parallelism is managed by bitbake for this project +.NOTPARALLEL: + +# In this makefile, all targets are phony because dependencies are managed at the bitbake level. +# We don't need to specify all targets here because no files named like them exist at the top level directory. +.PHONY : bbcache + +# Use a default build tag when none is set by the caller +NOWDATE := $(shell date +"%Y%m%d%H%M%S") +BUILD_TAG ?= custom_build_$(USER)@$(HOSTNAME)$(NOWDATE) +BB_DL_DIR ?= $(CURDIR)/bbcache/downloads +BB_SSTATE_DIR ?= $(CURDIR)/bbcache/sstate-cache + +############################################################################### +# Main targets +############################################################################### +setup: _setup-sdkhost_linux64 + +cleansstate: _check_setup_was_done + /bin/bash -c "source out/current/poky/oe-init-build-env $(CURDIR)/out/current/build ; $(CURDIR)/device-software/utils/invalidate_sstate.sh $(CURDIR)/out/current/build" + +devtools_package: _check_setup_was_done + /bin/bash -c "source out/current/poky/oe-init-build-env $(CURDIR)/out/current/build ; $(CURDIR)/device-software/utils/create_devtools_package.sh $(CURDIR)/out/current/build" + +sdk: _check_setup_was_done + /bin/bash -c "source out/current/poky/oe-init-build-env $(CURDIR)/out/current/build ; bitbake edison-image -c populate_sdk" + +src-package: pub + ./device-software/utils/create_src_package.sh + mv edison-src.tgz $(CURDIR)/pub/edison-src-$(BUILD_TAG).tgz + +clean: + rm -rf out + +u-boot linux-externalsrc edison-image meta-toolchain bootimg: _check_setup_was_done + /bin/bash -c "source out/current/poky/oe-init-build-env $(CURDIR)/out/current/build ; bitbake -c cleansstate $@ ; bitbake $@" + ./device-software/utils/flash/postBuild.sh $(CURDIR)/out/current/build + +bootloader: u-boot + +image: edison-image + +kernel: linux-externalsrc bootimg + +toolchain: meta-toolchain + +flash: _check_postbuild_was_done + ./out/current/build/toFlash/flashall.sh + +flash-kernel: _check_postbuild_was_done + dd if=./out/current/build/toFlash/edison-image-edison.hddimg | ssh root@192.168.2.15 "dd of=/dev/disk/by-partlabel/boot bs=1M" + ssh root@192.168.2.15 "/sbin/reboot -f" + +flash-bootloader: _check_postbuild_was_done + dfu-util -d 8087:0a99 --alt u-boot0 -D ./out/current/build/toFlash/u-boot-edison.bin -R + +cscope: + find linux-kernel/ u-boot -regex '.*\.\(c\|cpp\|h\)$\' > cscope.files + cscope -R -b -k + +list: + @sh -c "$(MAKE) -p _no_targets | awk -F':' '/^[a-zA-Z0-9][^\$$#\/\\t=]*:([^=]|$$)/ {split(\$$1,A,/ /);for(i in A)print A[i]}' | sort" + +debian_image: + $(MAKE) setup SETUP_ARGS="$(SETUP_ARGS) --deb_packages" + $(MAKE) image + @echo '*******************************' + @echo '*******************************' + @echo 'Now run the following command to create the debian rootfs:' + @echo 'sudo $(CURDIR)/device-software/utils/create-debian-image.sh --build_dir=$(CURDIR)/out/current/build' + @echo 'and run a regular make flash' + @echo '*******************************' + +help: + @echo 'Main targets:' + @echo ' help - show this help' + @echo ' clean - remove the out and pub directory' + @echo ' setup - prepare the build env for later build operations' + @echo ' cleansstate - clean the sstate for some recipes to work-around some bitbake limitations' + @echo ' image - build the flashable edison image, results are in out/current/build/toFlash' + @echo ' flash - flash the current build image' + @echo ' sdk - build the SDK for the current build' + @echo ' toolchain - build the cross compilation toolchain for the current build' + @echo ' src-package - create the external source package' + @echo ' devtools_package - build some extra dev tools packages, results are in out/current/build/devtools_packages/' + @echo + @echo 'Continuous Integration targets:' + @sh -c "$(MAKE) -p _no_targets | awk -F':' '/^ci_[a-zA-Z0-9][^\$$#\/\\t=]*:([^=]|$$)/ {split(\$$1,A,/ /);for(i in A)print \" \"A[i]}' | sort" + @echo + @echo 'Environment variables:' + @echo ' BUILD_TAG - set the build name used for e.g. artifact file naming' + @echo ' BB_DL_DIR - defines the directory (absolute path) where bitbake places downloaded files (defaults to bbcache/downloads)' + @echo ' BB_SSTATE_DIR - defines the directory (absolute path) where bitbake places shared-state files (defaults to bbcache/sstate-cache)' + @echo ' SETUP_ARGS - control advanced behaviour of the setup script (run ./device-software/setup.sh --help for more details)' + +############################################################################### +# Private targets +############################################################################### + +_no_targets: + +_check_setup_was_done: + @if [ ! -f $(CURDIR)/out/current/build/conf/local.conf ]; then echo Please run \"make setup\" first ; exit 1 ; fi + +_check_postbuild_was_done: + @if [ ! -f $(CURDIR)/out/current/build/toFlash/flashall.sh ]; then echo Please run \"make image/bootloader/kernel\" first ; exit 1 ; fi + +_setup-sdkhost_%: pub bbcache + @echo Setup buildenv for SDK host $* + @mkdir -p out/$* + ./device-software/setup.sh $(SETUP_ARGS) --dl_dir=$(BB_DL_DIR) --sstate_dir=$(BB_SSTATE_DIR) --build_dir=$(CURDIR)/out/$* --build_name=$(BUILD_TAG) --sdk_host=$* + @rm -f out/current + @ln -s $(CURDIR)/out/$* $(CURDIR)/out/current + @if [ $* = macosx ]; then /bin/bash -c "source out/current/poky/oe-init-build-env $(CURDIR)/out/current/build ; bitbake odcctools2-crosssdk -c cleansstate" ; echo "Please make sure that OSX-sdk.zip is available in your bitbake download directory" ; fi + +pub: + @mkdir -p $@ + +bbcache: + @mkdir -p bbcache + @mkdir -p $(BB_DL_DIR) + @mkdir -p $(BB_SSTATE_DIR) + +_image_archive: + cd $(CURDIR)/out/current/build/toFlash ; zip -r $(CURDIR)/pub/edison-image-$(BUILD_TAG).zip `ls` + cd $(CURDIR)/out/current/build/symbols ; zip -r $(CURDIR)/pub/symbols-$(BUILD_TAG).zip `ls` + +_devtools_package_archive: + cd $(CURDIR)/out/current/build/devtools_packages ; zip -r $(CURDIR)/pub/edison-devtools-packages-$(BUILD_TAG).zip `ls` + +_sdk_archive_%: + cd $(CURDIR)/out/$*/build/tmp/deploy/sdk ; zip -r $(CURDIR)/pub/edison-sdk-$*-$(BUILD_TAG).zip `ls *-edison-image-*` + +_toolchain_archive_%: + cd $(CURDIR)/out/$*/build/tmp/deploy/sdk ; zip -r $(CURDIR)/pub/edison-meta-toolchain-$*-$(BUILD_TAG).zip `ls *-meta-toolchain-*` + + +############################################################################### +# Continuous Integration targets: one per checkbox available in jenkins +# Each target places the the end-user artifact in the pub/ directory +############################################################################### + +ci_image: setup cleansstate devtools_package _devtools_package_archive image _image_archive + +_ci_sdk_%: + $(MAKE) _setup-sdkhost_$* cleansstate sdk _sdk_archive_$* + +_ci_toolchain_%: + $(MAKE) _setup-sdkhost_$* cleansstate toolchain _toolchain_archive_$* + +ci_sdk_win32: _ci_sdk_win32 +ci_sdk_win64: _ci_sdk_win64 +ci_sdk_linux32: _ci_sdk_linux32 +ci_sdk_linux64: _ci_sdk_linux64 +ci_sdk_macosx: _ci_sdk_macosx +ci_toolchain_win32: _ci_toolchain_win32 +ci_toolchain_win64: _ci_toolchain_win64 +ci_toolchain_linux32: _ci_toolchain_linux32 +ci_toolchain_linux64: _ci_toolchain_linux64 +ci_toolchain_macosx: _ci_toolchain_macosx + +ci_image-from-src-package-and-GPL-LGPL-sources_archive: setup src-package + cp $(CURDIR)/pub/edison-src-$(BUILD_TAG).tgz $(CURDIR)/out/current + cd $(CURDIR)/out/current ; tar -xvf edison-src-$(BUILD_TAG).tgz + cd $(CURDIR)/out/current/edison-src ; /bin/bash -c "SETUP_ARGS=\"$(SETUP_ARGS) --create_src_archive\" make setup cleansstate image _image_archive" + cd $(CURDIR)/out/current/edison-src/out/current/build/toFlash ; zip -r $(CURDIR)/pub/edison-image-from-src-package-$(BUILD_TAG).zip `ls` + cd $(CURDIR)/out/current/edison-src/out/current/build/tmp/deploy/sources ; zip -r $(CURDIR)/pub/edison-GPL_LGPL-sources-$(BUILD_TAG).zip `ls` + +ci_full: + $(MAKE) ci_image BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_image-from-src-package-and-GPL-LGPL-sources_archive BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_sdk_win32 ci_toolchain_win32 BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_sdk_win64 ci_toolchain_win64 BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_sdk_linux32 ci_toolchain_linux32 BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_sdk_linux64 ci_toolchain_linux64 BUILD_TAG=$(BUILD_TAG) + $(MAKE) ci_sdk_macosx ci_toolchain_macosx BUILD_TAG=$(BUILD_TAG) + diff --git a/device-software/utils/create-debian-image.sh b/device-software/utils/create-debian-image.sh new file mode 100755 index 0000000..6cf1aee --- /dev/null +++ b/device-software/utils/create-debian-image.sh @@ -0,0 +1,226 @@ +#!/bin/bash + +# Creates a debian rootfs image which can be flashed on Edison +# Requires that the host system has the following packages: debootstrap debian-archive-keyring python + +top_repo_dir=$(dirname $(dirname $(dirname $(readlink -f $0)))) +build_dir=$top_repo_dir/build + +function usage() +{ + echo "Creates a debian image starting from a sucessful yocto build" + echo "This needs to be run as root. It was tested successfully on Ubuntu 14.04+" + echo "On older versions, please install manually debootstrap >= 1.0.59" + echo "Options:" + echo -e "\t-h --help\t\tdisplay this help and exit" + echo -e "\t--skip_debootstrap\tavoids running deboostrap from scratch to save time." + echo -e "\t--build_dir\tspecify the yocto build directory. Defaults to ../../build" + echo "" +} + +skip_debootstrap="false" +add_graphical_packages="false" + +while [ "$1" != "" ]; do + PARAM=`echo $1 | awk -F= '{print $1}'` + VALUE=`echo $1 | awk -F= '{print $2}'` + case $PARAM in + -h | --help) + usage + exit + ;; + --skip_debootstrap) + echo "Skip running deboostrap from scratch to save time in case of re-run" + skip_debootstrap="true" + ;; + --add_graphical_packages) + echo "Add graphical packages in the rootfs. Requires a larger rootfs" + add_graphical_packages="true" + ;; + --build_dir) + build_dir=$(readlink -f "$VALUE") + ;; + *) + echo "ERROR: unknown parameter \"$PARAM\"" + usage + exit 1 + ;; + esac + shift +done + +cd $build_dir + +# Check the version of host debootstrap +debootstrap_version=`debootstrap --version | cut -d' ' -f2` +echo """import sys +from distutils.version import LooseVersion +if LooseVersion('1.0.59') <= LooseVersion(sys.argv[1]): + exit(0) +else: + exit(1)""" > tmp.py +python tmp.py $debootstrap_version +ok="$?" +rm tmp.py +if [ ! $ok -eq 0 ]; then + echo "Bootstrap version too old: needs >= 1.0.59, found $debootstrap_version" + exit -1 +fi + +# Check that .deb packages were properly created +if ! grep -q "package_deb" ./conf/local.conf; then + echo "No .deb packages were generated by bitbake (only .ipk). Please re-run setup.sh using the --deb_packages option." + exit -1 +fi + +# Re-run post build to avoid losing hairs +rm -rf ./toFlash +$top_repo_dir/device-software/utils/flash/postBuild.sh $build_dir + +echo "*** Start creating a debian rootfs image ***" + +ROOTDIR=jessie-chroot + +if [ "$skip_debootstrap" != "true" ]; then + rm -rf $ROOTDIR + mkdir $ROOTDIR + debootstrap --arch i386 --no-check-gpg jessie $ROOTDIR http://http.debian.net/debian/ +fi + +mkdir -p $ROOTDIR/home/root + +mount sysfs $ROOTDIR/sys -t sysfs +mount proc $ROOTDIR/proc -t proc + +# Backup config +cp $ROOTDIR/etc/environment $ROOTDIR/etc/environment.sav +cp $ROOTDIR/etc/resolv.conf $ROOTDIR/etc/resolv.conf.sav +cp $ROOTDIR/etc/hosts $ROOTDIR/etc/hosts.sav + +# Use host system network config to be able to apt-get later on +echo `export | grep http_proxy | sed 's/declare -x http_proxy=/Acquire::http::proxy /'`\; >> $ROOTDIR/etc/apt/apt.conf.d/50proxy +echo `export | grep https_proxy | sed 's/declare -x https_proxy=/Acquire::https::proxy /'`\; >> $ROOTDIR/etc/apt/apt.conf.d/50proxy +echo `export | grep HTTP_PROXY | sed 's/declare -x HTTP_PROXY=/Acquire::http::proxy /'`\; >> $ROOTDIR/etc/apt/apt.conf.d/50proxy +echo `export | grep HTTPS_PROXY | sed 's/declare -x HTTPS_PROXY=/Acquire::https::proxy /'`\; >> $ROOTDIR/etc/apt/apt.conf.d/50proxy +cp /etc/resolv.conf $ROOTDIR/etc/resolv.conf +cp /etc/hosts $ROOTDIR/etc/hosts + +CHROOTCMD="eval LC_ALL=C LANGUAGE=C LANG=C chroot $ROOTDIR" + +# Install necessary packages +$CHROOTCMD apt-get clean +$CHROOTCMD apt-get update +$CHROOTCMD apt-get -y --force-yes install dbus nano openssh-server sudo bash-completion dosfstools +$CHROOTCMD apt-get -y --force-yes install bluez hostapd file ethtool network-manager +$CHROOTCMD apt-get -y --force-yes install python + +# Necessary for the resize-rootfs service +$CHROOTCMD apt-get -y --force-yes install e2fsprogs + +# This service is added by the network-manager debian package but we don't want it activated +# as it causes an UART console corruption at boot +$CHROOTCMD rm /etc/systemd/system/multi-user.target.wants/ModemManager.service /etc/systemd/system/dbus-org.freedesktop.ModemManager1.service + +# Create a default user "user" with password "edison" +# Encrypted password is created with mkpasswd +$CHROOTCMD useradd -m user -p YyleQbUNcJwao +$CHROOTCMD adduser user sudo +$CHROOTCMD adduser user netdev +$CHROOTCMD chsh -s /bin/bash user + + +# Fixup watchdog in systemd +echo "RuntimeWatchdogSec=90" >> $ROOTDIR/etc/systemd/system.conf + +# Install kernel/modules/firmware base packages generated by yocto +cp -r tmp/deploy/deb $ROOTDIR/tmp/ +$CHROOTCMD dpkg -i /tmp/deb/edison/kernel-image-3.10.17-poky-edison+_1.0-r2_i386.deb +$CHROOTCMD dpkg -i /tmp/deb/edison/kernel-3.10.17-poky-edison+_1.0-r2_i386.deb +$CHROOTCMD dpkg -i /tmp/deb/edison/kernel-module-bcm4334x_1.141-r47_i386.deb +$CHROOTCMD dpkg -i /tmp/deb/edison/kernel-module-bcm-bt-lpm_1.0-r2_i386.deb +$CHROOTCMD dpkg -i /tmp/deb/edison/kernel-module-libcomposite_1.0-r2_i386.deb +$CHROOTCMD dpkg -i /tmp/deb/edison/kernel-module-u-serial_1.0-r2_i386.deb +$CHROOTCMD dpkg -i /tmp/deb/edison/kernel-module-usb-f-acm_1.0-r2_i386.deb +$CHROOTCMD dpkg -i /tmp/deb/edison/kernel-module-g-multi_1.0-r2_i386.deb +$CHROOTCMD dpkg -i /tmp/deb/edison/kernel-module-aufs_1.0-r2_i386.deb +$CHROOTCMD dpkg -i /tmp/deb/all/bcm43340-fw_6.20.190-r2_all.deb +$CHROOTCMD dpkg -i /tmp/deb/core2-32/bcm43340-bt_1.0-r0_i386.deb + +# Enables USB networking at startup +cat > $ROOTDIR/lib/systemd/network/usb0.network < $ROOTDIR/lib/systemd/system/sshdgenkeys.service < /dev/null ; then rm /etc/ssh/*_key* ; ssh-keygen -A ; sync ; fi" +Type=oneshot +RemainAfterExit=yes +EOF + +# Set up uboot env configuration +cat > $ROOTDIR/etc/fw_env.config <> $ROOTDIR/etc/hosts +echo "edison" > $ROOTDIR/etc/hostname +echo "rootfs / auto nodev,noatime,discard,barrier=1,data=ordered,noauto_da_alloc 1 1" > $ROOTDIR/etc/fstab +echo "/dev/disk/by-partlabel/boot /boot auto noauto,comment=systemd.automount,nosuid,nodev,noatime,discard 1 1" >> $ROOTDIR/etc/fstab + +# Clean up +umount -l -f $ROOTDIR/sys +# Kill remaining processes making use of the /proc before unmounting it +lsof | grep $ROOTDIR/proc | awk '{print $2}' | xargs kill -9 +umount -l -f $ROOTDIR/proc +rm -rf $ROOTDIR/tmp/deb + +# Create the rootfs ext4 image +rm edison-image-edison.ext4 +fsize=$((`stat --printf="%s" toFlash/edison-image-edison.ext4` / 524288)) +dd if=/dev/zero of=edison-image-edison.ext4 bs=512K count=$fsize +mkfs.ext4 -F -L rootfs edison-image-edison.ext4 + +# Copy the rootfs content in the ext4 image +rm -rf tmpext4 +mkdir tmpext4 +mount -o loop edison-image-edison.ext4 tmpext4 +cp -a $ROOTDIR/* tmpext4/ +umount tmpext4 +rmdir tmpext4 + +cp edison-image-edison.ext4 toFlash/ +# Make sure that non-root users can read write the flash files +# This seems to fix a strange flashing issue in some cases +chmod -R a+rw toFlash diff --git a/device-software/utils/create_devtools_package.sh b/device-software/utils/create_devtools_package.sh index b5d9407..d1d74b0 100755 --- a/device-software/utils/create_devtools_package.sh +++ b/device-software/utils/create_devtools_package.sh @@ -4,17 +4,32 @@ echo "*** Start creating the dev tools ipk packages ***" top_repo_dir=$(dirname $(dirname $(dirname $(readlink -f $0)))) -cd $top_repo_dir/build +build_dir="" +if [ $# -eq 0 ]; then + build_dir=$top_repo_dir/build +else + build_dir=$1 +fi + +cd $build_dir bitbake peeknpoke bitbake powertop bitbake bonnie++ bitbake wfa-tool +# for iotkit-comm ACS sanity tests +bitbake gcc +bitbake iotkit-comm-c +bitbake iotkit-comm-js rm -rf devtools_packages mkdir devtools_packages -cp $top_repo_dir/build/tmp/deploy/ipk/core2-32/peeknpoke_1.1-r0_core2-32.ipk devtools_packages/ -cp $top_repo_dir/build/tmp/deploy/ipk/core2-32/powertop_2.5-r0_core2-32.ipk devtools_packages/ -cp $top_repo_dir/build/tmp/deploy/ipk/core2-32/bonnie++_1.03c-r0_core2-32.ipk devtools_packages/ -cp $top_repo_dir/build/tmp/deploy/ipk/core2-32/wfa-tool_r4.0-0_core2-32.ipk devtools_packages/ +cp tmp/deploy/ipk/core2-32/peeknpoke_1.1-r0_core2-32.ipk devtools_packages/ +cp tmp/deploy/ipk/core2-32/powertop_2.5-r0_core2-32.ipk devtools_packages/ +cp tmp/deploy/ipk/core2-32/bonnie++_1.03c-r0_core2-32.ipk devtools_packages/ +cp tmp/deploy/ipk/core2-32/wfa-tool_r4.0-0_core2-32.ipk devtools_packages/ +# for iotkit-comm ACS sanity tests +cp tmp/deploy/ipk/core2-32/gcov_4.8.2-r0_core2-32.ipk devtools_packages/gcov_core2-32.ipk +cp tmp/deploy/ipk/core2-32/iotkit-comm-c-tests_0.1.1-r2_core2-32.ipk devtools_packages/iotkit-comm-c-tests_core2-32.ipk +cp tmp/deploy/ipk/core2-32/iotkit-comm-js-test-dependencies_0.1.1-r2_core2-32.ipk devtools_packages/iotkit-comm-js-test-dependencies_core2-32.ipk diff --git a/device-software/utils/flash/flashall.bat b/device-software/utils/flash/flashall.bat index 3d18dd5..05269f5 100644 --- a/device-software/utils/flash/flashall.bat +++ b/device-software/utils/flash/flashall.bat @@ -4,7 +4,6 @@ set BASE_DIR=%~dp0 set USB_VID=8087 set USB_PID=0a99 set /a TIMEOUT=60 -set DO_DFU_FLASH=1 ::Phone flash tools configuration part set DO_RECOVERY=0 @@ -14,10 +13,9 @@ set PFT_XML_FILE="%BASE_DIR%pft-config-edison.xml" :: Handle Ifwi file for DFU update set IFWI_DFU_FILE=%BASE_DIR%edison_ifwi-dbg -set DO_LIST_VARIANTS=0 set VAR_DIR=%BASE_DIR%u-boot-envs\ -set VARIANT_NAME_DEFAULT=edison-default -set VARIANT_NAME_BLANK=edison-blank +set VARIANT_NAME_DEFAULT=edison-defaultrndis +set VARIANT_NAME_BLANK=edison-blankrndis set VARIANT_NAME=%VARIANT_NAME_BLANK% set LOG_FILENAME=flash.log @@ -29,26 +27,12 @@ set argcount=0 set appname=%0 :parse_arg_start if -%1-==-- goto parse_arg_end -if -%1- == --i- set /a DO_RECOVERY=1 -if -%1- == --d- set /a DO_DFU_FLASH=1 if -%1- == ---recovery- ( set /a DO_RECOVERY=1 - set /a DO_DFU_FLASH=0 ) if -%1- == ---keep-data- ( - set /a DO_RECOVERY=0 set VARIANT_NAME=%VARIANT_NAME_DEFAULT% ) -if -%1- == --b- ( - set /a DO_RECOVERY=1 - set /a DO_DFU_FLASH=1 - set VARIANT_NAME=%VARIANT_NAME_BLANK% -) -if -%1- == --l- set /a DO_LIST_VARIANTS=1 -if -%1- == --t- ( - set VARIANT_NAME=%2 - shift -) if -%1- == -/?- set /a show_help=1 if -%1- == --h- set /a show_help=1 if -%1- == ---help- set /a show_help=1 @@ -64,21 +48,6 @@ if %show_help% == 1 ( exit /b ) -:: U-boot target listing part -if %DO_LIST_VARIANTS% == 0 goto :skip_list_variants -echo Availables U-boot targets: -:: list all .env file in var_dir -for /R "%VAR_DIR%" %%i in ( *.bin ) do ( - :: echo the file-name only without extension - echo %%~ni -) -exit /b 5 -:skip_list_variants - -if %DO_DFU_FLASH% == 1 goto do_init_log -if %DO_RECOVERY% == 1 goto do_init_log -goto skip_init_log -:do_init_log if %verbose_output% == 1 goto skip_init_log echo ** Flashing Edison Board %date% %time% ** >> %LOG_FILENAME% :skip_init_log @@ -97,11 +66,11 @@ call:flash-ifwi if %errorlevel% neq 0 ( exit /b %errorlevel%) echo Recovery Success... echo You can now try a regular flash +goto :skip_flash_kernel :skip_flash_ifwi :: ******************************************************************** :: Kernel & rootfs flashing part -if %DO_DFU_FLASH% == 0 goto :skip_flash_kernel echo Using U-boot target: %VARIANT_NAME% set VARIANT_FILE="%VAR_DIR%%VARIANT_NAME%.bin" if not exist %VARIANT_FILE% ( @@ -159,8 +128,12 @@ call:flash-command --alt u-boot-env0 -D %VARIANT_FILE% if %errorlevel% neq 0 ( exit /b %errorlevel%) echo Flashing U-Boot Environment Backup -call:flash-command --alt u-boot-env1 -D %VARIANT_FILE% +call:flash-command --alt u-boot-env1 -D %VARIANT_FILE% -R if %errorlevel% neq 0 ( exit /b %errorlevel%) +echo Rebooting to apply partiton changes +call:dfu-wait +if %errorlevel% neq 0 ( exit /b %errorlevel%) + echo Flashing boot partition ^(kernel^) call:flash-command --alt boot -D "%BASE_DIR%edison-image-edison.hddimg" @@ -173,37 +146,23 @@ if %errorlevel% neq 0 ( exit /b %errorlevel% ) echo Rebooting echo U-boot ^& Kernel System Flash Success... if %VARIANT_NAME% == %VARIANT_NAME_BLANK% ( - echo Your board needs to reboot twice to complete the flashing procedure, please do not unplug it for 2 minutes. + echo Your board needs to reboot to complete the flashing procedure, please do not unplug it for 2 minutes. ) :skip_flash_kernel :: ******************************************************************** :: The End -if %DO_RECOVERY% == 0 ( -if %DO_DFU_FLASH% == 0 ( - echo Nothing to do - call:print-usage %appname% -)) - exit /b 0 :print-usage - echo Usage: %1 [-hl] [--help] [--recovery] [--keep-data] [-m][-ipdb] [-t uboot-env] + echo Usage: %1 [-h] [--help] [--recovery] [--keep-data] echo Update all software and restore board to its initial state. echo -h,--help display this help and exit. echo -v verbose output echo --recovery recover the board to DFU mode using a dedicated tool, echo available only on linux and window hosts. echo --keep-data preserve user data when flashing. - echo. - echo. - echo deprecated commands: - echo -i flash IFWI - echo -d flash U-boot, U-boot Environment, Linux Kernel, Rootfs - echo -b blank the device (eq -i -d -t %VARIANT_NAME_BLANK%) - echo -l list availables U-boot target environments and exit - echo -t uboot-env specify U-boot target environments to flash (default is %VARIANT_NAME%) exit /b 5 :flash-dfu-ifwi @@ -218,7 +177,7 @@ exit /b 0 set filterout="on" if %verbose_output% == 1 ( set filterout="off") - dfu-util -d %USB_VID%:%USB_PID% %* 2>&1 | cscript.exe //B filter-dfu-out.js %LOG_FILENAME% %filterout% + dfu-util -d %USB_VID%:%USB_PID% %* 2>&1 | cscript.exe /E:JScript //B filter-dfu-out.js %LOG_FILENAME% %filterout% set /a err_num=%errorlevel% if %err_num% neq 0 echo Flash failed on %* diff --git a/device-software/utils/flash/flashall.sh b/device-software/utils/flash/flashall.sh index 8c50ff3..563769d 100755 --- a/device-software/utils/flash/flashall.sh +++ b/device-software/utils/flash/flashall.sh @@ -6,25 +6,36 @@ IFS=$(echo -en "\n\b") GETOPTS="$(which getopt)" if [[ "$OSTYPE" == "darwin"* ]] ; then READLINK=greadlink; GETOPTS="$(brew list gnu-getopt | grep bin/getopt)"; else READLINK=readlink;fi; -BASE_DIR="$(dirname $($READLINK -f $0))" -ESC_BASE_DIR=${BASE_DIR/' '/'\ '} + +if [[ "$OSTYPE" == "cygwin" ]] ; +then + TEMP_DIR="$(dirname $($READLINK -f $0))" + ESC_BASE_DIR="$(cygpath -m ${TEMP_DIR})" + BASE_DIR="$(cygpath -m ${TEMP_DIR})" +else + BASE_DIR="$(dirname $($READLINK -f $0))" + ESC_BASE_DIR=${BASE_DIR/' '/'\ '} +fi; USB_VID=8087 USB_PID=0a99 TIMEOUT_SEC=60 DO_RECOVERY=0 -DO_DFU_FLASH=1 # Phone Flash tools configuration files PFT_XML_FILE="${BASE_DIR}/pft-config-edison.xml" # Handle Ifwi file for DFU update IFWI_DFU_FILE=${ESC_BASE_DIR}/edison_ifwi-dbg -DO_LIST_VARIANTS=0 VAR_DIR="${BASE_DIR}/u-boot-envs" -VARIANT_NAME_DEFAULT="edison-default" -VARIANT_NAME_BLANK="edison-blank" +if [[ "$OSTYPE" == "cygwin" ]] ; then + VARIANT_NAME_DEFAULT="edison-defaultrndis" + VARIANT_NAME_BLANK="edison-blankrndis" +else + VARIANT_NAME_DEFAULT="edison-defaultcdc" + VARIANT_NAME_BLANK="edison-blankcdc" +fi VARIANT_NAME=$VARIANT_NAME_BLANK LOG_FILENAME="flash.log" @@ -32,21 +43,13 @@ OUTPUT_LOG_CMD="2>&1 | tee -a ${LOG_FILENAME} | ( sed -n '19 q'; head -n 1; cat function print-usage { cat << EOF -Usage: ${0##*/} [-hl][--help][--recovery] [--keep-data] [-m][-ipdb] [-t uboot-env] +Usage: ${0##*/} [-h][--help][--recovery] [--keep-data] Update all software and restore board to its initial state. -h,--help display this help and exit. -v verbose output --recovery recover the board to DFU mode using a dedicated tool, available only on linux and window hosts. --keep-data preserve user data when flashing. - - - deprecated commands: - -i flash IFWI. - -d flash U-boot, U-boot Environment, Linux Kernel, Rootfs. - -b blank the device (eq -i -d -t ${VARIANT_NAME_BLANK}). - -l list availables U-boot target environments and exit. - -t uboot-env specify U-boot target environments to flash (default is ${VARIANT_NAME}). EOF exit -5 } @@ -117,7 +120,9 @@ function flash-ifwi-xfstk { function dfu-wait { echo "Now waiting for dfu device ${USB_VID}:${USB_PID}" - echo "Please plug and reboot the board" + if [ -z "$@" ]; then + echo "Please plug and reboot the board" + fi while [ `dfu-util -l -d ${USB_VID}:${USB_PID} | grep Found | grep -c ${USB_VID}` -eq 0 ] \ && [ $TIMEOUT_SEC -gt 0 ] && [ $(( TIMEOUT_SEC-- )) ]; do @@ -128,47 +133,31 @@ function dfu-wait { then echo "Timed out while waiting for dfu device ${USB_VID}:${USB_PID}" flash-debug - echo "Did you plug and reboot your board?" - echo "If yes, please try a recovery by calling this script with the --recovery option" + if [ -z "$@" ]; then + echo "Did you plug and reboot your board?" + echo "If yes, please try a recovery by calling this script with the --recovery option" + fi exit -2 fi } # Execute old getopt to have long options support -ARGS=$($GETOPTS -o hvlt:eidb -l "keep-data,recovery,help" -n "${0##*/}" -- "$@"); +ARGS=$($GETOPTS -o hv -l "keep-data,recovery,help" -n "${0##*/}" -- "$@"); #Bad arguments if [ $? -ne 0 ]; then print-usage ; fi; eval set -- "$ARGS"; while true; do case "$1" in - -l) shift; DO_LIST_VARIANTS=1;; - -t) shift; if [ -n "$1" ]; then VARIANT_NAME=$1; shift; fi;; -h|--help) shift; print-usage;; -v) shift; OUTPUT_LOG_CMD=" 2>&1 | tee -a ${LOG_FILENAME}";; - -i) shift; DO_RECOVERY=1;; - -d) shift; DO_DFU_FLASH=1;; - -b) shift; DO_RECOVERY=1; DO_DFU_FLASH=1; VARIANT_NAME=$VARIANT_NAME_BLANK;; - --recovery) shift; DO_RECOVERY=1;DO_DFU_FLASH=0;; - --keep-data) shift; DO_RECOVERY=0; VARIANT_NAME=$VARIANT_NAME_DEFAULT;; + --recovery) shift; DO_RECOVERY=1;; + --keep-data) shift; VARIANT_NAME=$VARIANT_NAME_DEFAULT;; --) shift; break;; esac done -if [ ${DO_LIST_VARIANTS} -eq 1 ]; -then - echo "Availables U-boot targets:" - for variant in $(ls ${VAR_DIR}) ; do - #echo just filname without extension - echo "${variant%.*}" - done - exit -5 -fi - -if [[ ${DO_RECOVERY} -eq 1 || ${DO_DFU_FLASH} -eq 1 ]]; -then - echo "** Flashing Edison Board $(date) **" >> ${LOG_FILENAME} -fi +echo "** Flashing Edison Board $(date) **" >> ${LOG_FILENAME} if [ ${DO_RECOVERY} -eq 1 ]; @@ -189,10 +178,8 @@ then flash-ifwi echo "Recovery Success..." echo "You can now try a regular flash" -fi -if [ ${DO_DFU_FLASH} -eq 1 ]; -then +else echo "Using U-Boot target: ${VARIANT_NAME}" VARIANT_FILE="${VAR_DIR}/${VARIANT_NAME}.bin" if [ ! -f "${VARIANT_FILE}" ]; then @@ -233,7 +220,9 @@ then flash-command --alt u-boot-env0 -D "${VARIANT_FILE}" echo "Flashing U-Boot Environment Backup" - flash-command --alt u-boot-env1 -D "${VARIANT_FILE}" + flash-command --alt u-boot-env1 -D "${VARIANT_FILE}" -R + echo "Rebooting to apply partition changes" + dfu-wait no-prompt echo "Flashing boot partition (kernel)" flash-command --alt boot -D "${ESC_BASE_DIR}/edison-image-edison.hddimg" @@ -244,14 +233,8 @@ then echo "Rebooting" echo "U-boot & Kernel System Flash Success..." if [ $VARIANT_NAME == $VARIANT_NAME_BLANK ] ; then - echo "Your board needs to reboot twice to complete the flashing procedure, please do not unplug it for 2 minutes." + echo "Your board needs to reboot to complete the flashing procedure, please do not unplug it for 2 minutes." fi fi -if [[ ${DO_DFU_FLASH} -eq 0 && ${DO_RECOVERY} -eq 0 ]]; -then - echo "Nothing to do ..." - print-usage -fi - IFS=${BACKUP_IFS} diff --git a/device-software/utils/flash/ifwi/edison/edison_dnx_fwr.bin b/device-software/utils/flash/ifwi/edison/edison_dnx_fwr.bin index c251d5d2c043e8336f12214be4877f4b0165c4ac..e646293a8b1540ae25202c3afb269eb1cf603a46 100644 GIT binary patch delta 570 zcmV-A0>%B5{{@u)1r5o|zf`=^tN{N10007$p*eK1flC2@|JLdM+o;+@sGa`vriQbr zsWsJAu<4O9xMnUCN8eo?bi_WK2GxKbcEK6u?#oG|)DAQ0&-A4xU_IqorupZx_S&)% zqQZ~p3c~YZtqQ!0FFPH|LwW^o7;m{5g`;tCUa_Beg*Xe9RsOB|>!ube^KB_yUSqZdg#k`h%!}$@1VMfah9k~ zsd4GS++8x((HOe2?y0s?JU`?GF0T?Du0v$T_`O`dPz#vLSdIsy!j(1!G(4X(N2(6N z4D*iB3cIdHi8ILQYdb6b@9!0PqtATJ$rGGmDic7Q10?2j*%FDl0vzU3v0e_8Z zmgl-tz3 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z%>F*N%>F-60Tgcr5hkPWp4~onp^sy^hz*P9- value substitution in ota_update.cmd -for elem in $tab_size ; do IFS=':' read -a fld_elem <<< "$elem"; sed -i "s/${fld_elem[0]}/${fld_elem[1]}/g" $top_repo_dir/build/toFlash/ota_update.cmd; done; - -# Look for mkimage tool path -uboot_default_path=$top_repo_dir/u-boot/tools/ -uboot_ext_src_path=$top_repo_dir/build/tmp/work/edison-poky-linux/u-boot -if [ -d $uboot_default_path ]; then - mkimage_tool_path=$(find $uboot_default_path -name mkimage) -else - mkimage_tool_path=$(find $uboot_ext_src_path -name mkimage) -fi +for elem in $tab_size ; do IFS=':' read -a fld_elem <<< "$elem"; sed -i "s/${fld_elem[0]}/${fld_elem[1]}/g" $build_dir/toFlash/ota_update.cmd; done; # Convert OTA script to u-boot script -$mkimage_tool_path -a 0x10000 -T script -C none -n 'Edison Updater script' -d $top_repo_dir/build/toFlash/ota_update.cmd $top_repo_dir/build/toFlash/ota_update.scr +$mkimage_tool_path -a 0x10000 -T script -C none -n 'Edison Updater script' -d $build_dir/toFlash/ota_update.cmd $build_dir/toFlash/ota_update.scr # Supress Preprocessed OTA script -rm $top_repo_dir/build/toFlash/ota_update.cmd +rm $build_dir/toFlash/ota_update.cmd # Generates a formatted list of all packages included in the image -awk '{print $1 " " $3}' $top_repo_dir/build/tmp/deploy/images/edison/edison-image-edison.manifest > $top_repo_dir/build/toFlash/package-list.txt +awk '{print $1 " " $3}' $build_dir/tmp/deploy/images/edison/edison-image-edison.manifest > $build_dir/toFlash/package-list.txt echo "**** Done ***" -echo "Files ready to flash in $top_repo_dir/build/toFlash/" +echo "Files ready to flash in $build_dir/toFlash/" echo "Run the flashall script there to start flashing." echo "*************" diff --git a/device-software/utils/handle_bash_func.patch b/device-software/utils/handle_bash_func.patch new file mode 100755 index 0000000..f4411bc --- /dev/null +++ b/device-software/utils/handle_bash_func.patch @@ -0,0 +1,41 @@ +commit becb32bb30a9fc8ffe3bf59bbe346297a5a8899a +Author: Richard Purdie +Date: Mon Dec 8 16:37:26 2014 +0000 + + bitbake: data: Handle BASH_FUNC shellshock implication + + The shellshock patches changed the way bash functions are exported. + Unfortunately different distros used slightly different formats, + Fedora went with BASH_FUNC_XXX()=() { echo foo; } and Ubuntu went with + BASH_FUNC_foo%%=() { echo foo; }. + + The former causes errors in dealing with out output from emit_env, + the functions are not exported in either case any more. + + This patch handles things so the functions work as expected in either + case. + + [YOCTO #6880] + + (Bitbake rev: 4d4baf20487271aa83bd9f1a778e4ea9af6f6681) + + Signed-off-by: Richard Purdie + +diff --git a/bitbake/lib/bb/data.py b/bitbake/lib/bb/data.py +index 91b1eb1..eb628c7 100644 +--- a/bitbake/lib/bb/data.py ++++ b/bitbake/lib/bb/data.py +@@ -219,6 +219,13 @@ def emit_var(var, o=sys.__stdout__, d = init(), all=False): + + val = str(val) + ++ if varExpanded.startswith("BASH_FUNC_"): ++ varExpanded = varExpanded[10:-2] ++ val = val[3:] # Strip off "() " ++ o.write("%s() %s\n" % (varExpanded, val)) ++ o.write("export -f %s\n" % (varExpanded)) ++ return 1 ++ + if func: + # NOTE: should probably check for unbalanced {} within the var + o.write("%s() {\n%s\n}\n" % (varExpanded, val)) diff --git a/device-software/utils/invalidate_sstate.sh b/device-software/utils/invalidate_sstate.sh index deff37a..8947c48 100755 --- a/device-software/utils/invalidate_sstate.sh +++ b/device-software/utils/invalidate_sstate.sh @@ -7,19 +7,14 @@ top_repo_dir=$(dirname $(dirname $(dirname $(readlink -f $0)))) -cd $top_repo_dir/build/ +if [ $# -eq 0 ]; then + cd $top_repo_dir/build +else + cd $1 +fi + + bitbake -c cleansstate virtual/kernel bitbake -c cleansstate u-boot bitbake -c cleansstate bcm43340-mod -bitbake -c cleansstate nodejs -bitbake -c cleansstate nodejs-native -bitbake -c cleansstate mdns -bitbake -c cleansstate paho-mqtt -bitbake -c cleansstate rsmb -bitbake -c cleansstate zeromq -bitbake -c cleansstate iotkit-comm-c -bitbake -c cleansstate iotkit-comm-js -bitbake -c cleansstate iotkit-agent bitbake -c cleansstate oobe -bitbake -c cleansstate mraa -bitbake -c cleansstate upm diff --git a/device-software/utils/sdk-populate-clean-broken-links.patch b/device-software/utils/sdk-populate-clean-broken-links.patch index f861822..a0a8561 100644 --- a/device-software/utils/sdk-populate-clean-broken-links.patch +++ b/device-software/utils/sdk-populate-clean-broken-links.patch @@ -1,5 +1,5 @@ diff --git a/meta/lib/oe/sdk.py b/meta/lib/oe/sdk.py -index 4a03e96..45167cc 100644 +index ca349c4..576cae8 100644 --- a/meta/lib/oe/sdk.py +++ b/meta/lib/oe/sdk.py @@ -49,6 +49,24 @@ class Sdk(object): @@ -25,5 +25,5 @@ index 4a03e96..45167cc 100644 + pass + # Link the ld.so.cache file into the hosts filesystem - sysconfdir = os.path.join(self.sdk_output, self.sdk_native_path, self.sysconfdir) - bb.utils.mkdirhier(sysconfdir) + link_name = os.path.join(self.sdk_output, self.sdk_native_path, + self.sysconfdir, "ld.so.cache") diff --git a/mw/oobe/LICENSE b/mw/oobe/LICENSE index a0e735a..b5494fc 100644 --- a/mw/oobe/LICENSE +++ b/mw/oobe/LICENSE @@ -1,176 +1,20 @@ - -GNU LESSER GENERAL PUBLIC LICENSE - -Version 2.1, February 1999 - -Copyright (C) 1991, 1999 Free Software Foundation, Inc. -51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA -Everyone is permitted to copy and distribute verbatim copies -of this license document, but changing it is not allowed. - -[This is the first released version of the Lesser GPL. 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Our General Public Licenses are designed to make sure that you have the freedom to distribute copies of free software (and charge for this service if you wish); that you receive source code or can get it if you want it; that you can change the software and use pieces of it in new free programs; and that you are informed that you can do these things. - -To protect your rights, we need to make restrictions that forbid distributors to deny you these rights or to ask you to surrender these rights. These restrictions translate to certain responsibilities for you if you distribute copies of the library or if you modify it. - -For example, if you distribute copies of the library, whether gratis or for a fee, you must give the recipients all the rights that we gave you. You must make sure that they, too, receive or can get the source code. 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IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. \ No newline at end of file diff --git a/mw/oobe/package.json b/mw/oobe/package.json new file mode 100644 index 0000000..f8b480e --- /dev/null +++ b/mw/oobe/package.json @@ -0,0 +1,11 @@ +{ + "name": "oobe", + "version": "1.1.0", + "description": "Web-based administration portal for conifiguring and upgrading the Edison", + "main": "src/server.js", + "dependencies": { + "multiparty": "*" + }, + "author": "Intel Corporation", + "license": "LGPL" +} \ No newline at end of file diff --git a/mw/oobe/src/configure_edison b/mw/oobe/src/configure_edison index 2b2bc12..3829390 100755 --- a/mw/oobe/src/configure_edison +++ b/mw/oobe/src/configure_edison @@ -28,6 +28,7 @@ from array import * DESTINATION_PATH = "/tmp/" STATE_DIR = '/var/lib/edison_config_tools' # todo: change in bitbake +CURR_PACKAGE_PATH = "" class text_colors: CYAN = '\033[96m' @@ -173,6 +174,7 @@ def verified(selection): def changeName(newName): _changeHostName(newName) + _changeP2PSSID(newName) _changeAPSSID(newName) def _changeHostName(newName): @@ -185,6 +187,9 @@ def _changeAPSSID(newName): os.popen("sed -i 's/^ssid=.*/ssid=%s/' /etc/hostapd/hostapd.conf" % (newName)) subprocess.call("systemctl restart mdns && sleep 2", shell=True) +def _changeP2PSSID(newName): + os.popen("sed -i 's/^p2p_ssid_postfix=.*/p2p_ssid_postfix=%s/' /etc/wpa_supplicant/p2p_supplicant.conf" % (newName)) + def changePassword(newPass): _changeRootPassword(newPass) if len(newPass) > 0: @@ -277,11 +282,12 @@ def scanForNetworks(): os.popen("systemctl stop hostapd && sleep 2 && systemctl start wpa_supplicant") r = range(10,0,-1) for i in r: - stdout.write("Scanning: %s seconds left\r" % i) + stdout.write("Scanning: %s seconds left \r" % i) stdout.flush() if i == 6: os.popen("wpa_cli scan") time.sleep(1) + data = os.popen("wpa_cli scan_results").read().split("\n") print "\n" @@ -292,7 +298,7 @@ def scanForNetworks(): line = data.pop().split("\t") if (len(line) == 5): ssid = line.pop() - if ssid not in ssid_keys and not ssid == "": + if ssid not in ssid_keys and not ssid == "" and "\\x00" not in ssid: tokens = line.pop().replace("[","").split("]")[0].split("-") if tokens[0] == "WPA" or tokens[0] == "WPA2": if tokens[1] == "EAP": @@ -303,15 +309,28 @@ def scanForNetworks(): network_map[ssid] = "WEP" else: network_map[ssid] = "OPEN" + ssid_keys.append(ssid) + network_file = open(STATE_DIR + "/networks.txt", "w") + network_file.write("{\n") + for i in range(0, len(ssid_keys)): + network_file.write('\t"' + ssid_keys[i] + '": "' + network_map[ssid_keys[i]]) + if i == len(ssid_keys)-1: + network_file.write('"\n') + else: + network_file.write('",\n') + network_file.write("}\n") + network_file.close() + return (ssid_keys, network_map) def selectNetwork(ssid_keys): - i = 1 + i = 2 print "0 :\tRescan for networks" - print "1 :\tManually input a hidden SSID" + print "1 :\tExit WiFi Setup" + print "2 :\tManually input a hidden SSID" for ssid in ssid_keys: i = i + 1 print i, ":\t", ssid @@ -320,12 +339,12 @@ def selectNetwork(ssid_keys): choice = -1 while 1: try: - if i == 1: - choice = int(raw_input("\nEnter 0 to rescan for networks.\nEnter 1 to input a hidden network SSID: ")) - elif i == 2: - choice = int(raw_input("\nEnter 0 to rescan for networks.\nEnter 1 to input a hidden network SSID.\nEnter 2 to choose %s: " % ssid_keys[0])) + if i == 2: + choice = int(raw_input("\nEnter 0 to rescan for networks.\nEnter 1 to exit.\nEnter 2 to input a hidden network SSID: ")) + elif i == 3: + choice = int(raw_input("\nEnter 0 to rescan for networks.\nEnter 1 to exit.\nEnter 2 to input a hidden network SSID.\nEnter 3 to choose %s: " % ssid_keys[0])) else: - choice = int(raw_input("\nEnter 0 to rescan for networks.\nEnter 1 to input a hidden network SSID.\nEnter a number between 2 to %s to choose one of the listed network SSIDs: " % i)) + choice = int(raw_input("\nEnter 0 to rescan for networks.\nEnter 1 to exit.\nEnter 2 to input a hidden network SSID.\nEnter a number between 3 to %s to choose one of the listed network SSIDs: " % i)) except TypeError: choice = -1 except ValueError: @@ -334,8 +353,10 @@ def selectNetwork(ssid_keys): if choice == 0: break elif choice == 1: + sys.exit(0) + elif choice == 2: break - elif choice > 1 and choice <= i and verified(ssid_keys[choice-2]): + elif choice > 2 and choice <= i and verified(ssid_keys[choice-3]): break return choice @@ -379,7 +400,7 @@ def configureHiddenNetwork(ssid): def configureNetwork(choice,ssid_keys,network_map): - ssid = ssid_keys[choice-2] + ssid = ssid_keys[choice-3] if network_map[ssid] == "OPEN": return wpa_templates.OPEN % (ssid, "") elif network_map[ssid] == "WEP": @@ -488,7 +509,7 @@ def connectNetwork(): choice = selectNetwork(ssid_keys) #choice is validated within selectNetwork. - if choice == 1: + if choice == 2: while 1: ssid = raw_input("Please enter the hidden network SSID: ") if verified(ssid): @@ -497,7 +518,7 @@ def connectNetwork(): break elif choice: network_conf = configureNetwork(choice, ssid_keys,network_map) - ssid = ssid_keys[choice-2] + ssid = ssid_keys[choice-3] break #print network_conf @@ -528,7 +549,7 @@ def getCurrentFirmwareInfo(): f = open('/etc/version','r') ver_str = f.readline() f.close() - return (ver_str.split('_')[0], ver_str.split('_')[2]) + return ("edison-" + ver_str.split('-')[0], ver_str.split('-')[1].splitlines()[0]) def parseFirmwareInfo(firmwareinfo, build_type): fwInfoObj = json.loads(firmwareinfo) @@ -555,7 +576,7 @@ def getLatestFirmwareInfo(): print >> sys.stderr, "Could not determine firmware version information." raise - build_url = "http://ndgfirmwareupdate-env.elasticbeanstalk.com/getLatestFirmwareUpdateURL?product=" + build_type + build_url = "http://software.wearables.intel.com/getLatestFirmwareUpdateURL?product=" + build_type request = urllib2.Request(build_url) request.add_header("Accept", "application/json") filehandle = urllib2.urlopen(request) @@ -563,7 +584,7 @@ def getLatestFirmwareInfo(): return parseFirmwareInfo(response, build_type) def getSpecificFirmwareInfo(build_type, build_number): - build_url = "http://ndgfirmwareupdate-env.elasticbeanstalk.com/getFirmwareUpdateURL?product=" + build_type + "&version=" + build_number + build_url = "http://software.wearables.intel.com/getFirmwareUpdateURL?product=" + build_type + "&version=" + build_number request = urllib2.Request(build_url) request.add_header("Accept", "application/json") filehandle = urllib2.urlopen(request) @@ -589,16 +610,22 @@ def removeFolderContents(folder_path): return 0 def removePackage(): + global CURR_PACKAGE_PATH try: - os.remove(DESTINATION_PATH+"package.zip") + os.remove(CURR_PACKAGE_PATH) except Exception, e: pass + CURR_PACKAGE_PATH = "" def signal_term_handler(signal, handler): removePackage() removeFolderContents("/update") sys.exit(0) +def signal_term_handler_package_only(signal, handler): + removePackage() + sys.exit(0) + def err_downloadPackage(): print "Failed to download the new firmware. Unable to proceed." removePackage() @@ -648,13 +675,13 @@ def genSha1ForFile(file_path): buf = f.read(chunkSize) return sha.hexdigest() -def downloadPackage(packageUrl, sha1FromServer): - ret_value = subprocess.call("curl --connect-timeout 10 "+ "'"+packageUrl+"'" + " >"+DESTINATION_PATH+"package.zip", shell=True) +def downloadPackage(packageUrl, sha1FromServer, packagePath): + ret_value = subprocess.call("curl --connect-timeout 10 "+ "'"+packageUrl+"'" + " >"+packagePath, shell=True) if ret_value != 0: err_downloadPackage() return -1 - shaOfDownloadedPkg = genSha1ForFile(DESTINATION_PATH + "package.zip") + shaOfDownloadedPkg = genSha1ForFile(packagePath) if sha1FromServer != shaOfDownloadedPkg: print "Could not establish integrity of downloaded firmware (hash mismatch). Unable to proceed" @@ -663,23 +690,44 @@ def downloadPackage(packageUrl, sha1FromServer): return 0 -def doOTAFlash(packageUrl, sha1FromServer): +def doOTAFlash(packageUrl, sha1FromServer, packagePath): if len(sha1FromServer) != 40: print "Could not establish integrity of latest firmware (bad hash). Unable to proceed." return -1 try: - signal.signal(signal.SIGTERM, signal_term_handler) + signal.signal(signal.SIGTERM, signal_term_handler_package_only) - try: - ret_value = downloadPackage(packageUrl, sha1FromServer) - if ret_value != 0: - return -1 - except Exception as inst: - err_downloadPackage() - print >> sys.stderr, type(inst) - print >> sys.stderr, inst + try: + ret_value = downloadPackage(packageUrl, sha1FromServer, packagePath) + if ret_value != 0: return -1 + except Exception as inst: + err_downloadPackage() + print >> sys.stderr, type(inst) + print >> sys.stderr, inst + return -1 + + flashFile(packagePath) + except KeyboardInterrupt: + print "" + print "Interrupted by user. Cleaning up." + removePackage() + print "Please reboot the device to return to normal." + except Exception as inst: + print "Exception occurred while upgrading. Cleaning up." + print >> sys.stderr, type(inst) + print >> sys.stderr, inst + removePackage() + print "Please reboot the device to return to normal." + +def flashFile(packagePath): + if not os.path.isfile(packagePath): + print "Error: cannot upgrade. Package file " + packagePath + " does not exist." + return -1 + + try: + signal.signal(signal.SIGTERM, signal_term_handler) try: ret_value = subprocess.call("mkdir -p /update", shell=True) @@ -737,7 +785,7 @@ def doOTAFlash(packageUrl, sha1FromServer): return -1 try: - ret_value = subprocess.call("unzip -o " + DESTINATION_PATH + "package.zip -d /update", shell=True) + ret_value = subprocess.call("unzip -o " + packagePath + " -d /update", shell=True) if ret_value != 0: err_extractPackage() return -1 @@ -785,7 +833,7 @@ def doOTAFlash(packageUrl, sha1FromServer): removeFolderContents("/update") print "Please reboot the device to return to normal." -def upgrade(): +def upgrade(packagePath): curr = None build_type = None @@ -802,15 +850,15 @@ def upgrade(): raise if int(latest) > int(curr): - doOTAFlash(url, sha1) + doOTAFlash(url, sha1, packagePath) else: print "The latest version is already installed." def full(): - reset("Device Name") - setEdisonHostname() reset("Device Password") setEdisonPassword() + reset("Device Name") + setEdisonHostname() if decideToConnect(): connectNetwork() if not os.path.isfile(STATE_DIR + "/one-time-setup.done"): @@ -822,12 +870,17 @@ def getSSID(): return subprocess.check_output("grep -o '^ssid=.*' /etc/hostapd/hostapd.conf | awk -F'=' '{print $2}'", shell=True).strip() def enableOneTimeSetup(): + subprocess.call("systemctl start blink-led && systemctl enable blink-led &> /dev/null", shell=True) + hostname = subprocess.check_output('hostname').strip() try: os.remove(STATE_DIR + "/one-time-setup.done") except Exception as inst: print "Done." + print "Scanning and saving WiFi networks..." + scanForNetworks() + print "Restarting WiFi access point. Please wait..." print "" @@ -843,6 +896,13 @@ def enableOneTimeSetup(): print "and visit", "'" + hostname + ".local' in the browser" def disableOneTimeSetup(): + try: + os.remove(STATE_DIR + "/networks.txt") + except Exception as inst: + pass + + subprocess.call("systemctl stop blink-led && systemctl disable blink-led &> /dev/null", shell=True) + if int(subprocess.check_output("systemctl status wpa_supplicant | grep 'active (running)' | wc -l", shell=True)) != 0: subprocess.call("systemctl disable hostapd &> /dev/null", shell=True) else: @@ -861,6 +921,8 @@ def showNames(): def main(): + global CURR_PACKAGE_PATH + parser = argparse.ArgumentParser(prog='configure_edison') parser.add_argument('--server', help='Starts the server (testing only)', action='store_true', default=False) @@ -881,6 +943,7 @@ def main(): group_non_interactive.add_argument('--disableOneTimeSetup', dest='disableOneTimeSetup', help='Disable one-time setup and WiFi access point', action='store_true', default=False) group_non_interactive.add_argument('--enableOneTimeSetup', dest='enableOneTimeSetup', help='Enable one-time setup and WiFi access point', action='store_true', default=False) group_non_interactive.add_argument('--flash', metavar=('',''), nargs='+', dest='otaflash', help='Downloads and flashes an image') + group_non_interactive.add_argument('--flashFile', metavar=(''), nargs=1, dest='flashfile', help='Flashes the given image (.zip).') group_non_interactive.add_argument('--changePassword', metavar='password', dest='changepassword', const='', help=argparse.SUPPRESS, nargs='?') group_non_interactive.add_argument('--changeName', metavar='name', dest='changename', help=argparse.SUPPRESS, nargs=1) group_non_interactive.add_argument('--changeWiFi', metavar='securityType SSID [Identity | password]', dest='changewifi', help=argparse.SUPPRESS, nargs='+') @@ -928,9 +991,12 @@ def main(): if args.upgrade: try: - upgrade() + CURR_PACKAGE_PATH = DESTINATION_PATH + "package.zip" + upgrade(CURR_PACKAGE_PATH) except Exception as inst: print "Could not upgrade device firmware. Quitting." + print >> sys.stderr, type(inst) + print >> sys.stderr, inst return -1 if args.shownames: @@ -957,14 +1023,20 @@ def main(): print "Could not retrieve required firmware information. Quitting." return -1 + CURR_PACKAGE_PATH = DESTINATION_PATH + "package.zip" + try: - doOTAFlash(url, sha1) + doOTAFlash(url, sha1, CURR_PACKAGE_PATH) except Exception as inst: print >> sys.stderr, type(inst) print >> sys.stderr, inst print "Could not flash device. Quitting." return -1 + if args.flashfile != None: + CURR_PACKAGE_PATH = args.flashfile[0] + flashFile(CURR_PACKAGE_PATH) + if args.changepassword != None: changePassword(args.changepassword) diff --git a/mw/oobe/src/public/exit-upgrade.html b/mw/oobe/src/public/exit-upgrade.html new file mode 100644 index 0000000..29c4ee3 --- /dev/null +++ b/mw/oobe/src/public/exit-upgrade.html @@ -0,0 +1,33 @@ + + + + Leaving Setup + + + + + +

    Leaving Setup

    + +
    +
    +

    The firmware file has been uploaded successfully and the device is about to upgrade. Please allow 5 + mins for the device to finish upgrading. The device will reboot twice before it is ready to use + again. If the upgrade is successful, data in the /home directory should remain unchanged. + +

    Important note: + +

    The current version number of the device is params_version. After the upgrade, please log in via the + serial port and run the command configure_edison --version to verify that the version number has + changed. If that is not the case, the upgrade has failed and you must run the reboot command to + restore the device to its previous state. +

    +
    + + diff --git a/mw/oobe/src/public/exit.html b/mw/oobe/src/public/exit.html index 3eef046..a061627 100644 --- a/mw/oobe/src/public/exit.html +++ b/mw/oobe/src/public/exit.html @@ -1,11 +1,19 @@ - Leaving One-time Setup + Leaving Setup + + -

    Leaving One-time Setup

    +

    Leaving Setup

    diff --git a/mw/oobe/src/public/exiting-without-wifi.html b/mw/oobe/src/public/exiting-without-wifi.html index 001d4f5..7bb2692 100644 --- a/mw/oobe/src/public/exiting-without-wifi.html +++ b/mw/oobe/src/public/exiting-without-wifi.html @@ -1,11 +1,19 @@ - Leaving One-time Setup + Leaving Setup + + -

    Leaving One-time Setup

    +

    Leaving Setup

    diff --git a/mw/oobe/src/public/index.html b/mw/oobe/src/public/index.html index f7afb81..9084a92 100644 --- a/mw/oobe/src/public/index.html +++ b/mw/oobe/src/public/index.html @@ -1,9 +1,62 @@ - Edison One-time Setup + Edison Setup + + + +

    Edison Setup

     +
    + + + + + +
    + Configure + + Upgrade +
    +
    + +
    +
    +
    Upgrade or Replace Device Firmware
    + + + + + +
    + This does not erase the contents of the /home directory. However, it is still + recommended that all important information on the device be backed up to avoid loosing data due + to unforeseen errors. + + + +
    +
    +
    + +
    +
    +
    + +
    \ No newline at end of file diff --git a/mw/oobe/src/server.js b/mw/oobe/src/server.js index 97df791..75e8100 100644 --- a/mw/oobe/src/server.js +++ b/mw/oobe/src/server.js @@ -3,11 +3,12 @@ var fs = require('fs'), qs = require('querystring'), exec = require('child_process').exec, - url = require('url'); + url = require('url'), + multiparty = require('multiparty'); var site = __dirname + '/public'; -var payload, urlobj; -var injectStatusAfter = '

    Edison One-time Setup

    '; +var urlobj; +var injectStatusAfter = ''; var injectPasswordSectionAfter = 'onsubmit="saveFields()">'; var supportedExtensions = { "css" : "text/css", @@ -22,8 +23,9 @@ var supportedExtensions = { "jpeg" : "image/jpeg", "jpg" : "image/jpeg", "png" : "image/png" -} +}; var STATE_DIR = '/var/lib/edison_config_tools'; +var NETWORKS_FILE = STATE_DIR + '/networks.txt'; function getContentType(filename) { var i = filename.lastIndexOf('.'); @@ -38,9 +40,9 @@ function injectStatus(in_text, statusmsg, iserr) { var status = ""; if (statusmsg) { if (iserr) - status = '
    ' + statusmsg + '
    '; + status = '
    ' + statusmsg + '
    '; else - status = '
    ' + statusmsg + '
    '; + status = '
    ' + statusmsg + '
    '; } return in_text.substring(0, injectStatusAt) + status + in_text.substring(injectStatusAt, in_text.length); } @@ -188,9 +190,50 @@ function submitForm(params, res, req) { } function handlePostRequest(req, res) { - var params = qs.parse(payload); if (urlobj.pathname === '/submitForm') { - submitForm(params, res, req); + var payload = ""; + req.on('data', function (data) { + payload += data; + }); + req.on('end', function () { + var params = qs.parse(payload); + submitForm(params, res, req); + }); + } else if (urlobj.pathname === '/submitFirmwareImage') { + var form = new multiparty.Form(); + + form.parse(req, function(err, fields, files) { + console.log(files); + console.log('Upload completed!'); + + if (err) { + res.end(injectStatus(fs.readFileSync(site + '/upgrade.html', {encoding: 'utf8'}), + "File upload failed. Please try again.", true)); + } else { + var exitupgradeStr = fs.readFileSync(site + '/exit-upgrade.html', {encoding: 'utf8'}); + var currversion; + exec('configure_edison --version ', + function (error, stdout, stderr) { + if (error) { + currversion = "unknown"; + } else { + currversion = stdout; + } + exitupgradeStr = exitupgradeStr.replace(/params_version/g, currversion); + res.end(exitupgradeStr); + + exec('configure_edison --flashFile ' + files.imagefile[0].path, + function (error, stdout, stderr) { + if (error) { + console.log("Upgrade error: "); + console.log(stderr); + return; + } + console.log(stdout); + }); + }); + } + }); } else { pageNotFound(res); } @@ -201,16 +244,10 @@ function handlePostRequest(req, res) { function requestHandler(req, res) { urlobj = url.parse(req.url, true); - payload = ""; // POST request. Get payload. if (req.method === 'POST') { - req.on('data', function (data) { - payload += data; - }); - req.on('end', function () { - handlePostRequest(req, res); - }); + handlePostRequest(req, res); return; } @@ -251,6 +288,14 @@ function requestHandler(req, res) { } else { res.end(getStateBasedIndexPage()); } + } else if (urlobj.pathname === '/wifiNetworks') { + if (fs.existsSync(NETWORKS_FILE)) { + res.setHeader('content-type', getContentType(NETWORKS_FILE)); + res.end(fs.readFileSync(NETWORKS_FILE, {encoding: 'utf8'})); + } else { + res.statusCode = 404; + res.end("Please try again later."); + } } else { // for files like .css and images. if (!fs.existsSync(site + urlobj.pathname)) { pageNotFound(res);