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2020 02 24 sync
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- Optimizing LLVM IR for SPIR target
- Patches in review for llorg:
- https://reviews.llvm.org/D72857 - [SYCL] Driver option to enable SYCL mode and select SYCL version
- https://reviews.llvm.org/D71016 - [SYCL] Implement OpenCL kernel function generation
- https://reviews.llvm.org/D74387 - [SYCL] Do not diagnose use of __float128
- Address space handling in SYCL:
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https://github.com/intel/llvm/pull/968: Current implementation (with one minor change for
addres_space
attribute) - - https://github.com/bader/llvm/pull/5: Experimental implementation with OpenCL AS reuse. NOTE: it's not fully functional as. There are a few lit tests failing.
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https://github.com/intel/llvm/pull/968: Current implementation (with one minor change for
Participants: Alexey Bader (Intel), Mariya Podchischaeva (Intel), Felipe De Azevedo Piovezan (Intel), Michael Kinsner (Intel), Erich Keane (Intel), Roland Schulz (Intel), Ronan Keryell (Xilinx), Victor Lomuller (Codeplay), Michael Wong (Codeplay), Nevin Liber (ANL)
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Optimizing LLVM IR for SPIR target
- Alexey: I'm experimenting with optimizing LLVM IR before going to SPIR-V. Currently I tried O1 with disabled loop optimizations like unrolling and vectorization.
- Ronan: did you tried O3
- Alexey: Yes, but there are issues with using O3. First, LLVM transformations insert llvm intrinsics not supported by the translator.
- Victor: Another problem is type narrowing - if LLVM transformation knows that result fits into narrower type, it applies truncation/extend.
- Alexey: Right, but this problem is exposed in O1 mode too and I have solved it by setting natively supported width of integer types in data layout string for SPIR target. I'm going to upstream this change soon. Any objections?
- Alexey: I still need to check the impact on the device code size and investigate a couple of performance regressions introduced by this change.
- Alexey: Andrew Kaylor proposed to apply pre-LTO optimization pipeline instead of O1. I'm going to conduct this experiment as well.
- Alexey: I think optimization pipeline can additionally be customized by providing TargetTransformInfo, but I don't know if it's possible for SPIR target because SPIR has no LLVM back-end infrastructure and TargetTransformInfo is part of LLVM back-end.
- Victor: Agree, I don't think it's possible to provide TargetTransformInfo w/o LLVM back-end.
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Patches in review for llorg:
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https://reviews.llvm.org/D72857 - [SYCL] Driver option to enable SYCL mode and select SYCL version
- Alexey: Patch was approved by Alexey Bataev, but there were comments from Ronan, Ruyman and Victor. Are you guys okay to commit latest version?
- Victor: The only concern I had: switch from
enum
toint
to represent the version. - Alexey: I've applied this comment.
- Alexey: If there are no other comments, I'm going to commit the patch later this week.
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https://reviews.llvm.org/D71016 - [SYCL] Implement OpenCL kernel function generation
- Alexey: There was a comment from Ronan about alternative approach used by Codeplay implementation.
- Victor: I'll check if it's okay to upstream our implementation and get back to you later this week.
- Alexey: okay, we will wait for updates from Victor before going further with the patch.
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https://reviews.llvm.org/D74387 - [SYCL] Do not diagnose use of __float128
- Mariya: I'm working on addressing the comments from John McCall. WIP.
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Address space handling in SYCL:
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https://github.com/intel/llvm/pull/968: Current implementation (with one minor change for
addres_space
attribute) - -
https://github.com/bader/llvm/pull/5: Experimental implementation with OpenCL AS reuse. NOTE: it's not fully functional as. There are a few lit tests failing.
- Alexey: No updates so far.
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Opens
- Alexey: March 9th is national holiday in Russia, so I'm going to move the meeting to March 16.