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svcenc: Enabled and verified 420sp inputs #73

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Oct 10, 2023
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7 changes: 7 additions & 0 deletions common/x86/svc/isvc_mem_fns_ssse3.c
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,13 @@ void isvc_copy_2d_ssse3(UWORD8 *pu1_dst, WORD32 i4_dst_stride, UWORD8 *pu1_src,
/* all 128 bit registers are named with a suffix mxnb, where m is the */
/* number of n bits packed in the register */

if(((i4_blk_wd % 4) != 0) || ((i4_blk_ht % 4) != 0))
{
isvc_copy_2d(pu1_dst, i4_dst_stride, pu1_src, i4_src_stride, i4_blk_wd, i4_blk_ht);

return;
}

if(0 == (i4_blk_wd & 31)) /* wd multiple of 32 case */
{
__m128i src0_16x8b, src1_16x8b, src2_16x8b, src3_16x8b;
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7 changes: 0 additions & 7 deletions encoder/svc/isvce_api.c
Original file line number Diff line number Diff line change
Expand Up @@ -434,13 +434,6 @@ static IV_STATUS_T api_check_struct_sanity(iv_obj_t *ps_handle, void *pv_api_ip,
return (IV_FAIL);
}

if(ps_ip->s_ive_ip.e_inp_color_fmt != IV_YUV_420P)
{
ps_op->s_ive_op.u4_error_code |= 1 << IVE_UNSUPPORTEDPARAM;
ps_op->s_ive_op.u4_error_code |= IH264E_INPUT_CHROMA_FORMAT_NOT_SUPPORTED;
return (IV_FAIL);
}

if(ps_ip->s_ive_ip.e_recon_color_fmt != IV_YUV_420P)
{
ps_op->s_ive_op.u4_error_code |= 1 << IVE_UNSUPPORTEDPARAM;
Expand Down