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antenna_analyser.dsn
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antenna_analyser.dsn
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(pcb "/Users/jps/github/antenna-analyser/antenna_analyser.dsn"
(parser
(string_quote ")
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(host_cad "KiCad's Pcbnew")
(host_version "(2015-06-03 BZR 5697)-product")
)
(resolution um 10)
(unit um)
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)
)
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)
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-17316.5 1426.59 -16898.3 1213.53 -16566.5 881.678 -16353.4 463.525))
(outline (path signal 127 -21590 -3810 -21590 3810))
(outline (path signal 127 -21590 3810 -13970 3810))
(outline (path signal 127 -13970 3810 -13970 -3810))
(outline (path signal 127 -13970 -3810 -21590 -3810))
(outline (path signal 127 -17780 -1270 -17780 1270))
(outline (path signal 127 -19050 0 -16510 0))
(outline (path signal 127 -16510 -11430 -16510 -8890))
(outline (path signal 127 -16510 -8890 8890 -8890))
(outline (path signal 127 8890 -8890 8890 -11430))
(outline (path signal 127 8890 -11430 -16510 -11430))
(outline (path signal 127 -16510 8890 -16510 11430))
(outline (path signal 127 -16510 11430 8890 11430))
(outline (path signal 127 8890 11430 8890 8890))
(outline (path signal 127 8890 8890 -16510 8890))
(outline (path signal 127 -22225 12700 22225 12700))
(outline (path signal 127 22225 12700 22225 -12700))
(outline (path signal 127 22225 -12700 -22225 -12700))
(outline (path signal 127 -22225 -12700 -22225 12700))
(pin Round[A]Pad_1308_um (rotate 90) 1 -15240 -10160)
(pin Round[A]Pad_1308_um (rotate 90) 2 -12700 -10160)
(pin Round[A]Pad_1308_um (rotate 90) 3 -10160 -10160)
(pin Round[A]Pad_1308_um (rotate 90) 4 -7620 -10160)
(pin Round[A]Pad_1308_um (rotate 90) 5 -5080 -10160)
(pin Round[A]Pad_1308_um (rotate 90) 6 -2540 -10160)
(pin Round[A]Pad_1308_um (rotate 90) 7 0 -10160)
(pin Round[A]Pad_1308_um (rotate 90) 8 2540 -10160)
(pin Round[A]Pad_1308_um (rotate 90) 9 5080 -10160)
(pin Round[A]Pad_1308_um (rotate 90) 10 7620 -10160)
(pin Round[A]Pad_1308_um (rotate 90) 20 -15240 10160)
(pin Round[A]Pad_1308_um (rotate 90) 19 -12700 10160)
(pin Round[A]Pad_1308_um (rotate 90) 18 -10160 10160)
(pin Round[A]Pad_1308_um (rotate 90) 17 -7620 10160)
(pin Round[A]Pad_1308_um (rotate 90) 16 -5080 10160)
(pin Round[A]Pad_1308_um (rotate 90) 15 -2540 10160)
(pin Round[A]Pad_1308_um (rotate 90) 14 0 10160)
(pin Round[A]Pad_1308_um (rotate 90) 13 2540 10160)
(pin Round[A]Pad_1308_um (rotate 90) 12 5080 10160)
(pin Round[A]Pad_1308_um (rotate 90) 11 7620 10160)
)
(image "Connect:bnc-ci"
(outline (path signal 150 6985 0 6643.13 -2158.48 5650.98 -4105.68 4105.68 -5650.98
2158.48 -6643.13 0 -6985 -2158.48 -6643.13 -4105.68 -5650.98
-5650.98 -4105.68 -6643.13 -2158.48 -6985 0 -6643.13 2158.48
-5650.98 4105.68 -4105.68 5650.98 -2158.48 6643.13 0 6985
2158.48 6643.13 4105.68 5650.98 5650.98 4105.68 6643.13 2158.48))
(pin Round[A]Pad_3810_um 2 -3175 3175)
(pin Round[A]Pad_3556_um 1 0 0)
(pin Round[A]Pad_3810_um 2@1 3175 3175)
(pin Round[A]Pad_3810_um 2@2 -3175 -3175)
(pin Round[A]Pad_3810_um 2@3 3175 -3175)
)
(image Socket_Strips:Socket_Strip_Straight_1x14
(outline (path signal 50 -1750 1750 -1750 -1750))
(outline (path signal 50 34800 1750 34800 -1750))
(outline (path signal 50 -1750 1750 34800 1750))
(outline (path signal 50 -1750 -1750 34800 -1750))
(outline (path signal 150 1270 1270 34290 1270))
(outline (path signal 150 34290 1270 34290 -1270))
(outline (path signal 150 34290 -1270 1270 -1270))
(outline (path signal 150 -1550 -1550 0 -1550))
(outline (path signal 150 1270 -1270 1270 1270))
(outline (path signal 150 0 1550 -1550 1550))
(outline (path signal 150 -1550 1550 -1550 -1550))
(pin Rect[A]Pad_1727.2x2032_um 1 0 0)
(pin Oval[A]Pad_1727.2x2032_um 2 2540 0)
(pin Oval[A]Pad_1727.2x2032_um 3 5080 0)
(pin Oval[A]Pad_1727.2x2032_um 4 7620 0)
(pin Oval[A]Pad_1727.2x2032_um 5 10160 0)
(pin Oval[A]Pad_1727.2x2032_um 6 12700 0)
(pin Oval[A]Pad_1727.2x2032_um 7 15240 0)
(pin Oval[A]Pad_1727.2x2032_um 8 17780 0)
(pin Oval[A]Pad_1727.2x2032_um 9 20320 0)
(pin Oval[A]Pad_1727.2x2032_um 10 22860 0)
(pin Oval[A]Pad_1727.2x2032_um 11 25400 0)
(pin Oval[A]Pad_1727.2x2032_um 12 27940 0)
(pin Oval[A]Pad_1727.2x2032_um 13 30480 0)
(pin Oval[A]Pad_1727.2x2032_um 14 33020 0)
)
(image "Connect:USB_Micro-B"
(outline (path signal 50 -4600 2800 4600 2800))
(outline (path signal 50 4600 2800 4600 -4050))
(outline (path signal 50 4600 -4050 -4600 -4050))
(outline (path signal 50 -4600 -4050 -4600 2800))
(outline (path signal 150 -4350.9 -3817.46 4349.1 -3817.46))
(outline (path signal 150 -4350.9 2587.54 4349.1 2587.54))
(outline (path signal 150 4349.1 2587.54 4349.1 -3817.46))
(outline (path signal 150 4349.1 -2587.46 -4350.9 -2587.46))
(outline (path signal 150 -4350.9 -3817.46 -4350.9 2587.54))
(pin Rect[T]Pad_1350x400_um (rotate 90) 1 -1300.9 1562.54)
(pin Rect[T]Pad_1350x400_um (rotate 90) 2 -650.9 1562.54)
(pin Rect[T]Pad_1350x400_um (rotate 90) 3 -0.9 1562.54)
(pin Rect[T]Pad_1350x400_um (rotate 90) 4 649.1 1562.54)
(pin Rect[T]Pad_1350x400_um (rotate 90) 5 1299.1 1562.54)
(pin Oval[A]Pad_950x1250_um (rotate 90) 6 -2500.9 1562.54)
(pin Oval[A]Pad_950x1250_um (rotate 90) 6@1 2499.1 1562.54)
(pin Oval[A]Pad_1550x1000_um (rotate 90) 6@2 -3500.9 -1137.46)
(pin Oval[A]Pad_1550x1000_um (rotate 90) 6@3 3499.1 -1137.46)
)
(image Socket_Strips:Socket_Strip_Straight_1x04
(outline (path signal 50 -1750 1750 -1750 -1750))
(outline (path signal 50 9400 1750 9400 -1750))
(outline (path signal 50 -1750 1750 9400 1750))
(outline (path signal 50 -1750 -1750 9400 -1750))
(outline (path signal 150 1270 1270 8890 1270))
(outline (path signal 150 1270 -1270 8890 -1270))
(outline (path signal 150 -1550 -1550 0 -1550))
(outline (path signal 150 8890 1270 8890 -1270))
(outline (path signal 150 1270 -1270 1270 1270))
(outline (path signal 150 0 1550 -1550 1550))
(outline (path signal 150 -1550 1550 -1550 -1550))
(pin Rect[A]Pad_1727.2x2032_um 1 0 0)
(pin Oval[A]Pad_1727.2x2032_um 2 2540 0)
(pin Oval[A]Pad_1727.2x2032_um 3 5080 0)
(pin Oval[A]Pad_1727.2x2032_um 4 7620 0)
)
(image Resistors_ThroughHole:Resistor_Horizontal_RM10mm
(outline (path signal 150 -2540 1270 2540 1270))
(outline (path signal 150 2540 1270 2540 -1270))
(outline (path signal 150 2540 -1270 -2540 -1270))
(outline (path signal 150 -2540 -1270 -2540 1270))
(outline (path signal 150 -2540 0 -3810 0))
(outline (path signal 150 2540 0 3810 0))
(pin Round[A]Pad_1998.98_um 1 -5080 0)
(pin Round[A]Pad_1998.98_um 2 5080 0)
)
(image SOT223:SOT223
(outline (path signal 203.2 -3556 -1524 -3556 -4572))
(outline (path signal 203.2 -3556 -4572 3556 -4572))
(outline (path signal 203.2 3556 -4572 3556 -1524))
(outline (path signal 203.2 -3556 1524 -3556 2286))
(outline (path signal 203.2 -3556 2286 -2032 4572))
(outline (path signal 203.2 -2032 4572 2032 4572))
(outline (path signal 203.2 2032 4572 3556 2286))
(outline (path signal 203.2 3556 2286 3556 1524))
(pin Rect[T]Pad_3657.6x2032_um 4 0 3302)
(pin Rect[T]Pad_1016x2032_um 2 0 -3302)
(pin Rect[T]Pad_1016x2032_um 3 2286 -3302)
(pin Rect[T]Pad_1016x2032_um 1 -2286 -3302)
)
(padstack Round[A]Pad_1300_um
(shape (circle F.Cu 1300))
(shape (circle In1.Cu 1300))
(attach off)
)
(padstack Round[A]Pad_1308_um
(shape (circle F.Cu 1308))
(shape (circle In1.Cu 1308))
(attach off)
)
(padstack Round[A]Pad_1501.14_um
(shape (circle F.Cu 1501.14))
(shape (circle In1.Cu 1501.14))
(attach off)
)
(padstack Round[A]Pad_1750_um
(shape (circle F.Cu 1750))
(shape (circle In1.Cu 1750))
(attach off)
)
(padstack Round[A]Pad_1998.98_um
(shape (circle F.Cu 1998.98))
(shape (circle In1.Cu 1998.98))
(attach off)
)
(padstack Round[A]Pad_3556_um
(shape (circle F.Cu 3556))
(shape (circle In1.Cu 3556))
(attach off)
)
(padstack Round[A]Pad_3810_um
(shape (circle F.Cu 3810))
(shape (circle In1.Cu 3810))
(attach off)
)
(padstack Round[A]Pad_4064_um
(shape (circle F.Cu 4064))
(shape (circle In1.Cu 4064))
(attach off)
)
(padstack Oval[A]Pad_1550x1000_um
(shape (path F.Cu 1000 -275 0 275 0))
(shape (path In1.Cu 1000 -275 0 275 0))
(attach off)
)
(padstack Oval[A]Pad_1574.8x2286_um
(shape (path F.Cu 1574.8 0 -355.6 0 355.6))
(shape (path In1.Cu 1574.8 0 -355.6 0 355.6))
(attach off)
)
(padstack Oval[A]Pad_1600x1600_um
(shape (path F.Cu 1600 0 0 0 0))
(shape (path In1.Cu 1600 0 0 0 0))
(attach off)
)
(padstack Oval[A]Pad_1727.2x2032_um
(shape (path F.Cu 1727.2 0 -152.4 0 152.4))
(shape (path In1.Cu 1727.2 0 -152.4 0 152.4))
(attach off)
)
(padstack Oval[A]Pad_4000x4000_um
(shape (path F.Cu 4000 0 0 0 0))
(shape (path In1.Cu 4000 0 0 0 0))
(attach off)
)
(padstack Oval[A]Pad_950x1250_um
(shape (path F.Cu 950 0 -150 0 150))
(shape (path In1.Cu 950 0 -150 0 150))
(attach off)
)
(padstack Rect[T]Pad_3657.6x2032_um
(shape (rect F.Cu -1828.8 -1016 1828.8 1016))
(attach off)
)
(padstack Rect[T]Pad_1016x2032_um
(shape (rect F.Cu -508 -1016 508 1016))
(attach off)
)
(padstack Rect[A]Pad_1300x1300_um
(shape (rect F.Cu -650 -650 650 650))
(shape (rect In1.Cu -650 -650 650 650))
(attach off)
)
(padstack Rect[T]Pad_1350x400_um
(shape (rect F.Cu -675 -200 675 200))
(attach off)
)
(padstack Rect[A]Pad_1574.8x2286_um
(shape (rect F.Cu -787.4 -1143 787.4 1143))
(shape (rect In1.Cu -787.4 -1143 787.4 1143))
(attach off)
)
(padstack Rect[A]Pad_1727.2x2032_um
(shape (rect F.Cu -863.6 -1016 863.6 1016))
(shape (rect In1.Cu -863.6 -1016 863.6 1016))
(attach off)
)
(padstack Rect[A]Pad_1998.98x1998.98_um
(shape (rect F.Cu -999.49 -999.49 999.49 999.49))
(shape (rect In1.Cu -999.49 -999.49 999.49 999.49))
(attach off)
)
(padstack "Via[0-1]_1500:1000_um"
(shape (circle F.Cu 1500))
(shape (circle In1.Cu 1500))
(attach off)
)
)
(network
(net "Net-(C1-Pad2)"
(pins C1-2 R1-1 R5-2)
)
(net "Net-(C1-Pad1)"
(pins C1-1 P1-9)
)
(net "Net-(C2-Pad1)"
(pins C2-1 IC1-5 R3-1 R6-1)
)
(net "Net-(C3-Pad1)"
(pins C3-1 IC1-3 R4-1 R7-2)
)
(net GND
(pins C2-2 C3-2 C4-2 C6-2 ENC1-C ENC1-SW1 IC1-4 IC2-4 P1-6 P2-2 P2-2@1 P2-2@2
P2-2@3 P3-2 P4-5 P5-4 R2-2 R3-2 R4-2 R8-2 R9-1 U1-1)
)
(net "Net-(C4-Pad1)"
(pins C4-1 D2-1 R6-2)
)
(net "Net-(C5-Pad1)"
(pins C5-1 P2-1 R5-1)
)
(net +5V
(pins C6-1 IC1-8 P1-1 P3-1 P4-1 U1-3)
)
(net "Net-(D1-Pad2)"
(pins D1-2 D2-2 R1-2 R2-1)
)
(net "Net-(ENC1-PadA)"
(pins ENC1-A IC2-6)
)
(net "Net-(ENC1-PadB)"
(pins ENC1-B IC2-7)
)
(net "Net-(ENC1-PadSW2)"
(pins ENC1-SW2 IC2-5)
)
(net "Net-(P1-Pad4)"
(pins P1-4)
)
(net "Net-(P1-Pad5)"
(pins P1-5)
)
(net "Net-(P1-Pad7)"
(pins P1-7)
)
(net "Net-(P1-Pad8)"
(pins P1-8)
)
(net "Net-(P1-Pad10)"
(pins P1-10)
)
(net "Net-(IC1-Pad6)"
(pins IC1-6 R8-1 R10-2)
)
(net "Net-(IC1-Pad7)"
(pins IC1-7 IC2-17 R10-1)
)
(net "Net-(IC1-Pad1)"
(pins IC1-1 IC2-18 R11-1)
)
(net "Net-(IC1-Pad2)"
(pins IC1-2 R9-2 R11-2)
)
(net "Net-(IC2-Pad1)"
(pins IC2-1 P5-1)
)
(net "Net-(IC2-Pad2)"
(pins IC2-2 P5-2)
)
(net "Net-(IC2-Pad3)"
(pins IC2-3 P5-3)
)
(net "Net-(IC2-Pad8)"
(pins IC2-8 P1-12)
)
(net "Net-(IC2-Pad9)"
(pins IC2-9 P1-3)
)
(net "Net-(IC2-Pad10)"
(pins IC2-10 P1-2)
)
(net "Net-(IC2-Pad11)"
(pins IC2-11)
)
(net "Net-(IC2-Pad12)"
(pins IC2-12)
)
(net "Net-(IC2-Pad13)"
(pins IC2-13 P3-3)
)
(net "Net-(IC2-Pad14)"
(pins IC2-14 P3-6)
)
(net "Net-(IC2-Pad15)"
(pins IC2-15 P3-9)
)
(net "Net-(IC2-Pad16)"
(pins IC2-16 P3-7)
)
(net "Net-(IC2-Pad19)"
(pins IC2-19 P3-4)
)
(net "Net-(IC2-Pad20)"
(pins IC2-20 P3-5)
)
(net "Net-(IC2-Pad21)"
(pins IC2-21 P3-8 U1-2)
)
(net "Net-(IC2-Pad22)"
(pins IC2-22)
)
(net "Net-(IC2-Pad23)"
(pins IC2-23)
)
(net "Net-(IC2-Pad24)"
(pins IC2-24)
)
(net "Net-(C5-Pad2)"
(pins C5-2 D1-1 R7-1)
)
(net "Net-(P1-Pad20)"
(pins P1-20)
)
(net "Net-(P1-Pad19)"
(pins P1-19)
)
(net "Net-(P1-Pad18)"
(pins P1-18)
)
(net "Net-(P1-Pad17)"
(pins P1-17)
)
(net "Net-(P1-Pad16)"
(pins P1-16)
)
(net "Net-(P1-Pad15)"
(pins P1-15)
)
(net "Net-(P1-Pad14)"
(pins P1-14)
)
(net "Net-(P1-Pad13)"
(pins P1-13)
)
(net "Net-(P1-Pad11)"
(pins P1-11)
)
(net "Net-(P3-Pad10)"
(pins P3-10)
)
(net "Net-(P3-Pad11)"
(pins P3-11)
)
(net "Net-(P3-Pad12)"
(pins P3-12)
)
(net "Net-(P3-Pad13)"
(pins P3-13)
)
(net "Net-(P3-Pad14)"
(pins P3-14)
)
(net "Net-(P4-Pad3)"
(pins P4-3)
)
(net "Net-(P4-Pad6)"
(pins P4-6 P4-6@1 P4-6@2 P4-6@3)
)
(net "Net-(P4-Pad2)"
(pins P4-2)
)
(net "Net-(P4-Pad4)"
(pins P4-4)
)
(class kicad_default "" +5V GND "Net-(C1-Pad1)" "Net-(C1-Pad2)" "Net-(C2-Pad1)"
"Net-(C3-Pad1)" "Net-(C4-Pad1)" "Net-(C5-Pad2)" "Net-(D1-Pad2)" "Net-(ENC1-PadA)"
"Net-(ENC1-PadB)" "Net-(ENC1-PadSW2)" "Net-(IC1-Pad1)" "Net-(IC1-Pad2)"
"Net-(IC1-Pad6)" "Net-(IC1-Pad7)" "Net-(IC2-Pad1)" "Net-(IC2-Pad10)"
"Net-(IC2-Pad11)" "Net-(IC2-Pad12)" "Net-(IC2-Pad13)" "Net-(IC2-Pad14)"
"Net-(IC2-Pad15)" "Net-(IC2-Pad16)" "Net-(IC2-Pad19)" "Net-(IC2-Pad2)"
"Net-(IC2-Pad20)" "Net-(IC2-Pad21)" "Net-(IC2-Pad22)" "Net-(IC2-Pad23)"
"Net-(IC2-Pad24)" "Net-(IC2-Pad3)" "Net-(IC2-Pad8)" "Net-(IC2-Pad9)"
"Net-(P1-Pad10)" "Net-(P1-Pad11)" "Net-(P1-Pad13)" "Net-(P1-Pad14)"
"Net-(P1-Pad15)" "Net-(P1-Pad16)" "Net-(P1-Pad17)" "Net-(P1-Pad18)"
"Net-(P1-Pad19)" "Net-(P1-Pad20)" "Net-(P1-Pad4)" "Net-(P1-Pad5)" "Net-(P1-Pad7)"
"Net-(P1-Pad8)" "Net-(P3-Pad10)" "Net-(P3-Pad11)" "Net-(P3-Pad12)" "Net-(P3-Pad13)"
"Net-(P3-Pad14)" "Net-(P4-Pad2)" "Net-(P4-Pad3)" "Net-(P4-Pad4)" "Net-(P4-Pad6)"
(circuit
(use_via Via[0-1]_1500:1000_um)
)
(rule
(width 400)
(clearance 250.1)
)
)
(class ANT "Net-(C5-Pad1)"
(circuit
(use_via Via[0-1]_1500:1000_um)
)
(rule
(width 1500)
(clearance 250.1)
)
)
)
(wiring
)
)