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Fully tested for aarch64 OS without a bus error #289
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Original file line number | Diff line number | Diff line change |
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@@ -41,16 +41,19 @@ static uint32_t writeCounter = 0; | |
TOGGLE_CHIP_SELECT_LINE(); \ | ||
DEBUG_PRINT_WRITTEN_BYTE(w); \ | ||
} while(0) | ||
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int mem_fd = -1; | ||
volatile void *bcm2835 = 0; | ||
volatile GPIORegisterFile *gpio = 0; | ||
volatile SPIRegisterFile *spi = 0; | ||
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// Points to the system timer register. N.B. spec sheet says this is two low and high parts, in an 32-bit aligned (but not 64-bit aligned) address. Profiling shows | ||
// that Pi 3 Model B does allow reading this as a u64 load, and even when unaligned, it is around 30% faster to do so compared to loading in parts "lo | (hi << 32)". | ||
#if __aarch64__ | ||
volatile uint32_t *systemTimerRegister = 0; | ||
#else | ||
volatile uint64_t *systemTimerRegister = 0; | ||
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||
#endif | ||
void DumpSPICS(uint32_t reg) | ||
{ | ||
PRINT_FLAG(BCM2835_SPI0_CS_CS); | ||
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@@ -319,7 +322,6 @@ void RunSPITask(SPITask *task) | |
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SET_GPIO(GPIO_TFT_DATA_CONTROL); | ||
#endif | ||
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// Send the data payload: | ||
while(tStart < tPrefillEnd) WRITE_FIFO(*tStart++); | ||
while(tStart < tEnd) | ||
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@@ -335,6 +337,11 @@ void RunSPITask(SPITask *task) | |
} | ||
#else | ||
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#ifdef KEDEI_TRASH | ||
extern void lcd_data8(uint8_t *data); | ||
extern void lcd_cmd(uint8_t data); | ||
#endif | ||
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void RunSPITask(SPITask *task) | ||
{ | ||
WaitForPolledSPITransferToFinish(); | ||
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@@ -352,6 +359,15 @@ void RunSPITask(SPITask *task) | |
const uint32_t payloadSize = tEnd - tStart; | ||
uint8_t *tPrefillEnd = tStart + MIN(15, payloadSize); | ||
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#ifdef KEDEI_TRASH | ||
lcd_cmd(task->cmd); | ||
while(tStart < tEnd) | ||
{ | ||
lcd_data8(tStart); | ||
tStart += 2; | ||
} | ||
#else // not KEDEI_TRASH | ||
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// Send the command word if display is 4-wire (3-wire displays can omit this, commands are interleaved in the data payload stream above) | ||
#ifndef SPI_3WIRE_PROTOCOL | ||
// An SPI transfer to the display always starts with one control (command) byte, followed by N data bytes. | ||
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@@ -362,7 +378,6 @@ void RunSPITask(SPITask *task) | |
WRITE_FIFO(0x00); | ||
#endif | ||
WRITE_FIFO(task->cmd); | ||
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#ifdef DISPLAY_SPI_BUS_IS_16BITS_WIDE | ||
while(!(spi->cs & (BCM2835_SPI0_CS_DONE))) /*nop*/; | ||
spi->fifo; | ||
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@@ -390,7 +405,11 @@ void RunSPITask(SPITask *task) | |
else | ||
#endif | ||
{ | ||
while(tStart < tPrefillEnd) WRITE_FIFO(*tStart++); | ||
while(tStart < tPrefillEnd) | ||
{ | ||
WRITE_FIFO(*tStart++); | ||
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} | ||
while(tStart < tEnd) | ||
{ | ||
uint32_t cs = spi->cs; | ||
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@@ -399,10 +418,12 @@ void RunSPITask(SPITask *task) | |
if ((cs & (BCM2835_SPI0_CS_RXR|BCM2835_SPI0_CS_RXF))) spi->cs = BCM2835_SPI0_CS_CLEAR_RX | BCM2835_SPI0_CS_TA | DISPLAY_SPI_DRIVE_SETTINGS; | ||
} | ||
} | ||
#endif // not KEDEI_TRASH | ||
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#ifdef DISPLAY_NEEDS_CHIP_SELECT_SIGNAL | ||
END_SPI_COMMUNICATION(); | ||
#endif | ||
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} | ||
#endif | ||
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|
@@ -515,7 +536,11 @@ int InitSPI() | |
if (bcm2835 == MAP_FAILED) FATAL_ERROR("mapping /dev/mem failed"); | ||
spi = (volatile SPIRegisterFile*)((uintptr_t)bcm2835 + BCM2835_SPI0_BASE); | ||
gpio = (volatile GPIORegisterFile*)((uintptr_t)bcm2835 + BCM2835_GPIO_BASE); | ||
#if __aarch64__ | ||
systemTimerRegister = (volatile uint32_t*)((uintptr_t)bcm2835 + BCM2835_TIMER_BASE + 0x04); // Generates an unaligned 64-bit pointer, but seems to be fine. | ||
#else | ||
systemTimerRegister = (volatile uint64_t*)((uintptr_t)bcm2835 + BCM2835_TIMER_BASE + 0x04); // Generates an unaligned 64-bit pointer, but seems to be fine. | ||
#endif | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Maybe // On 32-bit Pi, we can perform an unaligned 64-bit pointer access to read the timer for a micro-optimization, but on 64-bit Pi reading in 32-bit parts is needed.
#if __aarch64__
systemTimerRegister = (volatile uint32_t*)
#else
systemTimerRegister = (volatile uint64_t*)
#endif
systemTimerRegister = (volatile uint32_t*)((uintptr_t)bcm2835 + BCM2835_TIMER_BASE + 0x04); ? |
||
// TODO: On graceful shutdown, (ctrl-c signal?) close(mem_fd) | ||
#endif | ||
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Original file line number | Diff line number | Diff line change |
---|---|---|
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@@ -5,11 +5,14 @@ | |
#include <unistd.h> | ||
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// Initialized in spi.cpp along with the rest of the BCM2835 peripheral: | ||
#if __aarch64__ | ||
extern volatile uint32_t *systemTimerRegister; | ||
#define tick() (*systemTimerRegister+((uint64_t)(*(systemTimerRegister+1))<<32)) | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Maybe #define tick() (systemTimerRegister[0] | ((uint64_t)systemTimerRegister[1] << 32)) ? |
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#else | ||
extern volatile uint64_t *systemTimerRegister; | ||
#define tick() (*systemTimerRegister) | ||
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#endif | ||
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#endif | ||
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#ifdef NO_THROTTLING | ||
#define usleep(x) ((void)0) | ||
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I wonder if instead of the above, it would work to do
This will tell the compiler that
systemTimerRegister
points to something that is only 32-bit aligned, and it should then automatically generate the appropriate 32-bit load and stores on its own.After that, the other
#ifdef __aarch64__
s would not be necessary below?There was a problem hiding this comment.
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I've applied your patch on the following 64bit OS.
"Linux raspberrypi 5.15.84-v8+ #1613 SMP PREEMPT Thu Jan 5 12:03:08 GMT 2023 aarch64 GNU/Linux"
But it makes same bus error.
bcm_host_get_peripheral_address: 0x3f000000, bcm_host_get_peripheral_size: 16777216, bcm_host_get_sdram_address: 0xc0000000
BCM core speed: current: 400000000hz, max turbo: 400000000hz. SPI CDIV: 6, SPI max frequency: 66666667hz
Initializing display
bcm2835 library version: 10071 (0x00002757)
Creating SPI task thread
InitSPI done
Bus error
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Oh, bummer. That would have been sweet if that had worked.