diff --git a/ir/crates/back/src/codegen/machine/abi/calling_convention.rs b/ir/crates/back/src/codegen/machine/abi/calling_convention.rs
index 690b371..9d5454b 100644
--- a/ir/crates/back/src/codegen/machine/abi/calling_convention.rs
+++ b/ir/crates/back/src/codegen/machine/abi/calling_convention.rs
@@ -6,8 +6,8 @@ use crate::codegen::{
 pub trait CallingConvention {
     type Reg: machine::PhysicalRegister;
 
-    fn parameter_slots(params: impl Iterator<Item=Size>)
-                       -> impl Iterator<Item=Slot<Self::Reg>>;
+    fn parameter_slots(params: impl Iterator<Item = Size>)
+        -> impl Iterator<Item = Slot<Self::Reg>>;
 
     fn return_slot(size: Size) -> Slot<Self::Reg>;
 }
diff --git a/ir/crates/back/src/codegen/machine/abi/mod.rs b/ir/crates/back/src/codegen/machine/abi/mod.rs
index 658f7be..5528870 100644
--- a/ir/crates/back/src/codegen/machine/abi/mod.rs
+++ b/ir/crates/back/src/codegen/machine/abi/mod.rs
@@ -1,3 +1,3 @@
 pub use calling_convention::CallingConvention;
 
-pub mod calling_convention;
\ No newline at end of file
+pub mod calling_convention;
diff --git a/ir/crates/back/src/codegen/machine/backend.rs b/ir/crates/back/src/codegen/machine/backend.rs
index 48f08b4..7ca3e9a 100644
--- a/ir/crates/back/src/codegen/machine/backend.rs
+++ b/ir/crates/back/src/codegen/machine/backend.rs
@@ -11,11 +11,11 @@ use crate::codegen::{
             },
             Function,
         },
+        Instr,
         TargetMachine,
     },
     selection_dag::Immediate,
 };
-use crate::codegen::machine::Instr;
 
 type Reg<B> = <<B as Backend>::TM as TargetMachine>::Reg;
 type BackInstr<B> = <<B as Backend>::TM as TargetMachine>::Instr;
@@ -23,7 +23,7 @@ type BackInstr<B> = <<B as Backend>::TM as TargetMachine>::Instr;
 pub trait Backend {
     type TM: TargetMachine;
 
-    type P: Pattern<TM=Self::TM>;
+    type P: Pattern<TM = Self::TM>;
 
     fn patterns() -> &'static [Self::P];
 
diff --git a/ir/crates/back/src/codegen/machine/function/builder.rs b/ir/crates/back/src/codegen/machine/function/builder.rs
index 26678c0..589e22d 100644
--- a/ir/crates/back/src/codegen/machine/function/builder.rs
+++ b/ir/crates/back/src/codegen/machine/function/builder.rs
@@ -2,11 +2,10 @@ use daggy::{
     petgraph::prelude::Bfs,
     Walker,
 };
+use natrix_middle::instruction::CmpOp;
 use rustc_hash::FxHashMap;
 use tracing::debug;
 
-use natrix_middle::instruction::CmpOp;
-
 use crate::codegen::{
     machine::{
         backend::{
@@ -21,6 +20,7 @@ use crate::codegen::{
             InstrOperand,
             PseudoInstr,
         },
+        Instr,
         MachInstr,
         Register,
         Size,
@@ -35,7 +35,6 @@ use crate::codegen::{
         PseudoOp,
     },
 };
-use crate::codegen::machine::Instr;
 
 #[derive(Debug)]
 pub struct FunctionBuilder<TM: TargetMachine> {
@@ -101,9 +100,13 @@ impl<TM: TargetMachine> FunctionBuilder<TM> {
                                 )));
                             }
                             PseudoOp::Phi(dest, operands) => {
-                                self.function.basic_blocks[mbb_id].add_phi(*dest, operands.iter().map(
-                                    |(reg, bb)| (*reg, self.bb_mapping[bb])
-                                ).collect());
+                                self.function.basic_blocks[mbb_id].add_phi(
+                                    *dest,
+                                    operands
+                                        .iter()
+                                        .map(|(reg, bb)| (*reg, self.bb_mapping[bb]))
+                                        .collect(),
+                                );
                             }
                             PseudoOp::Def(reg) => {
                                 instructions
@@ -225,10 +228,7 @@ impl<TM: TargetMachine> FunctionBuilder<TM> {
         mbb
     }
 
-    fn operand_to_matched_pattern_operand(
-        &self,
-        src: &Operand<TM>,
-    ) -> MatchedPatternOperand<TM> {
+    fn operand_to_matched_pattern_operand(&self, src: &Operand<TM>) -> MatchedPatternOperand<TM> {
         match src {
             Operand::Reg(reg) => MatchedPatternOperand::Reg(*reg),
             Operand::Imm(imm) => MatchedPatternOperand::Imm(imm.clone()),
diff --git a/ir/crates/back/src/codegen/machine/function/cfg.rs b/ir/crates/back/src/codegen/machine/function/cfg.rs
index 2f1d6b1..9f4d944 100644
--- a/ir/crates/back/src/codegen/machine/function/cfg.rs
+++ b/ir/crates/back/src/codegen/machine/function/cfg.rs
@@ -1,14 +1,14 @@
 use daggy::{
-    NodeIndex,
     petgraph::{
-        Directed,
-        Direction,
         prelude::{
             Bfs,
             DfsPostOrder,
             StableGraph,
         },
+        Directed,
+        Direction,
     },
+    NodeIndex,
     Walker,
 };
 use index_vec::IndexVec;
@@ -17,8 +17,8 @@ use rustc_hash::FxHashMap;
 
 use crate::codegen::{
     machine::{
-        Instr,
         instr::InstrOperand,
+        Instr,
         InstrId,
         MachInstr,
         Register,
@@ -26,8 +26,7 @@ use crate::codegen::{
     },
     register_allocator::{
         InstrNumbering,
-        InstrUid
-        ,
+        InstrUid,
         ProgPoint,
     },
 };
@@ -85,25 +84,25 @@ impl Cfg {
     }
 
     /// Traverses the cfg using a post order depth first traversal
-    pub fn dfs_postorder(&self) -> impl Iterator<Item=BasicBlockId> + '_ {
+    pub fn dfs_postorder(&self) -> impl Iterator<Item = BasicBlockId> + '_ {
         DfsPostOrder::new(&self.graph, self.entry_node())
             .iter(&self.graph)
             .map(|node| self.node_to_block_map[&node])
     }
 
-    pub fn bfs(&self) -> impl Iterator<Item=BasicBlockId> + '_ {
+    pub fn bfs(&self) -> impl Iterator<Item = BasicBlockId> + '_ {
         Bfs::new(&self.graph, self.entry_node())
             .iter(&self.graph)
             .map(|node| self.node_to_block_map[&node])
     }
 
-    pub fn predecessors(&self, bb: BasicBlockId) -> impl Iterator<Item=BasicBlockId> + '_ {
+    pub fn predecessors(&self, bb: BasicBlockId) -> impl Iterator<Item = BasicBlockId> + '_ {
         self.graph
             .neighbors_directed(self.block_to_node_map[&bb], Direction::Incoming)
             .map(|node| self.node_to_block_map[&node])
     }
 
-    pub fn successors(&self, bb: BasicBlockId) -> impl Iterator<Item=BasicBlockId> + '_ {
+    pub fn successors(&self, bb: BasicBlockId) -> impl Iterator<Item = BasicBlockId> + '_ {
         self.graph
             .neighbors(self.block_to_node_map[&bb])
             .map(|node| self.node_to_block_map[&node])
diff --git a/ir/crates/back/src/codegen/machine/instr.rs b/ir/crates/back/src/codegen/machine/instr.rs
index 4f04f14..a64599e 100644
--- a/ir/crates/back/src/codegen/machine/instr.rs
+++ b/ir/crates/back/src/codegen/machine/instr.rs
@@ -9,12 +9,14 @@ use smallvec::{
 };
 
 use crate::codegen::{
-    machine::Register,
+    machine::{
+        function::BasicBlockId,
+        isa::MachInstr as MInstr,
+        Register,
+        TargetMachine,
+    },
     selection_dag::Immediate,
 };
-use crate::codegen::machine::function::BasicBlockId;
-use crate::codegen::machine::isa::MachInstr as MInstr;
-use crate::codegen::machine::TargetMachine;
 
 index_vec::define_index_type! {
     pub struct InstrId = u32;
@@ -97,7 +99,6 @@ impl<TM: TargetMachine> Instr<TM> {
             Instr::Machine(machine) => Some(machine),
         }
     }
-
 }
 
 #[derive(Debug, Copy, Clone, PartialEq, Eq)]
diff --git a/ir/crates/back/src/codegen/machine/isa.rs b/ir/crates/back/src/codegen/machine/isa.rs
index 3a8ce12..ce98950 100644
--- a/ir/crates/back/src/codegen/machine/isa.rs
+++ b/ir/crates/back/src/codegen/machine/isa.rs
@@ -9,8 +9,8 @@ use crate::codegen::machine::{
     instr::InstrOperand,
     reg::Register,
     Size,
+    TargetMachine,
 };
-use crate::codegen::machine::TargetMachine;
 
 pub trait PhysicalRegister: Debug + Clone + Copy + PartialEq + Eq + Sized + Hash + 'static {
     fn name(&self) -> &'static str;
@@ -30,9 +30,9 @@ pub trait PhysicalRegister: Debug + Clone + Copy + PartialEq + Eq + Sized + Hash
 
     fn superregs(&self) -> Option<&'static [Self]>;
 
-    fn regclass(&self) -> impl Iterator<Item=Self>
-        where
-            Self: 'static,
+    fn regclass(&self) -> impl Iterator<Item = Self>
+    where
+        Self: 'static,
     {
         self.subregs()
             .into_iter()
@@ -43,16 +43,16 @@ pub trait PhysicalRegister: Debug + Clone + Copy + PartialEq + Eq + Sized + Hash
     }
 
     fn has_subreg(&self, other: Self) -> bool
-        where
-            Self: 'static,
+    where
+        Self: 'static,
     {
         self.subregs()
             .map_or(false, |subregs| subregs.contains(&other))
     }
 
     fn interferes_with(self, other: Self) -> bool
-        where
-            Self: 'static,
+    where
+        Self: 'static,
     {
         if self == other {
             return true;
diff --git a/ir/crates/back/src/codegen/machine/mod.rs b/ir/crates/back/src/codegen/machine/mod.rs
index 7ef81b1..aab0a81 100644
--- a/ir/crates/back/src/codegen/machine/mod.rs
+++ b/ir/crates/back/src/codegen/machine/mod.rs
@@ -1,8 +1,7 @@
 use std::fmt::Debug;
 
-pub use cranelift_entity::EntityRef;
-
 pub use backend::Backend;
+pub use cranelift_entity::EntityRef;
 pub use function::{
     Function,
     FunctionId,
@@ -22,8 +21,10 @@ pub use reg::{
     VReg,
 };
 
-use crate::codegen::machine::abi::CallingConvention;
-use crate::codegen::machine::asm::Assembler;
+use crate::codegen::machine::{
+    abi::CallingConvention,
+    asm::Assembler,
+};
 
 pub mod abi;
 pub mod asm;
@@ -98,13 +99,13 @@ pub enum Architecture {
 pub trait TargetMachine: Debug + Default + Copy + Clone + PartialEq + Eq {
     type Reg: PhysicalRegister;
 
-    type Instr: MachInstr<TM=Self>;
+    type Instr: MachInstr<TM = Self>;
 
-    type CallingConvention: CallingConvention<Reg=Self::Reg>;
+    type CallingConvention: CallingConvention<Reg = Self::Reg>;
 
-    type Backend: Backend<TM=Self>;
+    type Backend: Backend<TM = Self>;
 
-    type Assembler: Assembler<TM=Self>;
+    type Assembler: Assembler<TM = Self>;
 
     fn endianness() -> Endianness;
 
diff --git a/ir/crates/back/src/codegen/machine/module/asm.rs b/ir/crates/back/src/codegen/machine/module/asm.rs
index 73a8aa0..958fab6 100644
--- a/ir/crates/back/src/codegen/machine/module/asm.rs
+++ b/ir/crates/back/src/codegen/machine/module/asm.rs
@@ -2,7 +2,11 @@ use std::ops::Range;
 
 use cranelift_entity::SecondaryMap;
 
-use crate::codegen::machine::{FunctionId, Module, TargetMachine};
+use crate::codegen::machine::{
+    FunctionId,
+    Module,
+    TargetMachine,
+};
 
 #[derive(Debug, Clone, Eq, PartialEq, Default)]
 pub struct FunctionSymbolTableEntry {
diff --git a/ir/crates/back/src/codegen/machine/module/builder.rs b/ir/crates/back/src/codegen/machine/module/builder.rs
index a5247bc..a89067d 100644
--- a/ir/crates/back/src/codegen/machine/module/builder.rs
+++ b/ir/crates/back/src/codegen/machine/module/builder.rs
@@ -2,8 +2,8 @@ use crate::codegen::machine::{
     backend::Backend,
     function::builder::FunctionBuilder,
     Module,
+    TargetMachine,
 };
-use crate::codegen::machine::TargetMachine;
 
 #[derive(Debug)]
 pub struct Builder<'module, TM: TargetMachine> {
diff --git a/ir/crates/back/src/codegen/machine/module/mod.rs b/ir/crates/back/src/codegen/machine/module/mod.rs
index ef0d09c..039f363 100644
--- a/ir/crates/back/src/codegen/machine/module/mod.rs
+++ b/ir/crates/back/src/codegen/machine/module/mod.rs
@@ -1,13 +1,15 @@
+pub use asm::AsmModule;
+use asm::{
+    FunctionSymbolTable,
+    FunctionSymbolTableEntry,
+};
+pub use builder::Builder;
 use cranelift_entity::PrimaryMap;
 use tracing::{
     debug,
     info,
 };
 
-use asm::{FunctionSymbolTable, FunctionSymbolTableEntry};
-pub use asm::AsmModule;
-pub use builder::Builder;
-
 use crate::codegen::{
     machine::{
         backend::Backend,
@@ -15,14 +17,14 @@ use crate::codegen::{
             Function,
             FunctionId,
         },
+        TargetMachine,
     },
     register_allocator,
     register_allocator::RegAllocAlgorithm,
 };
-use crate::codegen::machine::TargetMachine;
 
-mod builder;
 pub mod asm;
+mod builder;
 
 #[derive(Debug, Clone)]
 pub struct Module<TM: TargetMachine> {
@@ -42,7 +44,7 @@ impl<TM: TargetMachine> Module<TM> {
         self.functions.push(function)
     }
 
-    pub fn functions(&self) -> impl ExactSizeIterator<Item=(FunctionId, &Function<TM>)> {
+    pub fn functions(&self) -> impl ExactSizeIterator<Item = (FunctionId, &Function<TM>)> {
         self.functions.iter()
     }
 
diff --git a/ir/crates/back/src/codegen/machine/reg.rs b/ir/crates/back/src/codegen/machine/reg.rs
index 242e510..0cb0124 100644
--- a/ir/crates/back/src/codegen/machine/reg.rs
+++ b/ir/crates/back/src/codegen/machine/reg.rs
@@ -5,7 +5,12 @@ use std::fmt::{
 
 use cranelift_entity::entity_impl;
 
-use crate::codegen::machine::{function::Function, isa::PhysicalRegister, Size, TargetMachine};
+use crate::codegen::machine::{
+    function::Function,
+    isa::PhysicalRegister,
+    Size,
+    TargetMachine,
+};
 
 #[derive(Debug, Copy, Clone, PartialEq, Eq, Hash)]
 pub enum Register<TM: TargetMachine> {
diff --git a/ir/crates/back/src/codegen/register_allocator/coalescer.rs b/ir/crates/back/src/codegen/register_allocator/coalescer.rs
index 4e58515..b0d2212 100644
--- a/ir/crates/back/src/codegen/register_allocator/coalescer.rs
+++ b/ir/crates/back/src/codegen/register_allocator/coalescer.rs
@@ -9,8 +9,8 @@ use crate::codegen::machine::{
         PseudoInstr,
     },
     Module,
+    TargetMachine,
 };
-use crate::codegen::machine::TargetMachine;
 
 pub struct Coalescer<'module, TM: TargetMachine> {
     module: &'module mut Module<TM>,
diff --git a/ir/crates/back/src/codegen/register_allocator/linear_scan.rs b/ir/crates/back/src/codegen/register_allocator/linear_scan.rs
index d0928bf..2771138 100644
--- a/ir/crates/back/src/codegen/register_allocator/linear_scan.rs
+++ b/ir/crates/back/src/codegen/register_allocator/linear_scan.rs
@@ -5,6 +5,8 @@ use crate::codegen::{
     machine::{
         isa::PhysicalRegister,
         Size,
+        TargetMachine,
+        VReg,
     },
     register_allocator::{
         LiveRange,
@@ -15,7 +17,6 @@ use crate::codegen::{
         RegAllocVReg,
     },
 };
-use crate::codegen::machine::{TargetMachine, VReg};
 
 #[derive(Debug)]
 pub struct RegAlloc<'liveness, TM: TargetMachine> {
diff --git a/ir/crates/back/src/codegen/register_allocator/mod.rs b/ir/crates/back/src/codegen/register_allocator/mod.rs
index 9a025ad..7701842 100644
--- a/ir/crates/back/src/codegen/register_allocator/mod.rs
+++ b/ir/crates/back/src/codegen/register_allocator/mod.rs
@@ -7,6 +7,7 @@ use std::{
     },
 };
 
+pub use coalescer::Coalescer;
 pub use cranelift_entity::SecondaryMap;
 pub use daggy::Walker;
 pub use iter_tools::Itertools;
@@ -20,8 +21,6 @@ use smallvec::{
 };
 use tracing::debug;
 
-pub use coalescer::Coalescer;
-
 use crate::codegen::machine::{
     abi::{
         calling_convention::Slot,
@@ -35,12 +34,12 @@ use crate::codegen::machine::{
         Instr,
         PseudoInstr,
     },
-    InstrId,
     isa::PhysicalRegister,
     reg::{
         Register,
         VReg,
     },
+    InstrId,
     Size,
     TargetMachine,
 };
@@ -660,8 +659,7 @@ impl<'liveness, 'func, TM: TargetMachine, RegAlloc: RegAllocAlgorithm<'liveness,
                     None => {
                         debug!(
                             "Allocating {vreg} at {:?} with hints: {:?} and size {size}",
-                            instr_uid,
-                            hints
+                            instr_uid, hints
                         );
 
                         Some(self.algo.allocate_arbitrary(&alloc_vreg, hints))
diff --git a/ir/crates/back/src/codegen/selection_dag/builder.rs b/ir/crates/back/src/codegen/selection_dag/builder.rs
index 9f15ca2..9c58516 100644
--- a/ir/crates/back/src/codegen/selection_dag/builder.rs
+++ b/ir/crates/back/src/codegen/selection_dag/builder.rs
@@ -1,17 +1,14 @@
+use codegen::selection_dag;
 use cranelift_entity::{
     EntityRef,
     SecondaryMap,
 };
 use daggy::{
-    NodeIndex,
     petgraph::visit::IntoNodeIdentifiers,
+    NodeIndex,
     Walker,
 };
 use iter_tools::Itertools;
-use rustc_hash::FxHashMap;
-use tracing::debug;
-
-use codegen::selection_dag;
 use natrix_middle::{
     cfg::{
         BasicBlockId,
@@ -26,7 +23,9 @@ use natrix_middle::{
     },
     ty::Type,
 };
+use rustc_hash::FxHashMap;
 use selection_dag::SelectionDAG;
+use tracing::debug;
 
 use crate::{
     codegen,
@@ -37,6 +36,7 @@ use crate::{
                 Register,
                 VReg,
             },
+            TargetMachine,
         },
         selection_dag::{
             Immediate,
@@ -47,7 +47,6 @@ use crate::{
         },
     },
 };
-use crate::codegen::machine::TargetMachine;
 
 #[derive(Debug)]
 pub struct Builder<'func, TM: TargetMachine> {
diff --git a/ir/crates/back/src/codegen/selection_dag/mod.rs b/ir/crates/back/src/codegen/selection_dag/mod.rs
index 568d50e..51fa153 100644
--- a/ir/crates/back/src/codegen/selection_dag/mod.rs
+++ b/ir/crates/back/src/codegen/selection_dag/mod.rs
@@ -6,30 +6,29 @@ use std::{
     },
 };
 
+pub use builder::Builder;
 use daggy::petgraph::dot::{
     Config,
     Dot,
 };
+use natrix_middle::{
+    cfg::BasicBlockId,
+    instruction::CmpOp,
+};
 use rustc_hash::FxHashMap;
 use smallvec::{
     smallvec,
     SmallVec,
 };
 
-pub use builder::Builder;
-use natrix_middle::{
-    cfg::BasicBlockId,
-    instruction::CmpOp,
-};
-
 use crate::codegen::machine::{
     reg::{
         Register,
         VReg,
     },
     Size,
+    TargetMachine,
 };
-use crate::codegen::machine::TargetMachine;
 
 pub mod builder;
 
@@ -262,9 +261,7 @@ impl<TM: TargetMachine> PseudoOp<TM> {
                 Some(Operand::Reg(reg)) => smallvec![*reg],
                 _ => smallvec![],
             },
-            Self::Phi(_, regs) => regs.iter().map(
-                |(reg, _)| *reg
-            ).collect(),
+            Self::Phi(_, regs) => regs.iter().map(|(reg, _)| *reg).collect(),
             Self::Def(_) => smallvec![],
         }
     }
diff --git a/ir/crates/back/src/codegen/targets/calling_convention/mod.rs b/ir/crates/back/src/codegen/targets/calling_convention/mod.rs
index 9f4d835..723004c 100644
--- a/ir/crates/back/src/codegen/targets/calling_convention/mod.rs
+++ b/ir/crates/back/src/codegen/targets/calling_convention/mod.rs
@@ -1 +1 @@
-pub mod systemv;
\ No newline at end of file
+pub mod systemv;
diff --git a/ir/crates/back/src/codegen/targets/calling_convention/systemv.rs b/ir/crates/back/src/codegen/targets/calling_convention/systemv.rs
index f95a03c..acc5426 100644
--- a/ir/crates/back/src/codegen/targets/calling_convention/systemv.rs
+++ b/ir/crates/back/src/codegen/targets/calling_convention/systemv.rs
@@ -1,11 +1,13 @@
-use crate::codegen::machine::{
-    abi::{
-        calling_convention::Slot,
-        CallingConvention,
+use crate::codegen::{
+    machine::{
+        abi::{
+            calling_convention::Slot,
+            CallingConvention,
+        },
+        Size,
     },
-    Size,
+    targets::x86_64,
 };
-use crate::codegen::targets::x86_64;
 
 #[derive(Default)]
 pub struct SystemV;
@@ -13,8 +15,8 @@ pub struct SystemV;
 impl CallingConvention for SystemV {
     type Reg = x86_64::PhysicalRegister;
     fn parameter_slots(
-        params: impl Iterator<Item=Size>,
-    ) -> impl Iterator<Item=Slot<Self::Reg>> {
+        params: impl Iterator<Item = Size>,
+    ) -> impl Iterator<Item = Slot<Self::Reg>> {
         let mut used_regs = 0;
         params.map(move |size| {
             let slot = if used_regs < 6 {
diff --git a/ir/crates/back/src/codegen/targets/mod.rs b/ir/crates/back/src/codegen/targets/mod.rs
index 3fc2bde..9a1807b 100644
--- a/ir/crates/back/src/codegen/targets/mod.rs
+++ b/ir/crates/back/src/codegen/targets/mod.rs
@@ -1,2 +1,2 @@
-pub mod x86_64;
 pub mod calling_convention;
+pub mod x86_64;
diff --git a/ir/crates/back/src/codegen/targets/x86_64/asm.rs b/ir/crates/back/src/codegen/targets/x86_64/asm.rs
index 8f1035d..ad8982a 100644
--- a/ir/crates/back/src/codegen/targets/x86_64/asm.rs
+++ b/ir/crates/back/src/codegen/targets/x86_64/asm.rs
@@ -4,11 +4,11 @@ use std::ops::{
 };
 
 use iced_x86::{
-    Code,
     code_asm::{
         CodeAssembler,
         CodeLabel,
     },
+    Code,
     Formatter,
     Instruction,
     IntelFormatter,
@@ -17,10 +17,17 @@ use iced_x86::{
 };
 use rustc_hash::FxHashMap;
 
-use crate::codegen::machine;
-use crate::codegen::machine::function::cfg::BasicBlockId;
-use crate::codegen::targets::x86_64;
-use crate::codegen::targets::x86_64::{CC, PhysicalRegister};
+use crate::codegen::{
+    machine,
+    machine::function::cfg::BasicBlockId,
+    targets::{
+        x86_64,
+        x86_64::{
+            PhysicalRegister,
+            CC,
+        },
+    },
+};
 
 pub struct Assembler {
     assembler: CodeAssembler,
@@ -125,9 +132,9 @@ impl machine::asm::Assembler for Assembler {
                         dest,
                         immediate.as_encoded_dword().unwrap(),
                     )
-                        .unwrap(),
+                    .unwrap(),
                 )
-                    .unwrap();
+                .unwrap();
             }
             x86_64::Instr::SUB32rr { src, dest } => {
                 let dest: Register = dest.try_as_physical().unwrap().into();
@@ -143,9 +150,9 @@ impl machine::asm::Assembler for Assembler {
                         dest,
                         immediate.as_encoded_dword().unwrap(),
                     )
-                        .unwrap(),
+                    .unwrap(),
                 )
-                    .unwrap();
+                .unwrap();
             }
             x86_64::Instr::ADD32rr { src, dest } => {
                 let dest: Register = dest.try_as_physical().unwrap().into();
@@ -161,9 +168,9 @@ impl machine::asm::Assembler for Assembler {
                         dest,
                         immediate.as_encoded_dword().unwrap(),
                     )
-                        .unwrap(),
+                    .unwrap(),
                 )
-                    .unwrap();
+                .unwrap();
             }
             x86_64::Instr::MOV8rr { src, dest } => {
                 let dest: Register = dest.try_as_physical().unwrap().into();
@@ -179,9 +186,9 @@ impl machine::asm::Assembler for Assembler {
                         dest,
                         immediate.as_encoded_dword().unwrap(),
                     )
-                        .unwrap(),
+                    .unwrap(),
                 )
-                    .unwrap();
+                .unwrap();
             }
             x86_64::Instr::MOV16rr { src, dest } => {
                 let dest: Register = dest.try_as_physical().unwrap().into();
@@ -197,9 +204,9 @@ impl machine::asm::Assembler for Assembler {
                         dest,
                         immediate.as_encoded_dword().unwrap(),
                     )
-                        .unwrap(),
+                    .unwrap(),
                 )
-                    .unwrap();
+                .unwrap();
             }
             x86_64::Instr::MOV32rr { src, dest } => {
                 let dest: Register = dest.try_as_physical().unwrap().into();
@@ -217,9 +224,9 @@ impl machine::asm::Assembler for Assembler {
                             .as_encoded_dword()
                             .expect("64-bit immediates are too large. Should be stored in memory"),
                     )
-                        .unwrap(),
+                    .unwrap(),
                 )
-                    .unwrap();
+                .unwrap();
             }
             x86_64::Instr::MOV64rr { src, dest } => {
                 let dest: Register = dest.try_as_physical().unwrap().into();
@@ -246,7 +253,7 @@ impl machine::asm::Assembler for Assembler {
                     Instruction::with2(Code::Cmp_rm32_imm32, lhs, rhs.as_encoded_dword().unwrap())
                         .unwrap(),
                 )
-                    .unwrap();
+                .unwrap();
             }
             x86_64::Instr::CMP8ri { lhs, rhs } => {
                 let lhs: Register = lhs.try_as_physical().unwrap().into();
@@ -254,7 +261,7 @@ impl machine::asm::Assembler for Assembler {
                     Instruction::with2(Code::Cmp_rm8_imm8, lhs, rhs.as_encoded_dword().unwrap())
                         .unwrap(),
                 )
-                    .unwrap();
+                .unwrap();
             }
             x86_64::Instr::SETCC { dest, cc } => {
                 let dest: Register = dest.try_as_physical().unwrap().into();
diff --git a/ir/crates/back/src/codegen/targets/x86_64/mod.rs b/ir/crates/back/src/codegen/targets/x86_64/mod.rs
index eae24f6..3739a77 100644
--- a/ir/crates/back/src/codegen/targets/x86_64/mod.rs
+++ b/ir/crates/back/src/codegen/targets/x86_64/mod.rs
@@ -1,25 +1,23 @@
+use machine::instr::Instr as MInstr;
+use natrix_middle::instruction::CmpOp;
 use smallvec::{
     smallvec,
     SmallVec,
 };
 use strum::VariantArray;
 
-use machine::instr::Instr as MInstr;
-use natrix_middle::instruction::CmpOp;
-
 use crate::codegen::{
     machine,
     machine::{
-        Architecture,
         backend,
-        Endianness,
         function::{
-            BasicBlockId,
             builder::{
                 MatchedPattern,
+                PatternIn,
                 PatternInOperand,
                 PatternInOutput,
             },
+            BasicBlockId,
             Function,
         },
         instr::{
@@ -27,13 +25,14 @@ use crate::codegen::{
             PseudoInstr,
         },
         isa::PhysicalRegister as MachPhysicalRegister,
+        Architecture,
+        Endianness,
         Size,
         TargetMachine,
     },
     selection_dag::Immediate,
+    targets::calling_convention::systemv::SystemV,
 };
-use crate::codegen::machine::function::builder::PatternIn;
-use crate::codegen::targets::calling_convention::systemv::SystemV;
 
 mod asm;
 
@@ -421,7 +420,6 @@ impl MachPhysicalRegister for PhysicalRegister {
     }
 }
 
-
 impl machine::isa::MachInstr for Instr {
     type TM = Target;
 
@@ -508,8 +506,12 @@ impl machine::isa::MachInstr for Instr {
             Self::CMP32rr { lhs, rhs } => {
                 smallvec![InstrOperand::Reg(*lhs), InstrOperand::Reg(*rhs)]
             }
-            Self::CMP32ri { lhs, rhs } => smallvec![InstrOperand::Reg(*lhs),InstrOperand::Imm(*rhs)],
-            Self::CMP8ri { lhs, rhs } => smallvec![InstrOperand::Reg(*lhs),InstrOperand::Imm(*rhs)],
+            Self::CMP32ri { lhs, rhs } => {
+                smallvec![InstrOperand::Reg(*lhs), InstrOperand::Imm(*rhs)]
+            }
+            Self::CMP8ri { lhs, rhs } => {
+                smallvec![InstrOperand::Reg(*lhs), InstrOperand::Imm(*rhs)]
+            }
             Self::SETCC { dest, .. } => smallvec![InstrOperand::Reg(*dest)],
             Self::JCC { target, .. } => smallvec![InstrOperand::Label(*target),],
         }
diff --git a/ir/crates/back/src/emu.rs b/ir/crates/back/src/emu.rs
index 03de7d7..6b6338f 100644
--- a/ir/crates/back/src/emu.rs
+++ b/ir/crates/back/src/emu.rs
@@ -10,13 +10,13 @@ use tracing::{
     warn,
 };
 use unicorn_engine::{
-    SECOND_SCALE,
     unicorn_const::{
+        uc_error,
         Arch,
         Mode,
         Permission,
-        uc_error,
     },
+    SECOND_SCALE,
 };
 
 use crate::codegen::machine::{
@@ -24,10 +24,10 @@ use crate::codegen::machine::{
         calling_convention::Slot,
         CallingConvention,
     },
-    Architecture,
     function::FunctionId,
     isa::PhysicalRegister,
     module::asm::AsmModule,
+    Architecture,
     TargetMachine,
 };
 
diff --git a/ir/crates/back/src/lib.rs b/ir/crates/back/src/lib.rs
index bc984d7..ff1a830 100644
--- a/ir/crates/back/src/lib.rs
+++ b/ir/crates/back/src/lib.rs
@@ -9,4 +9,3 @@ extern crate strum;
 
 pub mod codegen;
 pub mod emu;
-