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Add an example that uses UInt2, UInt3, .. and tests that they work correctly in the full range (i.e. overflow/undeflow them). The test should verify both the simulation and generated C++ and VHDL code.
Add an example that uses
UInt2
,UInt3
, .. and tests that they work correctly in the full range (i.e. overflow/undeflow them). The test should verify both the simulation and generated C++ and VHDL code.Want to back this issue? Post a bounty on it! We accept bounties via Bountysource.
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