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lalitha-oruganti edited this page Nov 3, 2023
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Welcome to the ADI-Power-Tree wiki!
Analog Devices Power Trees for FPGAs and GPUs
Utilizing pre-existing power management reference designs can provide a good starting point, but modifications are often necessary to meet specific performance and power requirements. Arrow Electronics engineers can assist in analyzing your requirements, identifying the necessary modifications, and ensuring that the final design achieves optimal performance and power efficiency. Their knowledge and experience in power management enable them to provide valuable guidance and support throughout the design process, helping you achieve the best possible power solution for your specific application. Download the “Analog Devices Power Trees for FPGAs and GPUs” Guide |
- MAX 10 NEEK Development Kit
- Cyclone® 10 LP FPGA Evaluation Kit
- Cyclone® V E Development Kit
- Cyclone® V GT FPGA Development Kit
- Cyclone® V SoC Development Kit and SoC Embedded Design Suite
- Cyclone® V Development Kit
- Terasic DE1-SoC Development Kit
- Terasic DE0-Nano-SoC Kit/Atlas-SoC Kit
- Terasic DE10-Nano Kit
- Terasic C5G Cyclone® V GX Starter Kit
- Intel Agilex® 7 FPGA F-Series (FM86.76) Development Kit (2x F-Tile)
- Intel Agilex® 7 FPGA F-Series Transceiver-SoC (FM61) Development Kit (P-Tile and E-Tile)
- Intel Agilex® 7 FPGA I-Series (FM85) Development Kit (2x R-Tile and 1x F-Tile)