Please include Xtensa arch in standard distro?

[TurkeyMan]

Espressif have upstreamed the Xtensa backend for LLVM.
Please consider adding the Xtensa backend to LDC by default. ESP micros are extremely common; used in basically every cheap/low-power IOT product these days.

I have started a new company and primary target is Xtensa microcontrollers. I don't like the company's tech stack depending on custom build compilers. There's not a huge force to choose D for microcontrollers, but there are some advantages, and my work will definitely push the D-on-microcontrollers ecosystem forward... but if the company depends on a custom build compiler, I will probably just flip back to C.
I can't accept an unreasonable level of stuffing around to build code; users must be able to install the default toolchain and compile.

[TurkeyMan]

Leave druntime and phobos unimplemented/not supported for now; I'll contribute that implementation in the future, but I'll run bare-metal for now. The compiler just needs to have the target included to get started.

[kassane]

Xtensa for LLVM is experimental (generic cpu-features only). Currently need espressif-fork for esp8266, esp32 & esp32-S[2|3].

upstream:
https://github.com/llvm/llvm-project/blob/llvmorg-18.1.8/llvm/lib/Target/Xtensa/Xtensa.td
espressif/llvm
https://github.com/espressif/llvm-project/blob/xtensa_release_18.1.2/llvm/lib/Target/Xtensa/Xtensa.td

Users @Reavershark and @kubo39 have already experimented using ldc2 for esp32 to clarify the details.

[TurkeyMan]

That's weird... so, they upstreamed the arch 2 years ago, but their fork is currently way ahead?
Why haven't they pushed their last 2 years of work? 🤨

[kassane]

The official LLVM backend from Cadence can support ESP32 as well. However it is only available from Cadence under NDA, along with the rest of the Xtensa tools.

espressif/llvm-xtensa#6 (comment)

Xtensa architecture is owned by Cadence and not espressif ( which pays the IP license)
Espressif has invested only in risc-v (no license required) in recent years. However, the available devices aren't as high-performance compared to the esp32-s3/esp32 supporting SIMD (asm only).

[Reavershark]

Leave druntime and phobos unimplemented/not supported for now; I'll contribute that implementation in the future, but I'll run bare-metal for now. The compiler just needs to have the target included to get started.

I have a small partial @nogc druntime and phobos implementation on esp32, not really released yet but I might soon.

[JohanEngelen]

Please reserve a version keyword for this architecture, then we can implement that easily on the LDC side. https://dlang.org/spec/version.html#predefined-versions

[JohanEngelen]

Espressif have upstreamed the Xtensa backend for LLVM. Please consider adding the Xtensa backend to LDC by default. ESP micros are extremely common; used in basically every cheap/low-power IOT product these days.

I have started a new company and primary target is Xtensa microcontrollers. I don't like the company's tech stack depending on custom build compilers. There's not a huge force to choose D for microcontrollers, but there are some advantages, and my work will definitely push the D-on-microcontrollers ecosystem forward... but if the company depends on a custom build compiler, I will probably just flip back to C. I can't accept an unreasonable level of stuffing around to build code; users must be able to install the default toolchain and compile.

Understandable, but note: with github actions it is fairly straightforward to build an LDC with a different LLVM build. See LDC's github actions (we have one where we link it with LDC-modified LLVM). May be a workable solution. You could even upstream the action to LDC, and I would support merging it. ESP is indeed very common and would certainly be cool if there is an LDC compiler that can target it.

[kinke]

To add this to our LLVM CI build, which we use for the LDC CI builds, it should suffice to add an according Xtensa item to LLVM_EXPERIMENTAL_TARGETS_TO_BUILD, in

• https://github.com/ldc-developers/llvm-project/blob/935778f46f782492371ef43fc07bae4f6b6ff113/.github/workflows/ldc-release.yml#L95
• https://github.com/ldc-developers/llvm-project/blob/935778f46f782492371ef43fc07bae4f6b6ff113/.cirrus.yml#L7.

[thewilsonator]

Please reserve a version keyword for this architecture, then we can implement that easily on the LDC side. https://dlang.org/spec/version.html#predefined-versions

Done, see dlang/dlang.org#3894 See also dlang/dmd#16773 for DMD reserved version identifier.

[thewilsonator]

Upstream PR for Xtensa version identifier merged into DMD (all that does is give an error if you try to manually set version = Xtensa, not required for actual functionality), that will come next frontend release. The dlang.org PR is just documentation.

So #4727 is now ready to go.

[denizzzka]

ESP micros are extremely common; used in basically every cheap/low-power IOT product these days.
I have started a new company and primary target is Xtensa microcontrollers.

As said above, it seems ESP are replacing Xtensa architecture with RISC-V

Excuse me, I'll take this opportunity to post ~offtopic:

I made Druntime and Phobos forks which supports bare metal ARM and almost supports RISCV32 (actually focusing on ESP IDF):
https://github.com/denizzzka/dfruntime/
https://github.com/denizzzka/d_c_arm_test/tree/add_esp-idf/ESP-IDF_demo_project

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