diff --git a/cpu/src/lib.rs b/cpu/src/lib.rs
index 55d0f31c..8518b020 100644
--- a/cpu/src/lib.rs
+++ b/cpu/src/lib.rs
@@ -489,10 +489,11 @@ where
         let opcode = <Self as Instruction<M>>::OPCODE;
         let clk = state.cpu().clock;
         let read_addr = (state.cpu().fp as i32 + ops.c()) as u32;
-        let write_addr = (state.cpu().fp as i32 + ops.b()) as u32;
+        let write_addr_loc = (state.cpu().fp as i32 + ops.b()) as u32;
         let pc = state.cpu().pc;
-        let cell = state.mem_mut().read(clk, read_addr, true, pc, opcode, 0, "");
-        state.mem_mut().write(clk, write_addr, cell, true);
+        let write_addr = state.mem_mut().read(clk, write_addr_loc.into(), true, pc, opcode, 0, "");
+        let cell = state.mem_mut().read(clk, read_addr, true, pc, opcode, 1, "");
+        state.mem_mut().write(clk, write_addr.into(), cell, true);
         state.cpu_mut().pc += 1;
         state
             .cpu_mut()