From 11a72dfe3b01197ef69a3672a21e67d61603afe3 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Mon, 8 Jan 2024 21:50:27 +0800 Subject: [PATCH 1/2] [ValueLattice] Add pre-commit tests. NFC. --- .../test/Transforms/SCCP/widen-steps-limit.ll | 103 ++++++++++++++++++ 1 file changed, 103 insertions(+) create mode 100644 llvm/test/Transforms/SCCP/widen-steps-limit.ll diff --git a/llvm/test/Transforms/SCCP/widen-steps-limit.ll b/llvm/test/Transforms/SCCP/widen-steps-limit.ll new file mode 100644 index 00000000000000..1beb8fd145a9a2 --- /dev/null +++ b/llvm/test/Transforms/SCCP/widen-steps-limit.ll @@ -0,0 +1,103 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 +; RUN: opt -S -passes=sccp < %s | FileCheck %s + +define void @test() { +; CHECK-LABEL: define void @test() { +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP0:%.*]] = tail call i8 @geti8() +; CHECK-NEXT: [[CONV_I:%.*]] = zext i8 [[TMP0]] to i32 +; CHECK-NEXT: [[CMP19_I_NOT:%.*]] = tail call i1 @geti1() +; CHECK-NEXT: br i1 [[CMP19_I_NOT]], label [[WHILE_END_I_THREAD:%.*]], label [[EXIT2:%.*]] +; CHECK: while.end.i.thread: +; CHECK-NEXT: [[TMP1:%.*]] = tail call i1 @geti1() +; CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[TMP1]] to i32 +; CHECK-NEXT: br label [[EXIT2]] +; CHECK: exit2: +; CHECK-NEXT: [[CMP_I12_I4:%.*]] = phi i32 [ [[TMP2]], [[WHILE_END_I_THREAD]] ], [ 0, [[ENTRY:%.*]] ] +; CHECK-NEXT: [[CMP:%.*]] = tail call i1 @geti1() +; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN6:%.*]], label [[IF_END_I_I:%.*]] +; CHECK: if.then6: +; CHECK-NEXT: [[CMP_I32:%.*]] = icmp ugt i32 [[CMP_I12_I4]], [[CONV_I]] +; CHECK-NEXT: br i1 [[CMP_I32]], label [[EXIT:%.*]], label [[COND_FALSE_I:%.*]] +; CHECK: cond.false.i: +; CHECK-NEXT: [[CMP_NOT6_I_I:%.*]] = tail call i1 @geti1() +; CHECK-NEXT: br i1 [[CMP_NOT6_I_I]], label [[EXIT]], label [[FOR_BODY_PREHEADER_I_I:%.*]] +; CHECK: for.body.preheader.i.i: +; CHECK-NEXT: [[CMP_NOT_I_I:%.*]] = tail call i1 @geti1() +; CHECK-NEXT: br label [[EXIT]] +; CHECK: exit: +; CHECK-NEXT: [[RETVAL_SROA_3_0_I:%.*]] = phi i32 [ 0, [[IF_THEN6]] ], [ 1, [[COND_FALSE_I]] ], [ 1, [[FOR_BODY_PREHEADER_I_I]] ] +; CHECK-NEXT: br i1 [[CMP19_I_NOT]], label [[IF_END_I_I]], label [[DO_BODY_I_I:%.*]] +; CHECK: do.body.i.i: +; CHECK-NEXT: [[RESULT_SROA_7_0_I_I:%.*]] = phi i32 [ [[RESULT_SROA_7_1_I_I:%.*]], [[DO_COND_I_I:%.*]] ], [ [[RETVAL_SROA_3_0_I]], [[EXIT]] ] +; CHECK-NEXT: switch i32 [[RESULT_SROA_7_0_I_I]], label [[DO_COND_I_I]] [ +; CHECK-NEXT: i32 2, label [[SW_BB_I_I:%.*]] +; CHECK-NEXT: i32 1, label [[IF_END_I_I]] +; CHECK-NEXT: i32 0, label [[IF_END_I_I]] +; CHECK-NEXT: ] +; CHECK: sw.bb.i.i: +; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @geti32() +; CHECK-NEXT: br label [[DO_COND_I_I]] +; CHECK: do.cond.i.i: +; CHECK-NEXT: [[RESULT_SROA_7_1_I_I]] = phi i32 [ [[RESULT_SROA_7_0_I_I]], [[DO_BODY_I_I]] ], [ [[TMP3]], [[SW_BB_I_I]] ] +; CHECK-NEXT: [[CMP22_I_I:%.*]] = tail call i1 @geti1() +; CHECK-NEXT: br i1 [[CMP22_I_I]], label [[DO_BODY_I_I]], label [[IF_END_I_I]] +; CHECK: if.end.i.i: +; CHECK-NEXT: ret void +; +entry: + %0 = tail call i8 @geti8() + %conv.i = zext i8 %0 to i32 + %cmp19.i.not = tail call i1 @geti1() + br i1 %cmp19.i.not, label %while.end.i.thread, label %exit2 + +while.end.i.thread: ; preds = %entry + %1 = tail call i1 @geti1() + %2 = zext i1 %1 to i32 + br label %exit2 + +exit2: ; preds = %while.end.i.thread, %entry + %cmp.i12.i4 = phi i32 [ %2, %while.end.i.thread ], [ 0, %entry ] + %cmp = tail call i1 @geti1() + br i1 %cmp, label %if.then6, label %if.end.i.i + +if.then6: ; preds = %exit2 + %cmp.i32 = icmp ugt i32 %cmp.i12.i4, %conv.i + br i1 %cmp.i32, label %exit, label %cond.false.i + +cond.false.i: ; preds = %if.then6 + %cmp.not6.i.i = tail call i1 @geti1() + br i1 %cmp.not6.i.i, label %exit, label %for.body.preheader.i.i + +for.body.preheader.i.i: ; preds = %cond.false.i + %cmp.not.i.i = tail call i1 @geti1() + br label %exit + +exit: ; preds = %for.body.preheader.i.i, %cond.false.i, %if.then6 + %retval.sroa.3.0.i = phi i32 [ 0, %if.then6 ], [ 1, %cond.false.i ], [ 1, %for.body.preheader.i.i ] + br i1 %cmp19.i.not, label %if.end.i.i, label %do.body.i.i + +do.body.i.i: ; preds = %exit, %do.cond.i.i + %result.sroa.7.0.i.i = phi i32 [ %result.sroa.7.1.i.i, %do.cond.i.i ], [ %retval.sroa.3.0.i, %exit ] + switch i32 %result.sroa.7.0.i.i, label %do.cond.i.i [ + i32 2, label %sw.bb.i.i + i32 1, label %if.end.i.i + i32 0, label %if.end.i.i + ] + +sw.bb.i.i: ; preds = %do.body.i.i + %3 = tail call i32 @geti32() + br label %do.cond.i.i + +do.cond.i.i: ; preds = %sw.bb.i.i, %do.body.i.i + %result.sroa.7.1.i.i = phi i32 [ %result.sroa.7.0.i.i, %do.body.i.i ], [ %3, %sw.bb.i.i ] + %cmp22.i.i = tail call i1 @geti1() + br i1 %cmp22.i.i, label %do.body.i.i, label %if.end.i.i + +if.end.i.i: ; preds = %do.cond.i.i, %do.body.i.i, %do.body.i.i, %exit, %exit2 + ret void +} + +declare i8 @geti8() +declare i32 @geti32() +declare i1 @geti1() From b599e2e59104ef7c3d230d9f7b7ebf7fed56d48d Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Mon, 8 Jan 2024 21:53:53 +0800 Subject: [PATCH 2/2] [ValueLattice] Reset the count of range extensions when merging an undef with a constant range. --- llvm/include/llvm/Analysis/ValueLattice.h | 1 + llvm/test/Transforms/SCCP/widen-steps-limit.ll | 14 +------------- 2 files changed, 2 insertions(+), 13 deletions(-) diff --git a/llvm/include/llvm/Analysis/ValueLattice.h b/llvm/include/llvm/Analysis/ValueLattice.h index 2898cdd3d7b0ca..196d7d11e13da4 100644 --- a/llvm/include/llvm/Analysis/ValueLattice.h +++ b/llvm/include/llvm/Analysis/ValueLattice.h @@ -406,6 +406,7 @@ class ValueLatticeElement { if (isUnknown()) { assert(!RHS.isUnknown() && "Unknow RHS should be handled earlier"); *this = RHS; + NumRangeExtensions = 0; return true; } diff --git a/llvm/test/Transforms/SCCP/widen-steps-limit.ll b/llvm/test/Transforms/SCCP/widen-steps-limit.ll index 1beb8fd145a9a2..98224c4d495705 100644 --- a/llvm/test/Transforms/SCCP/widen-steps-limit.ll +++ b/llvm/test/Transforms/SCCP/widen-steps-limit.ll @@ -29,19 +29,7 @@ define void @test() { ; CHECK-NEXT: [[RETVAL_SROA_3_0_I:%.*]] = phi i32 [ 0, [[IF_THEN6]] ], [ 1, [[COND_FALSE_I]] ], [ 1, [[FOR_BODY_PREHEADER_I_I]] ] ; CHECK-NEXT: br i1 [[CMP19_I_NOT]], label [[IF_END_I_I]], label [[DO_BODY_I_I:%.*]] ; CHECK: do.body.i.i: -; CHECK-NEXT: [[RESULT_SROA_7_0_I_I:%.*]] = phi i32 [ [[RESULT_SROA_7_1_I_I:%.*]], [[DO_COND_I_I:%.*]] ], [ [[RETVAL_SROA_3_0_I]], [[EXIT]] ] -; CHECK-NEXT: switch i32 [[RESULT_SROA_7_0_I_I]], label [[DO_COND_I_I]] [ -; CHECK-NEXT: i32 2, label [[SW_BB_I_I:%.*]] -; CHECK-NEXT: i32 1, label [[IF_END_I_I]] -; CHECK-NEXT: i32 0, label [[IF_END_I_I]] -; CHECK-NEXT: ] -; CHECK: sw.bb.i.i: -; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @geti32() -; CHECK-NEXT: br label [[DO_COND_I_I]] -; CHECK: do.cond.i.i: -; CHECK-NEXT: [[RESULT_SROA_7_1_I_I]] = phi i32 [ [[RESULT_SROA_7_0_I_I]], [[DO_BODY_I_I]] ], [ [[TMP3]], [[SW_BB_I_I]] ] -; CHECK-NEXT: [[CMP22_I_I:%.*]] = tail call i1 @geti1() -; CHECK-NEXT: br i1 [[CMP22_I_I]], label [[DO_BODY_I_I]], label [[IF_END_I_I]] +; CHECK-NEXT: br label [[IF_END_I_I]] ; CHECK: if.end.i.i: ; CHECK-NEXT: ret void ;