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Flickering black screen on ESP-32-wrover #312

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pastre opened this issue May 26, 2022 · 1 comment
Open

Flickering black screen on ESP-32-wrover #312

pastre opened this issue May 26, 2022 · 1 comment
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@pastre
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pastre commented May 26, 2022

We use GitHub issues for development related discussions.
Please use the forum to ask questions.

Describe the issue
Hey guys, I can't reun the demo. I've tried it on two different ILI9341 displays and using bith Wroom and Wrover ESP32s. This is my wiring. I've also tested with the Wrover preconfigured kit with the same results
ESP | Display


3V3 -> VCC
GND -> GND
IO18 -> RESET
IO21 -> SDI (MOSI)
IO19 -> SCK
3V3 -> LED
IO21-> DC

Code to reproduce the issue
Follow the tutorial. Example code with Wrover preconfigured

Expected Results
Sliding widgets demo

Actual Results
Flickering black screen

ESP32 Chip version
Same results using ESP32-WROVER and ESP32-Wroom DevKit1.0

ESP-IDF version
4.2.3

Development kit used
ESP32-Wroom DevKit1.0 and custom burner for ESP32-WROVER

Development machine OS
Windows

Compilation warnings/errors (if available)

If possible, copy the compilation log into a file and attach it here
ets Jun 8 2016 00:22:57

rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:6608
load:0x40078000,len:14788
ho 0 tail 12 room 4
load:0x40080400,len:3792
0x40080400: _init at ??:?

entry 0x40080694
I (28) boot: ESP-IDF v4.4.1 2nd stage bootloader
I (28) boot: compile time 03:26:21
I (29) boot: chip revision: 1
I (31) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (38) boot.esp32: SPI Speed : 40MHz
I (43) boot.esp32: SPI Mode : DIO
I (47) boot.esp32: SPI Flash Size : 4MB
I (52) boot: Enabling RNG early entropy source...
I (57) boot: Partition Table:
I (61) boot: ## Label Usage Type ST Offset Length
I (68) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (76) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (83) boot: 2 factory factory app 00 00 00010000 00100000
I (91) boot: End of partition table
I (95) boot_comm: chip revision: 1, min. application chip revision: 0
I (102) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=0e48ch ( 58508) map
I (132) esp_image: segment 1: paddr=0001e4b4 vaddr=3ffb0000 size=01b64h ( 7012) load
I (135) esp_image: segment 2: paddr=00020020 vaddr=400d0020 size=48f44h (298820) map
I (246) esp_image: segment 3: paddr=00068f6c vaddr=3ffb1b64 size=009d8h ( 2520) load
I (247) esp_image: segment 4: paddr=0006994c vaddr=40080000 size=0cef4h ( 52980) load
I (273) esp_image: segment 5: paddr=00076848 vaddr=50000000 size=00010h ( 16) load
I (280) boot: Loaded app from partition at offset 0x10000
I (280) boot: Disabling RNG early entropy source...
I (293) cpu_start: Pro cpu up.
I (294) cpu_start: Starting app cpu, entry point is 0x4008119c
0x4008119c: call_start_cpu1 at C:/Users/pastr/esp/esp-idf/components/esp_system/port/cpu_start.c:160

I (0) cpu_start: App cpu up.
I (310) cpu_start: Pro cpu start user code
I (310) cpu_start: cpu freq: 160000000
I (310) cpu_start: Application information:
I (314) cpu_start: Project name: lvgl-demo
I (320) cpu_start: App version: v2.0-65-gc192eac-dirty
I (326) cpu_start: Compile time: May 26 2022 04:16:33
I (332) cpu_start: ELF file SHA256: 9848386dc22b87f3...
I (338) cpu_start: ESP-IDF: v4.4.1
I (343) heap_init: Initializing. RAM available for dynamic allocation:
I (350) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (356) heap_init: At 3FFBB7B8 len 00024848 (146 KiB): DRAM
I (362) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (369) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (375) heap_init: At 4008CEF4 len 0001310C (76 KiB): IRAM
I (383) spi_flash: detected chip: generic
I (386) spi_flash: flash io: dio
I (391) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (40) lvgl_helpers: Display hor size: 480, ver size: 320
I (40) lvgl_helpers: Display buffer size: 19200
I (40) lvgl_helpers: Initializing SPI master for display
I (50) lvgl_helpers: Configuring SPI host HSPI_HOST (1)
I (60) lvgl_helpers: MISO pin: -1, MOSI pin: 13, SCLK pin: 14, IO2/WP pin: -1, IO3/HD pin: -1
I (60) lvgl_helpers: Max transfer size: 38400 (bytes)
I (70) lvgl_helpers: Initializing SPI bus...
I (80) disp_spi: Adding SPI device
I (80) disp_spi: Clock speed: 40000000Hz, mode: 0, CS pin: 15
I (310) ILI9341: Initialization.
I (530) ILI9341: Display orientation: PORTRAIT
I (530) ILI9341: 0x36 command value: 0x48

@stale
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stale bot commented Apr 20, 2023

This issue or pull request has been automatically marked as stale because it has not had recent activity. It will be closed if no further activity occurs. Thank you for your contributions.

@stale stale bot added the stale This will not be worked on label Apr 20, 2023
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