diff --git a/README.md b/README.md
index 351fa4f..8c4c733 100644
--- a/README.md
+++ b/README.md
@@ -30,7 +30,7 @@ A (soon to be) fully-featured NES emulator written in Rust.
 - [ ] BRK
 - [X] BVC
 - [X] BVS
-- [ ] CLC
+- [X] CLC
 - [ ] CLD
 - [ ] CLI
 - [ ] CLV
diff --git a/src/cpu/instructions.rs b/src/cpu/instructions.rs
index c6512b7..764a24a 100644
--- a/src/cpu/instructions.rs
+++ b/src/cpu/instructions.rs
@@ -72,6 +72,7 @@ pub static INSTRUCTIONS: Lazy<HashMap<u8, Instruction>> = Lazy::new(|| {
         Instruction {opcode: 0x00, name: "BRK", bytes: 1, addressing_mode: AddressingMode::Implicit},
         Instruction {opcode: 0x50, name: "BVC", bytes: 2, addressing_mode: AddressingMode::Relative},
         Instruction {opcode: 0x70, name: "BVS", bytes: 2, addressing_mode: AddressingMode::Relative},
+        Instruction {opcode: 0x18, name: "CLC", bytes: 1, addressing_mode: AddressingMode::Implicit},
         Instruction {opcode: 0xA9, name: "LDA", bytes: 2, addressing_mode: AddressingMode::Immediate},
         Instruction {opcode: 0xA5, name: "LDA", bytes: 2, addressing_mode: AddressingMode::ZeroPage},
         Instruction {opcode: 0xB5, name: "LDA", bytes: 2, addressing_mode: AddressingMode::ZeroPage_X},
diff --git a/src/cpu/mod.rs b/src/cpu/mod.rs
index c2e8a1d..eb8b2d0 100644
--- a/src/cpu/mod.rs
+++ b/src/cpu/mod.rs
@@ -109,6 +109,10 @@ impl CPU {
                 self.bvs();
                 None
             }
+            "CLC" => {
+                self.clc();
+                None
+            }
             "BRK" => Some(0),
             "LDA" => {
                 self.lda(&instruction.addressing_mode);
@@ -400,6 +404,10 @@ impl CPU {
         }
     }
 
+    fn clc(&mut self) {
+        self.clear_flag(STATUS_FLAG_MASK_CARRY);
+    }
+
     fn lda(&mut self, addressing_mode: &AddressingMode) {
         let operand = self.get_operand(addressing_mode);
         self.register_a = operand;
@@ -704,6 +712,17 @@ mod test_cpu {
         assert_eq!(cpu.program_counter, expected_program_counter);
     }
 
+    #[test_case(0b0000_0001, 0b0000_0000)]
+    #[test_case(0b0000_0000, 0b0000_0000)]
+    #[test_case(0b0100_0001, 0b0100_0000)]
+    #[test_case(0b0100_0000, 0b0100_0000)]
+    fn test_clc(status: u8, expected_status: u8) {
+        let mut cpu = CPU::new();
+        cpu.status = status;
+        cpu.clc();
+        assert_eq!(cpu.status, expected_status)
+    }
+
     #[test_case(0b0000_0001, 0x5, 0x4, 0x1, 0b0000_0001)]
     #[test_case(0b0000_0001, 0x5, 0x5, 0x0, 0b0000_0011)]
     #[test_case(0b0000_0001, 0x0, 0x1, 0xFF, 0b1000_0000)]