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soc: arm: nordic_nrf: nrf54l: use HFXO configuration from DT
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Instead of Kconfig

Signed-off-by: Gerard Marull-Paretas <[email protected]>
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gmarull committed Jan 19, 2024
1 parent bda1d3c commit 3eda10a
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Showing 3 changed files with 6 additions and 41 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -26,10 +26,6 @@ CONFIG_PINCTRL=y
# Enable GPIO
CONFIG_GPIO=y

# Setup clocks
CONFIG_SOC_HFXO_CAP_INTERNAL=y
CONFIG_SOC_HFXO_CAP_INT_VALUE_X4=60

CONFIG_SOC_NRF_FORCE_CONSTLAT=y

# Start SYSCOUNTER on driver init
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31 changes: 0 additions & 31 deletions soc/arm/nordic_nrf/nrf54l/Kconfig.soc
Original file line number Diff line number Diff line change
Expand Up @@ -25,37 +25,6 @@ config SOC_NRF54L15_ENGA_CPUAPP
select SOC_NRF54L15_ENGA
bool "NRF54L15 ENGA CPUAPP"

choice SOC_HFXO_LOAD_CAPACITANCE
prompt "HFXO load capacitance"
default SOC_HFXO_CAP_DEFAULT

config SOC_HFXO_CAP_DEFAULT
bool "SoC default"
help
When this option is used, the SoC initialization routine does not
touch the XOSC32MCAPS register value, so the default setting for
the SoC is in effect. Please note that this may not necessarily be
the reset value (0) for the register, as the register can be set
during the device trimming in the SystemInit() function.

config SOC_HFXO_CAP_EXTERNAL
bool "Use external load capacitors for HFXO"

config SOC_HFXO_CAP_INTERNAL
bool "Use internal load capacitors for HFXO"

endchoice

config SOC_HFXO_CAP_INT_VALUE_X4
int "Fourfold value of HFXO internal load capacitors (in pF)"
depends on SOC_HFXO_CAP_INTERNAL
range 16 68
help
Internal capacitors ranging from 4.0 pF to 17.0 pF in 0.25 pF steps
can be enabled on pins XC1 and XC2. This option specifies fourfold
capacitance value for the two capacitors. Set it to 16 to get 4.0 pF
for each capacitor, 17 to get 4.25 pF, and so on.

config SOC_NRF54L_VREG_MAIN_DCDC
bool "Enable nRF54L DC/DC converter."
help
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12 changes: 6 additions & 6 deletions soc/arm/nordic_nrf/nrf54l/soc.c
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,7 @@
LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);

#define LFXO_NODE DT_NODELABEL(lfxo)
#define HFXO_NODE DT_NODELABEL(hfxo)

static int nordicsemi_nrf54l_init(void)
{
Expand Down Expand Up @@ -81,7 +82,7 @@ static int nordicsemi_nrf54l_init(void)
nrf_oscillators_lfxo_cap_set(NRF_OSCILLATORS, (nrf_oscillators_lfxo_cap_t)0);
#endif

#if defined(CONFIG_SOC_HFXO_CAP_INTERNAL)
#if DT_ENUM_HAS_VALUE(HFXO_NODE, load_capacitors, internal)
uint32_t xosc32mtrim = NRF_FICR->XOSC32MTRIM;
/* The SLOPE field is in the two's complement form, hence this special
* handling. Ideally, it would result in just one SBFX instruction for
Expand All @@ -104,14 +105,13 @@ static int nordicsemi_nrf54l_init(void)
* holding any value between 4.0 pF and 17.0 pF in 0.25 pF steps.
*/
uint32_t capvalue =
(((CONFIG_SOC_HFXO_CAP_INT_VALUE_X4 - 22UL) * (uint32_t)(slope_m + 791) / 4UL) +
(offset_m << 2UL)) >>
8UL;
(((((DT_PROP(HFXO_NODE, load_capacitance_femtofarad) * 4UL) / 1000UL) - 22UL) *
(uint32_t)(slope_m + 791) / 4UL) + (offset_m << 2UL)) >> 8UL;

nrf_oscillators_hfxo_cap_set(NRF_OSCILLATORS, true, capvalue);
#elif defined(CONFIG_SOC_HFXO_CAP_EXTERNAL)
#elif DT_ENUM_HAS_VALUE(HFXO_NODE, load_capacitors, external)
nrf_oscillators_hfxo_cap_set(NRF_OSCILLATORS, false, 0);
#endif /* CONFIG_SOC_HFXO_CAP_INTERNAL */
#endif

if (IS_ENABLED(CONFIG_SOC_NRF_FORCE_CONSTLAT)) {
nrf_power_task_trigger(NRF_POWER, NRF_POWER_TASK_CONSTLAT);
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