This is an ibex RISC-V core implementation using sky130 or ibm130 sram.
This a secure RoT inspired by the OpenTitan design. The chips will be used to do a differential power analysis (DPA) and test our design techniques to mitigate side-channel attacks. Note: This RoT is supposed to be integrated with a secure PMU but we could barely fit the RoT in one test harness.