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Add package definitions.
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Signed-off-by: Tim 'mithro' Ansell <[email protected]>
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mithro committed Jan 4, 2024
1 parent d5df18a commit 4ac684c
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18 changes: 18 additions & 0 deletions benchmarks/BUILD
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# Copyright 2024 Google LLC
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.

package(
default_applicable_licenses = ["//:package_license"],
default_visibility = ["//visibility:private"],
)
5 changes: 5 additions & 0 deletions benchmarks/basic/BUILD
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# limitations under the License.

exports_files(glob(["common/**"]))

package(
default_applicable_licenses = ["//:package_license"],
default_visibility = ["//visibility:private"],
)
5 changes: 5 additions & 0 deletions benchmarks/basic/add/BUILD
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Expand Up @@ -20,6 +20,11 @@ load("@rules_hdl//dependency_support/org_theopenroadproject_asap7_pdk_r1p7:cells
load("//flows:basic_asic.bzl", "basic_asic_flow")
load("//verilog:providers.bzl", "verilog_library")

package(
default_applicable_licenses = ["//:package_license"],
default_visibility = ["//visibility:private"],
)

verilog_library(
name = "rtl",
srcs = [
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5 changes: 5 additions & 0 deletions benchmarks/basic/and/BUILD
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Expand Up @@ -20,6 +20,11 @@ load("@rules_hdl//dependency_support/org_theopenroadproject_asap7_pdk_r1p7:cells
load("//flows:basic_asic.bzl", "basic_asic_flow")
load("//verilog:providers.bzl", "verilog_library")

package(
default_applicable_licenses = ["//:package_license"],
default_visibility = ["//visibility:private"],
)

verilog_library(
name = "rtl",
srcs = [
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5 changes: 5 additions & 0 deletions benchmarks/basic/genbuild.py
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Expand Up @@ -105,6 +105,11 @@
load("//flows:basic_asic.bzl", "basic_asic_flow")
load("//verilog:providers.bzl", "verilog_library")
package(
default_applicable_licenses = ["//:package_license"],
default_visibility = ["//visibility:private"],
)
verilog_library(
name = "rtl",
srcs = [
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5 changes: 5 additions & 0 deletions benchmarks/basic/mul/BUILD
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Expand Up @@ -20,6 +20,11 @@ load("@rules_hdl//dependency_support/org_theopenroadproject_asap7_pdk_r1p7:cells
load("//flows:basic_asic.bzl", "basic_asic_flow")
load("//verilog:providers.bzl", "verilog_library")

package(
default_applicable_licenses = ["//:package_license"],
default_visibility = ["//visibility:private"],
)

verilog_library(
name = "rtl",
srcs = [
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5 changes: 5 additions & 0 deletions benchmarks/basic/xand/BUILD
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Expand Up @@ -20,6 +20,11 @@ load("@rules_hdl//dependency_support/org_theopenroadproject_asap7_pdk_r1p7:cells
load("//flows:basic_asic.bzl", "basic_asic_flow")
load("//verilog:providers.bzl", "verilog_library")

package(
default_applicable_licenses = ["//:package_license"],
default_visibility = ["//visibility:private"],
)

verilog_library(
name = "rtl",
srcs = [
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