diff --git a/benchmarks/BUILD b/benchmarks/BUILD index e69de29b..a66316d6 100644 --- a/benchmarks/BUILD +++ b/benchmarks/BUILD @@ -0,0 +1,18 @@ +# Copyright 2024 Google LLC +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +package( + default_applicable_licenses = ["//:package_license"], + default_visibility = ["//visibility:private"], +) diff --git a/benchmarks/basic/BUILD b/benchmarks/basic/BUILD index cb846aca..16ae28d3 100644 --- a/benchmarks/basic/BUILD +++ b/benchmarks/basic/BUILD @@ -13,3 +13,8 @@ # limitations under the License. exports_files(glob(["common/**"])) + +package( + default_applicable_licenses = ["//:package_license"], + default_visibility = ["//visibility:private"], +) diff --git a/benchmarks/basic/add/BUILD b/benchmarks/basic/add/BUILD index 8fb0f2b6..3e346dfe 100644 --- a/benchmarks/basic/add/BUILD +++ b/benchmarks/basic/add/BUILD @@ -20,6 +20,11 @@ load("@rules_hdl//dependency_support/org_theopenroadproject_asap7_pdk_r1p7:cells load("//flows:basic_asic.bzl", "basic_asic_flow") load("//verilog:providers.bzl", "verilog_library") +package( + default_applicable_licenses = ["//:package_license"], + default_visibility = ["//visibility:private"], +) + verilog_library( name = "rtl", srcs = [ diff --git a/benchmarks/basic/and/BUILD b/benchmarks/basic/and/BUILD index a5b83595..8bdf39b9 100644 --- a/benchmarks/basic/and/BUILD +++ b/benchmarks/basic/and/BUILD @@ -20,6 +20,11 @@ load("@rules_hdl//dependency_support/org_theopenroadproject_asap7_pdk_r1p7:cells load("//flows:basic_asic.bzl", "basic_asic_flow") load("//verilog:providers.bzl", "verilog_library") +package( + default_applicable_licenses = ["//:package_license"], + default_visibility = ["//visibility:private"], +) + verilog_library( name = "rtl", srcs = [ diff --git a/benchmarks/basic/genbuild.py b/benchmarks/basic/genbuild.py index 65f89910..47dea37b 100755 --- a/benchmarks/basic/genbuild.py +++ b/benchmarks/basic/genbuild.py @@ -105,6 +105,11 @@ load("//flows:basic_asic.bzl", "basic_asic_flow") load("//verilog:providers.bzl", "verilog_library") +package( + default_applicable_licenses = ["//:package_license"], + default_visibility = ["//visibility:private"], +) + verilog_library( name = "rtl", srcs = [ diff --git a/benchmarks/basic/mul/BUILD b/benchmarks/basic/mul/BUILD index bc83a8f0..50c2ed4a 100644 --- a/benchmarks/basic/mul/BUILD +++ b/benchmarks/basic/mul/BUILD @@ -20,6 +20,11 @@ load("@rules_hdl//dependency_support/org_theopenroadproject_asap7_pdk_r1p7:cells load("//flows:basic_asic.bzl", "basic_asic_flow") load("//verilog:providers.bzl", "verilog_library") +package( + default_applicable_licenses = ["//:package_license"], + default_visibility = ["//visibility:private"], +) + verilog_library( name = "rtl", srcs = [ diff --git a/benchmarks/basic/xand/BUILD b/benchmarks/basic/xand/BUILD index 8f7d4865..0033eda7 100644 --- a/benchmarks/basic/xand/BUILD +++ b/benchmarks/basic/xand/BUILD @@ -20,6 +20,11 @@ load("@rules_hdl//dependency_support/org_theopenroadproject_asap7_pdk_r1p7:cells load("//flows:basic_asic.bzl", "basic_asic_flow") load("//verilog:providers.bzl", "verilog_library") +package( + default_applicable_licenses = ["//:package_license"], + default_visibility = ["//visibility:private"], +) + verilog_library( name = "rtl", srcs = [