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mithro committed Oct 30, 2023
1 parent eee95aa commit bd48ec1
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Showing 4 changed files with 117 additions and 93 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -19,26 +19,26 @@

# Standard cells
filegroup(
name = "gds_cells_rvt",
name = "asap7-sc6t_rev26-gds_cells_rvt",
srcs = ["asap7sc6t_26/GDS/asap7sc6t_26_R.gds"],
visibility = [":data_visibility"],
)

filegroup(
name = "gds_cells_lvt",
name = "asap7-sc6t_rev26-gds_cells_lvt",
srcs = ["asap7sc6t_26/GDS/asap7sc6t_26_L.gds"],
visibility = [":data_visibility"],
)

filegroup(
name = "gds_cells_slvt",
name = "asap7-sc6t_rev26-gds_cells_slvt",
srcs = ["asap7sc6t_26/GDS/asap7sc6t_26_SL.gds"],
visibility = [":data_visibility"],
)

# SRAM
filegroup(
name = "gds_sram",
name = "asap7-sc6t_rev26-gds_sram",
srcs = ["asap7sc6t_26/GDS/asap7sc6t_26_SRAM.gds"],
visibility = [":data_visibility"],
)
Expand All @@ -49,26 +49,26 @@ filegroup(

# Standard cells
filegroup(
name = "libgz_cells_rvt",
name = "asap7-sc6t_rev26-libgz_cells_rvt",
srcs = glob(["asap7sc6t_26/LIB/CCS/*RVT*.lib.gz"]),
visibility = [":data_visibility"],
)

filegroup(
name = "libgz_cells_lvt",
name = "asap7-sc6t_rev26-libgz_cells_lvt",
srcs = glob(["asap7sc6t_26/LIB/CCS/*LVT*.lib.gz"]),
visibility = [":data_visibility"],
)

filegroup(
name = "libgz_cells_slvt",
name = "asap7-sc6t_rev26-libgz_cells_slvt",
srcs = glob(["asap7sc6t_26/LIB/CCS/*SLVT*.lib.gz"]),
visibility = [":data_visibility"],
)

# SRAM
filegroup(
name = "libgz_sram",
name = "asap7-sc6t_rev26-libgz_sram",
srcs = glob(["asap7sc6t_26/LIB/CCS/*SRAM*.lib.gz"]),
visibility = [":data_visibility"],
)
Expand All @@ -80,7 +80,7 @@ filegroup(

# Standard cells
filegroup(
name = "v_cells_rvt",
name = "asap7-sc6t_rev26-v_cells_rvt",
srcs = [
"asap7sc6t_26/Verilog/asap7sc7p5t_CKINVDC_RVT_TT_210930.v",
"asap7sc6t_26/Verilog/asap7sc7p5t_AO_RVT_TT_210930.v",
Expand All @@ -93,7 +93,7 @@ filegroup(
)

filegroup(
name = "v_cells_lvt",
name = "asap7-sc6t_rev26-v_cells_lvt",
srcs = [
"asap7sc6t_26/Verilog/asap7sc7p5t_CKINVDC_LVT_TT_210930.v",
"asap7sc6t_26/Verilog/asap7sc7p5t_AO_LVT_TT_210930.v",
Expand All @@ -106,7 +106,7 @@ filegroup(
)

filegroup(
name = "v_cells_slvt",
name = "asap7-sc6t_rev26-v_cells_slvt",
srcs = [
"asap7sc6t_26/Verilog/asap7sc7p5t_CKINVDC_SLVT_TT_210930.v",
"asap7sc6t_26/Verilog/asap7sc7p5t_AO_SLVT_TT_210930.v",
Expand All @@ -120,7 +120,7 @@ filegroup(

# SRAM
filegroup(
name = "v_sram",
name = "asap7-sc6t_rev26-v_sram",
srcs = [
"asap7sc6t_26/Verilog/asap7sc7p5t_CKINVDC_SRAM_TT_210930.v",
"asap7sc6t_26/Verilog/asap7sc7p5t_AO_SRAM_TT_210930.v",
Expand All @@ -137,26 +137,26 @@ filegroup(

# Standard cells
filegroup(
name = "lvs_cells_rvt",
name = "asap7-sc6t_rev26-lvs_cells_rvt",
srcs = ["asap7sc6t_26/CDL/LVS/asap7sc6t_26_R.cdl"],
visibility = [":data_visibility"],
)

filegroup(
name = "lvs_cells_lvt",
name = "asap7-sc6t_rev26-lvs_cells_lvt",
srcs = ["asap7sc6t_26/CDL/LVS/asap7sc6t_26_L.cdl"],
visibility = [":data_visibility"],
)

filegroup(
name = "lvs_cells_slvt",
name = "asap7-sc6t_rev26-lvs_cells_slvt",
srcs = ["asap7sc6t_26/CDL/LVS/asap7sc6t_26_SL.cdl"],
visibility = [":data_visibility"],
)

# SRAM
filegroup(
name = "lvs_sram",
name = "asap7-sc6t_rev26-lvs_sram",
srcs = ["asap7sc6t_26/CDL/LVS/asap7sc6t_26_SRAM.cdl"],
visibility = [":data_visibility"],
)
Expand All @@ -166,26 +166,26 @@ filegroup(

# Standard cells
filegroup(
name = "spice_cells_rvt",
name = "asap7-sc6t_rev26-spice_cells_rvt",
srcs = ["asap7sc6t_26/CDL/xAct3D_extracted/asap7sc6t_26_L_211010.sp"],
visibility = [":data_visibility"],
)

filegroup(
name = "spice_cells_lvt",
name = "asap7-sc6t_rev26-spice_cells_lvt",
srcs = ["asap7sc6t_26/CDL/xAct3D_extracted/asap7sc6t_26_R_211010.sp"],
visibility = [":data_visibility"],
)

filegroup(
name = "spice_cells_slvt",
name = "asap7-sc6t_rev26-spice_cells_slvt",
srcs = ["asap7sc6t_26/CDL/xAct3D_extracted/asap7sc6t_26_SL_211010.sp"],
visibility = [":data_visibility"],
)

# SRAM
filegroup(
name = "spice_sram",
name = "asap7-sc6t_rev26-spice_sram",
srcs = ["asap7sc6t_26/CDL/xAct3D_extracted/asap7sc6t_26_SRAM_211010.sp"],
visibility = [":data_visibility"],
)
Expand All @@ -195,34 +195,34 @@ filegroup(

# Standard cells
filegroup(
name = "lef_cells_rvt",
name = "asap7-sc6t_rev26-lef_cells_rvt",
srcs = ["asap7sc6t_26/LEF/asap7sc6t_26_R_1x_210923b.lef"],
visibility = [":data_visibility"],
)

filegroup(
name = "lef_cells_lvt",
name = "asap7-sc6t_rev26-lef_cells_lvt",
srcs = ["asap7sc6t_26/LEF/asap7sc6t_26_L_1x_210923b.lef"],
visibility = [":data_visibility"],
)

filegroup(
name = "lef_cells_slvt",
name = "asap7-sc6t_rev26-lef_cells_slvt",
srcs = ["asap7sc6t_26/LEF/asap7sc6t_26_SL_1x_210923b.lef"],
visibility = [":data_visibility"],
)

# SRAM
filegroup(
name = "lef_sram",
name = "asap7-sc6t_rev26-lef_sram",
srcs = ["asap7sc6t_26/LEF/asap7sc6t_26_SRAM_1x_210923b.lef"],
visibility = [":data_visibility"],
)

# Misc cells
# FIXME: Where is the 1x techlef?
#filegroup(
# name = "lef_tech",
# name = "asap7-sc6t_rev26-lef_tech",
# srcs = ["asap7sc6t_26/techlef_misc/asap7_tech_1x_201209.lef"],
# visibility = [":data_visibility"],
#)
Expand All @@ -232,33 +232,33 @@ filegroup(

# Standard cells
filegroup(
name = "lef_cells_4x_rvt",
name = "asap7-sc6t_rev26-lef_cells_4x_rvt",
srcs = ["asap7sc6t_26/LEF/scaled/asap7sc6t_26_R_4x_210923b.lef"],
visibility = [":data_visibility"],
)

filegroup(
name = "lef_cells_4x_lvt",
name = "asap7-sc6t_rev26-lef_cells_4x_lvt",
srcs = ["asap7sc6t_26/LEF/scaled/asap7sc6t_26_L_4x_210923b.lef"],
visibility = [":data_visibility"],
)

filegroup(
name = "lef_cells_4x_slvt",
name = "asap7-sc6t_rev26-lef_cells_4x_slvt",
srcs = ["asap7sc6t_26/LEF/scaled/asap7sc6t_26_SL_4x_210923b.lef"],
visibility = [":data_visibility"],
)

# SRAM
filegroup(
name = "lef_sram_4x",
name = "asap7-sc6t_rev26-lef_sram_4x",
srcs = ["asap7sc6t_26/LEF/scaled/asap7sc6t_26_SRAM_4x_210923b.lef"],
visibility = [":data_visibility"],
)

# Misc cell layouts for place and route
filegroup(
name = "lef_tech_4x",
name = "asap7-sc6t_rev26-lef_tech_4x",
srcs = ["asap7sc6t_26/techlef_misc/asap7_tech_4x_201209.lef"],
visibility = [":data_visibility"],
)
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