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Generate #1341

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Generate #1341

Triggered via schedule December 2, 2024 07:34
@salkiniumsalkinium
⁠ 202131e
develop
Status Failure
Total duration 5m 51s
Artifacts –

tests.yml

on: schedule
STM32: F4, G4, L0, H5
5m 31s
STM32: F4, G4, L0, H5
STM32: C0, G0, U0, H7, L4
5m 44s
STM32: C0, G0, U0, H7, L4
STM32: F0, F1, F2, F3, F7, L1, L5, WB, WL, U5
4m 24s
STM32: F0, F1, F2, F3, F7, L1, L5, WB, WL, U5
AVR, SAM, NRF, RP
1m 3s
AVR, SAM, NRF, RP
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3 errors
STM32: F0, F1, F2, F3, F7, L1, L5, WB, WL, U5
Process completed with exit code 2.
STM32: F4, G4, L0, H5
Process completed with exit code 2.
STM32: C0, G0, U0, H7, L4
Process completed with exit code 2.