From 831a2463e4fc06c4870670454d9b90b384e17459 Mon Sep 17 00:00:00 2001 From: Martin Sperl Date: Sat, 11 May 2019 13:45:13 +0000 Subject: [PATCH] dt: overlay: added overlay for several variants of mcp25xxfd This includes overlays for individual can devices but also support for the quadcan-fd hat Signed-off-by: Martin Sperl --- arch/arm/boot/dts/overlays/Makefile | 5 + arch/arm/boot/dts/overlays/README | 30 ++++ .../mcp2517fd-spi0.0-can0-overlay.dts | 79 ++++++++++ .../mcp2517fd-spi0.1-can1-overlay.dts | 79 ++++++++++ .../mcp2517fd-spi1.0-can2-overlay.dts | 79 ++++++++++ .../mcp2517fd-spi1.1-can3-overlay.dts | 79 ++++++++++ .../boot/dts/overlays/quadcan-fd-overlay.dts | 139 ++++++++++++++++++ 7 files changed, 490 insertions(+) create mode 100644 arch/arm/boot/dts/overlays/mcp2517fd-spi0.0-can0-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/mcp2517fd-spi0.1-can1-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/mcp2517fd-spi1.0-can2-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/mcp2517fd-spi1.1-can3-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/quadcan-fd-overlay.dts diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile index 87fd56756b1e7d..6e921b91089306 100644 --- a/arch/arm/boot/dts/overlays/Makefile +++ b/arch/arm/boot/dts/overlays/Makefile @@ -81,6 +81,10 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ mcp23s17.dtbo \ mcp2515-can0.dtbo \ mcp2515-can1.dtbo \ + mcp2517fd-spi0.0-can0.dtbo \ + mcp2517fd-spi0.1-can1.dtbo \ + mcp2517fd-spi1.0-can2.dtbo \ + mcp2517fd-spi1.1-can3.dtbo \ mcp3008.dtbo \ mcp3202.dtbo \ mcp342x.dtbo \ @@ -110,6 +114,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ pwm-2chan.dtbo \ pwm-ir-tx.dtbo \ qca7000.dtbo \ + quadcan-fd.dtbo \ rotary-encoder.dtbo \ rpi-backlight.dtbo \ rpi-cirrus-wm5102.dtbo \ diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README index e5e219d6190c9a..83af0e28f063c8 100644 --- a/arch/arm/boot/dts/overlays/README +++ b/arch/arm/boot/dts/overlays/README @@ -1345,6 +1345,31 @@ Params: oscillator Clock frequency for the CAN controller (Hz) interrupt GPIO for interrupt signal +Name: mcp2517-spi0.0-can0 +Info: Configures the MCP2517/8 CAN controller on spi0.0 +Load: dtoverlay=mcp2517-spi0.0-can0,= +Params: oscillator Clock frequency for the CAN controller (Hz) + spimaxfrequency Maximum SPI frequence (Hz) + interrupt GPIO for interrupt signal + clockdiv use a clock divider of 2 to get system clock + clockoutdiv clock divider used on clockout (0, 1, 2, 4, 10) + opendrain all pins are open-drain (except for RX-CAN) + xstandby use gpio0 as standby signal for transcciever + +Name: mcp2517-spi0.1-can1 +Info: Configures the MCP2517/8 CAN controller on spi0.1 +Load: dtoverlay=mcp2517-spi0.1-can1,= +Params: + +Name: mcp2517-spi1.0-can2 +Info: Configures the MCP2517/8 CAN controller on spi1.0 +Load: dtoverlay=mcp2517-spi1.0-can2,= +Params: + +Name: mcp2517-spi1.1-can3 +Info: Configures the MCP2517/8 CAN controller on spi1.1 +Load: dtoverlay=mcp2517-spi1.1-can3,= +Params: Name: mcp3008 Info: Configures MCP3008 A/D converters @@ -1701,6 +1726,11 @@ Params: int_pin GPIO pin for interrupt signal (default 23) speed SPI bus speed (default 12 MHz) +Name: quadcan-fd +Info: Configures 4 mcp2517fd for the quadcan-fd hat +Load: dtoverlay=quadcan-fd +Params: + Name: rotary-encoder Info: Overlay for GPIO connected rotary encoder. diff --git a/arch/arm/boot/dts/overlays/mcp2517fd-spi0.0-can0-overlay.dts b/arch/arm/boot/dts/overlays/mcp2517fd-spi0.0-can0-overlay.dts new file mode 100644 index 00000000000000..d3a8aae707372b --- /dev/null +++ b/arch/arm/boot/dts/overlays/mcp2517fd-spi0.0-can0-overlay.dts @@ -0,0 +1,79 @@ +/* + * Device tree overlay for mcp2517fd/can0 on spi0.0 + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2837", "brcm,bcm2708", "brcm,bcm2709", "brcm,bcm2710"; + /* disable spi-dev for spi0.0 */ + fragment@0 { + target = <&spi0>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&spidev0>; + __overlay__ { + status = "disabled"; + }; + }; + + /* the interrupt pin of the can-controller */ + fragment@2 { + target = <&gpio>; + __overlay__ { + can0_pins: can0_pins { + brcm,pins = <25>; + brcm,function = <0>; /* input */ + }; + }; + }; + + /* the clock/oscillator of the can-controller */ + fragment@3 { + target-path = "/clocks"; + __overlay__ { + /* external oscillator of mcp2517fd on SPI0.0 */ + can0_osc: can0_osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; + }; + }; + }; + + /* the spi config of the can-controller itself binding everything together */ + fragment@4 { + target = <&spi0>; + __overlay__ { + /* needed to avoid dtc warning */ + #address-cells = <1>; + #size-cells = <0>; + can0: mcp2517fd@0 { + reg = <0>; + compatible = "microchip,mcp2517fd"; + pinctrl-names = "default"; + pinctrl-0 = <&can0_pins>; + spi-max-frequency = <20000000>; + interrupt-parent = <&gpio>; + interrupts = <25 0x8>; + clocks = <&can0_osc>; + microchip,clock-out-div = <10>; + }; + }; + }; + + __overrides__ { + oscillator = <&can0_osc>,"clock-frequency:0"; + spimaxfrequency = <&can0>,"spi-max-frequency:0"; + interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0"; + clockdiv = <&can0>,"microchip,clock-div?"; + clockoutdiv = <&can0>,"microchip,clock-out-div:0"; + opendrain = <&can0>, "microchip,gpio-open-drain?"; + xstandby = <&can0>, "microchip,gpio0-xstandby?"; + }; +}; diff --git a/arch/arm/boot/dts/overlays/mcp2517fd-spi0.1-can1-overlay.dts b/arch/arm/boot/dts/overlays/mcp2517fd-spi0.1-can1-overlay.dts new file mode 100644 index 00000000000000..573dcf96c37f16 --- /dev/null +++ b/arch/arm/boot/dts/overlays/mcp2517fd-spi0.1-can1-overlay.dts @@ -0,0 +1,79 @@ +/* + * Device tree overlay for mcp2517fd/can1 on spi0.1 + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2837", "brcm,bcm2708", "brcm,bcm2709", "brcm,bcm2710"; + /* disable spi-dev for spi0.1 */ + fragment@0 { + target = <&spi0>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&spidev1>; + __overlay__ { + status = "disabled"; + }; + }; + + /* the interrupt pin of the can-controller */ + fragment@2 { + target = <&gpio>; + __overlay__ { + can1_pins: can1_pins { + brcm,pins = <26>; + brcm,function = <0>; /* input */ + }; + }; + }; + + /* the clock/oscillator of the can-controller */ + fragment@3 { + target-path = "/clocks"; + __overlay__ { + /* external oscillator of mcp2517fd on SPI0.0 */ + can1_osc: can1_osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; + }; + }; + }; + + /* the spi config of the can-controller itself binding everything together */ + fragment@4 { + target = <&spi0>; + __overlay__ { + /* needed to avoid dtc warning */ + #address-cells = <1>; + #size-cells = <0>; + can1: mcp2517fd@1 { + reg = <1>; + compatible = "microchip,mcp2517fd"; + pinctrl-names = "default"; + pinctrl-0 = <&can1_pins>; + spi-max-frequency = <20000000>; + interrupt-parent = <&gpio>; + interrupts = <26 0x8>; + clocks = <&can1_osc>; + microchip,clock-out-div = <10>; + }; + }; + }; + + __overrides__ { + oscillator = <&can1_osc>,"clock-frequency:0"; + spimaxfrequency = <&can1>,"spi-max-frequency:0"; + interrupt = <&can1_pins>,"brcm,pins:0",<&can1>,"interrupts:0"; + clockdiv = <&can1>,"microchip,clock-div?"; + clockoutdiv = <&can1>,"microchip,clock-out-div:0"; + opendrain = <&can1>, "microchip,gpio-open-drain?"; + xstandby = <&can1>, "microchip,gpio0-xstandby?"; + }; +}; diff --git a/arch/arm/boot/dts/overlays/mcp2517fd-spi1.0-can2-overlay.dts b/arch/arm/boot/dts/overlays/mcp2517fd-spi1.0-can2-overlay.dts new file mode 100644 index 00000000000000..11eaba12d824bb --- /dev/null +++ b/arch/arm/boot/dts/overlays/mcp2517fd-spi1.0-can2-overlay.dts @@ -0,0 +1,79 @@ +/* + * Device tree overlay for mcp2517fd/can2 on spi0.0 + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2837", "brcm,bcm2708", "brcm,bcm2709", "brcm,bcm2710"; + /* disable spi-dev for spi0.0 */ + fragment@0 { + target = <&spi0>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&spidev0>; + __overlay__ { + status = "disabled"; + }; + }; + + /* the interrupt pin of the can-controller */ + fragment@2 { + target = <&gpio>; + __overlay__ { + can2_pins: can2_pins { + brcm,pins = <25>; + brcm,function = <0>; /* input */ + }; + }; + }; + + /* the clock/oscillator of the can-controller */ + fragment@3 { + target-path = "/clocks"; + __overlay__ { + /* external oscillator of mcp2517fd on SPI0.0 */ + can2_osc: can2_osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; + }; + }; + }; + + /* the spi config of the can-controller itself binding everything together */ + fragment@4 { + target = <&spi0>; + __overlay__ { + /* needed to avoid dtc warning */ + #address-cells = <1>; + #size-cells = <0>; + can2: mcp2517fd@0 { + reg = <0>; + compatible = "microchip,mcp2517fd"; + pinctrl-names = "default"; + pinctrl-0 = <&can2_pins>; + spi-max-frequency = <20000000>; + interrupt-parent = <&gpio>; + interrupts = <25 0x8>; + clocks = <&can2_osc>; + microchip,clock-out-div = <10>; + }; + }; + }; + + __overrides__ { + oscillator = <&can2_osc>,"clock-frequency:0"; + spimaxfrequency = <&can2>,"spi-max-frequency:0"; + interrupt = <&can2_pins>,"brcm,pins:0",<&can2>,"interrupts:0"; + clockdiv = <&can2>,"microchip,clock-div?"; + clockoutdiv = <&can2>,"microchip,clock-out-div:0"; + opendrain = <&can2>, "microchip,gpio-open-drain?"; + xstandby = <&can2>, "microchip,gpio0-xstandby?"; + }; +}; diff --git a/arch/arm/boot/dts/overlays/mcp2517fd-spi1.1-can3-overlay.dts b/arch/arm/boot/dts/overlays/mcp2517fd-spi1.1-can3-overlay.dts new file mode 100644 index 00000000000000..4c4d5ae23d8872 --- /dev/null +++ b/arch/arm/boot/dts/overlays/mcp2517fd-spi1.1-can3-overlay.dts @@ -0,0 +1,79 @@ +/* + * Device tree overlay for mcp2517fd/can3 on spi0.0 + */ + +/dts-v1/; +/plugin/; + +/ { + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2837", "brcm,bcm2708", "brcm,bcm2709", "brcm,bcm2710"; + /* disable spi-dev for spi0.0 */ + fragment@0 { + target = <&spi0>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&spidev0>; + __overlay__ { + status = "disabled"; + }; + }; + + /* the interrupt pin of the can-controller */ + fragment@2 { + target = <&gpio>; + __overlay__ { + can3_pins: can3_pins { + brcm,pins = <25>; + brcm,function = <0>; /* input */ + }; + }; + }; + + /* the clock/oscillator of the can-controller */ + fragment@3 { + target-path = "/clocks"; + __overlay__ { + /* external oscillator of mcp2517fd on SPI0.0 */ + can3_osc: can3_osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; + }; + }; + }; + + /* the spi config of the can-controller itself binding everything together */ + fragment@4 { + target = <&spi0>; + __overlay__ { + /* needed to avoid dtc warning */ + #address-cells = <1>; + #size-cells = <0>; + can3: mcp2517fd@0 { + reg = <0>; + compatible = "microchip,mcp2517fd"; + pinctrl-names = "default"; + pinctrl-0 = <&can3_pins>; + spi-max-frequency = <20000000>; + interrupt-parent = <&gpio>; + interrupts = <25 0x8>; + clocks = <&can3_osc>; + microchip,clock-out-div = <10>; + }; + }; + }; + + __overrides__ { + oscillator = <&can3_osc>,"clock-frequency:0"; + spimaxfrequency = <&can3>,"spi-max-frequency:0"; + interrupt = <&can3_pins>,"brcm,pins:0",<&can3>,"interrupts:0"; + clockdiv = <&can3>,"microchip,clock-div?"; + clockoutdiv = <&can3>,"microchip,clock-out-div:0"; + opendrain = <&can3>, "microchip,gpio-open-drain?"; + xstandby = <&can3>, "microchip,gpio0-xstandby?"; + }; +}; diff --git a/arch/arm/boot/dts/overlays/quadcan-fd-overlay.dts b/arch/arm/boot/dts/overlays/quadcan-fd-overlay.dts new file mode 100644 index 00000000000000..7f237524fa5517 --- /dev/null +++ b/arch/arm/boot/dts/overlays/quadcan-fd-overlay.dts @@ -0,0 +1,139 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2837", "brcm,bcm2708", "brcm,bcm2709", "brcm,bcm2710"; + + /* disable spi-dev for spi0.0 and spi0.1 */ + fragment@0 { + target = <&spi0>; + __overlay__ { + status = "okay"; + spidev@0{ + status = "disabled"; + }; + spidev@1{ + status = "disabled"; + }; + }; + }; + + /* disable spi-dev for spi1.0 and spi1.1 */ + fragment@1 { + target = <&spi1>; + __overlay__ { + status = "okay"; + spidev@0{ + status = "disabled"; + }; + spidev@1{ + status = "disabled"; + }; + }; + }; + + fragment@2 { + target = <&gpio>; + __overlay__ { + interrupt_pins: interrupt_pins { + brcm,pins = <2 4 6 13>; + brcm,function = <0>; /* input */ + }; + + spi1_pins: spi1_pins { + brcm,pins = <19 20 21>; + brcm,function = <3>; /* alt4 */ + }; + + spi1_cs_pins: spi1_cs_pins { + brcm,pins = <17 18>; + brcm,function = <1>; /* output */ + }; + }; + }; + + /* can oscillator */ + fragment@3 { + target-path = "/clocks"; + __overlay__ { + /* external oscillator of mcp2517s */ + can_osc: can_osc { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; + }; + }; + }; + + fragment@4 { + target = <&spi0>; + __overlay__ { + /* needed to avoid dtc warning */ + #address-cells = <1>; + #size-cells = <0>; + can0: can@1 { + compatible = "microchip,mcp2517fd"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&can_osc>; + interrupt-parent = <&gpio>; + interrupts = <4 0x8>; + gpio-controller; + spi-max-frequency = <20000000>; + microchip,gpio0-xstandby; + }; + can1: can@0 { + compatible = "microchip,mcp2517fd"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&can_osc>; + interrupt-parent = <&gpio>; + interrupts = <2 0x8>; + gpio-controller; + spi-max-frequency = <20000000>; + microchip,gpio0-xstandby; + }; + }; + }; + + fragment@5 { + target = <&spi1>; + __overlay__ { + /* needed to avoid dtc warning */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins &spi1_cs_pins>; + cs-gpios = <&gpio 18 1>, <&gpio 17 1>; + + can2: can@0 { + compatible = "microchip,mcp2517fd"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&can_osc>; + interrupt-parent = <&gpio>; + interrupts = <13 0x8>; + gpio-controller; + spi-max-frequency = <20000000>; + microchip,gpio0-xstandby; + }; + can3: can@1 { + compatible = "microchip,mcp2517fd"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&can_osc>; + interrupt-parent = <&gpio>; + interrupts = <6 0x8>; + gpio-controller; + spi-max-frequency = <20000000>; + microchip,gpio0-xstandby; + }; + }; + }; +};