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Looking at the comment in there, I'm pretty sure I needed to do at the time (early 2019) to be able to run traces between the balls using JLCPCB's 4 layer process. It's an NSMD footprint, where the pad size is smaller than the ball size. I can't find any notes on the logic I used there, although remember reading about it in a PDF somewhere. Maybe it's linked somewhere in https://github.com/myelin/ElectronFpga though.
Is this footprint supposed to be for the AS4C4M16SA-6BIN? If so, shouldn't the pad diameter be 0.45mm instead of 0.36mm?
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