refactor: reuse existing FIQ debugger overlay

Signed-off-by: ZHANG Yuntian <[email protected]>
nascs · Sep 6, 2024 · 3f3b4b0 · 3f3b4b0
1 parent 0032c7c
commit 3f3b4b0
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Showing 3 changed files with 6 additions and 21 deletions.
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart2-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart2-m0.dts
@@ -1,12 +1,11 @@
-/dts-v1/;
-/plugin/;
+#include "rk3399-disable-fiq-debugger.dts"
 
 / {
 	metadata {
 		title = "Enable UART2-M0";
 		compatible = "radxa,rock-3a", "radxa,rock-3b", "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3", "radxa,cm3i-io", "radxa,cm3j-rpi-cm4-io";
 		category = "misc";
-		exclusive = "GPIO0_D1", "GPIO0_D0";
+		exclusive = "GPIO0_D1", "GPIO0_D0", "fiq_debugger";
 		description = "Enable UART2-M0.";
 	};
 };
@@ -16,7 +15,3 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart2m0_xfer>;
 };
-
-&fiq_debugger {
-	status = "disabled";
-};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-i2c1-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-i2c1-m0.dts
@@ -1,12 +1,11 @@
-/dts-v1/;
-/plugin/;
+#include "rk3399-disable-fiq-debugger.dts"
 
 / {
 	metadata {
 		title = "Enable I2C1-M0";
 		compatible = "radxa,rock-5a", "radxa,rock-5c", "radxa,rock-5d", "radxa,nx5-io", "radxa,cm5-io", "radxa,cm5-rpi-cm4-io";
 		category = "misc";
-		exclusive = "GPIO0_B5", "GPIO0_B6";
+		exclusive = "GPIO0_B5", "GPIO0_B6", "fiq_debugger";
 		description = "Enable I2C1-M0.
 On Radxa ROCK 5A this is SDA pin 10 & SCL pin 8.
 On Radxa ROCK 5C this is SDA pin 10 & SCL pin 8.
@@ -18,10 +17,6 @@ On Radxa CM5 IO this is SDA pin 10 & SCL pin 8.
 	};
 };
 
-&fiq_debugger {
-	status = "disabled";
-};
-
 &i2c1 {
 	status = "okay";
 	pinctrl-0 = <&i2c1m0_xfer>;

diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-uart2-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-uart2-m0.dts
@@ -1,12 +1,11 @@
-/dts-v1/;
-/plugin/;
+#include "rk3399-disable-fiq-debugger.dts"
 
 / {
 	metadata {
 		title = "Enable UART2-M0";
 		compatible = "radxa,rock-5a", "radxa,rock-5b", "radxa,rock-5b-plus", "radxa,rock-5c", "radxa,rock-5d", "radxa,rock-5t", "radxa,nx5-io", "radxa,cm5-io", "radxa,cm5-rpi-cm4-io";
 		category = "misc";
-		exclusive = "GPIO0_B5", "GPIO0_B6";
+		exclusive = "GPIO0_B5", "GPIO0_B6", "fiq_debugger";
 		description = "Enable UART2-M0.
 On Radxa ROCK 5A this is TX pin 8 & RX pin 10.
 On Radxa ROCK 5B this is TX pin 8 & RX pin 10.
@@ -24,7 +23,3 @@ On Radxa CM5 RPI CM4 IO this is TX pin 8 & RX pin 10.
 	status = "okay";
 	pinctrl-0 = <&uart2m0_xfer>;
 };
-
-&fiq_debugger {
-	status = "disabled";
-};