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feat: add st7735 for 3c/zero3
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Signed-off-by: Nascs Fang <[email protected]>
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nascs committed Sep 19, 2024
1 parent 3f3b4b0 commit b21349c
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1 change: 1 addition & 0 deletions arch/arm64/boot/dts/rockchip/overlays/Makefile
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Expand Up @@ -241,6 +241,7 @@ dtb-$(CONFIG_CLK_RK3568) += \
rk3568-spi3-m1-cs0-mcp2515-gpio4_d1.dtbo \
rk3568-spi3-m1-cs0-mcp2515.dtbo \
rk3568-spi3-m1-cs0-spidev.dtbo \
rk3568-spi3-m1-cs0-st7735.dtbo \
rk3568-spi3-m1-cs0-w5500.dtbo \
rk3568-spi3-m1-cs0-waveshare35.dtbo \
rk3568-spi3-m1-cs0-waveshare35b.dtbo \
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#define DISPLAY_SPI spi3
#include "st77xx.dtsi"

/ {
metadata {
title = "Enable ST7789V LCD on SPI3-M1";
compatible = "radxa,rock-3c", "radxa,zero3";
category = "display";
exclusive = "GPIO4_A6", "GPIO4_C6", "GPIO3_C1", "GPIO3_B2", "GPIO3_A1", "GPIO4_D1", "GPIO4_B2", "GPIO4_B3";
description = "Enable ST7789V LCD on SPI3-M1.
HDMI CEC function will be turned off when this overlay is enabled.";
};
};

&DISPLAY_SPI {
pinctrl-names = "default", "high_speed";
pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>;
pinctrl-1 = <&spi3m1_cs1 &spi3m1_pins_hs>;
};

&st7789 {
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
dc-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
};

&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&hdmitx_scl &hdmitx_sda>;
};
38 changes: 38 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/st77xx.dtsi
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#ifndef __WAVESHARE35_LCD_DTSI__
#define __WAVESHARE35_LCD_DTSI__

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/interrupt-controller/irq.h>

/dts-v1/;
/plugin/;

#ifndef DISPLAY_SPI
#error "DISPLAY_SPI is undefined."
#endif

&DISPLAY_SPI {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;

st7789: st7789@0 {
// compatible = "sitronix,st7735r";
compatible = "sitronix,st7789v";
reg = <0>;
spi-max-frequency = <16000000>;
txbuflen = <32768>;
rotate = <90>;
bgr = <0>;
fps = <60>;
width = <135>;
height = <240>;
buswidth = <8>;
regwidth = <16>;
debug = <0>;
};

};

#endif // __WAVESHARE35_LCD_DTSI__

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