diff --git a/arch/arm64/boot/dts/rockchip/overlays/Makefile b/arch/arm64/boot/dts/rockchip/overlays/Makefile
index cd4fb32c..d3177d32 100644
--- a/arch/arm64/boot/dts/rockchip/overlays/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlays/Makefile
@@ -8,6 +8,9 @@ endif
 ifeq ($(strip $(CONFIG_CPU_RK3399)), y)
 	CONFIG_CLK_RK3399 ?= y
 endif
+ifeq ($(strip $(CONFIG_CPU_RK3528)), y)
+	CONFIG_CLK_RK3528 ?= y
+endif
 ifeq ($(strip $(CONFIG_CPU_RK3568)), y)
 	CONFIG_CLK_RK3568 ?= y
 endif
@@ -101,6 +104,22 @@ dtb-$(CONFIG_CPU_RK3399) += \
 	rock-4se-radxa-display-8hd.dtbo \
 	rock-4-radxa-display-10hd.dtbo
 
+dtb-$(CONFIG_CLK_RK3528) += \
+	rk3528-dwc3-otg.dtbo \
+	rk3528-fiq-debugger-uart1m0.dtbo \
+	rk3528-fiq-debugger-uart3m0.dtbo \
+	rk3528-fiq-debugger-uart3m1.dtbo \
+	rk3528-fiq-debugger-uart7m0.dtbo \
+	rk3528-pwm0-m0.dtbo \
+	rk3528-pwm3-m0.dtbo \
+	rk3528-pwm4-m0.dtbo \
+	rk3528-pwm5-m0.dtbo \
+	rk3528-uart0-m0.dtbo \
+	rk3528-uart1-m0.dtbo \
+	rk3528-uart3-m0.dtbo \
+	rk3528-uart3-m1.dtbo \
+	rk3528-uart7-m0.dtbo
+
 dtb-$(CONFIG_CLK_RK3568) += \
 	audioinjector-isolated-soundcard.dtbo \
 	radxa-cm3-io-camera-v2-imx219-cam1.dtbo \
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-dwc3-otg.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-dwc3-otg.dts
new file mode 100644
index 00000000..2895a65c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-dwc3-otg.dts
@@ -0,0 +1,18 @@
+// ROCK 2A USB OTG
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Set OTG port to be controlled by hardware switch";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "usbdrd_dwc3-dr_mode";
+		description = "Set OTG port to be controlled by hardware switch.";
+	};
+};
+
+&usbdrd_dwc3 {
+	status = "okay";
+	dr_mode = "otg";
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart1m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart1m0.dts
new file mode 100644
index 00000000..37076830
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart1m0.dts
@@ -0,0 +1,25 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable FIQ Debugger on UART1-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_A7", "GPIO4_A6";
+		description = "Enable FIQ Debugger on UART1-M0.";
+	};
+};
+
+&{/} {
+	fiq-debugger {
+		status = "okay";
+		rockchip,serial-id = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart1m0_xfer>;
+	};
+};
+
+&uart1 {
+	status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart3m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart3m0.dts
new file mode 100644
index 00000000..55f38873
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart3m0.dts
@@ -0,0 +1,25 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable FIQ Debugger on UART3-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_B0", "GPIO4_B1";
+		description = "Enable FIQ Debugger on UART3-M0.";
+	};
+};
+
+&{/} {
+	fiq-debugger {
+		status = "okay";
+		rockchip,serial-id = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart3m0_xfer>;
+	};
+};
+
+&uart3 {
+	status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart3m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart3m1.dts
new file mode 100644
index 00000000..3f982cd5
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart3m1.dts
@@ -0,0 +1,25 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable FIQ Debugger on UART3-M1";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_B7", "GPIO4_C0";
+		description = "Enable FIQ Debugger on UART3-M1.";
+	};
+};
+
+&{/} {
+	fiq-debugger {
+		status = "okay";
+		rockchip,serial-id = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart3m1_xfer>;
+	};
+};
+
+&uart3 {
+	status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart7m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart7m0.dts
new file mode 100644
index 00000000..13fe4e60
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-fiq-debugger-uart7m0.dts
@@ -0,0 +1,25 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable FIQ Debugger on UART7-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO3_B3", "GPIO3_B2";
+		description = "Enable FIQ Debugger on UART7-M0.";
+	};
+};
+
+&{/} {
+	fiq-debugger {
+		status = "okay";
+		rockchip,serial-id = <7>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart7m0_xfer>;
+	};
+};
+
+&uart7 {
+	status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm0-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm0-m0.dts
new file mode 100644
index 00000000..cb1aae8f
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm0-m0.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM0-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_C3";
+		description = "Enable PWM0-M0.\nOn Radxa ROCK 2A this is pin 32.";
+	};
+};
+
+&pwm0 {
+	status = "disabled";
+	pinctrl-names = "active";
+	pinctrl-0 = <&pwm0m0_pins>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm3-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm3-m0.dts
new file mode 100644
index 00000000..0b0c34eb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm3-m0.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM3-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_C6";
+		description = "Enable PWM3-M0.\nOn Radxa ROCK 2A this is pin 15.";
+	};
+};
+
+&pwm3 {
+	status = "disabled";
+	pinctrl-names = "active";
+	pinctrl-0 = <&pwm3m0_pins>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm4-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm4-m0.dts
new file mode 100644
index 00000000..9cdb6f7a
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm4-m0.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM4-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_B7";
+		description = "Enable PWM5-M0.\nOn Radxa ROCK 2A this is pin 11.";
+	};
+};
+
+&pwm4 {
+	status = "disabled";
+	pinctrl-names = "active";
+	pinctrl-0 = <&pwm4m0_pins>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm5-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm5-m0.dts
new file mode 100644
index 00000000..cf0501f4
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-pwm5-m0.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM5-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_C0";
+		description = "Enable PWM5-M0.\nOn Radxa ROCK 2A this is pin 13.";
+	};
+};
+
+&pwm5 {
+	status = "disabled";
+	pinctrl-names = "active";
+	pinctrl-0 = <&pwm5m0_pins>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart0-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart0-m0.dts
new file mode 100644
index 00000000..200d782b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart0-m0.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable UART0-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_C7", "GPIO4_D0";
+		description = "Enable UART0-M0.\nOn Radxa ROCK 2A this is RX pin 10 & TX pin 8.";
+	};
+};
+
+&{/} {
+	fiq-debugger {
+		status = "disabled";
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart1-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart1-m0.dts
new file mode 100644
index 00000000..f29b3d90
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart1-m0.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable UART1-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_A7", "GPIO4_A6";
+		description = "Enable UART1-M0.\nOn Radxa ROCK 2A this is RX pin 40 & TX pin 36.";
+	};
+};
+
+&uart1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1m0_xfer>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart3-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart3-m0.dts
new file mode 100644
index 00000000..79e76979
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart3-m0.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable UART3-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_B0", "GPIO4_B1";
+		description = "Enable UART3-M0.\nOn Radxa ROCK 2A this is RX pin 16 & TX pin 18.";
+	};
+};
+
+&uart3 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3m0_xfer>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart3-m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart3-m1.dts
new file mode 100644
index 00000000..1a43b974
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart3-m1.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable UART3-M1";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO4_B7", "GPIO4_C0";
+		description = "Enable UART3-M1.\nOn Radxa ROCK 2A this is RX pin 11 & TX pin 13.";
+	};
+};
+
+&uart3 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3m1_xfer>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart7-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart7-m0.dts
new file mode 100644
index 00000000..8c1eac2c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/rk3528-uart7-m0.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable UART7-M0";
+		compatible = "radxa,rock-2a";
+		category = "misc";
+		exclusive = "GPIO3_B3", "GPIO3_B2";
+		description = "Enable UART7-M0.\nOn Radxa ROCK 2A this is RX pin 27 & TX pin 28.";
+	};
+};
+
+&uart7 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart7m0_xfer>;
+};