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feat: add spi1 to rock2
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Signed-off-by: Nascs Fang <[email protected]>
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nascs committed Oct 24, 2024
1 parent ea57ba2 commit fec6519
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Showing 2 changed files with 32 additions and 0 deletions.
1 change: 1 addition & 0 deletions arch/arm64/boot/dts/rockchip/overlays/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -136,6 +136,7 @@ dtb-$(CONFIG_CLK_RK3528) += \
rk3528-spi0-cs1-enc28j60.dtbo \
rk3528-spi0-cs1-mcp2515.dtbo \
rk3528-spi0-cs1-spidev.dtbo \
rk3528-spi1-cs-gpio.dtbo \
rk3528-uart0-m0.dtbo \
rk3528-uart1-m0.dtbo \
rk3528-uart2-m1.dtbo \
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31 changes: 31 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/rk3528-spi1-cs-gpio.dts
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@@ -0,0 +1,31 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>

/ {
metadata {
title = "Enable spidev on SPI1 over PIN_26";
compatible = "radxa,rock-2a", "radxa,rock-2f", "radxa,medge-rk3528a-io";
category = "misc";
exclusive = "GPIO1_B6", "GPIO1_B7", "GPIO1_C0", "GPIO4_C1";
description = "Enable spidev on SPI1 over PIN_26.";
};
};

&spi1 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
max-freq = <50000000>;
num-cs = <1>;
cs-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&spi1_pins>;

spidev@1 {
compatible = "rockchip,spidev";
status = "okay";
reg = <1>;
spi-max-frequency = <50000000>;
};
};

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