adapt npu box_iou_quadri (#3179)

mmcv/ops/csrc/pytorch/npu/box_iou_quadri_npu.cpp

@@ -0,0 +1,19 @@
+#include "pytorch_npu_helper.hpp"
+
+using namespace NPU_NAME_SPACE;
+using namespace std;
+
+void box_iou_quadri_impl(const Tensor boxes1, const Tensor boxes2, Tensor ious,
+                          const int mode_flag, const bool aligned);
+
+void box_iou_quadri_npu(const Tensor boxes1, const Tensor boxes2, Tensor ious,
+                         const int mode_flag, const bool aligned) {
+
+  TORCH_CHECK(boxes1.size(1) == 8, "boxes1 must be 2D tensor (N, 8)");
+  TORCH_CHECK(boxes1.size(1) == 8, "boxes1 must be 2D tensor (N, 8)");
+
+  EXEC_NPU_CMD(aclnnBoxIou, boxes1, boxes2, mode_flag, aligned, ious);
+  return;
+}
+
+REGISTER_NPU_IMPL(box_iou_quadri_impl, box_iou_quadri_npu);

tests/test_ops/test_box_iou_quadri.py

@@ -3,7 +3,7 @@
 import pytest
 import torch
 
-from mmcv.utils import IS_CUDA_AVAILABLE
+from mmcv.utils import IS_CUDA_AVAILABLE, IS_NPU_AVAILABLE
 
 
 class TestBoxIoUQuadri:
@@ -14,6 +14,10 @@ class TestBoxIoUQuadri:
             'cuda',
             marks=pytest.mark.skipif(
                 not IS_CUDA_AVAILABLE, reason='requires CUDA support')),
+        pytest.param(
+            'npu',
+            marks=pytest.mark.skipif(
+                not IS_NPU_AVAILABLE, reason='requires NPU support'))
     ])
     def test_box_iou_quadri_cuda(self, device):
         from mmcv.ops import box_iou_quadri
@@ -48,6 +52,10 @@ def test_box_iou_quadri_cuda(self, device):
             'cuda',
             marks=pytest.mark.skipif(
                 not IS_CUDA_AVAILABLE, reason='requires CUDA support')),
+        pytest.param(
+            'npu',
+            marks=pytest.mark.skipif(
+                not IS_NPU_AVAILABLE, reason='requires NPU support'))
     ])
     def test_box_iou_quadri_iof_cuda(self, device):
         from mmcv.ops import box_iou_quadri