No testing of memory hazards

[jordancarlin]

As far as I can tell, the only hazards we check for right now are with the integer and floating point registers. If the idea is to test RAW, WAR, and WAW hazards, then we should also be checking consecutive loads/stores to the same address. riscvISACOV came with a built in function for this (check_mem_hazards) similar to the check_gpr_hazards that we are already using. All load and store instructions should be updated to include this as a coverpoint.