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Why choosing ex4 to deal with interrupt and exception #44

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Grubby-CPU opened this issue Oct 12, 2021 · 2 comments
Open

Why choosing ex4 to deal with interrupt and exception #44

Grubby-CPU opened this issue Oct 12, 2021 · 2 comments

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@Grubby-CPU
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As shown in xuq_cpl.vhdl, ex4 is used to deal with the interrupt and exception. Why ex4 instead of ex3 or ex5? Any comments about this?

@zhaoxiahust
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zhaoxiahust commented Nov 13, 2021

I think there are many reasons related to this. First, you want to move this function as early as possible since it flushes the whole pipeline which degrades the performance. Second, you need to put this function behind some events such as injecting a load miss into the LMQ, getting the right branch prediction result and so on. Yep, you also need to consider the exception happening time of some instructions such as a load instruction which causes a TLB exception.

Let's look forward to the detailed explanation from @openpowerwtf .

@openpowerwtf
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openpowerwtf commented Mar 3, 2022

Have you read Appendix D of the spec? There are lots of details about the pipe in general, and arbitration, stalls, and flushes.

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