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Specify Top Module for Pure VHDL Design Exclusively During Design Elaboration #9444

Specify Top Module for Pure VHDL Design Exclusively During Design Elaboration

Specify Top Module for Pure VHDL Design Exclusively During Design Elaboration #9444

Triggered via pull request August 14, 2024 08:49
Status Success
Total duration 48m 54s
Artifacts 3

main.yml

on: pull_request
Matrix: centos7-gcc
Matrix: linux-gcc
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6 warnings
ubuntu-coverage
Codecov: Failed to properly create commit: The process '/home/runner/work/_actions/codecov/codecov-action/v4.1.0/dist/codecov' failed with exit code 1
macos-gcc
p7zip 17.05 is already installed and up-to-date. To reinstall 17.05, run: brew reinstall p7zip
macos-clang
p7zip 17.05 is already installed and up-to-date. To reinstall 17.05, run: brew reinstall p7zip
macos-clang
macOS's Gatekeeper has been disabled for this Cask
windows-msvc
The following actions use a deprecated Node.js version and will be forced to run on node20: actions/[email protected]. For more info: https://github.blog/changelog/2024-03-07-github-actions-all-actions-will-run-on-node20-instead-of-node16-by-default/
Deprecation notice: v1, v2, and v3 of the artifact actions
The following artifacts were uploaded using a version of actions/upload-artifact that is scheduled for deprecation: "foedag-windows-msvc", "foedag-windows-msvc-regression". Please update your workflow to use v4 of the artifact actions. Learn more: https://github.blog/changelog/2024-04-16-deprecation-notice-v3-of-the-artifact-actions/

Artifacts

Produced during runtime
Name Size
foedag-linux-gcc-regression Expired
11 MB
foedag-windows-msvc Expired
346 MB
foedag-windows-msvc-regression Expired
141 MB