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We're seeing warnings about Inconsistent data wrt SRAM type in the simulator log. We need to explore this, as it came about when doing PRE in #14.
Inconsistent data wrt SRAM type
Here's an example from a packet-test test job:
packet-test
160 :04-22 12:26:28.351808: <0,3,4,7,4> WARN MauSramReg::is_match_sram() Inconsistent data wrt SRAM type 161 :04-22 12:26:28.351812: <0,3,4,7,5> WARN MauSramReg::is_match_sram() Inconsistent data wrt SRAM type 162 :04-22 12:26:28.351815: <0,3,4,7,5> WARN MauSramReg::is_match_sram() Inconsistent data wrt SRAM type 163 :04-22 12:27:52.172975: :-:-:<0,-,0>:Begin packet processing 164 :04-22 12:27:52.173073: :0x1:-:<0,1,0>:========== Ingress Pkt from port 144 (64 bytes) ========== 165 :04-22 12:27:52.173081: :0x1:-:<0,1,0>:Packet : 166 :04-22 12:27:52.173087: :0x1:-:<0,1,0>:e0 d5 5e 67 89 ac e0 d5 5e 67 89 ab 08 00 45 00 167 :04-22 12:27:52.173093: :0x1:-:<0,1,0>:00 1c 00 00 40 00 ff 11 54 a8 0a 0a 09 0a 0a 0a 168 :04-22 12:27:52.173098: :0x1:-:<0,1,0>:0a 0b 0d 05 11 5c 00 08 ba 54 00 00 00 00 00 00 169 :04-22 12:27:52.173103: :0x1:-:<0,1,0>:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 170 :04-22 12:27:52.173114: :0x1:-:<0,1,->:========== Packet to input parser: from port 144 (96 bytes) ========== 171 :04-22 12:27:52.173119: :0x1:-:<0,1,->:Packet : 172 :04-22 12:27:52.173124: :0x1:-:<0,1,->:00 90 00 14 98 ce 41 c0 00 00 00 00 00 00 00 00 173 :04-22 12:27:52.173129: :0x1:-:<0,1,->:00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 174 :04-22 12:27:52.173134: :0x1:-:<0,1,->:e0 d5 5e 67 89 ac e0 d5 5e 67 89 ab 08 00 45 00 175 :04-22 12:27:52.173139: :0x1:-:<0,1,->:00 1c 00 00 40 00 ff 11 54 a8 0a 0a 09 0a 0a 0a
The text was updated successfully, but these errors were encountered:
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We're seeing warnings about
Inconsistent data wrt SRAM type
in the simulator log. We need to explore this, as it came about when doing PRE in #14.Here's an example from a
packet-test
test job:The text was updated successfully, but these errors were encountered: