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Represent slices #22

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asl opened this issue Jan 24, 2025 · 0 comments
Open

Represent slices #22

asl opened this issue Jan 24, 2025 · 0 comments
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@asl
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asl commented Jan 24, 2025

Slices are a bit tricky as they might appear both on RHS and LHS of expressions, e.g.

        bit<8> n = 8w0b11111111;
        n[7:4] = 4w0;
        bit<4> a = n[7:4]

While RHS could be both a variable (or other reference in the future) or an SSA value, the LHS is required to be a reference. In theory it would be possible to represent the whole set of operations as load + slice op (that would operate on SSA values) + store (load might be optional, yes), it would be a bit awkward and does not represent the required semantics as we might access only selected bits and not the whole (potential large object).

I am proposing to implement 3 operations:

  • p4hir.slice that would operate on SSA values
  • p4hir.load.slice that would only load selected bits specified by slice (similar in some sense to LLVM's extload SDAG node)
  • p4hir.store.slice that would only store select bits specified by slice (similar to LLVM's truncstore SDAG node).

When necessary two latter operations could be lowered to sequences of ordinary p4hir.load, p4hir.store and p4hir.slice.

@asl asl self-assigned this Jan 24, 2025
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