diff --git a/emulator/src/core/sys_processor.cpp b/emulator/src/core/sys_processor.cpp index fd4770f9..6bcb8658 100644 --- a/emulator/src/core/sys_processor.cpp +++ b/emulator/src/core/sys_processor.cpp @@ -190,7 +190,7 @@ BYTE8 CPUExecuteInstruction(void) { forceSync = CPUExecute16(); } - int cycleMax = CYCLES_PER_FRAME; + int cycleMax = CYCLES_PER_FRAME; if (cycles < cycleMax && forceSync == 0) return 0; // Not completed a frame. cycles = 0; // Reset cycle counter. HWSync(); // Update any hardware @@ -213,6 +213,16 @@ void CPUWriteMemory(WORD16 address,BYTE8 data) { #include "gfx.h" +// *************************************************************************************** +// +// Handle Sweet16 Sync +// +// *************************************************************************************** + +void TMRSweet16Sync(void) { + cycles = CYCLES_PER_FRAME; // If yields running via API do frame. +} + // ******************************************************************************************************************************* // // Execute chunk of code, to either of two break points or frame-out, return non-zero frame rate on frame, breakpoint 0 diff --git a/firmware/common/include/interface/timer.h b/firmware/common/include/interface/timer.h index 9129fe56..3e6dcaf5 100644 --- a/firmware/common/include/interface/timer.h +++ b/firmware/common/include/interface/timer.h @@ -14,6 +14,7 @@ #define _TIMER_H uint32_t TMRRead(void); +void TMRSweet16Sync(void); #endif diff --git a/firmware/common/sources/interface/sweet16.cpp b/firmware/common/sources/interface/sweet16.cpp index 0011c3ce..431cbf16 100644 --- a/firmware/common/sources/interface/sweet16.cpp +++ b/firmware/common/sources/interface/sweet16.cpp @@ -18,7 +18,9 @@ // // *************************************************************************************** -static uint16_t sweet_reg[16]; +static uint16_t default_sweet_registers[16]; + +static uint16_t *sweet_reg = default_sweet_registers; // *************************************************************************************** // @@ -113,7 +115,7 @@ bool SW16Execute(uint16_t reg) { bool bQuitSweet = false; // Set by RTN. int32_t yieldCounter = 6000000/60; // 6 MIPS , 60 frames per second uint16_t temp; // (set by the emulator) - + sweet_reg = default_sweet_registers; // Execute using the memory allocated. for (int i = 0;i < 16;i++) { // Copy cpu memory to working registers sweet_reg[i] = cpuMemory[reg+i*2]+(cpuMemory[reg+i*2+1] << 8); } @@ -126,6 +128,7 @@ bool SW16Execute(uint16_t reg) { cpuMemory[reg+i*2] = sweet_reg[i] & 0xFF; cpuMemory[reg+i*2+1] = sweet_reg[i] >> 8; } + TMRSweet16Sync(); // Sweet 16 Frame Sync return bQuitSweet; } @@ -138,18 +141,11 @@ bool SW16Execute(uint16_t reg) { bool SW16ExecuteOne(uint16_t reg) { bool bQuitSweet = false; // Set by RTN. uint16_t temp; // (set by the emulator) - - for (int i = 0;i < 16;i++) { // Copy cpu memory to working registers - sweet_reg[i] = cpuMemory[reg+i*2]+(cpuMemory[reg+i*2+1] << 8); - } - + sweet_reg = (uint16_t *)(cpuMemory+reg); // This is non RISC so we can access directly. switch(FETCH8()) { #include "data/sweet_opcodes.h" } - for (int i = 0;i < 16;i++) { // Copy working registers to CPU memory - cpuMemory[reg+i*2] = sweet_reg[i] & 0xFF; - cpuMemory[reg+i*2+1] = sweet_reg[i] >> 8; - } + sweet_reg = default_sweet_registers; // Execute using the memory allocated. return bQuitSweet; } @@ -158,7 +154,6 @@ bool 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