From 82e0b9a5c5c188e698300a528b0632648cf3e09b Mon Sep 17 00:00:00 2001 From: Paul Donahue Date: Tue, 19 Mar 2024 13:08:37 -0700 Subject: [PATCH] Address https://github.com/riscv/riscv-debug-spec/issues/985 --- Sdtrig.adoc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Sdtrig.adoc b/Sdtrig.adoc index a2c40b40..1b2fbef1 100644 --- a/Sdtrig.adoc +++ b/Sdtrig.adoc @@ -118,7 +118,7 @@ Instruction address misaligned + Environment call + Environment break + Load/Store/AMO address breakpoint -.>| mcontrol/mcontrol6 load/store address/data before +.>| mcontrol/mcontrol6 load/store address before, store data before || 4, 6 | Optionally: Load/Store/AMO address misaligned | || 13, 15, 21, 23, 5, 7 | During address translation for an explicit memory access: First encountered page fault, guest-page fault, or access @@ -370,4 +370,4 @@ trigger firing at a different time than is expected. Attempts to access an unimplemented Trigger Module Register raise an illegal instruction exception. -include::build/hwbp_registers.adoc[] \ No newline at end of file +include::build/hwbp_registers.adoc[]