Is the schematic now correct?

[ixmeins]

Hi, I have completed my build. I have console output from the RIA which is good and I can see a nice clean 4MHz clock signal coming from it to the rest of the circuit.
When I try to modify RAM in the CLI it comes back with a watchdog timeout. When I use the RESET command it just hang (possibly correct) but the reset line is quite noisy and does not to swing to 0v. My schematic has RESB from pin 34 of the RIA.
I had a look at the graphic of the PCB layout in the patreon post and followed a couple of the lines like the RESB and RWB and they don't appear to go where the schematic says.
Essentially I don't want to go on a wild goose chase looking for issues that are not there.
Cheers, Ingmar

[ixmeins]

Update - disregard I think I have a faulty / fake 65c02..