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MAINFILE.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 2018 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel FPGA IP License Agreement, or other applicable license
# agreement, including, without limitation, that your use is for
# the sole purpose of programming logic devices manufactured by
# Intel and sold by Intel or its authorized distributors. Please
# refer to the applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition
# Date created = 23:19:48 October 25, 2018
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# MAINFILE_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus Prime software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CSEBA6U23I7
set_global_assignment -name TOP_LEVEL_ENTITY MAINFILE
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 18.0.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "23:19:48 OCTOBER 25, 2018"
set_global_assignment -name LAST_QUARTUS_VERSION "18.0.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name VERILOG_FILE MAINFILE.v
set_global_assignment -name VERILOG_FILE ip/UI.v
set_global_assignment -name VERILOG_FILE ip/ServoControl.v
set_global_assignment -name VERILOG_FILE ip/PWM_Geneator.v
set_global_assignment -name VERILOG_FILE uart/uart_fifo.v
set_global_assignment -name VERILOG_FILE uart/uart_control.v
set_global_assignment -name VERILOG_FILE uart/async_transmitter.v
set_global_assignment -name VERILOG_FILE uart/async_receiver.v
set_global_assignment -name VERILOG_FILE commandSelector.v
set_location_assignment PIN_AF4 -to BT_KEY
set_location_assignment PIN_AD17 -to BT_UART_TX
set_location_assignment PIN_V11 -to FPGA_CLK1_50
set_location_assignment PIN_C12 -to BT_UART_RX
set_location_assignment PIN_Y13 -to FPGA_CLK2_50
set_location_assignment PIN_E11 -to FPGA_CLK3_50
set_location_assignment PIN_AF28 -to GPIO_1[5]
set_location_assignment PIN_AG28 -to GPIO_1[4]
set_location_assignment PIN_AD26 -to GPIO_1[3]
set_location_assignment PIN_AA15 -to GPIO_1[2]
set_location_assignment PIN_AC24 -to GPIO_1[1]
set_location_assignment PIN_Y15 -to GPIO_1[0]
set_location_assignment PIN_AH16 -to KEY[1]
set_location_assignment PIN_AH17 -to KEY[0]
set_location_assignment PIN_AA23 -to LED[7]
set_location_assignment PIN_Y16 -to LED[6]
set_location_assignment PIN_AE26 -to LED[5]
set_location_assignment PIN_AF26 -to LED[4]
set_location_assignment PIN_V15 -to LED[3]
set_location_assignment PIN_V16 -to LED[2]
set_location_assignment PIN_AA24 -to LED[1]
set_location_assignment PIN_W15 -to LED[0]
set_location_assignment PIN_W20 -to SW[3]
set_location_assignment PIN_W21 -to SW[2]
set_location_assignment PIN_W24 -to SW[1]
set_location_assignment PIN_Y24 -to SW[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BT_KEY
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BT_UART_RX
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BT_UART_TX
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK1_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK2_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK3_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO_1[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top